2 * i.MX IPUv3 Graphics driver
4 * Copyright (C) 2011 Sascha Hauer, Pengutronix
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 #include <linux/component.h>
16 #include <linux/module.h>
17 #include <linux/export.h>
18 #include <linux/device.h>
19 #include <linux/platform_device.h>
21 #include <drm/drm_crtc_helper.h>
23 #include <linux/clk.h>
24 #include <linux/errno.h>
25 #include <drm/drm_gem_cma_helper.h>
26 #include <drm/drm_fb_cma_helper.h>
28 #include <video/imx-ipu-v3.h>
30 #include "ipuv3-plane.h"
32 #define DRIVER_DESC "i.MX IPUv3 Graphics"
37 struct imx_drm_crtc *imx_crtc;
39 /* plane[0] is the full plane, plane[1] is the partial plane */
40 struct ipu_plane *plane[2];
45 struct drm_pending_vblank_event *page_flip_event;
46 struct drm_framebuffer *newfb;
53 #define to_ipu_crtc(x) container_of(x, struct ipu_crtc, base)
55 static void ipu_fb_enable(struct ipu_crtc *ipu_crtc)
57 struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
59 if (ipu_crtc->enabled)
63 ipu_plane_enable(ipu_crtc->plane[0]);
64 /* Start DC channel and DI after IDMAC */
65 ipu_dc_enable_channel(ipu_crtc->dc);
66 ipu_di_enable(ipu_crtc->di);
67 drm_crtc_vblank_on(&ipu_crtc->base);
69 ipu_crtc->enabled = 1;
72 static void ipu_fb_disable(struct ipu_crtc *ipu_crtc)
74 struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
76 if (!ipu_crtc->enabled)
79 /* Stop DC channel and DI before IDMAC */
80 ipu_dc_disable_channel(ipu_crtc->dc);
81 ipu_di_disable(ipu_crtc->di);
82 ipu_plane_disable(ipu_crtc->plane[0]);
84 drm_crtc_vblank_off(&ipu_crtc->base);
86 ipu_crtc->enabled = 0;
89 static void ipu_crtc_dpms(struct drm_crtc *crtc, int mode)
91 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
93 dev_dbg(ipu_crtc->dev, "%s mode: %d\n", __func__, mode);
96 case DRM_MODE_DPMS_ON:
97 ipu_fb_enable(ipu_crtc);
99 case DRM_MODE_DPMS_STANDBY:
100 case DRM_MODE_DPMS_SUSPEND:
101 case DRM_MODE_DPMS_OFF:
102 ipu_fb_disable(ipu_crtc);
107 static int ipu_page_flip(struct drm_crtc *crtc,
108 struct drm_framebuffer *fb,
109 struct drm_pending_vblank_event *event,
110 uint32_t page_flip_flags)
112 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
118 ret = imx_drm_crtc_vblank_get(ipu_crtc->imx_crtc);
120 dev_dbg(ipu_crtc->dev, "failed to acquire vblank counter\n");
121 list_del(&event->base.link);
126 ipu_crtc->newfb = fb;
127 ipu_crtc->page_flip_event = event;
128 crtc->primary->fb = fb;
133 static const struct drm_crtc_funcs ipu_crtc_funcs = {
134 .set_config = drm_crtc_helper_set_config,
135 .destroy = drm_crtc_cleanup,
136 .page_flip = ipu_page_flip,
139 static int ipu_crtc_mode_set(struct drm_crtc *crtc,
140 struct drm_display_mode *orig_mode,
141 struct drm_display_mode *mode,
143 struct drm_framebuffer *old_fb)
145 struct drm_device *dev = crtc->dev;
146 struct drm_encoder *encoder;
147 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
148 struct ipu_di_signal_cfg sig_cfg = {};
149 unsigned long encoder_types = 0;
152 dev_dbg(ipu_crtc->dev, "%s: mode->hdisplay: %d\n", __func__,
154 dev_dbg(ipu_crtc->dev, "%s: mode->vdisplay: %d\n", __func__,
157 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head)
158 if (encoder->crtc == crtc)
159 encoder_types |= BIT(encoder->encoder_type);
161 dev_dbg(ipu_crtc->dev, "%s: attached to encoder types 0x%lx\n",
162 __func__, encoder_types);
165 * If we have DAC or LDB, then we need the IPU DI clock to be
166 * the same as the LDB DI clock. For TVDAC, derive the IPU DI
167 * clock from 27 MHz TVE_DI clock, but allow to divide it.
169 if (encoder_types & (BIT(DRM_MODE_ENCODER_DAC) |
170 BIT(DRM_MODE_ENCODER_LVDS)))
171 sig_cfg.clkflags = IPU_DI_CLKMODE_SYNC | IPU_DI_CLKMODE_EXT;
172 else if (encoder_types & BIT(DRM_MODE_ENCODER_TVDAC))
173 sig_cfg.clkflags = IPU_DI_CLKMODE_EXT;
175 sig_cfg.clkflags = 0;
177 sig_cfg.enable_pol = 1;
179 sig_cfg.bus_format = ipu_crtc->bus_format;
180 sig_cfg.v_to_h_sync = 0;
181 sig_cfg.hsync_pin = ipu_crtc->di_hsync_pin;
182 sig_cfg.vsync_pin = ipu_crtc->di_vsync_pin;
184 drm_display_mode_to_videomode(mode, &sig_cfg.mode);
186 ret = ipu_dc_init_sync(ipu_crtc->dc, ipu_crtc->di,
187 mode->flags & DRM_MODE_FLAG_INTERLACE,
188 ipu_crtc->bus_format, mode->hdisplay);
190 dev_err(ipu_crtc->dev,
191 "initializing display controller failed with %d\n",
196 ret = ipu_di_init_sync_panel(ipu_crtc->di, &sig_cfg);
198 dev_err(ipu_crtc->dev,
199 "initializing panel failed with %d\n", ret);
203 return ipu_plane_mode_set(ipu_crtc->plane[0], crtc, mode,
205 0, 0, mode->hdisplay, mode->vdisplay,
206 x, y, mode->hdisplay, mode->vdisplay,
207 mode->flags & DRM_MODE_FLAG_INTERLACE);
210 static void ipu_crtc_handle_pageflip(struct ipu_crtc *ipu_crtc)
213 struct drm_device *drm = ipu_crtc->base.dev;
215 spin_lock_irqsave(&drm->event_lock, flags);
216 if (ipu_crtc->page_flip_event)
217 drm_crtc_send_vblank_event(&ipu_crtc->base,
218 ipu_crtc->page_flip_event);
219 ipu_crtc->page_flip_event = NULL;
220 imx_drm_crtc_vblank_put(ipu_crtc->imx_crtc);
221 spin_unlock_irqrestore(&drm->event_lock, flags);
224 static irqreturn_t ipu_irq_handler(int irq, void *dev_id)
226 struct ipu_crtc *ipu_crtc = dev_id;
228 imx_drm_handle_vblank(ipu_crtc->imx_crtc);
230 if (ipu_crtc->newfb) {
231 struct ipu_plane *plane = ipu_crtc->plane[0];
233 ipu_crtc->newfb = NULL;
234 ipu_plane_set_base(plane, ipu_crtc->base.primary->fb,
236 ipu_crtc_handle_pageflip(ipu_crtc);
242 static bool ipu_crtc_mode_fixup(struct drm_crtc *crtc,
243 const struct drm_display_mode *mode,
244 struct drm_display_mode *adjusted_mode)
246 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
250 drm_display_mode_to_videomode(adjusted_mode, &vm);
252 ret = ipu_di_adjust_videomode(ipu_crtc->di, &vm);
256 drm_display_mode_from_videomode(&vm, adjusted_mode);
261 static void ipu_crtc_prepare(struct drm_crtc *crtc)
263 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
265 ipu_fb_disable(ipu_crtc);
268 static void ipu_crtc_commit(struct drm_crtc *crtc)
270 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
272 ipu_fb_enable(ipu_crtc);
275 static const struct drm_crtc_helper_funcs ipu_helper_funcs = {
276 .dpms = ipu_crtc_dpms,
277 .mode_fixup = ipu_crtc_mode_fixup,
278 .mode_set = ipu_crtc_mode_set,
279 .prepare = ipu_crtc_prepare,
280 .commit = ipu_crtc_commit,
283 static int ipu_enable_vblank(struct drm_crtc *crtc)
288 static void ipu_disable_vblank(struct drm_crtc *crtc)
290 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
292 ipu_crtc->page_flip_event = NULL;
293 ipu_crtc->newfb = NULL;
296 static int ipu_set_interface_pix_fmt(struct drm_crtc *crtc,
297 u32 bus_format, int hsync_pin, int vsync_pin)
299 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
301 ipu_crtc->bus_format = bus_format;
302 ipu_crtc->di_hsync_pin = hsync_pin;
303 ipu_crtc->di_vsync_pin = vsync_pin;
308 static const struct imx_drm_crtc_helper_funcs ipu_crtc_helper_funcs = {
309 .enable_vblank = ipu_enable_vblank,
310 .disable_vblank = ipu_disable_vblank,
311 .set_interface_pix_fmt = ipu_set_interface_pix_fmt,
312 .crtc_funcs = &ipu_crtc_funcs,
313 .crtc_helper_funcs = &ipu_helper_funcs,
316 static void ipu_put_resources(struct ipu_crtc *ipu_crtc)
318 if (!IS_ERR_OR_NULL(ipu_crtc->dc))
319 ipu_dc_put(ipu_crtc->dc);
320 if (!IS_ERR_OR_NULL(ipu_crtc->di))
321 ipu_di_put(ipu_crtc->di);
324 static int ipu_get_resources(struct ipu_crtc *ipu_crtc,
325 struct ipu_client_platformdata *pdata)
327 struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
330 ipu_crtc->dc = ipu_dc_get(ipu, pdata->dc);
331 if (IS_ERR(ipu_crtc->dc)) {
332 ret = PTR_ERR(ipu_crtc->dc);
336 ipu_crtc->di = ipu_di_get(ipu, pdata->di);
337 if (IS_ERR(ipu_crtc->di)) {
338 ret = PTR_ERR(ipu_crtc->di);
344 ipu_put_resources(ipu_crtc);
349 static int ipu_crtc_init(struct ipu_crtc *ipu_crtc,
350 struct ipu_client_platformdata *pdata, struct drm_device *drm)
352 struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
356 ret = ipu_get_resources(ipu_crtc, pdata);
358 dev_err(ipu_crtc->dev, "getting resources failed with %d.\n",
364 dp = IPU_DP_FLOW_SYNC_BG;
365 ipu_crtc->plane[0] = ipu_plane_init(drm, ipu, pdata->dma[0], dp, 0,
366 DRM_PLANE_TYPE_PRIMARY);
367 if (IS_ERR(ipu_crtc->plane[0])) {
368 ret = PTR_ERR(ipu_crtc->plane[0]);
369 goto err_put_resources;
372 ret = imx_drm_add_crtc(drm, &ipu_crtc->base, &ipu_crtc->imx_crtc,
373 &ipu_crtc->plane[0]->base, &ipu_crtc_helper_funcs,
374 ipu_crtc->dev->of_node);
376 dev_err(ipu_crtc->dev, "adding crtc failed with %d.\n", ret);
377 goto err_put_resources;
380 ret = ipu_plane_get_resources(ipu_crtc->plane[0]);
382 dev_err(ipu_crtc->dev, "getting plane 0 resources failed with %d.\n",
384 goto err_remove_crtc;
387 /* If this crtc is using the DP, add an overlay plane */
388 if (pdata->dp >= 0 && pdata->dma[1] > 0) {
389 ipu_crtc->plane[1] = ipu_plane_init(drm, ipu, pdata->dma[1],
391 drm_crtc_mask(&ipu_crtc->base),
392 DRM_PLANE_TYPE_OVERLAY);
393 if (IS_ERR(ipu_crtc->plane[1]))
394 ipu_crtc->plane[1] = NULL;
397 ipu_crtc->irq = ipu_plane_irq(ipu_crtc->plane[0]);
398 ret = devm_request_irq(ipu_crtc->dev, ipu_crtc->irq, ipu_irq_handler, 0,
399 "imx_drm", ipu_crtc);
401 dev_err(ipu_crtc->dev, "irq request failed with %d.\n", ret);
402 goto err_put_plane_res;
408 ipu_plane_put_resources(ipu_crtc->plane[0]);
410 imx_drm_remove_crtc(ipu_crtc->imx_crtc);
412 ipu_put_resources(ipu_crtc);
417 static int ipu_drm_bind(struct device *dev, struct device *master, void *data)
419 struct ipu_client_platformdata *pdata = dev->platform_data;
420 struct drm_device *drm = data;
421 struct ipu_crtc *ipu_crtc;
424 ipu_crtc = devm_kzalloc(dev, sizeof(*ipu_crtc), GFP_KERNEL);
430 ret = ipu_crtc_init(ipu_crtc, pdata, drm);
434 dev_set_drvdata(dev, ipu_crtc);
439 static void ipu_drm_unbind(struct device *dev, struct device *master,
442 struct ipu_crtc *ipu_crtc = dev_get_drvdata(dev);
444 imx_drm_remove_crtc(ipu_crtc->imx_crtc);
446 ipu_plane_put_resources(ipu_crtc->plane[0]);
447 ipu_put_resources(ipu_crtc);
450 static const struct component_ops ipu_crtc_ops = {
451 .bind = ipu_drm_bind,
452 .unbind = ipu_drm_unbind,
455 static int ipu_drm_probe(struct platform_device *pdev)
457 struct device *dev = &pdev->dev;
460 if (!dev->platform_data)
463 ret = dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
467 return component_add(dev, &ipu_crtc_ops);
470 static int ipu_drm_remove(struct platform_device *pdev)
472 component_del(&pdev->dev, &ipu_crtc_ops);
476 static struct platform_driver ipu_drm_driver = {
478 .name = "imx-ipuv3-crtc",
480 .probe = ipu_drm_probe,
481 .remove = ipu_drm_remove,
483 module_platform_driver(ipu_drm_driver);
485 MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
486 MODULE_DESCRIPTION(DRIVER_DESC);
487 MODULE_LICENSE("GPL");
488 MODULE_ALIAS("platform:imx-ipuv3-crtc");