2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
26 * Eric Anholt <eric@anholt.net>
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include <linux/export.h>
33 #include <drm/drm_atomic_helper.h>
34 #include <drm/drm_crtc.h>
35 #include <drm/drm_edid.h>
36 #include "intel_drv.h"
37 #include <drm/i915_drm.h>
39 #include "intel_sdvo_regs.h"
41 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
42 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
43 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
44 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
46 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
49 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
50 #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
51 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
52 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
53 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
56 static const char * const tv_format_names[] = {
57 "NTSC_M" , "NTSC_J" , "NTSC_443",
58 "PAL_B" , "PAL_D" , "PAL_G" ,
59 "PAL_H" , "PAL_I" , "PAL_M" ,
60 "PAL_N" , "PAL_NC" , "PAL_60" ,
61 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
62 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
66 #define TV_FORMAT_NUM ARRAY_SIZE(tv_format_names)
69 struct intel_encoder base;
71 struct i2c_adapter *i2c;
74 struct i2c_adapter ddc;
76 /* Register for the SDVO device: SDVOB or SDVOC */
79 /* Active outputs controlled by this SDVO output */
80 uint16_t controlled_output;
83 * Capabilities of the SDVO device returned by
84 * intel_sdvo_get_capabilities()
86 struct intel_sdvo_caps caps;
88 /* Pixel clock limitations reported by the SDVO device, in kHz */
89 int pixel_clock_min, pixel_clock_max;
92 * For multiple function SDVO device,
93 * this is for current attached outputs.
95 uint16_t attached_output;
98 * Hotplug activation bits for this device
100 uint16_t hotplug_active;
103 * This is set if we're going to treat the device as TV-out.
105 * While we have these nice friendly flags for output types that ought
106 * to decide this for us, the S-Video output on our HDMI+S-Video card
107 * shows up as RGB1 (VGA).
114 * This is set if we treat the device as HDMI, instead of DVI.
117 bool has_hdmi_monitor;
119 bool rgb_quant_range_selectable;
122 * This is set if we detect output of sdvo device as LVDS and
123 * have a valid fixed mode to use with the panel.
128 * This is sdvo fixed pannel mode pointer
130 struct drm_display_mode *sdvo_lvds_fixed_mode;
132 /* DDC bus used by this SDVO encoder */
136 * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
138 uint8_t dtd_sdvo_flags;
141 struct intel_sdvo_connector {
142 struct intel_connector base;
144 /* Mark the type of connector */
145 uint16_t output_flag;
147 /* This contains all current supported TV format */
148 u8 tv_format_supported[TV_FORMAT_NUM];
149 int format_supported_num;
150 struct drm_property *tv_format;
152 /* add the property for the SDVO-TV */
153 struct drm_property *left;
154 struct drm_property *right;
155 struct drm_property *top;
156 struct drm_property *bottom;
157 struct drm_property *hpos;
158 struct drm_property *vpos;
159 struct drm_property *contrast;
160 struct drm_property *saturation;
161 struct drm_property *hue;
162 struct drm_property *sharpness;
163 struct drm_property *flicker_filter;
164 struct drm_property *flicker_filter_adaptive;
165 struct drm_property *flicker_filter_2d;
166 struct drm_property *tv_chroma_filter;
167 struct drm_property *tv_luma_filter;
168 struct drm_property *dot_crawl;
170 /* add the property for the SDVO-TV/LVDS */
171 struct drm_property *brightness;
173 /* this is to get the range of margin.*/
174 u32 max_hscan, max_vscan;
177 struct intel_sdvo_connector_state {
178 /* base.base: tv.saturation/contrast/hue/brightness */
179 struct intel_digital_connector_state base;
182 unsigned overscan_h, overscan_v, hpos, vpos, sharpness;
183 unsigned flicker_filter, flicker_filter_2d, flicker_filter_adaptive;
184 unsigned chroma_filter, luma_filter, dot_crawl;
188 static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder)
190 return container_of(encoder, struct intel_sdvo, base);
193 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
195 return to_sdvo(intel_attached_encoder(connector));
198 static struct intel_sdvo_connector *
199 to_intel_sdvo_connector(struct drm_connector *connector)
201 return container_of(connector, struct intel_sdvo_connector, base.base);
204 static struct intel_sdvo_connector_state *
205 to_intel_sdvo_connector_state(struct drm_connector_state *conn_state)
207 return container_of(conn_state, struct intel_sdvo_connector_state, base.base);
211 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
213 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
214 struct intel_sdvo_connector *intel_sdvo_connector,
217 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
218 struct intel_sdvo_connector *intel_sdvo_connector);
221 * Writes the SDVOB or SDVOC with the given value, but always writes both
222 * SDVOB and SDVOC to work around apparent hardware issues (according to
223 * comments in the BIOS).
225 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
227 struct drm_device *dev = intel_sdvo->base.base.dev;
228 struct drm_i915_private *dev_priv = to_i915(dev);
229 u32 bval = val, cval = val;
232 if (HAS_PCH_SPLIT(dev_priv)) {
233 I915_WRITE(intel_sdvo->sdvo_reg, val);
234 POSTING_READ(intel_sdvo->sdvo_reg);
236 * HW workaround, need to write this twice for issue
237 * that may result in first write getting masked.
239 if (HAS_PCH_IBX(dev_priv)) {
240 I915_WRITE(intel_sdvo->sdvo_reg, val);
241 POSTING_READ(intel_sdvo->sdvo_reg);
246 if (intel_sdvo->port == PORT_B)
247 cval = I915_READ(GEN3_SDVOC);
249 bval = I915_READ(GEN3_SDVOB);
252 * Write the registers twice for luck. Sometimes,
253 * writing them only once doesn't appear to 'stick'.
254 * The BIOS does this too. Yay, magic
256 for (i = 0; i < 2; i++)
258 I915_WRITE(GEN3_SDVOB, bval);
259 POSTING_READ(GEN3_SDVOB);
260 I915_WRITE(GEN3_SDVOC, cval);
261 POSTING_READ(GEN3_SDVOC);
265 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
267 struct i2c_msg msgs[] = {
269 .addr = intel_sdvo->slave_addr,
275 .addr = intel_sdvo->slave_addr,
283 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
286 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
290 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
291 /** Mapping of command numbers to names, for debug output */
292 static const struct _sdvo_cmd_name {
295 } __attribute__ ((packed)) sdvo_cmd_names[] = {
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
340 /* Add the op code for SDVO enhancements */
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
404 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
405 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
406 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
409 #define SDVO_NAME(svdo) ((svdo)->port == PORT_B ? "SDVOB" : "SDVOC")
411 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
412 const void *args, int args_len)
416 char buffer[BUF_LEN];
418 #define BUF_PRINT(args...) \
419 pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
422 for (i = 0; i < args_len; i++) {
423 BUF_PRINT("%02X ", ((u8 *)args)[i]);
428 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
429 if (cmd == sdvo_cmd_names[i].cmd) {
430 BUF_PRINT("(%s)", sdvo_cmd_names[i].name);
434 if (i == ARRAY_SIZE(sdvo_cmd_names)) {
435 BUF_PRINT("(%02X)", cmd);
437 BUG_ON(pos >= BUF_LEN - 1);
441 DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo), cmd, buffer);
444 static const char * const cmd_status_names[] = {
450 "Target not specified",
451 "Scaling not supported"
454 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
455 const void *args, int args_len)
458 struct i2c_msg *msgs;
461 /* Would be simpler to allocate both in one go ? */
462 buf = kzalloc(args_len * 2 + 2, GFP_KERNEL);
466 msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
472 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
474 for (i = 0; i < args_len; i++) {
475 msgs[i].addr = intel_sdvo->slave_addr;
478 msgs[i].buf = buf + 2 *i;
479 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
480 buf[2*i + 1] = ((u8*)args)[i];
482 msgs[i].addr = intel_sdvo->slave_addr;
485 msgs[i].buf = buf + 2*i;
486 buf[2*i + 0] = SDVO_I2C_OPCODE;
489 /* the following two are to read the response */
490 status = SDVO_I2C_CMD_STATUS;
491 msgs[i+1].addr = intel_sdvo->slave_addr;
494 msgs[i+1].buf = &status;
496 msgs[i+2].addr = intel_sdvo->slave_addr;
497 msgs[i+2].flags = I2C_M_RD;
499 msgs[i+2].buf = &status;
501 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
503 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
508 /* failure in I2C transfer */
509 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
519 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
520 void *response, int response_len)
522 u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
526 char buffer[BUF_LEN];
530 * The documentation states that all commands will be
531 * processed within 15µs, and that we need only poll
532 * the status byte a maximum of 3 times in order for the
533 * command to be complete.
535 * Check 5 times in case the hardware failed to read the docs.
537 * Also beware that the first response by many devices is to
538 * reply PENDING and stall for time. TVs are notorious for
539 * requiring longer than specified to complete their replies.
540 * Originally (in the DDX long ago), the delay was only ever 15ms
541 * with an additional delay of 30ms applied for TVs added later after
542 * many experiments. To accommodate both sets of delays, we do a
543 * sequence of slow checks if the device is falling behind and fails
544 * to reply within 5*15µs.
546 if (!intel_sdvo_read_byte(intel_sdvo,
551 while ((status == SDVO_CMD_STATUS_PENDING ||
552 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) {
558 if (!intel_sdvo_read_byte(intel_sdvo,
564 #define BUF_PRINT(args...) \
565 pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
567 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
568 BUF_PRINT("(%s)", cmd_status_names[status]);
570 BUF_PRINT("(??? %d)", status);
572 if (status != SDVO_CMD_STATUS_SUCCESS)
575 /* Read the command response */
576 for (i = 0; i < response_len; i++) {
577 if (!intel_sdvo_read_byte(intel_sdvo,
578 SDVO_I2C_RETURN_0 + i,
579 &((u8 *)response)[i]))
581 BUF_PRINT(" %02X", ((u8 *)response)[i]);
583 BUG_ON(pos >= BUF_LEN - 1);
587 DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo), buffer);
591 DRM_DEBUG_KMS("%s: R: ... failed\n", SDVO_NAME(intel_sdvo));
595 static int intel_sdvo_get_pixel_multiplier(const struct drm_display_mode *adjusted_mode)
597 if (adjusted_mode->crtc_clock >= 100000)
599 else if (adjusted_mode->crtc_clock >= 50000)
605 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
608 /* This must be the immediately preceding write before the i2c xfer */
609 return intel_sdvo_write_cmd(intel_sdvo,
610 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
614 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
616 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
619 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
623 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
625 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
628 return intel_sdvo_read_response(intel_sdvo, value, len);
631 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
633 struct intel_sdvo_set_target_input_args targets = {0};
634 return intel_sdvo_set_value(intel_sdvo,
635 SDVO_CMD_SET_TARGET_INPUT,
636 &targets, sizeof(targets));
640 * Return whether each input is trained.
642 * This function is making an assumption about the layout of the response,
643 * which should be checked against the docs.
645 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
647 struct intel_sdvo_get_trained_inputs_response response;
649 BUILD_BUG_ON(sizeof(response) != 1);
650 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
651 &response, sizeof(response)))
654 *input_1 = response.input0_trained;
655 *input_2 = response.input1_trained;
659 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
662 return intel_sdvo_set_value(intel_sdvo,
663 SDVO_CMD_SET_ACTIVE_OUTPUTS,
664 &outputs, sizeof(outputs));
667 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
670 return intel_sdvo_get_value(intel_sdvo,
671 SDVO_CMD_GET_ACTIVE_OUTPUTS,
672 outputs, sizeof(*outputs));
675 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
678 u8 state = SDVO_ENCODER_STATE_ON;
681 case DRM_MODE_DPMS_ON:
682 state = SDVO_ENCODER_STATE_ON;
684 case DRM_MODE_DPMS_STANDBY:
685 state = SDVO_ENCODER_STATE_STANDBY;
687 case DRM_MODE_DPMS_SUSPEND:
688 state = SDVO_ENCODER_STATE_SUSPEND;
690 case DRM_MODE_DPMS_OFF:
691 state = SDVO_ENCODER_STATE_OFF;
695 return intel_sdvo_set_value(intel_sdvo,
696 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
699 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
703 struct intel_sdvo_pixel_clock_range clocks;
705 BUILD_BUG_ON(sizeof(clocks) != 4);
706 if (!intel_sdvo_get_value(intel_sdvo,
707 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
708 &clocks, sizeof(clocks)))
711 /* Convert the values from units of 10 kHz to kHz. */
712 *clock_min = clocks.min * 10;
713 *clock_max = clocks.max * 10;
717 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
720 return intel_sdvo_set_value(intel_sdvo,
721 SDVO_CMD_SET_TARGET_OUTPUT,
722 &outputs, sizeof(outputs));
725 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
726 struct intel_sdvo_dtd *dtd)
728 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
729 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
732 static bool intel_sdvo_get_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
733 struct intel_sdvo_dtd *dtd)
735 return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
736 intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
739 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
740 struct intel_sdvo_dtd *dtd)
742 return intel_sdvo_set_timing(intel_sdvo,
743 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
746 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
747 struct intel_sdvo_dtd *dtd)
749 return intel_sdvo_set_timing(intel_sdvo,
750 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
753 static bool intel_sdvo_get_input_timing(struct intel_sdvo *intel_sdvo,
754 struct intel_sdvo_dtd *dtd)
756 return intel_sdvo_get_timing(intel_sdvo,
757 SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd);
761 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
766 struct intel_sdvo_preferred_input_timing_args args;
768 memset(&args, 0, sizeof(args));
771 args.height = height;
774 if (intel_sdvo->is_lvds &&
775 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
776 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
779 return intel_sdvo_set_value(intel_sdvo,
780 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
781 &args, sizeof(args));
784 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
785 struct intel_sdvo_dtd *dtd)
787 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
788 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
789 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
790 &dtd->part1, sizeof(dtd->part1)) &&
791 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
792 &dtd->part2, sizeof(dtd->part2));
795 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
797 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
800 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
801 const struct drm_display_mode *mode)
803 uint16_t width, height;
804 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
805 uint16_t h_sync_offset, v_sync_offset;
808 memset(dtd, 0, sizeof(*dtd));
810 width = mode->hdisplay;
811 height = mode->vdisplay;
813 /* do some mode translations */
814 h_blank_len = mode->htotal - mode->hdisplay;
815 h_sync_len = mode->hsync_end - mode->hsync_start;
817 v_blank_len = mode->vtotal - mode->vdisplay;
818 v_sync_len = mode->vsync_end - mode->vsync_start;
820 h_sync_offset = mode->hsync_start - mode->hdisplay;
821 v_sync_offset = mode->vsync_start - mode->vdisplay;
823 mode_clock = mode->clock;
825 dtd->part1.clock = mode_clock;
827 dtd->part1.h_active = width & 0xff;
828 dtd->part1.h_blank = h_blank_len & 0xff;
829 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
830 ((h_blank_len >> 8) & 0xf);
831 dtd->part1.v_active = height & 0xff;
832 dtd->part1.v_blank = v_blank_len & 0xff;
833 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
834 ((v_blank_len >> 8) & 0xf);
836 dtd->part2.h_sync_off = h_sync_offset & 0xff;
837 dtd->part2.h_sync_width = h_sync_len & 0xff;
838 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
840 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
841 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
842 ((v_sync_len & 0x30) >> 4);
844 dtd->part2.dtd_flags = 0x18;
845 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
846 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
847 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
848 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
849 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
850 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
852 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
855 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode *pmode,
856 const struct intel_sdvo_dtd *dtd)
858 struct drm_display_mode mode = {};
860 mode.hdisplay = dtd->part1.h_active;
861 mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
862 mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off;
863 mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
864 mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width;
865 mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
866 mode.htotal = mode.hdisplay + dtd->part1.h_blank;
867 mode.htotal += (dtd->part1.h_high & 0xf) << 8;
869 mode.vdisplay = dtd->part1.v_active;
870 mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
871 mode.vsync_start = mode.vdisplay;
872 mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
873 mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
874 mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0;
875 mode.vsync_end = mode.vsync_start +
876 (dtd->part2.v_sync_off_width & 0xf);
877 mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
878 mode.vtotal = mode.vdisplay + dtd->part1.v_blank;
879 mode.vtotal += (dtd->part1.v_high & 0xf) << 8;
881 mode.clock = dtd->part1.clock * 10;
883 if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
884 mode.flags |= DRM_MODE_FLAG_INTERLACE;
885 if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
886 mode.flags |= DRM_MODE_FLAG_PHSYNC;
888 mode.flags |= DRM_MODE_FLAG_NHSYNC;
889 if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
890 mode.flags |= DRM_MODE_FLAG_PVSYNC;
892 mode.flags |= DRM_MODE_FLAG_NVSYNC;
894 drm_mode_set_crtcinfo(&mode, 0);
896 drm_mode_copy(pmode, &mode);
899 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
901 struct intel_sdvo_encode encode;
903 BUILD_BUG_ON(sizeof(encode) != 2);
904 return intel_sdvo_get_value(intel_sdvo,
905 SDVO_CMD_GET_SUPP_ENCODE,
906 &encode, sizeof(encode));
909 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
912 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
915 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
918 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
922 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
925 uint8_t set_buf_index[2];
931 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
933 for (i = 0; i <= av_split; i++) {
934 set_buf_index[0] = i; set_buf_index[1] = 0;
935 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
937 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
938 intel_sdvo_read_response(encoder, &buf_size, 1);
941 for (j = 0; j <= buf_size; j += 8) {
942 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
944 intel_sdvo_read_response(encoder, pos, 8);
951 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
952 unsigned if_index, uint8_t tx_rate,
953 const uint8_t *data, unsigned length)
955 uint8_t set_buf_index[2] = { if_index, 0 };
956 uint8_t hbuf_size, tmp[8];
959 if (!intel_sdvo_set_value(intel_sdvo,
960 SDVO_CMD_SET_HBUF_INDEX,
964 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
968 /* Buffer size is 0 based, hooray! */
971 DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
972 if_index, length, hbuf_size);
974 for (i = 0; i < hbuf_size; i += 8) {
977 memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
979 if (!intel_sdvo_set_value(intel_sdvo,
980 SDVO_CMD_SET_HBUF_DATA,
985 return intel_sdvo_set_value(intel_sdvo,
986 SDVO_CMD_SET_HBUF_TXRATE,
990 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
991 struct intel_crtc_state *pipe_config)
993 uint8_t sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
994 union hdmi_infoframe frame;
998 ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi,
999 &pipe_config->base.adjusted_mode);
1001 DRM_ERROR("couldn't fill AVI infoframe\n");
1005 if (intel_sdvo->rgb_quant_range_selectable) {
1006 if (pipe_config->limited_color_range)
1007 frame.avi.quantization_range =
1008 HDMI_QUANTIZATION_RANGE_LIMITED;
1010 frame.avi.quantization_range =
1011 HDMI_QUANTIZATION_RANGE_FULL;
1014 len = hdmi_infoframe_pack(&frame, sdvo_data, sizeof(sdvo_data));
1018 return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
1020 sdvo_data, sizeof(sdvo_data));
1023 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo,
1024 struct drm_connector_state *conn_state)
1026 struct intel_sdvo_tv_format format;
1027 uint32_t format_map;
1029 format_map = 1 << conn_state->tv.mode;
1030 memset(&format, 0, sizeof(format));
1031 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
1033 BUILD_BUG_ON(sizeof(format) != 6);
1034 return intel_sdvo_set_value(intel_sdvo,
1035 SDVO_CMD_SET_TV_FORMAT,
1036 &format, sizeof(format));
1040 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
1041 const struct drm_display_mode *mode)
1043 struct intel_sdvo_dtd output_dtd;
1045 if (!intel_sdvo_set_target_output(intel_sdvo,
1046 intel_sdvo->attached_output))
1049 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1050 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1056 /* Asks the sdvo controller for the preferred input mode given the output mode.
1057 * Unfortunately we have to set up the full output mode to do that. */
1059 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
1060 const struct drm_display_mode *mode,
1061 struct drm_display_mode *adjusted_mode)
1063 struct intel_sdvo_dtd input_dtd;
1065 /* Reset the input timing to the screen. Assume always input 0. */
1066 if (!intel_sdvo_set_target_input(intel_sdvo))
1069 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1075 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1079 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1080 intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
1085 static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config)
1087 unsigned dotclock = pipe_config->port_clock;
1088 struct dpll *clock = &pipe_config->dpll;
1090 /* SDVO TV has fixed PLL values depend on its clock range,
1091 this mirrors vbios setting. */
1092 if (dotclock >= 100000 && dotclock < 140500) {
1098 } else if (dotclock >= 140500 && dotclock <= 200000) {
1105 WARN(1, "SDVO TV clock out of range: %i\n", dotclock);
1108 pipe_config->clock_set = true;
1111 static bool intel_sdvo_compute_config(struct intel_encoder *encoder,
1112 struct intel_crtc_state *pipe_config,
1113 struct drm_connector_state *conn_state)
1115 struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1116 struct intel_sdvo_connector_state *intel_sdvo_state =
1117 to_intel_sdvo_connector_state(conn_state);
1118 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
1119 struct drm_display_mode *mode = &pipe_config->base.mode;
1121 DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
1122 pipe_config->pipe_bpp = 8*3;
1124 if (HAS_PCH_SPLIT(to_i915(encoder->base.dev)))
1125 pipe_config->has_pch_encoder = true;
1127 /* We need to construct preferred input timings based on our
1128 * output timings. To do that, we have to set the output
1129 * timings, even though this isn't really the right place in
1130 * the sequence to do it. Oh well.
1132 if (intel_sdvo->is_tv) {
1133 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1136 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1139 pipe_config->sdvo_tv_clock = true;
1140 } else if (intel_sdvo->is_lvds) {
1141 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1142 intel_sdvo->sdvo_lvds_fixed_mode))
1145 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1150 /* Make the CRTC code factor in the SDVO pixel multiplier. The
1151 * SDVO device will factor out the multiplier during mode_set.
1153 pipe_config->pixel_multiplier =
1154 intel_sdvo_get_pixel_multiplier(adjusted_mode);
1156 if (intel_sdvo_state->base.force_audio != HDMI_AUDIO_OFF_DVI)
1157 pipe_config->has_hdmi_sink = intel_sdvo->has_hdmi_monitor;
1159 if (intel_sdvo_state->base.force_audio == HDMI_AUDIO_ON ||
1160 (intel_sdvo_state->base.force_audio == HDMI_AUDIO_AUTO && intel_sdvo->has_hdmi_audio))
1161 pipe_config->has_audio = true;
1163 if (intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_AUTO) {
1164 /* See CEA-861-E - 5.1 Default Encoding Parameters */
1165 /* FIXME: This bit is only valid when using TMDS encoding and 8
1166 * bit per color mode. */
1167 if (pipe_config->has_hdmi_sink &&
1168 drm_match_cea_mode(adjusted_mode) > 1)
1169 pipe_config->limited_color_range = true;
1171 if (pipe_config->has_hdmi_sink &&
1172 intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_LIMITED)
1173 pipe_config->limited_color_range = true;
1176 /* Clock computation needs to happen after pixel multiplier. */
1177 if (intel_sdvo->is_tv)
1178 i9xx_adjust_sdvo_tv_clock(pipe_config);
1180 /* Set user selected PAR to incoming mode's member */
1181 if (intel_sdvo->is_hdmi)
1182 adjusted_mode->picture_aspect_ratio = conn_state->picture_aspect_ratio;
1187 #define UPDATE_PROPERTY(input, NAME) \
1190 intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_##NAME, &val, sizeof(val)); \
1193 static void intel_sdvo_update_props(struct intel_sdvo *intel_sdvo,
1194 struct intel_sdvo_connector_state *sdvo_state)
1196 struct drm_connector_state *conn_state = &sdvo_state->base.base;
1197 struct intel_sdvo_connector *intel_sdvo_conn =
1198 to_intel_sdvo_connector(conn_state->connector);
1201 if (intel_sdvo_conn->left)
1202 UPDATE_PROPERTY(sdvo_state->tv.overscan_h, OVERSCAN_H);
1204 if (intel_sdvo_conn->top)
1205 UPDATE_PROPERTY(sdvo_state->tv.overscan_v, OVERSCAN_V);
1207 if (intel_sdvo_conn->hpos)
1208 UPDATE_PROPERTY(sdvo_state->tv.hpos, HPOS);
1210 if (intel_sdvo_conn->vpos)
1211 UPDATE_PROPERTY(sdvo_state->tv.vpos, VPOS);
1213 if (intel_sdvo_conn->saturation)
1214 UPDATE_PROPERTY(conn_state->tv.saturation, SATURATION);
1216 if (intel_sdvo_conn->contrast)
1217 UPDATE_PROPERTY(conn_state->tv.contrast, CONTRAST);
1219 if (intel_sdvo_conn->hue)
1220 UPDATE_PROPERTY(conn_state->tv.hue, HUE);
1222 if (intel_sdvo_conn->brightness)
1223 UPDATE_PROPERTY(conn_state->tv.brightness, BRIGHTNESS);
1225 if (intel_sdvo_conn->sharpness)
1226 UPDATE_PROPERTY(sdvo_state->tv.sharpness, SHARPNESS);
1228 if (intel_sdvo_conn->flicker_filter)
1229 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter, FLICKER_FILTER);
1231 if (intel_sdvo_conn->flicker_filter_2d)
1232 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_2d, FLICKER_FILTER_2D);
1234 if (intel_sdvo_conn->flicker_filter_adaptive)
1235 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
1237 if (intel_sdvo_conn->tv_chroma_filter)
1238 UPDATE_PROPERTY(sdvo_state->tv.chroma_filter, TV_CHROMA_FILTER);
1240 if (intel_sdvo_conn->tv_luma_filter)
1241 UPDATE_PROPERTY(sdvo_state->tv.luma_filter, TV_LUMA_FILTER);
1243 if (intel_sdvo_conn->dot_crawl)
1244 UPDATE_PROPERTY(sdvo_state->tv.dot_crawl, DOT_CRAWL);
1246 #undef UPDATE_PROPERTY
1249 static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder,
1250 struct intel_crtc_state *crtc_state,
1251 struct drm_connector_state *conn_state)
1253 struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev);
1254 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
1255 const struct drm_display_mode *adjusted_mode = &crtc_state->base.adjusted_mode;
1256 struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state(conn_state);
1257 struct drm_display_mode *mode = &crtc_state->base.mode;
1258 struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder);
1260 struct intel_sdvo_in_out_map in_out;
1261 struct intel_sdvo_dtd input_dtd, output_dtd;
1264 intel_sdvo_update_props(intel_sdvo, sdvo_state);
1266 /* First, set the input mapping for the first input to our controlled
1267 * output. This is only correct if we're a single-input device, in
1268 * which case the first input is the output from the appropriate SDVO
1269 * channel on the motherboard. In a two-input device, the first input
1270 * will be SDVOB and the second SDVOC.
1272 in_out.in0 = intel_sdvo->attached_output;
1275 intel_sdvo_set_value(intel_sdvo,
1276 SDVO_CMD_SET_IN_OUT_MAP,
1277 &in_out, sizeof(in_out));
1279 /* Set the output timings to the screen */
1280 if (!intel_sdvo_set_target_output(intel_sdvo,
1281 intel_sdvo->attached_output))
1284 /* lvds has a special fixed output timing. */
1285 if (intel_sdvo->is_lvds)
1286 intel_sdvo_get_dtd_from_mode(&output_dtd,
1287 intel_sdvo->sdvo_lvds_fixed_mode);
1289 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1290 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1291 DRM_INFO("Setting output timings on %s failed\n",
1292 SDVO_NAME(intel_sdvo));
1294 /* Set the input timing to the screen. Assume always input 0. */
1295 if (!intel_sdvo_set_target_input(intel_sdvo))
1298 if (crtc_state->has_hdmi_sink) {
1299 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1300 intel_sdvo_set_colorimetry(intel_sdvo,
1301 SDVO_COLORIMETRY_RGB256);
1302 intel_sdvo_set_avi_infoframe(intel_sdvo, crtc_state);
1304 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1306 if (intel_sdvo->is_tv &&
1307 !intel_sdvo_set_tv_format(intel_sdvo, conn_state))
1310 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1312 if (intel_sdvo->is_tv || intel_sdvo->is_lvds)
1313 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
1314 if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1315 DRM_INFO("Setting input timings on %s failed\n",
1316 SDVO_NAME(intel_sdvo));
1318 switch (crtc_state->pixel_multiplier) {
1320 WARN(1, "unknown pixel multiplier specified\n");
1321 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1322 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1323 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1325 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1328 /* Set the SDVO control regs. */
1329 if (INTEL_GEN(dev_priv) >= 4) {
1330 /* The real mode polarity is set by the SDVO commands, using
1331 * struct intel_sdvo_dtd. */
1332 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1333 if (!HAS_PCH_SPLIT(dev_priv) && crtc_state->limited_color_range)
1334 sdvox |= HDMI_COLOR_RANGE_16_235;
1335 if (INTEL_GEN(dev_priv) < 5)
1336 sdvox |= SDVO_BORDER_ENABLE;
1338 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1339 if (intel_sdvo->port == PORT_B)
1340 sdvox &= SDVOB_PRESERVE_MASK;
1342 sdvox &= SDVOC_PRESERVE_MASK;
1343 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1346 if (INTEL_PCH_TYPE(dev_priv) >= PCH_CPT)
1347 sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe);
1349 sdvox |= SDVO_PIPE_SEL(crtc->pipe);
1351 if (crtc_state->has_audio)
1352 sdvox |= SDVO_AUDIO_ENABLE;
1354 if (INTEL_GEN(dev_priv) >= 4) {
1355 /* done in crtc_mode_set as the dpll_md reg must be written early */
1356 } else if (IS_I945G(dev_priv) || IS_I945GM(dev_priv) ||
1357 IS_G33(dev_priv) || IS_PINEVIEW(dev_priv)) {
1358 /* done in crtc_mode_set as it lives inside the dpll register */
1360 sdvox |= (crtc_state->pixel_multiplier - 1)
1361 << SDVO_PORT_MULTIPLY_SHIFT;
1364 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1365 INTEL_GEN(dev_priv) < 5)
1366 sdvox |= SDVO_STALL_SELECT;
1367 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1370 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
1372 struct intel_sdvo_connector *intel_sdvo_connector =
1373 to_intel_sdvo_connector(&connector->base);
1374 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
1375 u16 active_outputs = 0;
1377 intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1379 if (active_outputs & intel_sdvo_connector->output_flag)
1385 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1388 struct drm_device *dev = encoder->base.dev;
1389 struct drm_i915_private *dev_priv = to_i915(dev);
1390 struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1391 u16 active_outputs = 0;
1394 tmp = I915_READ(intel_sdvo->sdvo_reg);
1395 intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1397 if (!(tmp & SDVO_ENABLE) && (active_outputs == 0))
1400 if (HAS_PCH_CPT(dev_priv))
1401 *pipe = PORT_TO_PIPE_CPT(tmp);
1403 *pipe = PORT_TO_PIPE(tmp);
1408 static void intel_sdvo_get_config(struct intel_encoder *encoder,
1409 struct intel_crtc_state *pipe_config)
1411 struct drm_device *dev = encoder->base.dev;
1412 struct drm_i915_private *dev_priv = to_i915(dev);
1413 struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1414 struct intel_sdvo_dtd dtd;
1415 int encoder_pixel_multiplier = 0;
1417 u32 flags = 0, sdvox;
1421 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1423 ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
1425 /* Some sdvo encoders are not spec compliant and don't
1426 * implement the mandatory get_timings function. */
1427 DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n");
1428 pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS;
1430 if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
1431 flags |= DRM_MODE_FLAG_PHSYNC;
1433 flags |= DRM_MODE_FLAG_NHSYNC;
1435 if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
1436 flags |= DRM_MODE_FLAG_PVSYNC;
1438 flags |= DRM_MODE_FLAG_NVSYNC;
1441 pipe_config->base.adjusted_mode.flags |= flags;
1444 * pixel multiplier readout is tricky: Only on i915g/gm it is stored in
1445 * the sdvo port register, on all other platforms it is part of the dpll
1446 * state. Since the general pipe state readout happens before the
1447 * encoder->get_config we so already have a valid pixel multplier on all
1450 if (IS_I915G(dev_priv) || IS_I915GM(dev_priv)) {
1451 pipe_config->pixel_multiplier =
1452 ((sdvox & SDVO_PORT_MULTIPLY_MASK)
1453 >> SDVO_PORT_MULTIPLY_SHIFT) + 1;
1456 dotclock = pipe_config->port_clock;
1458 if (pipe_config->pixel_multiplier)
1459 dotclock /= pipe_config->pixel_multiplier;
1461 pipe_config->base.adjusted_mode.crtc_clock = dotclock;
1463 /* Cross check the port pixel multiplier with the sdvo encoder state. */
1464 if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT,
1467 case SDVO_CLOCK_RATE_MULT_1X:
1468 encoder_pixel_multiplier = 1;
1470 case SDVO_CLOCK_RATE_MULT_2X:
1471 encoder_pixel_multiplier = 2;
1473 case SDVO_CLOCK_RATE_MULT_4X:
1474 encoder_pixel_multiplier = 4;
1479 if (sdvox & HDMI_COLOR_RANGE_16_235)
1480 pipe_config->limited_color_range = true;
1482 if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE,
1484 if (val == SDVO_ENCODE_HDMI)
1485 pipe_config->has_hdmi_sink = true;
1488 WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier,
1489 "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
1490 pipe_config->pixel_multiplier, encoder_pixel_multiplier);
1493 static void intel_disable_sdvo(struct intel_encoder *encoder,
1494 struct intel_crtc_state *old_crtc_state,
1495 struct drm_connector_state *conn_state)
1497 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1498 struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1499 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
1502 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1504 intel_sdvo_set_encoder_power_state(intel_sdvo,
1507 temp = I915_READ(intel_sdvo->sdvo_reg);
1509 temp &= ~SDVO_ENABLE;
1510 intel_sdvo_write_sdvox(intel_sdvo, temp);
1513 * HW workaround for IBX, we need to move the port
1514 * to transcoder A after disabling it to allow the
1515 * matching DP port to be enabled on transcoder A.
1517 if (HAS_PCH_IBX(dev_priv) && crtc->pipe == PIPE_B) {
1519 * We get CPU/PCH FIFO underruns on the other pipe when
1520 * doing the workaround. Sweep them under the rug.
1522 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1523 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1525 temp &= ~SDVO_PIPE_B_SELECT;
1526 temp |= SDVO_ENABLE;
1527 intel_sdvo_write_sdvox(intel_sdvo, temp);
1529 temp &= ~SDVO_ENABLE;
1530 intel_sdvo_write_sdvox(intel_sdvo, temp);
1532 intel_wait_for_vblank_if_active(dev_priv, PIPE_A);
1533 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1534 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1538 static void pch_disable_sdvo(struct intel_encoder *encoder,
1539 struct intel_crtc_state *old_crtc_state,
1540 struct drm_connector_state *old_conn_state)
1544 static void pch_post_disable_sdvo(struct intel_encoder *encoder,
1545 struct intel_crtc_state *old_crtc_state,
1546 struct drm_connector_state *old_conn_state)
1548 intel_disable_sdvo(encoder, old_crtc_state, old_conn_state);
1551 static void intel_enable_sdvo(struct intel_encoder *encoder,
1552 struct intel_crtc_state *pipe_config,
1553 struct drm_connector_state *conn_state)
1555 struct drm_device *dev = encoder->base.dev;
1556 struct drm_i915_private *dev_priv = to_i915(dev);
1557 struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1558 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
1560 bool input1, input2;
1564 temp = I915_READ(intel_sdvo->sdvo_reg);
1565 temp |= SDVO_ENABLE;
1566 intel_sdvo_write_sdvox(intel_sdvo, temp);
1568 for (i = 0; i < 2; i++)
1569 intel_wait_for_vblank(dev_priv, intel_crtc->pipe);
1571 success = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1572 /* Warn if the device reported failure to sync.
1573 * A lot of SDVO devices fail to notify of sync, but it's
1574 * a given it the status is a success, we succeeded.
1576 if (success && !input1) {
1577 DRM_DEBUG_KMS("First %s output reported failure to "
1578 "sync\n", SDVO_NAME(intel_sdvo));
1582 intel_sdvo_set_encoder_power_state(intel_sdvo,
1584 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1587 static enum drm_mode_status
1588 intel_sdvo_mode_valid(struct drm_connector *connector,
1589 struct drm_display_mode *mode)
1591 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1592 int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
1594 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1595 return MODE_NO_DBLESCAN;
1597 if (intel_sdvo->pixel_clock_min > mode->clock)
1598 return MODE_CLOCK_LOW;
1600 if (intel_sdvo->pixel_clock_max < mode->clock)
1601 return MODE_CLOCK_HIGH;
1603 if (mode->clock > max_dotclk)
1604 return MODE_CLOCK_HIGH;
1606 if (intel_sdvo->is_lvds) {
1607 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1610 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1617 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1619 BUILD_BUG_ON(sizeof(*caps) != 8);
1620 if (!intel_sdvo_get_value(intel_sdvo,
1621 SDVO_CMD_GET_DEVICE_CAPS,
1622 caps, sizeof(*caps)))
1625 DRM_DEBUG_KMS("SDVO capabilities:\n"
1628 " device_rev_id: %d\n"
1629 " sdvo_version_major: %d\n"
1630 " sdvo_version_minor: %d\n"
1631 " sdvo_inputs_mask: %d\n"
1632 " smooth_scaling: %d\n"
1633 " sharp_scaling: %d\n"
1635 " down_scaling: %d\n"
1636 " stall_support: %d\n"
1637 " output_flags: %d\n",
1640 caps->device_rev_id,
1641 caps->sdvo_version_major,
1642 caps->sdvo_version_minor,
1643 caps->sdvo_inputs_mask,
1644 caps->smooth_scaling,
1645 caps->sharp_scaling,
1648 caps->stall_support,
1649 caps->output_flags);
1654 static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
1656 struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
1659 if (!I915_HAS_HOTPLUG(dev_priv))
1662 /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1664 if (IS_I945G(dev_priv) || IS_I945GM(dev_priv))
1667 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1668 &hotplug, sizeof(hotplug)))
1674 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1676 struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1678 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1679 &intel_sdvo->hotplug_active, 2);
1683 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1685 /* Is there more than one type of output? */
1686 return hweight16(intel_sdvo->caps.output_flags) > 1;
1689 static struct edid *
1690 intel_sdvo_get_edid(struct drm_connector *connector)
1692 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1693 return drm_get_edid(connector, &sdvo->ddc);
1696 /* Mac mini hack -- use the same DDC as the analog connector */
1697 static struct edid *
1698 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1700 struct drm_i915_private *dev_priv = to_i915(connector->dev);
1702 return drm_get_edid(connector,
1703 intel_gmbus_get_adapter(dev_priv,
1704 dev_priv->vbt.crt_ddc_pin));
1707 static enum drm_connector_status
1708 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1710 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1711 enum drm_connector_status status;
1714 edid = intel_sdvo_get_edid(connector);
1716 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1717 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1720 * Don't use the 1 as the argument of DDC bus switch to get
1721 * the EDID. It is used for SDVO SPD ROM.
1723 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1724 intel_sdvo->ddc_bus = ddc;
1725 edid = intel_sdvo_get_edid(connector);
1730 * If we found the EDID on the other bus,
1731 * assume that is the correct DDC bus.
1734 intel_sdvo->ddc_bus = saved_ddc;
1738 * When there is no edid and no monitor is connected with VGA
1739 * port, try to use the CRT ddc to read the EDID for DVI-connector.
1742 edid = intel_sdvo_get_analog_edid(connector);
1744 status = connector_status_unknown;
1746 /* DDC bus is shared, match EDID to connector type */
1747 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1748 status = connector_status_connected;
1749 if (intel_sdvo->is_hdmi) {
1750 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1751 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1752 intel_sdvo->rgb_quant_range_selectable =
1753 drm_rgb_quant_range_selectable(edid);
1756 status = connector_status_disconnected;
1764 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1767 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1768 bool connector_is_digital = !!IS_DIGITAL(sdvo);
1770 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1771 connector_is_digital, monitor_is_digital);
1772 return connector_is_digital == monitor_is_digital;
1775 static enum drm_connector_status
1776 intel_sdvo_detect(struct drm_connector *connector, bool force)
1779 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1780 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1781 enum drm_connector_status ret;
1783 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1784 connector->base.id, connector->name);
1786 if (!intel_sdvo_get_value(intel_sdvo,
1787 SDVO_CMD_GET_ATTACHED_DISPLAYS,
1789 return connector_status_unknown;
1791 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1792 response & 0xff, response >> 8,
1793 intel_sdvo_connector->output_flag);
1796 return connector_status_disconnected;
1798 intel_sdvo->attached_output = response;
1800 intel_sdvo->has_hdmi_monitor = false;
1801 intel_sdvo->has_hdmi_audio = false;
1802 intel_sdvo->rgb_quant_range_selectable = false;
1804 if ((intel_sdvo_connector->output_flag & response) == 0)
1805 ret = connector_status_disconnected;
1806 else if (IS_TMDS(intel_sdvo_connector))
1807 ret = intel_sdvo_tmds_sink_detect(connector);
1811 /* if we have an edid check it matches the connection */
1812 edid = intel_sdvo_get_edid(connector);
1814 edid = intel_sdvo_get_analog_edid(connector);
1816 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1818 ret = connector_status_connected;
1820 ret = connector_status_disconnected;
1824 ret = connector_status_connected;
1827 /* May update encoder flag for like clock for SDVO TV, etc.*/
1828 if (ret == connector_status_connected) {
1829 intel_sdvo->is_tv = false;
1830 intel_sdvo->is_lvds = false;
1832 if (response & SDVO_TV_MASK)
1833 intel_sdvo->is_tv = true;
1834 if (response & SDVO_LVDS_MASK)
1835 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1841 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1845 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1846 connector->base.id, connector->name);
1848 /* set the bus switch and get the modes */
1849 edid = intel_sdvo_get_edid(connector);
1852 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1853 * link between analog and digital outputs. So, if the regular SDVO
1854 * DDC fails, check to see if the analog output is disconnected, in
1855 * which case we'll look there for the digital DDC data.
1858 edid = intel_sdvo_get_analog_edid(connector);
1861 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1863 drm_mode_connector_update_edid_property(connector, edid);
1864 drm_add_edid_modes(connector, edid);
1872 * Set of SDVO TV modes.
1873 * Note! This is in reply order (see loop in get_tv_modes).
1874 * XXX: all 60Hz refresh?
1876 static const struct drm_display_mode sdvo_tv_modes[] = {
1877 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1878 416, 0, 200, 201, 232, 233, 0,
1879 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1880 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1881 416, 0, 240, 241, 272, 273, 0,
1882 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1883 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1884 496, 0, 300, 301, 332, 333, 0,
1885 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1886 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1887 736, 0, 350, 351, 382, 383, 0,
1888 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1889 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1890 736, 0, 400, 401, 432, 433, 0,
1891 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1892 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1893 736, 0, 480, 481, 512, 513, 0,
1894 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1895 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1896 800, 0, 480, 481, 512, 513, 0,
1897 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1898 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1899 800, 0, 576, 577, 608, 609, 0,
1900 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1901 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1902 816, 0, 350, 351, 382, 383, 0,
1903 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1904 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1905 816, 0, 400, 401, 432, 433, 0,
1906 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1907 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1908 816, 0, 480, 481, 512, 513, 0,
1909 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1910 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1911 816, 0, 540, 541, 572, 573, 0,
1912 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1913 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1914 816, 0, 576, 577, 608, 609, 0,
1915 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1916 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1917 864, 0, 576, 577, 608, 609, 0,
1918 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1919 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1920 896, 0, 600, 601, 632, 633, 0,
1921 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1922 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1923 928, 0, 624, 625, 656, 657, 0,
1924 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1925 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1926 1016, 0, 766, 767, 798, 799, 0,
1927 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1928 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1929 1120, 0, 768, 769, 800, 801, 0,
1930 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1931 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1932 1376, 0, 1024, 1025, 1056, 1057, 0,
1933 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1936 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1938 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1939 const struct drm_connector_state *conn_state = connector->state;
1940 struct intel_sdvo_sdtv_resolution_request tv_res;
1941 uint32_t reply = 0, format_map = 0;
1944 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1945 connector->base.id, connector->name);
1947 /* Read the list of supported input resolutions for the selected TV
1950 format_map = 1 << conn_state->tv.mode;
1951 memcpy(&tv_res, &format_map,
1952 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1954 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1957 BUILD_BUG_ON(sizeof(tv_res) != 3);
1958 if (!intel_sdvo_write_cmd(intel_sdvo,
1959 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1960 &tv_res, sizeof(tv_res)))
1962 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1965 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1966 if (reply & (1 << i)) {
1967 struct drm_display_mode *nmode;
1968 nmode = drm_mode_duplicate(connector->dev,
1971 drm_mode_probed_add(connector, nmode);
1975 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1977 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1978 struct drm_i915_private *dev_priv = to_i915(connector->dev);
1979 struct drm_display_mode *newmode;
1981 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1982 connector->base.id, connector->name);
1985 * Fetch modes from VBT. For SDVO prefer the VBT mode since some
1986 * SDVO->LVDS transcoders can't cope with the EDID mode.
1988 if (dev_priv->vbt.sdvo_lvds_vbt_mode != NULL) {
1989 newmode = drm_mode_duplicate(connector->dev,
1990 dev_priv->vbt.sdvo_lvds_vbt_mode);
1991 if (newmode != NULL) {
1992 /* Guarantee the mode is preferred */
1993 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1994 DRM_MODE_TYPE_DRIVER);
1995 drm_mode_probed_add(connector, newmode);
2000 * Attempt to get the mode list from DDC.
2001 * Assume that the preferred modes are
2002 * arranged in priority order.
2004 intel_ddc_get_modes(connector, &intel_sdvo->ddc);
2006 list_for_each_entry(newmode, &connector->probed_modes, head) {
2007 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
2008 intel_sdvo->sdvo_lvds_fixed_mode =
2009 drm_mode_duplicate(connector->dev, newmode);
2011 intel_sdvo->is_lvds = true;
2017 static int intel_sdvo_get_modes(struct drm_connector *connector)
2019 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2021 if (IS_TV(intel_sdvo_connector))
2022 intel_sdvo_get_tv_modes(connector);
2023 else if (IS_LVDS(intel_sdvo_connector))
2024 intel_sdvo_get_lvds_modes(connector);
2026 intel_sdvo_get_ddc_modes(connector);
2028 return !list_empty(&connector->probed_modes);
2031 static void intel_sdvo_destroy(struct drm_connector *connector)
2033 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2035 drm_connector_cleanup(connector);
2036 kfree(intel_sdvo_connector);
2040 intel_sdvo_connector_atomic_get_property(struct drm_connector *connector,
2041 const struct drm_connector_state *state,
2042 struct drm_property *property,
2045 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2046 const struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state((void *)state);
2048 if (property == intel_sdvo_connector->tv_format) {
2051 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2052 if (state->tv.mode == intel_sdvo_connector->tv_format_supported[i]) {
2060 } else if (property == intel_sdvo_connector->top ||
2061 property == intel_sdvo_connector->bottom)
2062 *val = intel_sdvo_connector->max_vscan - sdvo_state->tv.overscan_v;
2063 else if (property == intel_sdvo_connector->left ||
2064 property == intel_sdvo_connector->right)
2065 *val = intel_sdvo_connector->max_hscan - sdvo_state->tv.overscan_h;
2066 else if (property == intel_sdvo_connector->hpos)
2067 *val = sdvo_state->tv.hpos;
2068 else if (property == intel_sdvo_connector->vpos)
2069 *val = sdvo_state->tv.vpos;
2070 else if (property == intel_sdvo_connector->saturation)
2071 *val = state->tv.saturation;
2072 else if (property == intel_sdvo_connector->contrast)
2073 *val = state->tv.contrast;
2074 else if (property == intel_sdvo_connector->hue)
2075 *val = state->tv.hue;
2076 else if (property == intel_sdvo_connector->brightness)
2077 *val = state->tv.brightness;
2078 else if (property == intel_sdvo_connector->sharpness)
2079 *val = sdvo_state->tv.sharpness;
2080 else if (property == intel_sdvo_connector->flicker_filter)
2081 *val = sdvo_state->tv.flicker_filter;
2082 else if (property == intel_sdvo_connector->flicker_filter_2d)
2083 *val = sdvo_state->tv.flicker_filter_2d;
2084 else if (property == intel_sdvo_connector->flicker_filter_adaptive)
2085 *val = sdvo_state->tv.flicker_filter_adaptive;
2086 else if (property == intel_sdvo_connector->tv_chroma_filter)
2087 *val = sdvo_state->tv.chroma_filter;
2088 else if (property == intel_sdvo_connector->tv_luma_filter)
2089 *val = sdvo_state->tv.luma_filter;
2090 else if (property == intel_sdvo_connector->dot_crawl)
2091 *val = sdvo_state->tv.dot_crawl;
2093 return intel_digital_connector_atomic_get_property(connector, state, property, val);
2099 intel_sdvo_connector_atomic_set_property(struct drm_connector *connector,
2100 struct drm_connector_state *state,
2101 struct drm_property *property,
2104 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2105 struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state(state);
2107 if (property == intel_sdvo_connector->tv_format) {
2108 state->tv.mode = intel_sdvo_connector->tv_format_supported[val];
2111 struct drm_crtc_state *crtc_state =
2112 drm_atomic_get_new_crtc_state(state->state, state->crtc);
2114 crtc_state->connectors_changed = true;
2116 } else if (property == intel_sdvo_connector->top ||
2117 property == intel_sdvo_connector->bottom)
2118 /* Cannot set these independent from each other */
2119 sdvo_state->tv.overscan_v = intel_sdvo_connector->max_vscan - val;
2120 else if (property == intel_sdvo_connector->left ||
2121 property == intel_sdvo_connector->right)
2122 /* Cannot set these independent from each other */
2123 sdvo_state->tv.overscan_h = intel_sdvo_connector->max_hscan - val;
2124 else if (property == intel_sdvo_connector->hpos)
2125 sdvo_state->tv.hpos = val;
2126 else if (property == intel_sdvo_connector->vpos)
2127 sdvo_state->tv.vpos = val;
2128 else if (property == intel_sdvo_connector->saturation)
2129 state->tv.saturation = val;
2130 else if (property == intel_sdvo_connector->contrast)
2131 state->tv.contrast = val;
2132 else if (property == intel_sdvo_connector->hue)
2133 state->tv.hue = val;
2134 else if (property == intel_sdvo_connector->brightness)
2135 state->tv.brightness = val;
2136 else if (property == intel_sdvo_connector->sharpness)
2137 sdvo_state->tv.sharpness = val;
2138 else if (property == intel_sdvo_connector->flicker_filter)
2139 sdvo_state->tv.flicker_filter = val;
2140 else if (property == intel_sdvo_connector->flicker_filter_2d)
2141 sdvo_state->tv.flicker_filter_2d = val;
2142 else if (property == intel_sdvo_connector->flicker_filter_adaptive)
2143 sdvo_state->tv.flicker_filter_adaptive = val;
2144 else if (property == intel_sdvo_connector->tv_chroma_filter)
2145 sdvo_state->tv.chroma_filter = val;
2146 else if (property == intel_sdvo_connector->tv_luma_filter)
2147 sdvo_state->tv.luma_filter = val;
2148 else if (property == intel_sdvo_connector->dot_crawl)
2149 sdvo_state->tv.dot_crawl = val;
2151 return intel_digital_connector_atomic_set_property(connector, state, property, val);
2157 intel_sdvo_connector_register(struct drm_connector *connector)
2159 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
2162 ret = intel_connector_register(connector);
2166 return sysfs_create_link(&connector->kdev->kobj,
2167 &sdvo->ddc.dev.kobj,
2168 sdvo->ddc.dev.kobj.name);
2172 intel_sdvo_connector_unregister(struct drm_connector *connector)
2174 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
2176 sysfs_remove_link(&connector->kdev->kobj,
2177 sdvo->ddc.dev.kobj.name);
2178 intel_connector_unregister(connector);
2181 static struct drm_connector_state *
2182 intel_sdvo_connector_duplicate_state(struct drm_connector *connector)
2184 struct intel_sdvo_connector_state *state;
2186 state = kmemdup(connector->state, sizeof(*state), GFP_KERNEL);
2190 __drm_atomic_helper_connector_duplicate_state(connector, &state->base.base);
2191 return &state->base.base;
2194 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
2195 .dpms = drm_atomic_helper_connector_dpms,
2196 .detect = intel_sdvo_detect,
2197 .fill_modes = drm_helper_probe_single_connector_modes,
2198 .set_property = drm_atomic_helper_connector_set_property,
2199 .atomic_get_property = intel_sdvo_connector_atomic_get_property,
2200 .atomic_set_property = intel_sdvo_connector_atomic_set_property,
2201 .late_register = intel_sdvo_connector_register,
2202 .early_unregister = intel_sdvo_connector_unregister,
2203 .destroy = intel_sdvo_destroy,
2204 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
2205 .atomic_duplicate_state = intel_sdvo_connector_duplicate_state,
2208 static int intel_sdvo_atomic_check(struct drm_connector *conn,
2209 struct drm_connector_state *new_conn_state)
2211 struct drm_atomic_state *state = new_conn_state->state;
2212 struct drm_connector_state *old_conn_state =
2213 drm_atomic_get_old_connector_state(state, conn);
2214 struct intel_sdvo_connector_state *old_state =
2215 to_intel_sdvo_connector_state(old_conn_state);
2216 struct intel_sdvo_connector_state *new_state =
2217 to_intel_sdvo_connector_state(new_conn_state);
2219 if (new_conn_state->crtc &&
2220 (memcmp(&old_state->tv, &new_state->tv, sizeof(old_state->tv)) ||
2221 memcmp(&old_conn_state->tv, &new_conn_state->tv, sizeof(old_conn_state->tv)))) {
2222 struct drm_crtc_state *crtc_state =
2223 drm_atomic_get_new_crtc_state(new_conn_state->state,
2224 new_conn_state->crtc);
2226 crtc_state->connectors_changed = true;
2229 return intel_digital_connector_atomic_check(conn, new_conn_state);
2232 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
2233 .get_modes = intel_sdvo_get_modes,
2234 .mode_valid = intel_sdvo_mode_valid,
2235 .atomic_check = intel_sdvo_atomic_check,
2238 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
2240 struct intel_sdvo *intel_sdvo = to_sdvo(to_intel_encoder(encoder));
2242 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
2243 drm_mode_destroy(encoder->dev,
2244 intel_sdvo->sdvo_lvds_fixed_mode);
2246 i2c_del_adapter(&intel_sdvo->ddc);
2247 intel_encoder_destroy(encoder);
2250 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2251 .destroy = intel_sdvo_enc_destroy,
2255 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
2258 unsigned int num_bits;
2260 /* Make a mask of outputs less than or equal to our own priority in the
2263 switch (sdvo->controlled_output) {
2264 case SDVO_OUTPUT_LVDS1:
2265 mask |= SDVO_OUTPUT_LVDS1;
2266 case SDVO_OUTPUT_LVDS0:
2267 mask |= SDVO_OUTPUT_LVDS0;
2268 case SDVO_OUTPUT_TMDS1:
2269 mask |= SDVO_OUTPUT_TMDS1;
2270 case SDVO_OUTPUT_TMDS0:
2271 mask |= SDVO_OUTPUT_TMDS0;
2272 case SDVO_OUTPUT_RGB1:
2273 mask |= SDVO_OUTPUT_RGB1;
2274 case SDVO_OUTPUT_RGB0:
2275 mask |= SDVO_OUTPUT_RGB0;
2279 /* Count bits to find what number we are in the priority list. */
2280 mask &= sdvo->caps.output_flags;
2281 num_bits = hweight16(mask);
2282 /* If more than 3 outputs, default to DDC bus 3 for now. */
2286 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2287 sdvo->ddc_bus = 1 << num_bits;
2291 * Choose the appropriate DDC bus for control bus switch command for this
2292 * SDVO output based on the controlled output.
2294 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2295 * outputs, then LVDS outputs.
2298 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
2299 struct intel_sdvo *sdvo)
2301 struct sdvo_device_mapping *mapping;
2303 if (sdvo->port == PORT_B)
2304 mapping = &dev_priv->vbt.sdvo_mappings[0];
2306 mapping = &dev_priv->vbt.sdvo_mappings[1];
2308 if (mapping->initialized)
2309 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2311 intel_sdvo_guess_ddc_bus(sdvo);
2315 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2316 struct intel_sdvo *sdvo)
2318 struct sdvo_device_mapping *mapping;
2321 if (sdvo->port == PORT_B)
2322 mapping = &dev_priv->vbt.sdvo_mappings[0];
2324 mapping = &dev_priv->vbt.sdvo_mappings[1];
2326 if (mapping->initialized &&
2327 intel_gmbus_is_valid_pin(dev_priv, mapping->i2c_pin))
2328 pin = mapping->i2c_pin;
2330 pin = GMBUS_PIN_DPB;
2332 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2334 /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2335 * our code totally fails once we start using gmbus. Hence fall back to
2336 * bit banging for now. */
2337 intel_gmbus_force_bit(sdvo->i2c, true);
2340 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2342 intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2344 intel_gmbus_force_bit(sdvo->i2c, false);
2348 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
2350 return intel_sdvo_check_supp_encode(intel_sdvo);
2354 intel_sdvo_get_slave_addr(struct drm_i915_private *dev_priv,
2355 struct intel_sdvo *sdvo)
2357 struct sdvo_device_mapping *my_mapping, *other_mapping;
2359 if (sdvo->port == PORT_B) {
2360 my_mapping = &dev_priv->vbt.sdvo_mappings[0];
2361 other_mapping = &dev_priv->vbt.sdvo_mappings[1];
2363 my_mapping = &dev_priv->vbt.sdvo_mappings[1];
2364 other_mapping = &dev_priv->vbt.sdvo_mappings[0];
2367 /* If the BIOS described our SDVO device, take advantage of it. */
2368 if (my_mapping->slave_addr)
2369 return my_mapping->slave_addr;
2371 /* If the BIOS only described a different SDVO device, use the
2372 * address that it isn't using.
2374 if (other_mapping->slave_addr) {
2375 if (other_mapping->slave_addr == 0x70)
2381 /* No SDVO device info is found for another DVO port,
2382 * so use mapping assumption we had before BIOS parsing.
2384 if (sdvo->port == PORT_B)
2391 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2392 struct intel_sdvo *encoder)
2394 struct drm_connector *drm_connector;
2397 drm_connector = &connector->base.base;
2398 ret = drm_connector_init(encoder->base.base.dev,
2400 &intel_sdvo_connector_funcs,
2401 connector->base.base.connector_type);
2405 drm_connector_helper_add(drm_connector,
2406 &intel_sdvo_connector_helper_funcs);
2408 connector->base.base.interlace_allowed = 1;
2409 connector->base.base.doublescan_allowed = 0;
2410 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2411 connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
2413 intel_connector_attach_encoder(&connector->base, &encoder->base);
2419 intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
2420 struct intel_sdvo_connector *connector)
2422 struct drm_i915_private *dev_priv = to_i915(connector->base.base.dev);
2424 intel_attach_force_audio_property(&connector->base.base);
2425 if (INTEL_GEN(dev_priv) >= 4 && IS_MOBILE(dev_priv)) {
2426 intel_attach_broadcast_rgb_property(&connector->base.base);
2428 intel_attach_aspect_ratio_property(&connector->base.base);
2429 connector->base.base.state->picture_aspect_ratio = HDMI_PICTURE_ASPECT_NONE;
2432 static struct intel_sdvo_connector *intel_sdvo_connector_alloc(void)
2434 struct intel_sdvo_connector *sdvo_connector;
2435 struct intel_sdvo_connector_state *conn_state;
2437 sdvo_connector = kzalloc(sizeof(*sdvo_connector), GFP_KERNEL);
2438 if (!sdvo_connector)
2441 conn_state = kzalloc(sizeof(*conn_state), GFP_KERNEL);
2443 kfree(sdvo_connector);
2447 __drm_atomic_helper_connector_reset(&sdvo_connector->base.base,
2448 &conn_state->base.base);
2450 return sdvo_connector;
2454 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2456 struct drm_encoder *encoder = &intel_sdvo->base.base;
2457 struct drm_connector *connector;
2458 struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2459 struct intel_connector *intel_connector;
2460 struct intel_sdvo_connector *intel_sdvo_connector;
2462 DRM_DEBUG_KMS("initialising DVI device %d\n", device);
2464 intel_sdvo_connector = intel_sdvo_connector_alloc();
2465 if (!intel_sdvo_connector)
2469 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2470 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2471 } else if (device == 1) {
2472 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2473 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2476 intel_connector = &intel_sdvo_connector->base;
2477 connector = &intel_connector->base;
2478 if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2479 intel_sdvo_connector->output_flag) {
2480 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
2481 /* Some SDVO devices have one-shot hotplug interrupts.
2482 * Ensure that they get re-enabled when an interrupt happens.
2484 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2485 intel_sdvo_enable_hotplug(intel_encoder);
2487 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2489 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2490 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2492 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2493 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2494 intel_sdvo->is_hdmi = true;
2497 if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2498 kfree(intel_sdvo_connector);
2502 if (intel_sdvo->is_hdmi)
2503 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector);
2509 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2511 struct drm_encoder *encoder = &intel_sdvo->base.base;
2512 struct drm_connector *connector;
2513 struct intel_connector *intel_connector;
2514 struct intel_sdvo_connector *intel_sdvo_connector;
2516 DRM_DEBUG_KMS("initialising TV type %d\n", type);
2518 intel_sdvo_connector = intel_sdvo_connector_alloc();
2519 if (!intel_sdvo_connector)
2522 intel_connector = &intel_sdvo_connector->base;
2523 connector = &intel_connector->base;
2524 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2525 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2527 intel_sdvo->controlled_output |= type;
2528 intel_sdvo_connector->output_flag = type;
2530 intel_sdvo->is_tv = true;
2532 if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2533 kfree(intel_sdvo_connector);
2537 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2540 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2546 intel_sdvo_destroy(connector);
2551 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2553 struct drm_encoder *encoder = &intel_sdvo->base.base;
2554 struct drm_connector *connector;
2555 struct intel_connector *intel_connector;
2556 struct intel_sdvo_connector *intel_sdvo_connector;
2558 DRM_DEBUG_KMS("initialising analog device %d\n", device);
2560 intel_sdvo_connector = intel_sdvo_connector_alloc();
2561 if (!intel_sdvo_connector)
2564 intel_connector = &intel_sdvo_connector->base;
2565 connector = &intel_connector->base;
2566 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2567 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2568 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2571 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2572 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2573 } else if (device == 1) {
2574 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2575 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2578 if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2579 kfree(intel_sdvo_connector);
2587 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2589 struct drm_encoder *encoder = &intel_sdvo->base.base;
2590 struct drm_connector *connector;
2591 struct intel_connector *intel_connector;
2592 struct intel_sdvo_connector *intel_sdvo_connector;
2594 DRM_DEBUG_KMS("initialising LVDS device %d\n", device);
2596 intel_sdvo_connector = intel_sdvo_connector_alloc();
2597 if (!intel_sdvo_connector)
2600 intel_connector = &intel_sdvo_connector->base;
2601 connector = &intel_connector->base;
2602 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2603 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2606 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2607 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2608 } else if (device == 1) {
2609 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2610 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2613 if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2614 kfree(intel_sdvo_connector);
2618 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2624 intel_sdvo_destroy(connector);
2629 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2631 intel_sdvo->is_tv = false;
2632 intel_sdvo->is_lvds = false;
2634 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2636 if (flags & SDVO_OUTPUT_TMDS0)
2637 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2640 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2641 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2644 /* TV has no XXX1 function block */
2645 if (flags & SDVO_OUTPUT_SVID0)
2646 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2649 if (flags & SDVO_OUTPUT_CVBS0)
2650 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2653 if (flags & SDVO_OUTPUT_YPRPB0)
2654 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2657 if (flags & SDVO_OUTPUT_RGB0)
2658 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2661 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2662 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2665 if (flags & SDVO_OUTPUT_LVDS0)
2666 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2669 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2670 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2673 if ((flags & SDVO_OUTPUT_MASK) == 0) {
2674 unsigned char bytes[2];
2676 intel_sdvo->controlled_output = 0;
2677 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2678 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2679 SDVO_NAME(intel_sdvo),
2680 bytes[0], bytes[1]);
2683 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2688 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
2690 struct drm_device *dev = intel_sdvo->base.base.dev;
2691 struct drm_connector *connector, *tmp;
2693 list_for_each_entry_safe(connector, tmp,
2694 &dev->mode_config.connector_list, head) {
2695 if (intel_attached_encoder(connector) == &intel_sdvo->base) {
2696 drm_connector_unregister(connector);
2697 intel_sdvo_destroy(connector);
2702 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2703 struct intel_sdvo_connector *intel_sdvo_connector,
2706 struct drm_device *dev = intel_sdvo->base.base.dev;
2707 struct intel_sdvo_tv_format format;
2708 uint32_t format_map, i;
2710 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2713 BUILD_BUG_ON(sizeof(format) != 6);
2714 if (!intel_sdvo_get_value(intel_sdvo,
2715 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2716 &format, sizeof(format)))
2719 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2721 if (format_map == 0)
2724 intel_sdvo_connector->format_supported_num = 0;
2725 for (i = 0 ; i < TV_FORMAT_NUM; i++)
2726 if (format_map & (1 << i))
2727 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2730 intel_sdvo_connector->tv_format =
2731 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2732 "mode", intel_sdvo_connector->format_supported_num);
2733 if (!intel_sdvo_connector->tv_format)
2736 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2737 drm_property_add_enum(
2738 intel_sdvo_connector->tv_format, i,
2739 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2741 intel_sdvo_connector->base.base.state->tv.mode = intel_sdvo_connector->tv_format_supported[0];
2742 drm_object_attach_property(&intel_sdvo_connector->base.base.base,
2743 intel_sdvo_connector->tv_format, 0);
2748 #define _ENHANCEMENT(state_assignment, name, NAME) do { \
2749 if (enhancements.name) { \
2750 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2751 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2753 intel_sdvo_connector->name = \
2754 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2755 if (!intel_sdvo_connector->name) return false; \
2756 state_assignment = response; \
2757 drm_object_attach_property(&connector->base, \
2758 intel_sdvo_connector->name, 0); \
2759 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2760 data_value[0], data_value[1], response); \
2764 #define ENHANCEMENT(state, name, NAME) _ENHANCEMENT((state)->name, name, NAME)
2767 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2768 struct intel_sdvo_connector *intel_sdvo_connector,
2769 struct intel_sdvo_enhancements_reply enhancements)
2771 struct drm_device *dev = intel_sdvo->base.base.dev;
2772 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2773 struct drm_connector_state *conn_state = connector->state;
2774 struct intel_sdvo_connector_state *sdvo_state =
2775 to_intel_sdvo_connector_state(conn_state);
2776 uint16_t response, data_value[2];
2778 /* when horizontal overscan is supported, Add the left/right property */
2779 if (enhancements.overscan_h) {
2780 if (!intel_sdvo_get_value(intel_sdvo,
2781 SDVO_CMD_GET_MAX_OVERSCAN_H,
2785 if (!intel_sdvo_get_value(intel_sdvo,
2786 SDVO_CMD_GET_OVERSCAN_H,
2790 sdvo_state->tv.overscan_h = response;
2792 intel_sdvo_connector->max_hscan = data_value[0];
2793 intel_sdvo_connector->left =
2794 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2795 if (!intel_sdvo_connector->left)
2798 drm_object_attach_property(&connector->base,
2799 intel_sdvo_connector->left, 0);
2801 intel_sdvo_connector->right =
2802 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2803 if (!intel_sdvo_connector->right)
2806 drm_object_attach_property(&connector->base,
2807 intel_sdvo_connector->right, 0);
2808 DRM_DEBUG_KMS("h_overscan: max %d, "
2809 "default %d, current %d\n",
2810 data_value[0], data_value[1], response);
2813 if (enhancements.overscan_v) {
2814 if (!intel_sdvo_get_value(intel_sdvo,
2815 SDVO_CMD_GET_MAX_OVERSCAN_V,
2819 if (!intel_sdvo_get_value(intel_sdvo,
2820 SDVO_CMD_GET_OVERSCAN_V,
2824 sdvo_state->tv.overscan_v = response;
2826 intel_sdvo_connector->max_vscan = data_value[0];
2827 intel_sdvo_connector->top =
2828 drm_property_create_range(dev, 0,
2829 "top_margin", 0, data_value[0]);
2830 if (!intel_sdvo_connector->top)
2833 drm_object_attach_property(&connector->base,
2834 intel_sdvo_connector->top, 0);
2836 intel_sdvo_connector->bottom =
2837 drm_property_create_range(dev, 0,
2838 "bottom_margin", 0, data_value[0]);
2839 if (!intel_sdvo_connector->bottom)
2842 drm_object_attach_property(&connector->base,
2843 intel_sdvo_connector->bottom, 0);
2844 DRM_DEBUG_KMS("v_overscan: max %d, "
2845 "default %d, current %d\n",
2846 data_value[0], data_value[1], response);
2849 ENHANCEMENT(&sdvo_state->tv, hpos, HPOS);
2850 ENHANCEMENT(&sdvo_state->tv, vpos, VPOS);
2851 ENHANCEMENT(&conn_state->tv, saturation, SATURATION);
2852 ENHANCEMENT(&conn_state->tv, contrast, CONTRAST);
2853 ENHANCEMENT(&conn_state->tv, hue, HUE);
2854 ENHANCEMENT(&conn_state->tv, brightness, BRIGHTNESS);
2855 ENHANCEMENT(&sdvo_state->tv, sharpness, SHARPNESS);
2856 ENHANCEMENT(&sdvo_state->tv, flicker_filter, FLICKER_FILTER);
2857 ENHANCEMENT(&sdvo_state->tv, flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2858 ENHANCEMENT(&sdvo_state->tv, flicker_filter_2d, FLICKER_FILTER_2D);
2859 _ENHANCEMENT(sdvo_state->tv.chroma_filter, tv_chroma_filter, TV_CHROMA_FILTER);
2860 _ENHANCEMENT(sdvo_state->tv.luma_filter, tv_luma_filter, TV_LUMA_FILTER);
2862 if (enhancements.dot_crawl) {
2863 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2866 sdvo_state->tv.dot_crawl = response & 0x1;
2867 intel_sdvo_connector->dot_crawl =
2868 drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2869 if (!intel_sdvo_connector->dot_crawl)
2872 drm_object_attach_property(&connector->base,
2873 intel_sdvo_connector->dot_crawl, 0);
2874 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2881 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2882 struct intel_sdvo_connector *intel_sdvo_connector,
2883 struct intel_sdvo_enhancements_reply enhancements)
2885 struct drm_device *dev = intel_sdvo->base.base.dev;
2886 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2887 uint16_t response, data_value[2];
2889 ENHANCEMENT(&connector->state->tv, brightness, BRIGHTNESS);
2896 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2897 struct intel_sdvo_connector *intel_sdvo_connector)
2900 struct intel_sdvo_enhancements_reply reply;
2904 BUILD_BUG_ON(sizeof(enhancements) != 2);
2906 if (!intel_sdvo_get_value(intel_sdvo,
2907 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2908 &enhancements, sizeof(enhancements)) ||
2909 enhancements.response == 0) {
2910 DRM_DEBUG_KMS("No enhancement is supported\n");
2914 if (IS_TV(intel_sdvo_connector))
2915 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2916 else if (IS_LVDS(intel_sdvo_connector))
2917 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2922 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2923 struct i2c_msg *msgs,
2926 struct intel_sdvo *sdvo = adapter->algo_data;
2928 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2931 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2934 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2936 struct intel_sdvo *sdvo = adapter->algo_data;
2937 return sdvo->i2c->algo->functionality(sdvo->i2c);
2940 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2941 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2942 .functionality = intel_sdvo_ddc_proxy_func
2946 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2947 struct drm_i915_private *dev_priv)
2949 struct pci_dev *pdev = dev_priv->drm.pdev;
2951 sdvo->ddc.owner = THIS_MODULE;
2952 sdvo->ddc.class = I2C_CLASS_DDC;
2953 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2954 sdvo->ddc.dev.parent = &pdev->dev;
2955 sdvo->ddc.algo_data = sdvo;
2956 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2958 return i2c_add_adapter(&sdvo->ddc) == 0;
2961 static void assert_sdvo_port_valid(const struct drm_i915_private *dev_priv,
2964 if (HAS_PCH_SPLIT(dev_priv))
2965 WARN_ON(port != PORT_B);
2967 WARN_ON(port != PORT_B && port != PORT_C);
2970 bool intel_sdvo_init(struct drm_i915_private *dev_priv,
2971 i915_reg_t sdvo_reg, enum port port)
2973 struct intel_encoder *intel_encoder;
2974 struct intel_sdvo *intel_sdvo;
2977 assert_sdvo_port_valid(dev_priv, port);
2979 intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL);
2983 intel_sdvo->sdvo_reg = sdvo_reg;
2984 intel_sdvo->port = port;
2985 intel_sdvo->slave_addr =
2986 intel_sdvo_get_slave_addr(dev_priv, intel_sdvo) >> 1;
2987 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo);
2988 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev_priv))
2991 /* encoder type will be decided later */
2992 intel_encoder = &intel_sdvo->base;
2993 intel_encoder->type = INTEL_OUTPUT_SDVO;
2994 intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
2995 intel_encoder->port = port;
2996 drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
2997 &intel_sdvo_enc_funcs, 0,
2998 "SDVO %c", port_name(port));
3000 /* Read the regs to test if we can talk to the device */
3001 for (i = 0; i < 0x40; i++) {
3004 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
3005 DRM_DEBUG_KMS("No SDVO device found on %s\n",
3006 SDVO_NAME(intel_sdvo));
3011 intel_encoder->compute_config = intel_sdvo_compute_config;
3012 if (HAS_PCH_SPLIT(dev_priv)) {
3013 intel_encoder->disable = pch_disable_sdvo;
3014 intel_encoder->post_disable = pch_post_disable_sdvo;
3016 intel_encoder->disable = intel_disable_sdvo;
3018 intel_encoder->pre_enable = intel_sdvo_pre_enable;
3019 intel_encoder->enable = intel_enable_sdvo;
3020 intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
3021 intel_encoder->get_config = intel_sdvo_get_config;
3023 /* In default case sdvo lvds is false */
3024 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
3027 if (intel_sdvo_output_setup(intel_sdvo,
3028 intel_sdvo->caps.output_flags) != true) {
3029 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
3030 SDVO_NAME(intel_sdvo));
3031 /* Output_setup can leave behind connectors! */
3035 /* Only enable the hotplug irq if we need it, to work around noisy
3038 if (intel_sdvo->hotplug_active) {
3039 if (intel_sdvo->port == PORT_B)
3040 intel_encoder->hpd_pin = HPD_SDVO_B;
3042 intel_encoder->hpd_pin = HPD_SDVO_C;
3046 * Cloning SDVO with anything is often impossible, since the SDVO
3047 * encoder can request a special input timing mode. And even if that's
3048 * not the case we have evidence that cloning a plain unscaled mode with
3049 * VGA doesn't really work. Furthermore the cloning flags are way too
3050 * simplistic anyway to express such constraints, so just give up on
3051 * cloning for SDVO encoders.
3053 intel_sdvo->base.cloneable = 0;
3055 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo);
3057 /* Set the input timing to the screen. Assume always input 0. */
3058 if (!intel_sdvo_set_target_input(intel_sdvo))
3061 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
3062 &intel_sdvo->pixel_clock_min,
3063 &intel_sdvo->pixel_clock_max))
3066 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
3067 "clock range %dMHz - %dMHz, "
3068 "input 1: %c, input 2: %c, "
3069 "output 1: %c, output 2: %c\n",
3070 SDVO_NAME(intel_sdvo),
3071 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
3072 intel_sdvo->caps.device_rev_id,
3073 intel_sdvo->pixel_clock_min / 1000,
3074 intel_sdvo->pixel_clock_max / 1000,
3075 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
3076 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
3077 /* check currently supported outputs */
3078 intel_sdvo->caps.output_flags &
3079 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
3080 intel_sdvo->caps.output_flags &
3081 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
3085 intel_sdvo_output_cleanup(intel_sdvo);
3088 drm_encoder_cleanup(&intel_encoder->base);
3089 i2c_del_adapter(&intel_sdvo->ddc);
3091 intel_sdvo_unselect_i2c_bus(intel_sdvo);