drivers/gpu/drm/i915/gvt/aperture_gm.c

   1 /*
   2  * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21  * SOFTWARE.
  22  *
  23  * Authors:
  24  *    Kevin Tian <kevin.tian@intel.com>
  25  *    Dexuan Cui
  26  *
  27  * Contributors:
  28  *    Pei Zhang <pei.zhang@intel.com>
  29  *    Min He <min.he@intel.com>
  30  *    Niu Bing <bing.niu@intel.com>
  31  *    Yulei Zhang <yulei.zhang@intel.com>
  32  *    Zhenyu Wang <zhenyuw@linux.intel.com>
  33  *    Zhi Wang <zhi.a.wang@intel.com>
  34  *
  35  */
  36
  37 #include "i915_drv.h"
  38 #include "gvt.h"
  39
  40 #define MB_TO_BYTES(mb) ((mb) << 20ULL)
  41 #define BYTES_TO_MB(b) ((b) >> 20ULL)
  42
  43 #define HOST_LOW_GM_SIZE MB_TO_BYTES(128)
  44 #define HOST_HIGH_GM_SIZE MB_TO_BYTES(384)
  45 #define HOST_FENCE 4
  46
  47 static int alloc_gm(struct intel_vgpu *vgpu, bool high_gm)
  48 {
  49         struct intel_gvt *gvt = vgpu->gvt;
  50         struct drm_i915_private *dev_priv = gvt->dev_priv;
  51         u32 alloc_flag, search_flag;
  52         u64 start, end, size;
  53         struct drm_mm_node *node;
  54         int retried = 0;
  55         int ret;
  56
  57         if (high_gm) {
  58                 search_flag = DRM_MM_SEARCH_BELOW;
  59                 alloc_flag = DRM_MM_CREATE_TOP;
  60                 node = &vgpu->gm.high_gm_node;
  61                 size = vgpu_hidden_sz(vgpu);
  62                 start = gvt_hidden_gmadr_base(gvt);
  63                 end = gvt_hidden_gmadr_end(gvt);
  64         } else {
  65                 search_flag = DRM_MM_SEARCH_DEFAULT;
  66                 alloc_flag = DRM_MM_CREATE_DEFAULT;
  67                 node = &vgpu->gm.low_gm_node;
  68                 size = vgpu_aperture_sz(vgpu);
  69                 start = gvt_aperture_gmadr_base(gvt);
  70                 end = gvt_aperture_gmadr_end(gvt);
  71         }
  72
  73         mutex_lock(&dev_priv->drm.struct_mutex);
  74 search_again:
  75         ret = drm_mm_insert_node_in_range_generic(&dev_priv->ggtt.base.mm,
  76                                                   node, size, 4096, 0,
  77                                                   start, end, search_flag,
  78                                                   alloc_flag);
  79         if (ret) {
  80                 ret = i915_gem_evict_something(&dev_priv->ggtt.base,
  81                                                size, 4096, 0, start, end, 0);
  82                 if (ret == 0 && ++retried < 3)
  83                         goto search_again;
  84
  85                 gvt_err("fail to alloc %s gm space from host, retried %d\n",
  86                                 high_gm ? "high" : "low", retried);
  87         }
  88         mutex_unlock(&dev_priv->drm.struct_mutex);
  89         return ret;
  90 }
  91
  92 static int alloc_vgpu_gm(struct intel_vgpu *vgpu)
  93 {
  94         struct intel_gvt *gvt = vgpu->gvt;
  95         struct drm_i915_private *dev_priv = gvt->dev_priv;
  96         int ret;
  97
  98         ret = alloc_gm(vgpu, false);
  99         if (ret)
 100                 return ret;
 101
 102         ret = alloc_gm(vgpu, true);
 103         if (ret)
 104                 goto out_free_aperture;
 105
 106         gvt_dbg_core("vgpu%d: alloc low GM start %llx size %llx\n", vgpu->id,
 107                      vgpu_aperture_offset(vgpu), vgpu_aperture_sz(vgpu));
 108
 109         gvt_dbg_core("vgpu%d: alloc high GM start %llx size %llx\n", vgpu->id,
 110                      vgpu_hidden_offset(vgpu), vgpu_hidden_sz(vgpu));
 111
 112         return 0;
 113 out_free_aperture:
 114         mutex_lock(&dev_priv->drm.struct_mutex);
 115         drm_mm_remove_node(&vgpu->gm.low_gm_node);
 116         mutex_unlock(&dev_priv->drm.struct_mutex);
 117         return ret;
 118 }
 119
 120 static void free_vgpu_gm(struct intel_vgpu *vgpu)
 121 {
 122         struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
 123
 124         mutex_lock(&dev_priv->drm.struct_mutex);
 125         drm_mm_remove_node(&vgpu->gm.low_gm_node);
 126         drm_mm_remove_node(&vgpu->gm.high_gm_node);
 127         mutex_unlock(&dev_priv->drm.struct_mutex);
 128 }
 129
 130 /**
 131  * intel_vgpu_write_fence - write fence registers owned by a vGPU
 132  * @vgpu: vGPU instance
 133  * @fence: vGPU fence register number
 134  * @value: Fence register value to be written
 135  *
 136  * This function is used to write fence registers owned by a vGPU. The vGPU
 137  * fence register number will be translated into HW fence register number.
 138  *
 139  */
 140 void intel_vgpu_write_fence(struct intel_vgpu *vgpu,
 141                 u32 fence, u64 value)
 142 {
 143         struct intel_gvt *gvt = vgpu->gvt;
 144         struct drm_i915_private *dev_priv = gvt->dev_priv;
 145         struct drm_i915_fence_reg *reg;
 146         i915_reg_t fence_reg_lo, fence_reg_hi;
 147
 148         if (WARN_ON(fence > vgpu_fence_sz(vgpu)))
 149                 return;
 150
 151         reg = vgpu->fence.regs[fence];
 152         if (WARN_ON(!reg))
 153                 return;
 154
 155         fence_reg_lo = FENCE_REG_GEN6_LO(reg->id);
 156         fence_reg_hi = FENCE_REG_GEN6_HI(reg->id);
 157
 158         I915_WRITE(fence_reg_lo, 0);
 159         POSTING_READ(fence_reg_lo);
 160
 161         I915_WRITE(fence_reg_hi, upper_32_bits(value));
 162         I915_WRITE(fence_reg_lo, lower_32_bits(value));
 163         POSTING_READ(fence_reg_lo);
 164 }
 165
 166 static void free_vgpu_fence(struct intel_vgpu *vgpu)
 167 {
 168         struct intel_gvt *gvt = vgpu->gvt;
 169         struct drm_i915_private *dev_priv = gvt->dev_priv;
 170         struct drm_i915_fence_reg *reg;
 171         u32 i;
 172
 173         if (WARN_ON(!vgpu_fence_sz(vgpu)))
 174                 return;
 175
 176         mutex_lock(&dev_priv->drm.struct_mutex);
 177         for (i = 0; i < vgpu_fence_sz(vgpu); i++) {
 178                 reg = vgpu->fence.regs[i];
 179                 intel_vgpu_write_fence(vgpu, i, 0);
 180                 list_add_tail(&reg->link,
 181                               &dev_priv->mm.fence_list);
 182         }
 183         mutex_unlock(&dev_priv->drm.struct_mutex);
 184 }
 185
 186 static int alloc_vgpu_fence(struct intel_vgpu *vgpu)
 187 {
 188         struct intel_gvt *gvt = vgpu->gvt;
 189         struct drm_i915_private *dev_priv = gvt->dev_priv;
 190         struct drm_i915_fence_reg *reg;
 191         int i;
 192         struct list_head *pos, *q;
 193
 194         /* Request fences from host */
 195         mutex_lock(&dev_priv->drm.struct_mutex);
 196         i = 0;
 197         list_for_each_safe(pos, q, &dev_priv->mm.fence_list) {
 198                 reg = list_entry(pos, struct drm_i915_fence_reg, link);
 199                 if (reg->pin_count || reg->vma)
 200                         continue;
 201                 list_del(pos);
 202                 vgpu->fence.regs[i] = reg;
 203                 intel_vgpu_write_fence(vgpu, i, 0);
 204                 if (++i == vgpu_fence_sz(vgpu))
 205                         break;
 206         }
 207         if (i != vgpu_fence_sz(vgpu))
 208                 goto out_free_fence;
 209
 210         mutex_unlock(&dev_priv->drm.struct_mutex);
 211         return 0;
 212 out_free_fence:
 213         /* Return fences to host, if fail */
 214         for (i = 0; i < vgpu_fence_sz(vgpu); i++) {
 215                 reg = vgpu->fence.regs[i];
 216                 if (!reg)
 217                         continue;
 218                 list_add_tail(&reg->link,
 219                               &dev_priv->mm.fence_list);
 220         }
 221         mutex_unlock(&dev_priv->drm.struct_mutex);
 222         return -ENOSPC;
 223 }
 224
 225 static void free_resource(struct intel_vgpu *vgpu)
 226 {
 227         struct intel_gvt *gvt = vgpu->gvt;
 228
 229         gvt->gm.vgpu_allocated_low_gm_size -= vgpu_aperture_sz(vgpu);
 230         gvt->gm.vgpu_allocated_high_gm_size -= vgpu_hidden_sz(vgpu);
 231         gvt->fence.vgpu_allocated_fence_num -= vgpu_fence_sz(vgpu);
 232 }
 233
 234 static int alloc_resource(struct intel_vgpu *vgpu,
 235                 struct intel_vgpu_creation_params *param)
 236 {
 237         struct intel_gvt *gvt = vgpu->gvt;
 238         unsigned long request, avail, max, taken;
 239         const char *item;
 240
 241         if (!param->low_gm_sz || !param->high_gm_sz || !param->fence_sz) {
 242                 gvt_err("Invalid vGPU creation params\n");
 243                 return -EINVAL;
 244         }
 245
 246         item = "low GM space";
 247         max = gvt_aperture_sz(gvt) - HOST_LOW_GM_SIZE;
 248         taken = gvt->gm.vgpu_allocated_low_gm_size;
 249         avail = max - taken;
 250         request = MB_TO_BYTES(param->low_gm_sz);
 251
 252         if (request > avail)
 253                 goto no_enough_resource;
 254
 255         vgpu_aperture_sz(vgpu) = request;
 256
 257         item = "high GM space";
 258         max = gvt_hidden_sz(gvt) - HOST_HIGH_GM_SIZE;
 259         taken = gvt->gm.vgpu_allocated_high_gm_size;
 260         avail = max - taken;
 261         request = MB_TO_BYTES(param->high_gm_sz);
 262
 263         if (request > avail)
 264                 goto no_enough_resource;
 265
 266         vgpu_hidden_sz(vgpu) = request;
 267
 268         item = "fence";
 269         max = gvt_fence_sz(gvt) - HOST_FENCE;
 270         taken = gvt->fence.vgpu_allocated_fence_num;
 271         avail = max - taken;
 272         request = param->fence_sz;
 273
 274         if (request > avail)
 275                 goto no_enough_resource;
 276
 277         vgpu_fence_sz(vgpu) = request;
 278
 279         gvt->gm.vgpu_allocated_low_gm_size += MB_TO_BYTES(param->low_gm_sz);
 280         gvt->gm.vgpu_allocated_high_gm_size += MB_TO_BYTES(param->high_gm_sz);
 281         gvt->fence.vgpu_allocated_fence_num += param->fence_sz;
 282         return 0;
 283
 284 no_enough_resource:
 285         gvt_err("vgpu%d: fail to allocate resource %s\n", vgpu->id, item);
 286         gvt_err("vgpu%d: request %luMB avail %luMB max %luMB taken %luMB\n",
 287                 vgpu->id, BYTES_TO_MB(request), BYTES_TO_MB(avail),
 288                 BYTES_TO_MB(max), BYTES_TO_MB(taken));
 289         return -ENOSPC;
 290 }
 291
 292 /**
 293  * inte_gvt_free_vgpu_resource - free HW resource owned by a vGPU
 294  * @vgpu: a vGPU
 295  *
 296  * This function is used to free the HW resource owned by a vGPU.
 297  *
 298  */
 299 void intel_vgpu_free_resource(struct intel_vgpu *vgpu)
 300 {
 301         free_vgpu_gm(vgpu);
 302         free_vgpu_fence(vgpu);
 303         free_resource(vgpu);
 304 }
 305
 306 /**
 307  * intel_alloc_vgpu_resource - allocate HW resource for a vGPU
 308  * @vgpu: vGPU
 309  * @param: vGPU creation params
 310  *
 311  * This function is used to allocate HW resource for a vGPU. User specifies
 312  * the resource configuration through the creation params.
 313  *
 314  * Returns:
 315  * zero on success, negative error code if failed.
 316  *
 317  */
 318 int intel_vgpu_alloc_resource(struct intel_vgpu *vgpu,
 319                 struct intel_vgpu_creation_params *param)
 320 {
 321         int ret;
 322
 323         ret = alloc_resource(vgpu, param);
 324         if (ret)
 325                 return ret;
 326
 327         ret = alloc_vgpu_gm(vgpu);
 328         if (ret)
 329                 goto out_free_resource;
 330
 331         ret = alloc_vgpu_fence(vgpu);
 332         if (ret)
 333                 goto out_free_vgpu_gm;
 334
 335         return 0;
 336
 337 out_free_vgpu_gm:
 338         free_vgpu_gm(vgpu);
 339 out_free_resource:
 340         free_resource(vgpu);
 341         return ret;
 342 }