2 * SPDX-License-Identifier: MIT
4 * Copyright © 2017 Intel Corporation
7 #include <linux/prime_numbers.h>
9 #include "i915_selftest.h"
11 #include "gem/i915_gem_region.h"
12 #include "gem/i915_gem_lmem.h"
13 #include "gem/i915_gem_pm.h"
15 #include "gt/intel_gt.h"
17 #include "igt_gem_utils.h"
18 #include "mock_context.h"
20 #include "selftests/mock_drm.h"
21 #include "selftests/mock_gem_device.h"
22 #include "selftests/mock_region.h"
23 #include "selftests/i915_random.h"
25 static const unsigned int page_sizes[] = {
26 I915_GTT_PAGE_SIZE_2M,
27 I915_GTT_PAGE_SIZE_64K,
28 I915_GTT_PAGE_SIZE_4K,
31 static unsigned int get_largest_page_size(struct drm_i915_private *i915,
36 for (i = 0; i < ARRAY_SIZE(page_sizes); ++i) {
37 unsigned int page_size = page_sizes[i];
39 if (HAS_PAGE_SIZES(i915, page_size) && rem >= page_size)
46 static void huge_pages_free_pages(struct sg_table *st)
48 struct scatterlist *sg;
50 for (sg = st->sgl; sg; sg = __sg_next(sg)) {
52 __free_pages(sg_page(sg), get_order(sg->length));
59 static int get_huge_pages(struct drm_i915_gem_object *obj)
61 #define GFP (GFP_KERNEL | __GFP_NOWARN | __GFP_NORETRY)
62 unsigned int page_mask = obj->mm.page_mask;
64 struct scatterlist *sg;
65 unsigned int sg_page_sizes;
68 st = kmalloc(sizeof(*st), GFP);
72 if (sg_alloc_table(st, obj->base.size >> PAGE_SHIFT, GFP)) {
83 * Our goal here is simple, we want to greedily fill the object from
84 * largest to smallest page-size, while ensuring that we use *every*
85 * page-size as per the given page-mask.
88 unsigned int bit = ilog2(page_mask);
89 unsigned int page_size = BIT(bit);
90 int order = get_order(page_size);
95 GEM_BUG_ON(order >= MAX_ORDER);
96 page = alloc_pages(GFP | __GFP_ZERO, order);
100 sg_set_page(sg, page, page_size, 0);
101 sg_page_sizes |= page_size;
111 } while ((rem - ((page_size-1) & page_mask)) >= page_size);
113 page_mask &= (page_size-1);
116 if (i915_gem_gtt_prepare_pages(obj, st))
119 GEM_BUG_ON(sg_page_sizes != obj->mm.page_mask);
120 __i915_gem_object_set_pages(obj, st, sg_page_sizes);
125 sg_set_page(sg, NULL, 0, 0);
127 huge_pages_free_pages(st);
132 static void put_huge_pages(struct drm_i915_gem_object *obj,
133 struct sg_table *pages)
135 i915_gem_gtt_finish_pages(obj, pages);
136 huge_pages_free_pages(pages);
138 obj->mm.dirty = false;
141 static const struct drm_i915_gem_object_ops huge_page_ops = {
143 .flags = I915_GEM_OBJECT_IS_SHRINKABLE,
144 .get_pages = get_huge_pages,
145 .put_pages = put_huge_pages,
148 static struct drm_i915_gem_object *
149 huge_pages_object(struct drm_i915_private *i915,
151 unsigned int page_mask)
153 static struct lock_class_key lock_class;
154 struct drm_i915_gem_object *obj;
157 GEM_BUG_ON(!IS_ALIGNED(size, BIT(__ffs(page_mask))));
159 if (size >> PAGE_SHIFT > INT_MAX)
160 return ERR_PTR(-E2BIG);
162 if (overflows_type(size, obj->base.size))
163 return ERR_PTR(-E2BIG);
165 obj = i915_gem_object_alloc();
167 return ERR_PTR(-ENOMEM);
169 drm_gem_private_object_init(&i915->drm, &obj->base, size);
170 i915_gem_object_init(obj, &huge_page_ops, &lock_class, 0);
171 obj->mem_flags |= I915_BO_FLAG_STRUCT_PAGE;
172 i915_gem_object_set_volatile(obj);
174 obj->write_domain = I915_GEM_DOMAIN_CPU;
175 obj->read_domains = I915_GEM_DOMAIN_CPU;
176 obj->cache_level = I915_CACHE_NONE;
178 obj->mm.page_mask = page_mask;
183 static int fake_get_huge_pages(struct drm_i915_gem_object *obj)
185 struct drm_i915_private *i915 = to_i915(obj->base.dev);
186 const u64 max_len = rounddown_pow_of_two(UINT_MAX);
188 struct scatterlist *sg;
189 unsigned int sg_page_sizes;
192 st = kmalloc(sizeof(*st), GFP);
196 if (sg_alloc_table(st, obj->base.size >> PAGE_SHIFT, GFP)) {
201 /* Use optimal page sized chunks to fill in the sg table */
202 rem = obj->base.size;
207 unsigned int page_size = get_largest_page_size(i915, rem);
208 unsigned int len = min(page_size * div_u64(rem, page_size),
211 GEM_BUG_ON(!page_size);
215 sg_dma_len(sg) = len;
216 sg_dma_address(sg) = page_size;
218 sg_page_sizes |= len;
233 __i915_gem_object_set_pages(obj, st, sg_page_sizes);
238 static int fake_get_huge_pages_single(struct drm_i915_gem_object *obj)
240 struct drm_i915_private *i915 = to_i915(obj->base.dev);
242 struct scatterlist *sg;
243 unsigned int page_size;
245 st = kmalloc(sizeof(*st), GFP);
249 if (sg_alloc_table(st, 1, GFP)) {
257 page_size = get_largest_page_size(i915, obj->base.size);
258 GEM_BUG_ON(!page_size);
261 sg->length = obj->base.size;
262 sg_dma_len(sg) = obj->base.size;
263 sg_dma_address(sg) = page_size;
265 __i915_gem_object_set_pages(obj, st, sg->length);
271 static void fake_free_huge_pages(struct drm_i915_gem_object *obj,
272 struct sg_table *pages)
274 sg_free_table(pages);
278 static void fake_put_huge_pages(struct drm_i915_gem_object *obj,
279 struct sg_table *pages)
281 fake_free_huge_pages(obj, pages);
282 obj->mm.dirty = false;
285 static const struct drm_i915_gem_object_ops fake_ops = {
287 .flags = I915_GEM_OBJECT_IS_SHRINKABLE,
288 .get_pages = fake_get_huge_pages,
289 .put_pages = fake_put_huge_pages,
292 static const struct drm_i915_gem_object_ops fake_ops_single = {
294 .flags = I915_GEM_OBJECT_IS_SHRINKABLE,
295 .get_pages = fake_get_huge_pages_single,
296 .put_pages = fake_put_huge_pages,
299 static struct drm_i915_gem_object *
300 fake_huge_pages_object(struct drm_i915_private *i915, u64 size, bool single)
302 static struct lock_class_key lock_class;
303 struct drm_i915_gem_object *obj;
306 GEM_BUG_ON(!IS_ALIGNED(size, I915_GTT_PAGE_SIZE));
308 if (size >> PAGE_SHIFT > UINT_MAX)
309 return ERR_PTR(-E2BIG);
311 if (overflows_type(size, obj->base.size))
312 return ERR_PTR(-E2BIG);
314 obj = i915_gem_object_alloc();
316 return ERR_PTR(-ENOMEM);
318 drm_gem_private_object_init(&i915->drm, &obj->base, size);
321 i915_gem_object_init(obj, &fake_ops_single, &lock_class, 0);
323 i915_gem_object_init(obj, &fake_ops, &lock_class, 0);
325 i915_gem_object_set_volatile(obj);
327 obj->write_domain = I915_GEM_DOMAIN_CPU;
328 obj->read_domains = I915_GEM_DOMAIN_CPU;
329 obj->cache_level = I915_CACHE_NONE;
334 static int igt_check_page_sizes(struct i915_vma *vma)
336 struct drm_i915_private *i915 = vma->vm->i915;
337 unsigned int supported = INTEL_INFO(i915)->page_sizes;
338 struct drm_i915_gem_object *obj = vma->obj;
341 /* We have to wait for the async bind to complete before our asserts */
342 err = i915_vma_sync(vma);
346 if (!HAS_PAGE_SIZES(i915, vma->page_sizes.sg)) {
347 pr_err("unsupported page_sizes.sg=%u, supported=%u\n",
348 vma->page_sizes.sg & ~supported, supported);
352 if (!HAS_PAGE_SIZES(i915, vma->page_sizes.gtt)) {
353 pr_err("unsupported page_sizes.gtt=%u, supported=%u\n",
354 vma->page_sizes.gtt & ~supported, supported);
358 if (vma->page_sizes.phys != obj->mm.page_sizes.phys) {
359 pr_err("vma->page_sizes.phys(%u) != obj->mm.page_sizes.phys(%u)\n",
360 vma->page_sizes.phys, obj->mm.page_sizes.phys);
364 if (vma->page_sizes.sg != obj->mm.page_sizes.sg) {
365 pr_err("vma->page_sizes.sg(%u) != obj->mm.page_sizes.sg(%u)\n",
366 vma->page_sizes.sg, obj->mm.page_sizes.sg);
371 * The dma-api is like a box of chocolates when it comes to the
372 * alignment of dma addresses, however for LMEM we have total control
373 * and so can guarantee alignment, likewise when we allocate our blocks
374 * they should appear in descending order, and if we know that we align
375 * to the largest page size for the GTT address, we should be able to
376 * assert that if we see 2M physical pages then we should also get 2M
377 * GTT pages. If we don't then something might be wrong in our
378 * construction of the backing pages.
380 * Maintaining alignment is required to utilise huge pages in the ppGGT.
382 if (i915_gem_object_is_lmem(obj) &&
383 IS_ALIGNED(vma->node.start, SZ_2M) &&
384 vma->page_sizes.sg & SZ_2M &&
385 vma->page_sizes.gtt < SZ_2M) {
386 pr_err("gtt pages mismatch for LMEM, expected 2M GTT pages, sg(%u), gtt(%u)\n",
387 vma->page_sizes.sg, vma->page_sizes.gtt);
391 if (obj->mm.page_sizes.gtt) {
392 pr_err("obj->page_sizes.gtt(%u) should never be set\n",
393 obj->mm.page_sizes.gtt);
400 static int igt_mock_exhaust_device_supported_pages(void *arg)
402 struct i915_ppgtt *ppgtt = arg;
403 struct drm_i915_private *i915 = ppgtt->vm.i915;
404 unsigned int saved_mask = INTEL_INFO(i915)->page_sizes;
405 struct drm_i915_gem_object *obj;
406 struct i915_vma *vma;
411 * Sanity check creating objects with every valid page support
412 * combination for our mock device.
415 for (i = 1; i < BIT(ARRAY_SIZE(page_sizes)); i++) {
416 unsigned int combination = SZ_4K; /* Required for ppGTT */
418 for (j = 0; j < ARRAY_SIZE(page_sizes); j++) {
420 combination |= page_sizes[j];
423 mkwrite_device_info(i915)->page_sizes = combination;
425 for (single = 0; single <= 1; ++single) {
426 obj = fake_huge_pages_object(i915, combination, !!single);
432 if (obj->base.size != combination) {
433 pr_err("obj->base.size=%zu, expected=%u\n",
434 obj->base.size, combination);
439 vma = i915_vma_instance(obj, &ppgtt->vm, NULL);
445 err = i915_vma_pin(vma, 0, 0, PIN_USER);
449 err = igt_check_page_sizes(vma);
451 if (vma->page_sizes.sg != combination) {
452 pr_err("page_sizes.sg=%u, expected=%u\n",
453 vma->page_sizes.sg, combination);
458 i915_gem_object_put(obj);
468 i915_gem_object_put(obj);
470 mkwrite_device_info(i915)->page_sizes = saved_mask;
475 static int igt_mock_memory_region_huge_pages(void *arg)
477 const unsigned int flags[] = { 0, I915_BO_ALLOC_CONTIGUOUS };
478 struct i915_ppgtt *ppgtt = arg;
479 struct drm_i915_private *i915 = ppgtt->vm.i915;
480 unsigned long supported = INTEL_INFO(i915)->page_sizes;
481 struct intel_memory_region *mem;
482 struct drm_i915_gem_object *obj;
483 struct i915_vma *vma;
487 mem = mock_region_create(i915, 0, SZ_2G, I915_GTT_PAGE_SIZE_4K, 0);
489 pr_err("%s failed to create memory region\n", __func__);
493 for_each_set_bit(bit, &supported, ilog2(I915_GTT_MAX_PAGE_SIZE) + 1) {
494 unsigned int page_size = BIT(bit);
495 resource_size_t phys;
498 for (i = 0; i < ARRAY_SIZE(flags); ++i) {
499 obj = i915_gem_object_create_region(mem,
500 page_size, page_size,
507 vma = i915_vma_instance(obj, &ppgtt->vm, NULL);
513 err = i915_vma_pin(vma, 0, 0, PIN_USER);
517 err = igt_check_page_sizes(vma);
521 phys = i915_gem_object_get_dma_address(obj, 0);
522 if (!IS_ALIGNED(phys, page_size)) {
523 pr_err("%s addr misaligned(%pa) page_size=%u\n",
524 __func__, &phys, page_size);
529 if (vma->page_sizes.gtt != page_size) {
530 pr_err("%s page_sizes.gtt=%u, expected=%u\n",
531 __func__, vma->page_sizes.gtt,
538 __i915_gem_object_put_pages(obj);
539 i915_gem_object_put(obj);
548 i915_gem_object_put(obj);
550 intel_memory_region_put(mem);
554 static int igt_mock_ppgtt_misaligned_dma(void *arg)
556 struct i915_ppgtt *ppgtt = arg;
557 struct drm_i915_private *i915 = ppgtt->vm.i915;
558 unsigned long supported = INTEL_INFO(i915)->page_sizes;
559 struct drm_i915_gem_object *obj;
564 * Sanity check dma misalignment for huge pages -- the dma addresses we
565 * insert into the paging structures need to always respect the page
569 bit = ilog2(I915_GTT_PAGE_SIZE_64K);
571 for_each_set_bit_from(bit, &supported,
572 ilog2(I915_GTT_MAX_PAGE_SIZE) + 1) {
573 IGT_TIMEOUT(end_time);
574 unsigned int page_size = BIT(bit);
575 unsigned int flags = PIN_USER | PIN_OFFSET_FIXED;
578 round_up(page_size, I915_GTT_PAGE_SIZE_2M) << 1;
579 struct i915_vma *vma;
581 obj = fake_huge_pages_object(i915, size, true);
585 if (obj->base.size != size) {
586 pr_err("obj->base.size=%zu, expected=%u\n",
587 obj->base.size, size);
592 err = i915_gem_object_pin_pages_unlocked(obj);
596 /* Force the page size for this object */
597 obj->mm.page_sizes.sg = page_size;
599 vma = i915_vma_instance(obj, &ppgtt->vm, NULL);
605 err = i915_vma_pin(vma, 0, 0, flags);
610 err = igt_check_page_sizes(vma);
612 if (vma->page_sizes.gtt != page_size) {
613 pr_err("page_sizes.gtt=%u, expected %u\n",
614 vma->page_sizes.gtt, page_size);
624 * Try all the other valid offsets until the next
625 * boundary -- should always fall back to using 4K
628 for (offset = 4096; offset < page_size; offset += 4096) {
629 err = i915_vma_unbind(vma);
633 err = i915_vma_pin(vma, 0, 0, flags | offset);
637 err = igt_check_page_sizes(vma);
639 if (vma->page_sizes.gtt != I915_GTT_PAGE_SIZE_4K) {
640 pr_err("page_sizes.gtt=%u, expected %llu\n",
641 vma->page_sizes.gtt, I915_GTT_PAGE_SIZE_4K);
650 if (igt_timeout(end_time,
651 "%s timed out at offset %x with page-size %x\n",
652 __func__, offset, page_size))
656 i915_gem_object_lock(obj, NULL);
657 i915_gem_object_unpin_pages(obj);
658 __i915_gem_object_put_pages(obj);
659 i915_gem_object_unlock(obj);
660 i915_gem_object_put(obj);
666 i915_gem_object_lock(obj, NULL);
667 i915_gem_object_unpin_pages(obj);
668 i915_gem_object_unlock(obj);
670 i915_gem_object_put(obj);
675 static void close_object_list(struct list_head *objects,
676 struct i915_ppgtt *ppgtt)
678 struct drm_i915_gem_object *obj, *on;
680 list_for_each_entry_safe(obj, on, objects, st_link) {
681 list_del(&obj->st_link);
682 i915_gem_object_lock(obj, NULL);
683 i915_gem_object_unpin_pages(obj);
684 __i915_gem_object_put_pages(obj);
685 i915_gem_object_unlock(obj);
686 i915_gem_object_put(obj);
690 static int igt_mock_ppgtt_huge_fill(void *arg)
692 struct i915_ppgtt *ppgtt = arg;
693 struct drm_i915_private *i915 = ppgtt->vm.i915;
694 unsigned long max_pages = ppgtt->vm.total >> PAGE_SHIFT;
695 unsigned long page_num;
698 IGT_TIMEOUT(end_time);
701 for_each_prime_number_from(page_num, 1, max_pages) {
702 struct drm_i915_gem_object *obj;
703 u64 size = page_num << PAGE_SHIFT;
704 struct i915_vma *vma;
705 unsigned int expected_gtt = 0;
708 obj = fake_huge_pages_object(i915, size, single);
714 if (obj->base.size != size) {
715 pr_err("obj->base.size=%zd, expected=%llu\n",
716 obj->base.size, size);
717 i915_gem_object_put(obj);
722 err = i915_gem_object_pin_pages_unlocked(obj);
724 i915_gem_object_put(obj);
728 list_add(&obj->st_link, &objects);
730 vma = i915_vma_instance(obj, &ppgtt->vm, NULL);
736 err = i915_vma_pin(vma, 0, 0, PIN_USER);
740 err = igt_check_page_sizes(vma);
747 * Figure out the expected gtt page size knowing that we go from
748 * largest to smallest page size sg chunks, and that we align to
749 * the largest page size.
751 for (i = 0; i < ARRAY_SIZE(page_sizes); ++i) {
752 unsigned int page_size = page_sizes[i];
754 if (HAS_PAGE_SIZES(i915, page_size) &&
756 expected_gtt |= page_size;
761 GEM_BUG_ON(!expected_gtt);
764 if (expected_gtt & I915_GTT_PAGE_SIZE_4K)
765 expected_gtt &= ~I915_GTT_PAGE_SIZE_64K;
769 if (vma->page_sizes.sg & I915_GTT_PAGE_SIZE_64K) {
770 if (!IS_ALIGNED(vma->node.start,
771 I915_GTT_PAGE_SIZE_2M)) {
772 pr_err("node.start(%llx) not aligned to 2M\n",
778 if (!IS_ALIGNED(vma->node.size,
779 I915_GTT_PAGE_SIZE_2M)) {
780 pr_err("node.size(%llx) not aligned to 2M\n",
787 if (vma->page_sizes.gtt != expected_gtt) {
788 pr_err("gtt=%u, expected=%u, size=%zd, single=%s\n",
789 vma->page_sizes.gtt, expected_gtt,
790 obj->base.size, yesno(!!single));
795 if (igt_timeout(end_time,
796 "%s timed out at size %zd\n",
797 __func__, obj->base.size))
803 close_object_list(&objects, ppgtt);
805 if (err == -ENOMEM || err == -ENOSPC)
811 static int igt_mock_ppgtt_64K(void *arg)
813 struct i915_ppgtt *ppgtt = arg;
814 struct drm_i915_private *i915 = ppgtt->vm.i915;
815 struct drm_i915_gem_object *obj;
816 const struct object_info {
821 /* Cases with forced padding/alignment */
824 .gtt = I915_GTT_PAGE_SIZE_64K,
828 .size = SZ_64K + SZ_4K,
829 .gtt = I915_GTT_PAGE_SIZE_4K,
833 .size = SZ_64K - SZ_4K,
834 .gtt = I915_GTT_PAGE_SIZE_4K,
839 .gtt = I915_GTT_PAGE_SIZE_64K,
843 .size = SZ_2M - SZ_4K,
844 .gtt = I915_GTT_PAGE_SIZE_4K,
848 .size = SZ_2M + SZ_4K,
849 .gtt = I915_GTT_PAGE_SIZE_64K | I915_GTT_PAGE_SIZE_4K,
853 .size = SZ_2M + SZ_64K,
854 .gtt = I915_GTT_PAGE_SIZE_64K,
858 .size = SZ_2M - SZ_64K,
859 .gtt = I915_GTT_PAGE_SIZE_64K,
862 /* Try without any forced padding/alignment */
866 .gtt = I915_GTT_PAGE_SIZE_4K,
870 .offset = SZ_2M - SZ_64K,
871 .gtt = I915_GTT_PAGE_SIZE_4K,
874 struct i915_vma *vma;
879 * Sanity check some of the trickiness with 64K pages -- either we can
880 * safely mark the whole page-table(2M block) as 64K, or we have to
881 * always fallback to 4K.
884 if (!HAS_PAGE_SIZES(i915, I915_GTT_PAGE_SIZE_64K))
887 for (i = 0; i < ARRAY_SIZE(objects); ++i) {
888 unsigned int size = objects[i].size;
889 unsigned int expected_gtt = objects[i].gtt;
890 unsigned int offset = objects[i].offset;
891 unsigned int flags = PIN_USER;
893 for (single = 0; single <= 1; single++) {
894 obj = fake_huge_pages_object(i915, size, !!single);
898 err = i915_gem_object_pin_pages_unlocked(obj);
903 * Disable 2M pages -- We only want to use 64K/4K pages
906 obj->mm.page_sizes.sg &= ~I915_GTT_PAGE_SIZE_2M;
908 vma = i915_vma_instance(obj, &ppgtt->vm, NULL);
911 goto out_object_unpin;
915 flags |= PIN_OFFSET_FIXED | offset;
917 err = i915_vma_pin(vma, 0, 0, flags);
919 goto out_object_unpin;
921 err = igt_check_page_sizes(vma);
925 if (!offset && vma->page_sizes.sg & I915_GTT_PAGE_SIZE_64K) {
926 if (!IS_ALIGNED(vma->node.start,
927 I915_GTT_PAGE_SIZE_2M)) {
928 pr_err("node.start(%llx) not aligned to 2M\n",
934 if (!IS_ALIGNED(vma->node.size,
935 I915_GTT_PAGE_SIZE_2M)) {
936 pr_err("node.size(%llx) not aligned to 2M\n",
943 if (vma->page_sizes.gtt != expected_gtt) {
944 pr_err("gtt=%u, expected=%u, i=%d, single=%s\n",
945 vma->page_sizes.gtt, expected_gtt, i,
952 i915_gem_object_lock(obj, NULL);
953 i915_gem_object_unpin_pages(obj);
954 __i915_gem_object_put_pages(obj);
955 i915_gem_object_unlock(obj);
956 i915_gem_object_put(obj);
965 i915_gem_object_lock(obj, NULL);
966 i915_gem_object_unpin_pages(obj);
967 i915_gem_object_unlock(obj);
969 i915_gem_object_put(obj);
974 static int gpu_write(struct intel_context *ce,
975 struct i915_vma *vma,
981 i915_gem_object_lock(vma->obj, NULL);
982 err = i915_gem_object_set_to_gtt_domain(vma->obj, true);
983 i915_gem_object_unlock(vma->obj);
987 return igt_gpu_fill_dw(ce, vma, dw * sizeof(u32),
988 vma->size >> PAGE_SHIFT, val);
992 __cpu_check_shmem(struct drm_i915_gem_object *obj, u32 dword, u32 val)
994 unsigned int needs_flush;
998 i915_gem_object_lock(obj, NULL);
999 err = i915_gem_object_prepare_read(obj, &needs_flush);
1003 for (n = 0; n < obj->base.size >> PAGE_SHIFT; ++n) {
1004 u32 *ptr = kmap_atomic(i915_gem_object_get_page(obj, n));
1006 if (needs_flush & CLFLUSH_BEFORE)
1007 drm_clflush_virt_range(ptr, PAGE_SIZE);
1009 if (ptr[dword] != val) {
1010 pr_err("n=%lu ptr[%u]=%u, val=%u\n",
1011 n, dword, ptr[dword], val);
1020 i915_gem_object_finish_access(obj);
1022 i915_gem_object_unlock(obj);
1027 static int __cpu_check_vmap(struct drm_i915_gem_object *obj, u32 dword, u32 val)
1029 unsigned long n = obj->base.size >> PAGE_SHIFT;
1033 err = i915_gem_object_wait(obj, 0, MAX_SCHEDULE_TIMEOUT);
1037 ptr = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WC);
1039 return PTR_ERR(ptr);
1044 pr_err("base[%u]=%08x, val=%08x\n",
1050 ptr += PAGE_SIZE / sizeof(*ptr);
1053 i915_gem_object_unpin_map(obj);
1057 static int cpu_check(struct drm_i915_gem_object *obj, u32 dword, u32 val)
1059 if (i915_gem_object_has_struct_page(obj))
1060 return __cpu_check_shmem(obj, dword, val);
1062 return __cpu_check_vmap(obj, dword, val);
1065 static int __igt_write_huge(struct intel_context *ce,
1066 struct drm_i915_gem_object *obj,
1067 u64 size, u64 offset,
1070 unsigned int flags = PIN_USER | PIN_OFFSET_FIXED;
1071 struct i915_vma *vma;
1074 vma = i915_vma_instance(obj, ce->vm, NULL);
1076 return PTR_ERR(vma);
1078 err = i915_vma_unbind(vma);
1082 err = i915_vma_pin(vma, size, 0, flags | offset);
1085 * The ggtt may have some pages reserved so
1086 * refrain from erroring out.
1088 if (err == -ENOSPC && i915_is_ggtt(ce->vm))
1094 err = igt_check_page_sizes(vma);
1098 err = gpu_write(ce, vma, dword, val);
1100 pr_err("gpu-write failed at offset=%llx\n", offset);
1104 err = cpu_check(obj, dword, val);
1106 pr_err("cpu-check failed at offset=%llx\n", offset);
1111 i915_vma_unpin(vma);
1115 static int igt_write_huge(struct i915_gem_context *ctx,
1116 struct drm_i915_gem_object *obj)
1118 struct i915_gem_engines *engines;
1119 struct i915_gem_engines_iter it;
1120 struct intel_context *ce;
1121 I915_RND_STATE(prng);
1122 IGT_TIMEOUT(end_time);
1123 unsigned int max_page_size;
1132 GEM_BUG_ON(!i915_gem_object_has_pinned_pages(obj));
1134 size = obj->base.size;
1135 if (obj->mm.page_sizes.sg & I915_GTT_PAGE_SIZE_64K)
1136 size = round_up(size, I915_GTT_PAGE_SIZE_2M);
1141 for_each_gem_engine(ce, i915_gem_context_lock_engines(ctx), it) {
1143 if (!intel_engine_can_store_dword(ce->engine))
1146 max = min(max, ce->vm->total);
1149 i915_gem_context_unlock_engines(ctx);
1154 * To keep things interesting when alternating between engines in our
1155 * randomized order, lets also make feeding to the same engine a few
1156 * times in succession a possibility by enlarging the permutation array.
1158 order = i915_random_order(count * count, &prng);
1162 max_page_size = rounddown_pow_of_two(obj->mm.page_sizes.sg);
1163 max = div_u64(max - size, max_page_size);
1166 * Try various offsets in an ascending/descending fashion until we
1167 * timeout -- we want to avoid issues hidden by effectively always using
1171 engines = i915_gem_context_lock_engines(ctx);
1172 for_each_prime_number_from(num, 0, max) {
1173 u64 offset_low = num * max_page_size;
1174 u64 offset_high = (max - num) * max_page_size;
1175 u32 dword = offset_in_page(num) / 4;
1176 struct intel_context *ce;
1178 ce = engines->engines[order[i] % engines->num_engines];
1179 i = (i + 1) % (count * count);
1180 if (!ce || !intel_engine_can_store_dword(ce->engine))
1184 * In order to utilize 64K pages we need to both pad the vma
1185 * size and ensure the vma offset is at the start of the pt
1186 * boundary, however to improve coverage we opt for testing both
1187 * aligned and unaligned offsets.
1189 if (obj->mm.page_sizes.sg & I915_GTT_PAGE_SIZE_64K)
1190 offset_low = round_down(offset_low,
1191 I915_GTT_PAGE_SIZE_2M);
1193 err = __igt_write_huge(ce, obj, size, offset_low,
1198 err = __igt_write_huge(ce, obj, size, offset_high,
1203 if (igt_timeout(end_time,
1204 "%s timed out on %s, offset_low=%llx offset_high=%llx, max_page_size=%x\n",
1205 __func__, ce->engine->name, offset_low, offset_high,
1209 i915_gem_context_unlock_engines(ctx);
1216 typedef struct drm_i915_gem_object *
1217 (*igt_create_fn)(struct drm_i915_private *i915, u32 size, u32 flags);
1219 static inline bool igt_can_allocate_thp(struct drm_i915_private *i915)
1221 return i915->mm.gemfs && has_transparent_hugepage();
1224 static struct drm_i915_gem_object *
1225 igt_create_shmem(struct drm_i915_private *i915, u32 size, u32 flags)
1227 if (!igt_can_allocate_thp(i915)) {
1228 pr_info("%s missing THP support, skipping\n", __func__);
1229 return ERR_PTR(-ENODEV);
1232 return i915_gem_object_create_shmem(i915, size);
1235 static struct drm_i915_gem_object *
1236 igt_create_internal(struct drm_i915_private *i915, u32 size, u32 flags)
1238 return i915_gem_object_create_internal(i915, size);
1241 static struct drm_i915_gem_object *
1242 igt_create_system(struct drm_i915_private *i915, u32 size, u32 flags)
1244 return huge_pages_object(i915, size, size);
1247 static struct drm_i915_gem_object *
1248 igt_create_local(struct drm_i915_private *i915, u32 size, u32 flags)
1250 return i915_gem_object_create_lmem(i915, size, flags);
1253 static u32 igt_random_size(struct rnd_state *prng,
1260 GEM_BUG_ON(!is_power_of_2(min_page_size));
1261 GEM_BUG_ON(!is_power_of_2(max_page_size));
1262 GEM_BUG_ON(min_page_size < PAGE_SIZE);
1263 GEM_BUG_ON(min_page_size > max_page_size);
1265 mask = ((max_page_size << 1ULL) - 1) & PAGE_MASK;
1266 size = prandom_u32_state(prng) & mask;
1267 if (size < min_page_size)
1268 size |= min_page_size;
1273 static int igt_ppgtt_smoke_huge(void *arg)
1275 struct i915_gem_context *ctx = arg;
1276 struct drm_i915_private *i915 = ctx->i915;
1277 struct drm_i915_gem_object *obj;
1278 I915_RND_STATE(prng);
1284 { igt_create_internal, SZ_64K, SZ_2M, },
1285 { igt_create_shmem, SZ_64K, SZ_32M, },
1286 { igt_create_local, SZ_64K, SZ_1G, },
1292 * Sanity check that the HW uses huge pages correctly through our
1293 * various backends -- ensure that our writes land in the right place.
1296 for (i = 0; i < ARRAY_SIZE(backends); ++i) {
1297 u32 min = backends[i].min;
1298 u32 max = backends[i].max;
1301 size = igt_random_size(&prng, min, rounddown_pow_of_two(size));
1303 obj = backends[i].fn(i915, size, 0);
1306 if (err == -E2BIG) {
1309 } else if (err == -ENODEV) {
1317 err = i915_gem_object_pin_pages_unlocked(obj);
1319 if (err == -ENXIO || err == -E2BIG) {
1320 i915_gem_object_put(obj);
1327 if (obj->mm.page_sizes.phys < min) {
1328 pr_info("%s unable to allocate huge-page(s) with size=%u, i=%d\n",
1334 err = igt_write_huge(ctx, obj);
1336 pr_err("%s write-huge failed with size=%u, i=%d\n",
1340 i915_gem_object_lock(obj, NULL);
1341 i915_gem_object_unpin_pages(obj);
1342 __i915_gem_object_put_pages(obj);
1343 i915_gem_object_unlock(obj);
1345 i915_gem_object_put(obj);
1347 if (err == -ENOMEM || err == -ENXIO)
1359 static int igt_ppgtt_sanity_check(void *arg)
1361 struct i915_gem_context *ctx = arg;
1362 struct drm_i915_private *i915 = ctx->i915;
1363 unsigned int supported = INTEL_INFO(i915)->page_sizes;
1368 { igt_create_system, 0, },
1369 { igt_create_local, 0, },
1370 { igt_create_local, I915_BO_ALLOC_CONTIGUOUS, },
1379 { SZ_2M - SZ_64K, SZ_64K },
1380 { SZ_2M - SZ_4K, SZ_64K | SZ_4K },
1381 { SZ_2M + SZ_4K, SZ_64K | SZ_4K },
1382 { SZ_2M + SZ_4K, SZ_2M | SZ_4K },
1383 { SZ_2M + SZ_64K, SZ_2M | SZ_64K },
1388 if (supported == I915_GTT_PAGE_SIZE_4K)
1392 * Sanity check that the HW behaves with a limited set of combinations.
1393 * We already have a bunch of randomised testing, which should give us
1394 * a decent amount of variation between runs, however we should keep
1395 * this to limit the chances of introducing a temporary regression, by
1396 * testing the most obvious cases that might make something blow up.
1399 for (i = 0; i < ARRAY_SIZE(backends); ++i) {
1400 for (j = 0; j < ARRAY_SIZE(combos); ++j) {
1401 struct drm_i915_gem_object *obj;
1402 u32 size = combos[j].size;
1403 u32 pages = combos[j].pages;
1405 obj = backends[i].fn(i915, size, backends[i].flags);
1408 if (err == -ENODEV) {
1409 pr_info("Device lacks local memory, skipping\n");
1417 err = i915_gem_object_pin_pages_unlocked(obj);
1419 i915_gem_object_put(obj);
1423 GEM_BUG_ON(pages > obj->base.size);
1424 pages = pages & supported;
1427 obj->mm.page_sizes.sg = pages;
1429 err = igt_write_huge(ctx, obj);
1431 i915_gem_object_lock(obj, NULL);
1432 i915_gem_object_unpin_pages(obj);
1433 __i915_gem_object_put_pages(obj);
1434 i915_gem_object_unlock(obj);
1435 i915_gem_object_put(obj);
1438 pr_err("%s write-huge failed with size=%u pages=%u i=%d, j=%d\n",
1439 __func__, size, pages, i, j);
1454 static int igt_tmpfs_fallback(void *arg)
1456 struct i915_gem_context *ctx = arg;
1457 struct drm_i915_private *i915 = ctx->i915;
1458 struct vfsmount *gemfs = i915->mm.gemfs;
1459 struct i915_address_space *vm = i915_gem_context_get_eb_vm(ctx);
1460 struct drm_i915_gem_object *obj;
1461 struct i915_vma *vma;
1466 * Make sure that we don't burst into a ball of flames upon falling back
1467 * to tmpfs, which we rely on if on the off-chance we encouter a failure
1468 * when setting up gemfs.
1471 i915->mm.gemfs = NULL;
1473 obj = i915_gem_object_create_shmem(i915, PAGE_SIZE);
1479 vaddr = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WB);
1480 if (IS_ERR(vaddr)) {
1481 err = PTR_ERR(vaddr);
1484 *vaddr = 0xdeadbeaf;
1486 __i915_gem_object_flush_map(obj, 0, 64);
1487 i915_gem_object_unpin_map(obj);
1489 vma = i915_vma_instance(obj, vm, NULL);
1495 err = i915_vma_pin(vma, 0, 0, PIN_USER);
1499 err = igt_check_page_sizes(vma);
1501 i915_vma_unpin(vma);
1503 i915_gem_object_put(obj);
1505 i915->mm.gemfs = gemfs;
1511 static int igt_shrink_thp(void *arg)
1513 struct i915_gem_context *ctx = arg;
1514 struct drm_i915_private *i915 = ctx->i915;
1515 struct i915_address_space *vm = i915_gem_context_get_eb_vm(ctx);
1516 struct drm_i915_gem_object *obj;
1517 struct i915_gem_engines_iter it;
1518 struct intel_context *ce;
1519 struct i915_vma *vma;
1520 unsigned int flags = PIN_USER;
1525 * Sanity check shrinking huge-paged object -- make sure nothing blows
1529 if (!igt_can_allocate_thp(i915)) {
1530 pr_info("missing THP support, skipping\n");
1534 obj = i915_gem_object_create_shmem(i915, SZ_2M);
1540 vma = i915_vma_instance(obj, vm, NULL);
1546 err = i915_vma_pin(vma, 0, 0, flags);
1550 if (obj->mm.page_sizes.phys < I915_GTT_PAGE_SIZE_2M) {
1551 pr_info("failed to allocate THP, finishing test early\n");
1555 err = igt_check_page_sizes(vma);
1561 for_each_gem_engine(ce, i915_gem_context_lock_engines(ctx), it) {
1562 if (!intel_engine_can_store_dword(ce->engine))
1565 err = gpu_write(ce, vma, n++, 0xdeadbeaf);
1569 i915_gem_context_unlock_engines(ctx);
1570 i915_vma_unpin(vma);
1575 * Now that the pages are *unpinned* shrink-all should invoke
1576 * shmem to truncate our pages.
1578 i915_gem_shrink_all(i915);
1579 if (i915_gem_object_has_pages(obj)) {
1580 pr_err("shrink-all didn't truncate the pages\n");
1585 if (obj->mm.page_sizes.sg || obj->mm.page_sizes.phys) {
1586 pr_err("residual page-size bits left\n");
1591 err = i915_vma_pin(vma, 0, 0, flags);
1596 err = cpu_check(obj, n, 0xdeadbeaf);
1602 i915_vma_unpin(vma);
1604 i915_gem_object_put(obj);
1611 int i915_gem_huge_page_mock_selftests(void)
1613 static const struct i915_subtest tests[] = {
1614 SUBTEST(igt_mock_exhaust_device_supported_pages),
1615 SUBTEST(igt_mock_memory_region_huge_pages),
1616 SUBTEST(igt_mock_ppgtt_misaligned_dma),
1617 SUBTEST(igt_mock_ppgtt_huge_fill),
1618 SUBTEST(igt_mock_ppgtt_64K),
1620 struct drm_i915_private *dev_priv;
1621 struct i915_ppgtt *ppgtt;
1624 dev_priv = mock_gem_device();
1628 /* Pretend to be a device which supports the 48b PPGTT */
1629 mkwrite_device_info(dev_priv)->ppgtt_type = INTEL_PPGTT_FULL;
1630 mkwrite_device_info(dev_priv)->ppgtt_size = 48;
1632 ppgtt = i915_ppgtt_create(&dev_priv->gt);
1633 if (IS_ERR(ppgtt)) {
1634 err = PTR_ERR(ppgtt);
1638 if (!i915_vm_is_4lvl(&ppgtt->vm)) {
1639 pr_err("failed to create 48b PPGTT\n");
1644 /* If we were ever hit this then it's time to mock the 64K scratch */
1645 if (!i915_vm_has_scratch_64K(&ppgtt->vm)) {
1646 pr_err("PPGTT missing 64K scratch page\n");
1651 err = i915_subtests(tests, ppgtt);
1654 i915_vm_put(&ppgtt->vm);
1656 mock_destroy_device(dev_priv);
1660 int i915_gem_huge_page_live_selftests(struct drm_i915_private *i915)
1662 static const struct i915_subtest tests[] = {
1663 SUBTEST(igt_shrink_thp),
1664 SUBTEST(igt_tmpfs_fallback),
1665 SUBTEST(igt_ppgtt_smoke_huge),
1666 SUBTEST(igt_ppgtt_sanity_check),
1668 struct i915_gem_context *ctx;
1669 struct i915_address_space *vm;
1673 if (!HAS_PPGTT(i915)) {
1674 pr_info("PPGTT not supported, skipping live-selftests\n");
1678 if (intel_gt_is_wedged(&i915->gt))
1681 file = mock_file(i915);
1683 return PTR_ERR(file);
1685 ctx = live_context(i915, file);
1691 mutex_lock(&ctx->mutex);
1692 vm = i915_gem_context_vm(ctx);
1694 WRITE_ONCE(vm->scrub_64K, true);
1695 mutex_unlock(&ctx->mutex);
1697 err = i915_subtests(tests, ctx);