3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
5 * Inki Dae <inki.dae@samsung.com>
6 * Joonyoung Shim <jy0922.shim@samsung.com>
7 * Seung-Woo Kim <sw0312.kim@samsung.com>
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
15 #ifndef _EXYNOS_DRM_DRV_H_
16 #define _EXYNOS_DRM_DRV_H_
19 #include <linux/module.h>
23 #define MAX_FB_BUFFER 4
27 #define to_exynos_crtc(x) container_of(x, struct exynos_drm_crtc, base)
28 #define to_exynos_plane(x) container_of(x, struct exynos_drm_plane, base)
30 /* this enumerates display type. */
31 enum exynos_drm_output_type {
32 EXYNOS_DISPLAY_TYPE_NONE,
33 /* RGB or CPU Interface. */
34 EXYNOS_DISPLAY_TYPE_LCD,
36 EXYNOS_DISPLAY_TYPE_HDMI,
37 /* Virtual Display Interface. */
38 EXYNOS_DISPLAY_TYPE_VIDI,
41 struct exynos_drm_rect {
47 * Exynos drm plane state structure.
49 * @base: plane_state object (contains drm_framebuffer pointer)
50 * @src: rectangle of the source image data to be displayed (clipped to
52 * @crtc: rectangle of the target image position on hardware screen
53 * (clipped to visible part).
54 * @h_ratio: horizontal scaling ratio, 16.16 fixed point
55 * @v_ratio: vertical scaling ratio, 16.16 fixed point
57 * this structure consists plane state data that will be applied to hardware
58 * specific overlay info.
61 struct exynos_drm_plane_state {
62 struct drm_plane_state base;
63 struct exynos_drm_rect crtc;
64 struct exynos_drm_rect src;
69 static inline struct exynos_drm_plane_state *
70 to_exynos_plane_state(struct drm_plane_state *state)
72 return container_of(state, struct exynos_drm_plane_state, base);
76 * Exynos drm common overlay structure.
79 * @index: hardware index of the overlay layer
81 * this structure is common to exynos SoC and its contents would be copied
82 * to hardware specific overlay info.
85 struct exynos_drm_plane {
86 struct drm_plane base;
87 const struct exynos_drm_plane_config *config;
91 #define EXYNOS_DRM_PLANE_CAP_DOUBLE (1 << 0)
92 #define EXYNOS_DRM_PLANE_CAP_SCALE (1 << 1)
93 #define EXYNOS_DRM_PLANE_CAP_ZPOS (1 << 2)
94 #define EXYNOS_DRM_PLANE_CAP_TILE (1 << 3)
95 #define EXYNOS_DRM_PLANE_CAP_PIX_BLEND (1 << 4)
96 #define EXYNOS_DRM_PLANE_CAP_WIN_BLEND (1 << 5)
99 * Exynos DRM plane configuration structure.
101 * @zpos: initial z-position of the plane.
102 * @type: type of the plane (primary, cursor or overlay).
103 * @pixel_formats: supported pixel formats.
104 * @num_pixel_formats: number of elements in 'pixel_formats'.
105 * @capabilities: supported features (see EXYNOS_DRM_PLANE_CAP_*)
108 struct exynos_drm_plane_config {
110 enum drm_plane_type type;
111 const uint32_t *pixel_formats;
112 unsigned int num_pixel_formats;
113 unsigned int capabilities;
117 * Exynos drm crtc ops
119 * @enable: enable the device
120 * @disable: disable the device
121 * @enable_vblank: specific driver callback for enabling vblank interrupt.
122 * @disable_vblank: specific driver callback for disabling vblank interrupt.
123 * @mode_valid: specific driver callback for mode validation
124 * @atomic_check: validate state
125 * @atomic_begin: prepare device to receive an update
126 * @atomic_flush: mark the end of device update
127 * @update_plane: apply hardware specific overlay data to registers.
128 * @disable_plane: disable hardware specific overlay.
129 * @te_handler: trigger to transfer video image at the tearing effect
130 * synchronization signal if there is a page flip request.
132 struct exynos_drm_crtc;
133 struct exynos_drm_crtc_ops {
134 void (*enable)(struct exynos_drm_crtc *crtc);
135 void (*disable)(struct exynos_drm_crtc *crtc);
136 int (*enable_vblank)(struct exynos_drm_crtc *crtc);
137 void (*disable_vblank)(struct exynos_drm_crtc *crtc);
138 u32 (*get_vblank_counter)(struct exynos_drm_crtc *crtc);
139 enum drm_mode_status (*mode_valid)(struct exynos_drm_crtc *crtc,
140 const struct drm_display_mode *mode);
141 bool (*mode_fixup)(struct exynos_drm_crtc *crtc,
142 const struct drm_display_mode *mode,
143 struct drm_display_mode *adjusted_mode);
144 int (*atomic_check)(struct exynos_drm_crtc *crtc,
145 struct drm_crtc_state *state);
146 void (*atomic_begin)(struct exynos_drm_crtc *crtc);
147 void (*update_plane)(struct exynos_drm_crtc *crtc,
148 struct exynos_drm_plane *plane);
149 void (*disable_plane)(struct exynos_drm_crtc *crtc,
150 struct exynos_drm_plane *plane);
151 void (*atomic_flush)(struct exynos_drm_crtc *crtc);
152 void (*te_handler)(struct exynos_drm_crtc *crtc);
155 struct exynos_drm_clk {
156 void (*enable)(struct exynos_drm_clk *clk, bool enable);
160 * Exynos specific crtc structure.
162 * @base: crtc object.
163 * @type: one of EXYNOS_DISPLAY_TYPE_LCD and HDMI.
164 * @ops: pointer to callbacks for exynos drm specific functionality
165 * @ctx: A pointer to the crtc's implementation specific context
166 * @pipe_clk: A pointer to the crtc's pipeline clock.
168 struct exynos_drm_crtc {
169 struct drm_crtc base;
170 enum exynos_drm_output_type type;
171 const struct exynos_drm_crtc_ops *ops;
173 struct exynos_drm_clk *pipe_clk;
177 static inline void exynos_drm_pipe_clk_enable(struct exynos_drm_crtc *crtc,
181 crtc->pipe_clk->enable(crtc->pipe_clk, enable);
184 struct drm_exynos_file_private {
186 struct list_head inuse_cmdlist;
187 struct list_head event_list;
188 struct list_head userptr_list;
192 * Exynos drm private structure.
194 * @pending: the crtcs that have pending updates to finish
195 * @lock: protect access to @pending
196 * @wait: wait an atomic commit to finish
198 struct exynos_drm_private {
199 struct drm_fb_helper *fb_helper;
201 struct device *g2d_dev;
202 struct device *dma_dev;
205 /* for atomic commit */
208 wait_queue_head_t wait;
211 static inline struct device *to_dma_dev(struct drm_device *dev)
213 struct exynos_drm_private *priv = dev->dev_private;
215 return priv->dma_dev;
218 #ifdef CONFIG_DRM_EXYNOS_DPI
219 struct drm_encoder *exynos_dpi_probe(struct device *dev);
220 int exynos_dpi_remove(struct drm_encoder *encoder);
221 int exynos_dpi_bind(struct drm_device *dev, struct drm_encoder *encoder);
223 static inline struct drm_encoder *
224 exynos_dpi_probe(struct device *dev) { return NULL; }
225 static inline int exynos_dpi_remove(struct drm_encoder *encoder)
229 static inline int exynos_dpi_bind(struct drm_device *dev,
230 struct drm_encoder *encoder)
236 #ifdef CONFIG_DRM_EXYNOS_FIMC
237 int exynos_drm_check_fimc_device(struct device *dev);
239 static inline int exynos_drm_check_fimc_device(struct device *dev)
245 int exynos_atomic_commit(struct drm_device *dev, struct drm_atomic_state *state,
249 extern struct platform_driver fimd_driver;
250 extern struct platform_driver exynos5433_decon_driver;
251 extern struct platform_driver decon_driver;
252 extern struct platform_driver dp_driver;
253 extern struct platform_driver dsi_driver;
254 extern struct platform_driver mixer_driver;
255 extern struct platform_driver hdmi_driver;
256 extern struct platform_driver vidi_driver;
257 extern struct platform_driver g2d_driver;
258 extern struct platform_driver fimc_driver;
259 extern struct platform_driver rotator_driver;
260 extern struct platform_driver scaler_driver;
261 extern struct platform_driver gsc_driver;
262 extern struct platform_driver mic_driver;