1 // SPDX-License-Identifier: GPL-2.0
3 * System Control and Management Interface (SCMI) Clock Protocol
5 * Copyright (C) 2018-2022 ARM Ltd.
8 #include <linux/module.h>
9 #include <linux/limits.h>
10 #include <linux/sort.h>
12 #include "protocols.h"
15 /* Updated only after ALL the mandatory features for that version are merged */
16 #define SCMI_PROTOCOL_SUPPORTED_VERSION 0x30000
18 enum scmi_clock_protocol_cmd {
19 CLOCK_ATTRIBUTES = 0x3,
20 CLOCK_DESCRIBE_RATES = 0x4,
23 CLOCK_CONFIG_SET = 0x7,
25 CLOCK_RATE_NOTIFY = 0x9,
26 CLOCK_RATE_CHANGE_REQUESTED_NOTIFY = 0xA,
27 CLOCK_CONFIG_GET = 0xB,
28 CLOCK_POSSIBLE_PARENTS_GET = 0xC,
29 CLOCK_PARENT_SET = 0xD,
30 CLOCK_PARENT_GET = 0xE,
31 CLOCK_GET_PERMISSIONS = 0xF,
34 #define CLOCK_STATE_CONTROL_ALLOWED BIT(31)
35 #define CLOCK_PARENT_CONTROL_ALLOWED BIT(30)
36 #define CLOCK_RATE_CONTROL_ALLOWED BIT(29)
45 struct scmi_msg_resp_clock_protocol_attributes {
51 struct scmi_msg_resp_clock_attributes {
53 #define SUPPORTS_RATE_CHANGED_NOTIF(x) ((x) & BIT(31))
54 #define SUPPORTS_RATE_CHANGE_REQUESTED_NOTIF(x) ((x) & BIT(30))
55 #define SUPPORTS_EXTENDED_NAMES(x) ((x) & BIT(29))
56 #define SUPPORTS_PARENT_CLOCK(x) ((x) & BIT(28))
57 #define SUPPORTS_EXTENDED_CONFIG(x) ((x) & BIT(27))
58 #define SUPPORTS_GET_PERMISSIONS(x) ((x) & BIT(1))
59 u8 name[SCMI_SHORT_NAME_MAX_SIZE];
60 __le32 clock_enable_latency;
63 struct scmi_msg_clock_possible_parents {
68 struct scmi_msg_resp_clock_possible_parents {
69 __le32 num_parent_flags;
70 #define NUM_PARENTS_RETURNED(x) ((x) & 0xff)
71 #define NUM_PARENTS_REMAINING(x) ((x) >> 24)
72 __le32 possible_parents[];
75 struct scmi_msg_clock_set_parent {
80 struct scmi_msg_clock_config_set {
85 /* Valid only from SCMI clock v2.1 */
86 struct scmi_msg_clock_config_set_v2 {
89 #define NULL_OEM_TYPE 0
90 #define REGMASK_OEM_TYPE_SET GENMASK(23, 16)
91 #define REGMASK_CLK_STATE GENMASK(1, 0)
92 __le32 oem_config_val;
95 struct scmi_msg_clock_config_get {
98 #define REGMASK_OEM_TYPE_GET GENMASK(7, 0)
101 struct scmi_msg_resp_clock_config_get {
104 #define IS_CLK_ENABLED(x) le32_get_bits((x), BIT(0))
105 __le32 oem_config_val;
108 struct scmi_msg_clock_describe_rates {
113 struct scmi_msg_resp_clock_describe_rates {
114 __le32 num_rates_flags;
115 #define NUM_RETURNED(x) ((x) & 0xfff)
116 #define RATE_DISCRETE(x) !((x) & BIT(12))
117 #define NUM_REMAINING(x) ((x) >> 16)
122 #define RATE_TO_U64(X) \
125 le32_to_cpu((x).value_low) | (u64)le32_to_cpu((x).value_high) << 32; \
129 struct scmi_clock_set_rate {
131 #define CLOCK_SET_ASYNC BIT(0)
132 #define CLOCK_SET_IGNORE_RESP BIT(1)
133 #define CLOCK_SET_ROUND_UP BIT(2)
134 #define CLOCK_SET_ROUND_AUTO BIT(3)
140 struct scmi_msg_resp_set_rate_complete {
146 struct scmi_msg_clock_rate_notify {
148 __le32 notify_enable;
151 struct scmi_clock_rate_notify_payld {
162 bool notify_rate_changed_cmd;
163 bool notify_rate_change_requested_cmd;
164 atomic_t cur_async_req;
165 struct scmi_clock_info *clk;
166 int (*clock_config_set)(const struct scmi_protocol_handle *ph,
167 u32 clk_id, enum clk_state state,
168 enum scmi_clock_oem_config oem_type,
169 u32 oem_val, bool atomic);
170 int (*clock_config_get)(const struct scmi_protocol_handle *ph,
171 u32 clk_id, enum scmi_clock_oem_config oem_type,
172 u32 *attributes, bool *enabled, u32 *oem_val,
176 static enum scmi_clock_protocol_cmd evt_2_cmd[] = {
178 CLOCK_RATE_CHANGE_REQUESTED_NOTIFY,
181 static inline struct scmi_clock_info *
182 scmi_clock_domain_lookup(struct clock_info *ci, u32 clk_id)
184 if (clk_id >= ci->num_clocks)
185 return ERR_PTR(-EINVAL);
187 return ci->clk + clk_id;
191 scmi_clock_protocol_attributes_get(const struct scmi_protocol_handle *ph,
192 struct clock_info *ci)
196 struct scmi_msg_resp_clock_protocol_attributes *attr;
198 ret = ph->xops->xfer_get_init(ph, PROTOCOL_ATTRIBUTES,
199 0, sizeof(*attr), &t);
205 ret = ph->xops->do_xfer(ph, t);
207 ci->num_clocks = le16_to_cpu(attr->num_clocks);
208 ci->max_async_req = attr->max_async_req;
211 ph->xops->xfer_put(ph, t);
214 if (!ph->hops->protocol_msg_check(ph, CLOCK_RATE_NOTIFY, NULL))
215 ci->notify_rate_changed_cmd = true;
217 if (!ph->hops->protocol_msg_check(ph,
218 CLOCK_RATE_CHANGE_REQUESTED_NOTIFY,
220 ci->notify_rate_change_requested_cmd = true;
226 struct scmi_clk_ipriv {
229 struct scmi_clock_info *clk;
232 static void iter_clk_possible_parents_prepare_message(void *message, unsigned int desc_index,
235 struct scmi_msg_clock_possible_parents *msg = message;
236 const struct scmi_clk_ipriv *p = priv;
238 msg->id = cpu_to_le32(p->clk_id);
239 /* Set the number of OPPs to be skipped/already read */
240 msg->skip_parents = cpu_to_le32(desc_index);
243 static int iter_clk_possible_parents_update_state(struct scmi_iterator_state *st,
244 const void *response, void *priv)
246 const struct scmi_msg_resp_clock_possible_parents *r = response;
247 struct scmi_clk_ipriv *p = priv;
248 struct device *dev = ((struct scmi_clk_ipriv *)p)->dev;
251 flags = le32_to_cpu(r->num_parent_flags);
252 st->num_returned = NUM_PARENTS_RETURNED(flags);
253 st->num_remaining = NUM_PARENTS_REMAINING(flags);
256 * num parents is not declared previously anywhere so we
257 * assume it's returned+remaining on first call.
259 if (!st->max_resources) {
260 p->clk->num_parents = st->num_returned + st->num_remaining;
261 p->clk->parents = devm_kcalloc(dev, p->clk->num_parents,
262 sizeof(*p->clk->parents),
264 if (!p->clk->parents) {
265 p->clk->num_parents = 0;
268 st->max_resources = st->num_returned + st->num_remaining;
274 static int iter_clk_possible_parents_process_response(const struct scmi_protocol_handle *ph,
275 const void *response,
276 struct scmi_iterator_state *st,
279 const struct scmi_msg_resp_clock_possible_parents *r = response;
280 struct scmi_clk_ipriv *p = priv;
282 u32 *parent = &p->clk->parents[st->desc_index + st->loop_idx];
284 *parent = le32_to_cpu(r->possible_parents[st->loop_idx]);
289 static int scmi_clock_possible_parents(const struct scmi_protocol_handle *ph, u32 clk_id,
290 struct scmi_clock_info *clk)
292 struct scmi_iterator_ops ops = {
293 .prepare_message = iter_clk_possible_parents_prepare_message,
294 .update_state = iter_clk_possible_parents_update_state,
295 .process_response = iter_clk_possible_parents_process_response,
298 struct scmi_clk_ipriv ppriv = {
306 iter = ph->hops->iter_response_init(ph, &ops, 0,
307 CLOCK_POSSIBLE_PARENTS_GET,
308 sizeof(struct scmi_msg_clock_possible_parents),
311 return PTR_ERR(iter);
313 ret = ph->hops->iter_response_run(iter);
319 scmi_clock_get_permissions(const struct scmi_protocol_handle *ph, u32 clk_id,
320 struct scmi_clock_info *clk)
326 ret = ph->xops->xfer_get_init(ph, CLOCK_GET_PERMISSIONS,
327 sizeof(clk_id), sizeof(perm), &t);
331 put_unaligned_le32(clk_id, t->tx.buf);
333 ret = ph->xops->do_xfer(ph, t);
335 perm = get_unaligned_le32(t->rx.buf);
337 clk->state_ctrl_forbidden = !(perm & CLOCK_STATE_CONTROL_ALLOWED);
338 clk->rate_ctrl_forbidden = !(perm & CLOCK_RATE_CONTROL_ALLOWED);
339 clk->parent_ctrl_forbidden = !(perm & CLOCK_PARENT_CONTROL_ALLOWED);
342 ph->xops->xfer_put(ph, t);
347 static int scmi_clock_attributes_get(const struct scmi_protocol_handle *ph,
348 u32 clk_id, struct clock_info *cinfo,
354 struct scmi_msg_resp_clock_attributes *attr;
355 struct scmi_clock_info *clk = cinfo->clk + clk_id;
357 ret = ph->xops->xfer_get_init(ph, CLOCK_ATTRIBUTES,
358 sizeof(clk_id), sizeof(*attr), &t);
362 put_unaligned_le32(clk_id, t->tx.buf);
365 ret = ph->xops->do_xfer(ph, t);
368 attributes = le32_to_cpu(attr->attributes);
369 strscpy(clk->name, attr->name, SCMI_SHORT_NAME_MAX_SIZE);
370 /* clock_enable_latency field is present only since SCMI v3.1 */
371 if (PROTOCOL_REV_MAJOR(version) >= 0x2)
372 latency = le32_to_cpu(attr->clock_enable_latency);
373 clk->enable_latency = latency ? : U32_MAX;
376 ph->xops->xfer_put(ph, t);
379 * If supported overwrite short name with the extended one;
380 * on error just carry on and use already provided short name.
382 if (!ret && PROTOCOL_REV_MAJOR(version) >= 0x2) {
383 if (SUPPORTS_EXTENDED_NAMES(attributes))
384 ph->hops->extended_name_get(ph, CLOCK_NAME_GET, clk_id,
388 if (cinfo->notify_rate_changed_cmd &&
389 SUPPORTS_RATE_CHANGED_NOTIF(attributes))
390 clk->rate_changed_notifications = true;
391 if (cinfo->notify_rate_change_requested_cmd &&
392 SUPPORTS_RATE_CHANGE_REQUESTED_NOTIF(attributes))
393 clk->rate_change_requested_notifications = true;
394 if (PROTOCOL_REV_MAJOR(version) >= 0x3) {
395 if (SUPPORTS_PARENT_CLOCK(attributes))
396 scmi_clock_possible_parents(ph, clk_id, clk);
397 if (SUPPORTS_GET_PERMISSIONS(attributes))
398 scmi_clock_get_permissions(ph, clk_id, clk);
399 if (SUPPORTS_EXTENDED_CONFIG(attributes))
400 clk->extended_config = true;
407 static int rate_cmp_func(const void *_r1, const void *_r2)
409 const u64 *r1 = _r1, *r2 = _r2;
419 static void iter_clk_describe_prepare_message(void *message,
420 const unsigned int desc_index,
423 struct scmi_msg_clock_describe_rates *msg = message;
424 const struct scmi_clk_ipriv *p = priv;
426 msg->id = cpu_to_le32(p->clk_id);
427 /* Set the number of rates to be skipped/already read */
428 msg->rate_index = cpu_to_le32(desc_index);
432 iter_clk_describe_update_state(struct scmi_iterator_state *st,
433 const void *response, void *priv)
436 struct scmi_clk_ipriv *p = priv;
437 const struct scmi_msg_resp_clock_describe_rates *r = response;
439 flags = le32_to_cpu(r->num_rates_flags);
440 st->num_remaining = NUM_REMAINING(flags);
441 st->num_returned = NUM_RETURNED(flags);
442 p->clk->rate_discrete = RATE_DISCRETE(flags);
444 /* Warn about out of spec replies ... */
445 if (!p->clk->rate_discrete &&
446 (st->num_returned != 3 || st->num_remaining != 0)) {
448 "Out-of-spec CLOCK_DESCRIBE_RATES reply for %s - returned:%d remaining:%d rx_len:%zd\n",
449 p->clk->name, st->num_returned, st->num_remaining,
453 * A known quirk: a triplet is returned but num_returned != 3
454 * Check for a safe payload size and fix.
456 if (st->num_returned != 3 && st->num_remaining == 0 &&
457 st->rx_len == sizeof(*r) + sizeof(__le32) * 2 * 3) {
458 st->num_returned = 3;
459 st->num_remaining = 0;
462 "Cannot fix out-of-spec reply !\n");
471 iter_clk_describe_process_response(const struct scmi_protocol_handle *ph,
472 const void *response,
473 struct scmi_iterator_state *st, void *priv)
476 struct scmi_clk_ipriv *p = priv;
477 const struct scmi_msg_resp_clock_describe_rates *r = response;
479 if (!p->clk->rate_discrete) {
480 switch (st->desc_index + st->loop_idx) {
482 p->clk->range.min_rate = RATE_TO_U64(r->rate[0]);
485 p->clk->range.max_rate = RATE_TO_U64(r->rate[1]);
488 p->clk->range.step_size = RATE_TO_U64(r->rate[2]);
495 u64 *rate = &p->clk->list.rates[st->desc_index + st->loop_idx];
497 *rate = RATE_TO_U64(r->rate[st->loop_idx]);
498 p->clk->list.num_rates++;
505 scmi_clock_describe_rates_get(const struct scmi_protocol_handle *ph, u32 clk_id,
506 struct scmi_clock_info *clk)
510 struct scmi_iterator_ops ops = {
511 .prepare_message = iter_clk_describe_prepare_message,
512 .update_state = iter_clk_describe_update_state,
513 .process_response = iter_clk_describe_process_response,
515 struct scmi_clk_ipriv cpriv = {
521 iter = ph->hops->iter_response_init(ph, &ops, SCMI_MAX_NUM_RATES,
522 CLOCK_DESCRIBE_RATES,
523 sizeof(struct scmi_msg_clock_describe_rates),
526 return PTR_ERR(iter);
528 ret = ph->hops->iter_response_run(iter);
532 if (!clk->rate_discrete) {
533 dev_dbg(ph->dev, "Min %llu Max %llu Step %llu Hz\n",
534 clk->range.min_rate, clk->range.max_rate,
535 clk->range.step_size);
536 } else if (clk->list.num_rates) {
537 sort(clk->list.rates, clk->list.num_rates,
538 sizeof(clk->list.rates[0]), rate_cmp_func, NULL);
545 scmi_clock_rate_get(const struct scmi_protocol_handle *ph,
546 u32 clk_id, u64 *value)
551 ret = ph->xops->xfer_get_init(ph, CLOCK_RATE_GET,
552 sizeof(__le32), sizeof(u64), &t);
556 put_unaligned_le32(clk_id, t->tx.buf);
558 ret = ph->xops->do_xfer(ph, t);
560 *value = get_unaligned_le64(t->rx.buf);
562 ph->xops->xfer_put(ph, t);
566 static int scmi_clock_rate_set(const struct scmi_protocol_handle *ph,
567 u32 clk_id, u64 rate)
572 struct scmi_clock_set_rate *cfg;
573 struct clock_info *ci = ph->get_priv(ph);
574 struct scmi_clock_info *clk;
576 clk = scmi_clock_domain_lookup(ci, clk_id);
580 if (clk->rate_ctrl_forbidden)
583 ret = ph->xops->xfer_get_init(ph, CLOCK_RATE_SET, sizeof(*cfg), 0, &t);
587 if (ci->max_async_req &&
588 atomic_inc_return(&ci->cur_async_req) < ci->max_async_req)
589 flags |= CLOCK_SET_ASYNC;
592 cfg->flags = cpu_to_le32(flags);
593 cfg->id = cpu_to_le32(clk_id);
594 cfg->value_low = cpu_to_le32(rate & 0xffffffff);
595 cfg->value_high = cpu_to_le32(rate >> 32);
597 if (flags & CLOCK_SET_ASYNC) {
598 ret = ph->xops->do_xfer_with_response(ph, t);
600 struct scmi_msg_resp_set_rate_complete *resp;
603 if (le32_to_cpu(resp->id) == clk_id)
605 "Clk ID %d set async to %llu\n", clk_id,
606 get_unaligned_le64(&resp->rate_low));
611 ret = ph->xops->do_xfer(ph, t);
614 if (ci->max_async_req)
615 atomic_dec(&ci->cur_async_req);
617 ph->xops->xfer_put(ph, t);
622 scmi_clock_config_set(const struct scmi_protocol_handle *ph, u32 clk_id,
623 enum clk_state state,
624 enum scmi_clock_oem_config __unused0, u32 __unused1,
629 struct scmi_msg_clock_config_set *cfg;
631 if (state >= CLK_STATE_RESERVED)
634 ret = ph->xops->xfer_get_init(ph, CLOCK_CONFIG_SET,
635 sizeof(*cfg), 0, &t);
639 t->hdr.poll_completion = atomic;
642 cfg->id = cpu_to_le32(clk_id);
643 cfg->attributes = cpu_to_le32(state);
645 ret = ph->xops->do_xfer(ph, t);
647 ph->xops->xfer_put(ph, t);
652 scmi_clock_set_parent(const struct scmi_protocol_handle *ph, u32 clk_id,
657 struct scmi_msg_clock_set_parent *cfg;
658 struct clock_info *ci = ph->get_priv(ph);
659 struct scmi_clock_info *clk;
661 clk = scmi_clock_domain_lookup(ci, clk_id);
665 if (parent_id >= clk->num_parents)
668 if (clk->parent_ctrl_forbidden)
671 ret = ph->xops->xfer_get_init(ph, CLOCK_PARENT_SET,
672 sizeof(*cfg), 0, &t);
676 t->hdr.poll_completion = false;
679 cfg->id = cpu_to_le32(clk_id);
680 cfg->parent_id = cpu_to_le32(clk->parents[parent_id]);
682 ret = ph->xops->do_xfer(ph, t);
684 ph->xops->xfer_put(ph, t);
690 scmi_clock_get_parent(const struct scmi_protocol_handle *ph, u32 clk_id,
696 ret = ph->xops->xfer_get_init(ph, CLOCK_PARENT_GET,
697 sizeof(__le32), sizeof(u32), &t);
701 put_unaligned_le32(clk_id, t->tx.buf);
703 ret = ph->xops->do_xfer(ph, t);
705 *parent_id = get_unaligned_le32(t->rx.buf);
707 ph->xops->xfer_put(ph, t);
711 /* For SCMI clock v3.0 and onwards */
713 scmi_clock_config_set_v2(const struct scmi_protocol_handle *ph, u32 clk_id,
714 enum clk_state state,
715 enum scmi_clock_oem_config oem_type, u32 oem_val,
721 struct scmi_msg_clock_config_set_v2 *cfg;
723 if (state == CLK_STATE_RESERVED ||
724 (!oem_type && state == CLK_STATE_UNCHANGED))
727 ret = ph->xops->xfer_get_init(ph, CLOCK_CONFIG_SET,
728 sizeof(*cfg), 0, &t);
732 t->hdr.poll_completion = atomic;
734 attrs = FIELD_PREP(REGMASK_OEM_TYPE_SET, oem_type) |
735 FIELD_PREP(REGMASK_CLK_STATE, state);
738 cfg->id = cpu_to_le32(clk_id);
739 cfg->attributes = cpu_to_le32(attrs);
740 /* Clear in any case */
741 cfg->oem_config_val = cpu_to_le32(0);
743 cfg->oem_config_val = cpu_to_le32(oem_val);
745 ret = ph->xops->do_xfer(ph, t);
747 ph->xops->xfer_put(ph, t);
751 static int scmi_clock_enable(const struct scmi_protocol_handle *ph, u32 clk_id,
754 struct clock_info *ci = ph->get_priv(ph);
755 struct scmi_clock_info *clk;
757 clk = scmi_clock_domain_lookup(ci, clk_id);
761 if (clk->state_ctrl_forbidden)
764 return ci->clock_config_set(ph, clk_id, CLK_STATE_ENABLE,
765 NULL_OEM_TYPE, 0, atomic);
768 static int scmi_clock_disable(const struct scmi_protocol_handle *ph, u32 clk_id,
771 struct clock_info *ci = ph->get_priv(ph);
772 struct scmi_clock_info *clk;
774 clk = scmi_clock_domain_lookup(ci, clk_id);
778 if (clk->state_ctrl_forbidden)
781 return ci->clock_config_set(ph, clk_id, CLK_STATE_DISABLE,
782 NULL_OEM_TYPE, 0, atomic);
785 /* For SCMI clock v3.0 and onwards */
787 scmi_clock_config_get_v2(const struct scmi_protocol_handle *ph, u32 clk_id,
788 enum scmi_clock_oem_config oem_type, u32 *attributes,
789 bool *enabled, u32 *oem_val, bool atomic)
794 struct scmi_msg_clock_config_get *cfg;
796 ret = ph->xops->xfer_get_init(ph, CLOCK_CONFIG_GET,
797 sizeof(*cfg), 0, &t);
801 t->hdr.poll_completion = atomic;
803 flags = FIELD_PREP(REGMASK_OEM_TYPE_GET, oem_type);
806 cfg->id = cpu_to_le32(clk_id);
807 cfg->flags = cpu_to_le32(flags);
809 ret = ph->xops->do_xfer(ph, t);
811 struct scmi_msg_resp_clock_config_get *resp = t->rx.buf;
814 *attributes = le32_to_cpu(resp->attributes);
817 *enabled = IS_CLK_ENABLED(resp->config);
819 if (oem_val && oem_type)
820 *oem_val = le32_to_cpu(resp->oem_config_val);
823 ph->xops->xfer_put(ph, t);
829 scmi_clock_config_get(const struct scmi_protocol_handle *ph, u32 clk_id,
830 enum scmi_clock_oem_config oem_type, u32 *attributes,
831 bool *enabled, u32 *oem_val, bool atomic)
835 struct scmi_msg_resp_clock_attributes *resp;
840 ret = ph->xops->xfer_get_init(ph, CLOCK_ATTRIBUTES,
841 sizeof(clk_id), sizeof(*resp), &t);
845 t->hdr.poll_completion = atomic;
846 put_unaligned_le32(clk_id, t->tx.buf);
849 ret = ph->xops->do_xfer(ph, t);
851 *enabled = IS_CLK_ENABLED(resp->attributes);
853 ph->xops->xfer_put(ph, t);
858 static int scmi_clock_state_get(const struct scmi_protocol_handle *ph,
859 u32 clk_id, bool *enabled, bool atomic)
861 struct clock_info *ci = ph->get_priv(ph);
863 return ci->clock_config_get(ph, clk_id, NULL_OEM_TYPE, NULL,
864 enabled, NULL, atomic);
867 static int scmi_clock_config_oem_set(const struct scmi_protocol_handle *ph,
869 enum scmi_clock_oem_config oem_type,
870 u32 oem_val, bool atomic)
872 struct clock_info *ci = ph->get_priv(ph);
873 struct scmi_clock_info *clk;
875 clk = scmi_clock_domain_lookup(ci, clk_id);
879 if (!clk->extended_config)
882 return ci->clock_config_set(ph, clk_id, CLK_STATE_UNCHANGED,
883 oem_type, oem_val, atomic);
886 static int scmi_clock_config_oem_get(const struct scmi_protocol_handle *ph,
888 enum scmi_clock_oem_config oem_type,
889 u32 *oem_val, u32 *attributes, bool atomic)
891 struct clock_info *ci = ph->get_priv(ph);
892 struct scmi_clock_info *clk;
894 clk = scmi_clock_domain_lookup(ci, clk_id);
898 if (!clk->extended_config)
901 return ci->clock_config_get(ph, clk_id, oem_type, attributes,
902 NULL, oem_val, atomic);
905 static int scmi_clock_count_get(const struct scmi_protocol_handle *ph)
907 struct clock_info *ci = ph->get_priv(ph);
909 return ci->num_clocks;
912 static const struct scmi_clock_info *
913 scmi_clock_info_get(const struct scmi_protocol_handle *ph, u32 clk_id)
915 struct scmi_clock_info *clk;
916 struct clock_info *ci = ph->get_priv(ph);
918 clk = scmi_clock_domain_lookup(ci, clk_id);
928 static const struct scmi_clk_proto_ops clk_proto_ops = {
929 .count_get = scmi_clock_count_get,
930 .info_get = scmi_clock_info_get,
931 .rate_get = scmi_clock_rate_get,
932 .rate_set = scmi_clock_rate_set,
933 .enable = scmi_clock_enable,
934 .disable = scmi_clock_disable,
935 .state_get = scmi_clock_state_get,
936 .config_oem_get = scmi_clock_config_oem_get,
937 .config_oem_set = scmi_clock_config_oem_set,
938 .parent_set = scmi_clock_set_parent,
939 .parent_get = scmi_clock_get_parent,
942 static bool scmi_clk_notify_supported(const struct scmi_protocol_handle *ph,
943 u8 evt_id, u32 src_id)
946 struct scmi_clock_info *clk;
947 struct clock_info *ci = ph->get_priv(ph);
949 if (evt_id >= ARRAY_SIZE(evt_2_cmd))
952 clk = scmi_clock_domain_lookup(ci, src_id);
956 if (evt_id == SCMI_EVENT_CLOCK_RATE_CHANGED)
957 supported = clk->rate_changed_notifications;
959 supported = clk->rate_change_requested_notifications;
964 static int scmi_clk_rate_notify(const struct scmi_protocol_handle *ph,
965 u32 clk_id, int message_id, bool enable)
969 struct scmi_msg_clock_rate_notify *notify;
971 ret = ph->xops->xfer_get_init(ph, message_id, sizeof(*notify), 0, &t);
976 notify->clk_id = cpu_to_le32(clk_id);
977 notify->notify_enable = enable ? cpu_to_le32(BIT(0)) : 0;
979 ret = ph->xops->do_xfer(ph, t);
981 ph->xops->xfer_put(ph, t);
985 static int scmi_clk_set_notify_enabled(const struct scmi_protocol_handle *ph,
986 u8 evt_id, u32 src_id, bool enable)
990 if (evt_id >= ARRAY_SIZE(evt_2_cmd))
993 cmd_id = evt_2_cmd[evt_id];
994 ret = scmi_clk_rate_notify(ph, src_id, cmd_id, enable);
996 pr_debug("FAIL_ENABLED - evt[%X] dom[%d] - ret:%d\n",
997 evt_id, src_id, ret);
1002 static void *scmi_clk_fill_custom_report(const struct scmi_protocol_handle *ph,
1003 u8 evt_id, ktime_t timestamp,
1004 const void *payld, size_t payld_sz,
1005 void *report, u32 *src_id)
1007 const struct scmi_clock_rate_notify_payld *p = payld;
1008 struct scmi_clock_rate_notif_report *r = report;
1010 if (sizeof(*p) != payld_sz ||
1011 (evt_id != SCMI_EVENT_CLOCK_RATE_CHANGED &&
1012 evt_id != SCMI_EVENT_CLOCK_RATE_CHANGE_REQUESTED))
1015 r->timestamp = timestamp;
1016 r->agent_id = le32_to_cpu(p->agent_id);
1017 r->clock_id = le32_to_cpu(p->clock_id);
1018 r->rate = get_unaligned_le64(&p->rate_low);
1019 *src_id = r->clock_id;
1024 static int scmi_clk_get_num_sources(const struct scmi_protocol_handle *ph)
1026 struct clock_info *ci = ph->get_priv(ph);
1031 return ci->num_clocks;
1034 static const struct scmi_event clk_events[] = {
1036 .id = SCMI_EVENT_CLOCK_RATE_CHANGED,
1037 .max_payld_sz = sizeof(struct scmi_clock_rate_notify_payld),
1038 .max_report_sz = sizeof(struct scmi_clock_rate_notif_report),
1041 .id = SCMI_EVENT_CLOCK_RATE_CHANGE_REQUESTED,
1042 .max_payld_sz = sizeof(struct scmi_clock_rate_notify_payld),
1043 .max_report_sz = sizeof(struct scmi_clock_rate_notif_report),
1047 static const struct scmi_event_ops clk_event_ops = {
1048 .is_notify_supported = scmi_clk_notify_supported,
1049 .get_num_sources = scmi_clk_get_num_sources,
1050 .set_notify_enabled = scmi_clk_set_notify_enabled,
1051 .fill_custom_report = scmi_clk_fill_custom_report,
1054 static const struct scmi_protocol_events clk_protocol_events = {
1055 .queue_sz = SCMI_PROTO_QUEUE_SZ,
1056 .ops = &clk_event_ops,
1058 .num_events = ARRAY_SIZE(clk_events),
1061 static int scmi_clock_protocol_init(const struct scmi_protocol_handle *ph)
1065 struct clock_info *cinfo;
1067 ret = ph->xops->version_get(ph, &version);
1071 dev_dbg(ph->dev, "Clock Version %d.%d\n",
1072 PROTOCOL_REV_MAJOR(version), PROTOCOL_REV_MINOR(version));
1074 cinfo = devm_kzalloc(ph->dev, sizeof(*cinfo), GFP_KERNEL);
1078 ret = scmi_clock_protocol_attributes_get(ph, cinfo);
1082 cinfo->clk = devm_kcalloc(ph->dev, cinfo->num_clocks,
1083 sizeof(*cinfo->clk), GFP_KERNEL);
1087 for (clkid = 0; clkid < cinfo->num_clocks; clkid++) {
1088 struct scmi_clock_info *clk = cinfo->clk + clkid;
1090 ret = scmi_clock_attributes_get(ph, clkid, cinfo, version);
1092 scmi_clock_describe_rates_get(ph, clkid, clk);
1095 if (PROTOCOL_REV_MAJOR(version) >= 0x3) {
1096 cinfo->clock_config_set = scmi_clock_config_set_v2;
1097 cinfo->clock_config_get = scmi_clock_config_get_v2;
1099 cinfo->clock_config_set = scmi_clock_config_set;
1100 cinfo->clock_config_get = scmi_clock_config_get;
1103 cinfo->version = version;
1104 return ph->set_priv(ph, cinfo, version);
1107 static const struct scmi_protocol scmi_clock = {
1108 .id = SCMI_PROTOCOL_CLOCK,
1109 .owner = THIS_MODULE,
1110 .instance_init = &scmi_clock_protocol_init,
1111 .ops = &clk_proto_ops,
1112 .events = &clk_protocol_events,
1113 .supported_version = SCMI_PROTOCOL_SUPPORTED_VERSION,
1116 DEFINE_SCMI_PROTOCOL_REGISTER_UNREGISTER(clock, scmi_clock)