2 * arch/xtensa/kernel/entry.S
4 * Low-level exception handling
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
10 * Copyright (C) 2004-2007 by Tensilica Inc.
12 * Chris Zankel <chris@zankel.net>
16 #include <linux/linkage.h>
17 #include <asm/asm-offsets.h>
18 #include <asm/processor.h>
19 #include <asm/thread_info.h>
20 #include <asm/uaccess.h>
21 #include <asm/unistd.h>
22 #include <asm/ptrace.h>
23 #include <asm/current.h>
24 #include <asm/pgtable.h>
26 #include <asm/signal.h>
27 #include <asm/tlbflush.h>
29 /* Unimplemented features. */
31 #undef KERNEL_STACK_OVERFLOW_CHECK
32 #undef PREEMPTIBLE_KERNEL
33 #undef ALLOCA_EXCEPTION_IN_IRAM
41 * Macro to find first bit set in WINDOWBASE from the left + 1
48 .macro ffs_ws bit mask
51 nsau \bit, \mask # 32-WSBITS ... 31 (32 iff 0)
52 addi \bit, \bit, WSBITS - 32 + 1 # uppest bit set -> return 1
56 _bltui \mask, 0x10000, 99f
58 extui \mask, \mask, 16, 16
61 99: _bltui \mask, 0x100, 99f
65 99: _bltui \mask, 0x10, 99f
68 99: _bltui \mask, 0x4, 99f
71 99: _bltui \mask, 0x2, 99f
78 /* ----------------- DEFAULT FIRST LEVEL EXCEPTION HANDLERS ----------------- */
81 * First-level exception handler for user exceptions.
82 * Save some special registers, extra states and all registers in the AR
83 * register file that were in use in the user task, and jump to the common
85 * We save SAR (used to calculate WMASK), and WB and WS (we don't have to
86 * save them for kernel exceptions).
88 * Entry condition for user_exception:
90 * a0: trashed, original value saved on stack (PT_AREG0)
92 * a2: new stack pointer, original value in depc
94 * depc: a2, original value saved on stack (PT_DEPC)
97 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
98 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
100 * Entry condition for _user_exception:
102 * a0-a3 and depc have been saved to PT_AREG0...PT_AREG3 and PT_DEPC
103 * excsave has been restored, and
104 * stack pointer (a1) has been set.
106 * Note: _user_exception might be at an odd adress. Don't use call0..call12
109 ENTRY(user_exception)
111 /* Save a2, a3, and depc, restore excsave_1 and set SP. */
115 s32i a1, a2, PT_AREG1
116 s32i a0, a2, PT_AREG2
117 s32i a3, a2, PT_AREG3
120 .globl _user_exception
123 /* Save SAR and turn off single stepping */
129 s32i a2, a1, PT_ICOUNTLEVEL
131 /* Rotate ws so that the current windowbase is at bit0. */
132 /* Assume ws = xxwww1yyyy. Rotate ws right, so that a2 = yyyyxxwww1 */
137 s32i a2, a1, PT_WINDOWBASE
138 s32i a3, a1, PT_WINDOWSTART
139 slli a2, a3, 32-WSBITS
141 srli a2, a2, 32-WSBITS
142 s32i a2, a1, PT_WMASK # needed for restoring registers
144 /* Save only live registers. */
147 s32i a4, a1, PT_AREG4
148 s32i a5, a1, PT_AREG5
149 s32i a6, a1, PT_AREG6
150 s32i a7, a1, PT_AREG7
152 s32i a8, a1, PT_AREG8
153 s32i a9, a1, PT_AREG9
154 s32i a10, a1, PT_AREG10
155 s32i a11, a1, PT_AREG11
157 s32i a12, a1, PT_AREG12
158 s32i a13, a1, PT_AREG13
159 s32i a14, a1, PT_AREG14
160 s32i a15, a1, PT_AREG15
161 _bnei a2, 1, 1f # only one valid frame?
163 /* Only one valid frame, skip saving regs. */
167 /* Save the remaining registers.
168 * We have to save all registers up to the first '1' from
169 * the right, except the current frame (bit 0).
170 * Assume a2 is: 001001000110001
171 * All register frames starting from the top field to the marked '1'
175 1: addi a3, a2, -1 # eliminate '1' in bit 0: yyyyxxww0
176 neg a3, a3 # yyyyxxww0 -> YYYYXXWW1+1
177 and a3, a3, a2 # max. only one bit is set
179 /* Find number of frames to save */
181 ffs_ws a0, a3 # number of frames to the '1' from left
183 /* Store information into WMASK:
184 * bits 0..3: xxx1 masked lower 4 bits of the rotated windowstart,
185 * bits 4...: number of valid 4-register frames
188 slli a3, a0, 4 # number of frames to save in bits 8..4
189 extui a2, a2, 0, 4 # mask for the first 16 registers
191 s32i a2, a1, PT_WMASK # needed when we restore the reg-file
193 /* Save 4 registers at a time */
196 s32i a0, a5, PT_AREG_END - 16
197 s32i a1, a5, PT_AREG_END - 12
198 s32i a2, a5, PT_AREG_END - 8
199 s32i a3, a5, PT_AREG_END - 4
204 /* WINDOWBASE still in SAR! */
206 rsr a2, SAR # original WINDOWBASE
210 wsr a3, WINDOWSTART # set corresponding WINDOWSTART bit
211 wsr a2, WINDOWBASE # and WINDOWSTART
214 /* We are back to the original stack pointer (a1) */
217 #if XCHAL_EXTRA_SA_SIZE
219 /* For user exceptions, save the extra state into the user's TCB.
220 * Note: We must assume that xchal_extra_store_funcbody destroys a2..a15
224 addi a2, a2, THREAD_CP_SAVE
225 xchal_extra_store_funcbody
228 /* Now, jump to the common exception handler. */
234 * First-level exit handler for kernel exceptions
235 * Save special registers and the live window frame.
236 * Note: Even though we changes the stack pointer, we don't have to do a
237 * MOVSP here, as we do that when we return from the exception.
238 * (See comment in the kernel exception exit code)
240 * Entry condition for kernel_exception:
242 * a0: trashed, original value saved on stack (PT_AREG0)
244 * a2: new stack pointer, original in DEPC
246 * depc: a2, original value saved on stack (PT_DEPC)
249 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
250 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
252 * Entry condition for _kernel_exception:
254 * a0-a3 and depc have been saved to PT_AREG0...PT_AREG3 and PT_DEPC
255 * excsave has been restored, and
256 * stack pointer (a1) has been set.
258 * Note: _kernel_exception might be at an odd adress. Don't use call0..call12
261 ENTRY(kernel_exception)
263 /* Save a0, a2, a3, DEPC and set SP. */
265 xsr a3, EXCSAVE_1 # restore a3, excsave_1
266 rsr a0, DEPC # get a2
267 s32i a1, a2, PT_AREG1
268 s32i a0, a2, PT_AREG2
269 s32i a3, a2, PT_AREG3
272 .globl _kernel_exception
275 /* Save SAR and turn off single stepping */
281 s32i a2, a1, PT_ICOUNTLEVEL
283 /* Rotate ws so that the current windowbase is at bit0. */
284 /* Assume ws = xxwww1yyyy. Rotate ws right, so that a2 = yyyyxxwww1 */
286 rsr a2, WINDOWBASE # don't need to save these, we only
287 rsr a3, WINDOWSTART # need shifted windowstart: windowmask
289 slli a2, a3, 32-WSBITS
291 srli a2, a2, 32-WSBITS
292 s32i a2, a1, PT_WMASK # needed for kernel_exception_exit
294 /* Save only the live window-frame */
297 s32i a4, a1, PT_AREG4
298 s32i a5, a1, PT_AREG5
299 s32i a6, a1, PT_AREG6
300 s32i a7, a1, PT_AREG7
302 s32i a8, a1, PT_AREG8
303 s32i a9, a1, PT_AREG9
304 s32i a10, a1, PT_AREG10
305 s32i a11, a1, PT_AREG11
307 s32i a12, a1, PT_AREG12
308 s32i a13, a1, PT_AREG13
309 s32i a14, a1, PT_AREG14
310 s32i a15, a1, PT_AREG15
314 #ifdef KERNEL_STACK_OVERFLOW_CHECK
316 /* Stack overflow check, for debugging */
317 extui a2, a1, TASK_SIZE_BITS,XX
319 _bge a2, a3, out_of_stack_panic
324 * This is the common exception handler.
325 * We get here from the user exception handler or simply by falling through
326 * from the kernel exception handler.
327 * Save the remaining special registers, switch to kernel mode, and jump
328 * to the second-level exception handler.
334 /* Save some registers, disable loops and clear the syscall flag. */
338 s32i a2, a1, PT_DEBUGCAUSE
343 s32i a2, a1, PT_SYSCALL
345 s32i a3, a1, PT_EXCVADDR
347 s32i a2, a1, PT_LCOUNT
349 /* It is now save to restore the EXC_TABLE_FIXUP variable. */
354 s32i a0, a1, PT_EXCCAUSE
355 s32i a3, a2, EXC_TABLE_FIXUP
357 /* All unrecoverable states are saved on stack, now, and a1 is valid,
358 * so we can allow exceptions and interrupts (*) again.
359 * Set PS(EXCM = 0, UM = 0, RING = 0, OWB = 0, WOE = 1, INTLEVEL = X)
361 * (*) We only allow interrupts if PS.INTLEVEL was not set to 1 before
362 * (interrupts disabled) and if this exception is not an interrupt.
368 extui a3, a3, 0, 1 # a3 = PS.INTLEVEL[0]
369 moveqz a3, a2, a0 # a3 = 1 iff interrupt exception
370 movi a2, 1 << PS_WOE_BIT
375 s32i a3, a1, PT_PS # save ps
377 /* Save LBEG, LEND */
384 /* Go to second-level dispatcher. Set up parameters to pass to the
385 * exception handler and call the exception handler.
389 mov a6, a1 # pass stack frame
390 mov a7, a0 # pass EXCCAUSE
392 l32i a4, a4, EXC_TABLE_DEFAULT # load handler
394 /* Call the second-level handler */
398 /* Jump here for exception exit */
400 common_exception_return:
402 /* Jump if we are returning from kernel exceptions. */
404 1: l32i a3, a1, PT_PS
405 _bbsi.l a3, PS_UM_BIT, 2f
406 j kernel_exception_exit
408 /* Specific to a user exception exit:
409 * We need to check some flags for signal handling and rescheduling,
410 * and have to restore WB and WS, extra states, and all registers
411 * in the register file that were in use in the user task.
414 2: wsr a3, PS /* disable interrupts */
416 /* Check for signals (keep interrupts disabled while we read TI_FLAGS)
417 * Note: PS.INTLEVEL = 0, PS.EXCM = 1
420 GET_THREAD_INFO(a2,a1)
421 l32i a4, a2, TI_FLAGS
423 /* Enable interrupts again.
424 * Note: When we get here, we certainly have handled any interrupts.
425 * (Hint: There is only one user exception frame on stack)
428 movi a3, 1 << PS_WOE_BIT
430 _bbsi.l a4, TIF_NEED_RESCHED, 3f
431 _bbci.l a4, TIF_SIGPENDING, 4f
434 bgeui a4, VALID_DOUBLE_EXCEPTION_ADDRESS, 4f
435 /* Reenable interrupts and call do_signal() */
438 movi a4, do_signal # int do_signal(struct pt_regs*, sigset_t*)
444 3: /* Reenable interrupts and reschedule */
447 movi a4, schedule # void schedule (void)
451 /* Restore the state of the task and return from the exception. */
453 4: /* a2 holds GET_CURRENT(a2,a1) */
455 #if XCHAL_EXTRA_SA_SIZE
457 /* For user exceptions, restore the extra state from the user's TCB. */
459 /* Note: a2 still contains GET_CURRENT(a2,a1) */
460 addi a2, a2, THREAD_CP_SAVE
461 xchal_extra_load_funcbody
463 /* We must assume that xchal_extra_store_funcbody destroys
464 * registers a2..a15. FIXME, this list can eventually be
465 * reduced once real register requirements of the macro are
468 #endif /* XCHAL_EXTRA_SA_SIZE */
471 /* Switch to the user thread WINDOWBASE. Save SP temporarily in DEPC */
473 l32i a2, a1, PT_WINDOWBASE
474 l32i a3, a1, PT_WINDOWSTART
475 wsr a1, DEPC # use DEPC as temp storage
476 wsr a3, WINDOWSTART # restore WINDOWSTART
477 ssr a2 # preserve user's WB in the SAR
478 wsr a2, WINDOWBASE # switch to user's saved WB
480 rsr a1, DEPC # restore stack pointer
481 l32i a2, a1, PT_WMASK # register frames saved (in bits 4...9)
482 rotw -1 # we restore a4..a7
483 _bltui a6, 16, 1f # only have to restore current window?
485 /* The working registers are a0 and a3. We are restoring to
486 * a4..a7. Be careful not to destroy what we have just restored.
487 * Note: wmask has the format YYYYM:
488 * Y: number of registers saved in groups of 4
489 * M: 4 bit mask of first 16 registers
495 2: rotw -1 # a0..a3 become a4..a7
496 addi a3, a7, -4*4 # next iteration
497 addi a2, a6, -16 # decrementing Y in WMASK
498 l32i a4, a3, PT_AREG_END + 0
499 l32i a5, a3, PT_AREG_END + 4
500 l32i a6, a3, PT_AREG_END + 8
501 l32i a7, a3, PT_AREG_END + 12
504 /* Clear unrestored registers (don't leak anything to user-land */
506 1: rsr a0, WINDOWBASE
510 extui a3, a3, 0, WBBITS
520 /* We are back were we were when we started.
521 * Note: a2 still contains WMASK (if we've returned to the original
522 * frame where we had loaded a2), or at least the lower 4 bits
523 * (if we have restored WSBITS-1 frames).
526 2: j common_exception_exit
528 /* This is the kernel exception exit.
529 * We avoided to do a MOVSP when we entered the exception, but we
530 * have to do it here.
533 kernel_exception_exit:
535 /* Disable interrupts (a3 holds PT_PS) */
539 #ifdef PREEMPTIBLE_KERNEL
541 #ifdef CONFIG_PREEMPT
544 * Note: We've just returned from a call4, so we have
545 * at least 4 addt'l regs.
548 /* Check current_thread_info->preempt_count */
551 l32i a3, a2, TI_PREEMPT
554 l32i a2, a2, TI_FLAGS
562 /* Check if we have to do a movsp.
564 * We only have to do a movsp if the previous window-frame has
565 * been spilled to the *temporary* exception stack instead of the
566 * task's stack. This is the case if the corresponding bit in
567 * WINDOWSTART for the previous window-frame was set before
568 * (not spilled) but is zero now (spilled).
569 * If this bit is zero, all other bits except the one for the
570 * current window frame are also zero. So, we can use a simple test:
571 * 'and' WINDOWSTART and WINDOWSTART-1:
573 * (XXXXXX1[0]* - 1) AND XXXXXX1[0]* = XXXXXX0[0]*
575 * The result is zero only if one bit was set.
577 * (Note: We might have gone through several task switches before
578 * we come back to the current task, so WINDOWBASE might be
579 * different from the time the exception occurred.)
582 /* Test WINDOWSTART before and after the exception.
583 * We actually have WMASK, so we only have to test if it is 1 or not.
586 l32i a2, a1, PT_WMASK
587 _beqi a2, 1, common_exception_exit # Spilled before exception,jump
589 /* Test WINDOWSTART now. If spilled, do the movsp */
594 _bnez a3, common_exception_exit
596 /* Do a movsp (we returned from a call4, so we have at least a0..a7) */
601 s32i a3, a1, PT_SIZE+0
602 s32i a4, a1, PT_SIZE+4
605 s32i a3, a1, PT_SIZE+8
606 s32i a4, a1, PT_SIZE+12
608 /* Common exception exit.
609 * We restore the special register and the current window frame, and
610 * return from the exception.
612 * Note: We expect a2 to hold PT_WMASK
615 common_exception_exit:
618 l32i a4, a1, PT_AREG4
619 l32i a5, a1, PT_AREG5
620 l32i a6, a1, PT_AREG6
621 l32i a7, a1, PT_AREG7
623 l32i a8, a1, PT_AREG8
624 l32i a9, a1, PT_AREG9
625 l32i a10, a1, PT_AREG10
626 l32i a11, a1, PT_AREG11
628 l32i a12, a1, PT_AREG12
629 l32i a13, a1, PT_AREG13
630 l32i a14, a1, PT_AREG14
631 l32i a15, a1, PT_AREG15
633 /* Restore PC, SAR */
635 1: l32i a2, a1, PT_PC
640 /* Restore LBEG, LEND, LCOUNT */
645 l32i a2, a1, PT_LCOUNT
649 /* We control single stepping through the ICOUNTLEVEL register. */
651 l32i a2, a1, PT_ICOUNTLEVEL
656 /* Check if it was double exception. */
659 l32i a3, a1, PT_AREG3
660 l32i a2, a1, PT_AREG2
661 _bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, 1f
663 /* Restore a0...a3 and return */
665 l32i a0, a1, PT_AREG0
666 l32i a1, a1, PT_AREG1
670 l32i a0, a1, PT_AREG0
671 l32i a1, a1, PT_AREG1
675 * Debug exception handler.
677 * Currently, we don't support KGDB, so only user application can be debugged.
679 * When we get here, a0 is trashed and saved to excsave[debuglevel]
682 ENTRY(debug_exception)
684 rsr a0, EPS + XCHAL_DEBUGLEVEL
685 bbsi.l a0, PS_EXCM_BIT, 1f # exception mode
687 /* Set EPC_1 and EXCCAUSE */
689 wsr a2, DEPC # save a2 temporarily
690 rsr a2, EPC + XCHAL_DEBUGLEVEL
693 movi a2, EXCCAUSE_MAPPED_DEBUG
696 /* Restore PS to the value before the debug exc but with PS.EXCM set.*/
698 movi a2, 1 << PS_EXCM_BIT
700 movi a0, debug_exception # restore a3, debug jump vector
702 xsr a0, EXCSAVE + XCHAL_DEBUGLEVEL
704 /* Switch to kernel/user stack, restore jump vector, and save a0 */
706 bbsi.l a2, PS_UM_BIT, 2f # jump if user mode
708 addi a2, a1, -16-PT_SIZE # assume kernel stack
709 s32i a0, a2, PT_AREG0
711 s32i a1, a2, PT_AREG1
712 s32i a0, a2, PT_DEPC # mark it as a regular exception
714 s32i a3, a2, PT_AREG3
715 s32i a0, a2, PT_AREG2
720 l32i a2, a2, EXC_TABLE_KSTK # load kernel stack pointer
721 s32i a0, a2, PT_AREG0
723 s32i a1, a2, PT_AREG1
726 s32i a3, a2, PT_AREG3
727 s32i a0, a2, PT_AREG2
731 /* Debug exception while in exception mode. */
736 * We get here in case of an unrecoverable exception.
737 * The only thing we can do is to be nice and print a panic message.
738 * We only produce a single stack frame for panic, so ???
743 * - a0 contains the caller address; original value saved in excsave1.
744 * - the original a0 contains a valid return address (backtrace) or 0.
745 * - a2 contains a valid stackpointer
749 * - If the stack pointer could be invalid, the caller has to setup a
750 * dummy stack pointer (e.g. the stack of the init_task)
752 * - If the return address could be invalid, the caller has to set it
753 * to 0, so the backtrace would stop.
758 .ascii "Unrecoverable error in exception handler\0"
760 ENTRY(unrecoverable_exception)
769 movi a1, (1 << PS_WOE_BIT) | 1
775 addi a1, a1, PT_REGS_OFFSET
778 movi a6, unrecoverable_text
785 /* -------------------------- FAST EXCEPTION HANDLERS ----------------------- */
788 * Fast-handler for alloca exceptions
790 * The ALLOCA handler is entered when user code executes the MOVSP
791 * instruction and the caller's frame is not in the register file.
792 * In this case, the caller frame's a0..a3 are on the stack just
793 * below sp (a1), and this handler moves them.
795 * For "MOVSP <ar>,<as>" without destination register a1, this routine
796 * simply moves the value from <as> to <ar> without moving the save area.
800 * a0: trashed, original value saved on stack (PT_AREG0)
802 * a2: new stack pointer, original in DEPC
804 * depc: a2, original value saved on stack (PT_DEPC)
807 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
808 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
812 #define _EXTUI_MOVSP_SRC(ar) extui ar, ar, 4, 4
813 #define _EXTUI_MOVSP_DST(ar) extui ar, ar, 0, 4
815 #define _EXTUI_MOVSP_SRC(ar) extui ar, ar, 0, 4
816 #define _EXTUI_MOVSP_DST(ar) extui ar, ar, 4, 4
821 /* We shouldn't be in a double exception. */
824 _bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, .Lunhandled_double
826 rsr a0, DEPC # get a2
827 s32i a4, a2, PT_AREG4 # save a4 and
828 s32i a0, a2, PT_AREG2 # a2 to stack
830 /* Exit critical section. */
833 s32i a0, a3, EXC_TABLE_FIXUP
835 /* Restore a3, excsave_1 */
837 xsr a3, EXCSAVE_1 # make sure excsave_1 is valid for dbl.
838 rsr a4, EPC_1 # get exception address
839 s32i a3, a2, PT_AREG3 # save a3 to stack
841 #ifdef ALLOCA_EXCEPTION_IN_IRAM
842 #error iram not supported
844 /* Note: l8ui not allowed in IRAM/IROM!! */
845 l8ui a0, a4, 1 # read as(src) from MOVSP instruction
848 _EXTUI_MOVSP_SRC(a0) # extract source register number
854 movi a0, unrecoverable_exception
859 l32i a3, a2, PT_AREG0; _j 1f; .align 8
860 mov a3, a1; _j 1f; .align 8
861 l32i a3, a2, PT_AREG2; _j 1f; .align 8
862 l32i a3, a2, PT_AREG3; _j 1f; .align 8
863 l32i a3, a2, PT_AREG4; _j 1f; .align 8
864 mov a3, a5; _j 1f; .align 8
865 mov a3, a6; _j 1f; .align 8
866 mov a3, a7; _j 1f; .align 8
867 mov a3, a8; _j 1f; .align 8
868 mov a3, a9; _j 1f; .align 8
869 mov a3, a10; _j 1f; .align 8
870 mov a3, a11; _j 1f; .align 8
871 mov a3, a12; _j 1f; .align 8
872 mov a3, a13; _j 1f; .align 8
873 mov a3, a14; _j 1f; .align 8
874 mov a3, a15; _j 1f; .align 8
878 #ifdef ALLOCA_EXCEPTION_IN_IRAM
879 #error iram not supported
881 l8ui a0, a4, 0 # read ar(dst) from MOVSP instruction
883 addi a4, a4, 3 # step over movsp
884 _EXTUI_MOVSP_DST(a0) # extract destination register
885 wsr a4, EPC_1 # save new epc_1
887 _bnei a0, 1, 1f # no 'movsp a1, ax': jump
889 /* Move the save area. This implies the use of the L32E
890 * and S32E instructions, because this move must be done with
891 * the user's PS.RING privilege levels, not with ring 0
892 * (kernel's) privileges currently active with PS.EXCM
893 * set. Note that we have stil registered a fixup routine with the
894 * double exception vector in case a double exception occurs.
897 /* a0,a4:avail a1:old user stack a2:exc. stack a3:new user stack. */
908 /* Restore stack-pointer and all the other saved registers. */
912 l32i a4, a2, PT_AREG4
913 l32i a3, a2, PT_AREG3
914 l32i a0, a2, PT_AREG0
915 l32i a2, a2, PT_AREG2
918 /* MOVSP <at>,<as> was invoked with <at> != a1.
919 * Because the stack pointer is not being modified,
920 * we should be able to just modify the pointer
921 * without moving any save area.
922 * The processor only traps these occurrences if the
923 * caller window isn't live, so unfortunately we can't
924 * use this as an alternate trap mechanism.
925 * So we just do the move. This requires that we
926 * resolve the destination register, not just the source,
927 * so there's some extra work.
928 * (PERHAPS NOT REALLY NEEDED, BUT CLEANER...)
931 /* a0 dst-reg, a1 user-stack, a2 stack, a3 value of src reg. */
933 1: movi a4, .Lmovsp_dst
939 s32i a3, a2, PT_AREG0; _j 1f; .align 8
940 mov a1, a3; _j 1f; .align 8
941 s32i a3, a2, PT_AREG2; _j 1f; .align 8
942 s32i a3, a2, PT_AREG3; _j 1f; .align 8
943 s32i a3, a2, PT_AREG4; _j 1f; .align 8
944 mov a5, a3; _j 1f; .align 8
945 mov a6, a3; _j 1f; .align 8
946 mov a7, a3; _j 1f; .align 8
947 mov a8, a3; _j 1f; .align 8
948 mov a9, a3; _j 1f; .align 8
949 mov a10, a3; _j 1f; .align 8
950 mov a11, a3; _j 1f; .align 8
951 mov a12, a3; _j 1f; .align 8
952 mov a13, a3; _j 1f; .align 8
953 mov a14, a3; _j 1f; .align 8
954 mov a15, a3; _j 1f; .align 8
956 1: l32i a4, a2, PT_AREG4
957 l32i a3, a2, PT_AREG3
958 l32i a0, a2, PT_AREG0
959 l32i a2, a2, PT_AREG2
966 * WARNING: The kernel doesn't save the entire user context before
967 * handling a fast system call. These functions are small and short,
968 * usually offering some functionality not available to user tasks.
970 * BE CAREFUL TO PRESERVE THE USER'S CONTEXT.
974 * a0: trashed, original value saved on stack (PT_AREG0)
976 * a2: new stack pointer, original in DEPC
978 * depc: a2, original value saved on stack (PT_DEPC)
982 ENTRY(fast_syscall_kernel)
991 bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, fast_syscall_unrecoverable
993 rsr a0, DEPC # get syscall-nr
994 _beqz a0, fast_syscall_spill_registers
995 _beqi a0, __NR_xtensa, fast_syscall_xtensa
999 ENTRY(fast_syscall_user)
1007 l32i a0, a2, PT_DEPC
1008 bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, fast_syscall_unrecoverable
1010 rsr a0, DEPC # get syscall-nr
1011 _beqz a0, fast_syscall_spill_registers
1012 _beqi a0, __NR_xtensa, fast_syscall_xtensa
1016 ENTRY(fast_syscall_unrecoverable)
1018 /* Restore all states. */
1020 l32i a0, a2, PT_AREG0 # restore a0
1021 xsr a2, DEPC # restore a2, depc
1025 movi a0, unrecoverable_exception
1031 * sysxtensa syscall handler
1033 * int sysxtensa (SYS_XTENSA_ATOMIC_SET, ptr, val, unused);
1034 * int sysxtensa (SYS_XTENSA_ATOMIC_ADD, ptr, val, unused);
1035 * int sysxtensa (SYS_XTENSA_ATOMIC_EXG_ADD, ptr, val, unused);
1036 * int sysxtensa (SYS_XTENSA_ATOMIC_CMP_SWP, ptr, oldval, newval);
1041 * a0: a2 (syscall-nr), original value saved on stack (PT_AREG0)
1043 * a2: new stack pointer, original in a0 and DEPC
1044 * a3: dispatch table, original in excsave_1
1045 * a4..a15: unchanged
1046 * depc: a2, original value saved on stack (PT_DEPC)
1049 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
1050 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
1052 * Note: we don't have to save a2; a2 holds the return value
1054 * We use the two macros TRY and CATCH:
1056 * TRY adds an entry to the __ex_table fixup table for the immediately
1057 * following instruction.
1059 * CATCH catches any exception that occurred at one of the preceeding TRY
1060 * statements and continues from there
1062 * Usage TRY l32i a0, a1, 0
1065 * CATCH <set return code>
1070 .section __ex_table, "a"; \
1078 ENTRY(fast_syscall_xtensa)
1080 xsr a3, EXCSAVE_1 # restore a3, excsave1
1082 s32i a7, a2, PT_AREG7 # we need an additional register
1083 movi a7, 4 # sizeof(unsigned int)
1084 access_ok a3, a7, a0, a2, .Leac # a0: scratch reg, a2: sp
1086 addi a6, a6, -1 # assuming SYS_XTENSA_ATOMIC_SET = 1
1087 _bgeui a6, SYS_XTENSA_COUNT - 1, .Lill
1088 _bnei a6, SYS_XTENSA_ATOMIC_CMP_SWP - 1, .Lnswp
1090 /* Fall through for ATOMIC_CMP_SWP. */
1092 .Lswp: /* Atomic compare and swap */
1094 TRY l32i a0, a3, 0 # read old value
1095 bne a0, a4, 1f # same as old value? jump
1096 TRY s32i a5, a3, 0 # different, modify value
1097 l32i a7, a2, PT_AREG7 # restore a7
1098 l32i a0, a2, PT_AREG0 # restore a0
1099 movi a2, 1 # and return 1
1100 addi a6, a6, 1 # restore a6 (really necessary?)
1103 1: l32i a7, a2, PT_AREG7 # restore a7
1104 l32i a0, a2, PT_AREG0 # restore a0
1105 movi a2, 0 # return 0 (note that we cannot set
1106 addi a6, a6, 1 # restore a6 (really necessary?)
1109 .Lnswp: /* Atomic set, add, and exg_add. */
1111 TRY l32i a7, a3, 0 # orig
1112 add a0, a4, a7 # + arg
1113 moveqz a0, a4, a6 # set
1114 TRY s32i a0, a3, 0 # write new value
1118 l32i a7, a0, PT_AREG7 # restore a7
1119 l32i a0, a0, PT_AREG0 # restore a0
1120 addi a6, a6, 1 # restore a6 (really necessary?)
1124 .Leac: l32i a7, a2, PT_AREG7 # restore a7
1125 l32i a0, a2, PT_AREG0 # restore a0
1129 .Lill: l32i a7, a2, PT_AREG0 # restore a7
1130 l32i a0, a2, PT_AREG0 # restore a0
1137 /* fast_syscall_spill_registers.
1141 * a0: trashed, original value saved on stack (PT_AREG0)
1143 * a2: new stack pointer, original in DEPC
1144 * a3: dispatch table
1145 * depc: a2, original value saved on stack (PT_DEPC)
1148 * Note: We assume the stack pointer is EXC_TABLE_KSTK in the fixup handler.
1149 * Note: We don't need to save a2 in depc (return value)
1152 ENTRY(fast_syscall_spill_registers)
1154 /* Register a FIXUP handler (pass current wb as a parameter) */
1156 movi a0, fast_syscall_spill_registers_fixup
1157 s32i a0, a3, EXC_TABLE_FIXUP
1159 s32i a0, a3, EXC_TABLE_PARAM
1161 /* Save a3 and SAR on stack. */
1164 xsr a3, EXCSAVE_1 # restore a3 and excsave_1
1165 s32i a0, a2, PT_AREG4 # store SAR to PT_AREG4
1166 s32i a3, a2, PT_AREG3
1168 /* The spill routine might clobber a7, a11, and a15. */
1170 s32i a7, a2, PT_AREG5
1171 s32i a11, a2, PT_AREG6
1172 s32i a15, a2, PT_AREG7
1174 call0 _spill_registers # destroys a3, DEPC, and SAR
1176 /* Advance PC, restore registers and SAR, and return from exception. */
1178 l32i a3, a2, PT_AREG4
1179 l32i a0, a2, PT_AREG0
1181 l32i a3, a2, PT_AREG3
1183 /* Restore clobbered registers. */
1185 l32i a7, a2, PT_AREG5
1186 l32i a11, a2, PT_AREG6
1187 l32i a15, a2, PT_AREG7
1194 * We get here if the spill routine causes an exception, e.g. tlb miss.
1195 * We basically restore WINDOWBASE and WINDOWSTART to the condition when
1196 * we entered the spill routine and jump to the user exception handler.
1198 * a0: value of depc, original value in depc
1199 * a2: trashed, original value in EXC_TABLE_DOUBLE_SAVE
1200 * a3: exctable, original value in excsave1
1203 fast_syscall_spill_registers_fixup:
1205 rsr a2, WINDOWBASE # get current windowbase (a2 is saved)
1206 xsr a0, DEPC # restore depc and a0
1207 ssl a2 # set shift (32 - WB)
1209 /* We need to make sure the current registers (a0-a3) are preserved.
1210 * To do this, we simply set the bit for the current window frame
1211 * in WS, so that the exception handlers save them to the task stack.
1214 rsr a3, EXCSAVE_1 # get spill-mask
1215 slli a2, a3, 1 # shift left by one
1217 slli a3, a2, 32-WSBITS
1218 src a2, a2, a3 # a1 = xxwww1yyxxxwww1yy......
1219 wsr a2, WINDOWSTART # set corrected windowstart
1222 l32i a2, a3, EXC_TABLE_DOUBLE_SAVE # restore a2
1223 l32i a3, a3, EXC_TABLE_PARAM # original WB (in user task)
1225 /* Return to the original (user task) WINDOWBASE.
1226 * We leave the following frame behind:
1228 * a3: trashed (saved in excsave_1)
1229 * depc: depc (we have to return to that address)
1236 /* We are now in the original frame when we entered _spill_registers:
1237 * a0: return address
1238 * a1: used, stack pointer
1239 * a2: kernel stack pointer
1240 * a3: available, saved in EXCSAVE_1
1241 * depc: exception address
1243 * Note: This frame might be the same as above.
1246 /* Setup stack pointer. */
1248 addi a2, a2, -PT_USER_SIZE
1249 s32i a0, a2, PT_AREG0
1251 /* Make sure we return to this fixup handler. */
1253 movi a3, fast_syscall_spill_registers_fixup_return
1254 s32i a3, a2, PT_DEPC # setup depc
1256 /* Jump to the exception handler. */
1260 addx4 a0, a0, a3 # find entry in table
1261 l32i a0, a0, EXC_TABLE_FAST_USER # load handler
1264 fast_syscall_spill_registers_fixup_return:
1266 /* When we return here, all registers have been restored (a2: DEPC) */
1268 wsr a2, DEPC # exception address
1270 /* Restore fixup handler. */
1273 movi a2, fast_syscall_spill_registers_fixup
1274 s32i a2, a3, EXC_TABLE_FIXUP
1276 s32i a2, a3, EXC_TABLE_PARAM
1277 l32i a2, a3, EXC_TABLE_KSTK
1279 /* Load WB at the time the exception occurred. */
1281 rsr a3, SAR # WB is still in SAR
1286 /* Restore a3 and return. */
1295 * spill all registers.
1297 * This is not a real function. The following conditions must be met:
1299 * - must be called with call0.
1300 * - uses DEPC, a3 and SAR.
1301 * - the last 'valid' register of each frame are clobbered.
1302 * - the caller must have registered a fixup handler
1303 * (or be inside a critical section)
1304 * - PS_EXCM must be set (PS_WOE cleared?)
1307 ENTRY(_spill_registers)
1310 * Rotate ws so that the current windowbase is at bit 0.
1311 * Assume ws = xxxwww1yy (www1 current window frame).
1312 * Rotate ws right so that a2 = yyxxxwww1.
1315 wsr a2, DEPC # preserve a2
1317 rsr a3, WINDOWSTART # a3 = xxxwww1yy
1320 or a3, a3, a2 # a3 = xxxwww1yyxxxwww1yy
1321 srl a3, a3 # a3 = 00xxxwww1yyxxxwww1
1323 /* We are done if there are no more than the current register frame. */
1325 extui a3, a3, 1, WSBITS-1 # a3 = 0yyxxxwww
1326 movi a2, (1 << (WSBITS-1))
1327 _beqz a3, .Lnospill # only one active frame? jump
1329 /* We want 1 at the top, so that we return to the current windowbase */
1331 or a3, a3, a2 # 1yyxxxwww
1333 /* Skip empty frames - get 'oldest' WINDOWSTART-bit. */
1335 wsr a3, WINDOWSTART # save shifted windowstart
1337 and a3, a2, a3 # first bit set from right: 000010000
1339 ffs_ws a2, a3 # a2: shifts to skip empty frames
1341 sub a2, a3, a2 # WSBITS-a2:number of 0-bits from right
1342 ssr a2 # save in SAR for later.
1346 rsr a2, DEPC # restore a2
1351 srl a3, a3 # shift windowstart
1353 /* WB is now just one frame below the oldest frame in the register
1354 window. WS is shifted so the oldest frame is in bit 0, thus, WB
1355 and WS differ by one 4-register frame. */
1357 /* Save frames. Depending what call was used (call4, call8, call12),
1358 * we have to save 4,8. or 12 registers.
1364 /* Special case: we have a call12-frame starting at a4. */
1366 _bbci.l a3, 3, .Lc12 # bit 3 shouldn't be zero! (Jump to Lc12 first)
1368 s32e a4, a1, -16 # a1 is valid with an empty spill area
1379 .Lloop: _bbsi.l a3, 1, .Lc4
1380 _bbci.l a3, 2, .Lc12
1382 .Lc8: s32e a4, a13, -16
1392 srli a11, a3, 2 # shift windowbase by 2
1396 .Lexit: /* Done. Do the final rotation, set WS, and return. */
1406 .Lc4: s32e a4, a9, -16
1416 .Lc12: _bbci.l a3, 3, .Linvalid_mask # bit 2 shouldn't be zero!
1418 /* 12-register frame (call12) */
1424 .Lc12c: s32e a9, a8, -44
1433 /* The stack pointer for a4..a7 is out of reach, so we rotate the
1434 * window, grab the stackpointer, and rotate back.
1435 * Alternatively, we could also use the following approach, but that
1436 * makes the fixup routine much more complicated:
1459 /* We get here because of an unrecoverable error in the window
1460 * registers. If we are in user space, we kill the application,
1461 * however, this condition is unrecoverable in kernel space.
1465 _bbci.l a0, PS_UM_BIT, 1f
1467 /* User space: Setup a dummy frame and kill application.
1468 * Note: We assume EXC_TABLE_KSTK contains a valid stack pointer.
1481 l32i a1, a3, EXC_TABLE_KSTK
1484 movi a4, (1 << PS_WOE_BIT) | 1
1492 1: /* Kernel space: PANIC! */
1495 movi a0, unrecoverable_exception
1496 callx0 a0 # should not return
1500 * We should never get here. Bail out!
1503 ENTRY(fast_second_level_miss_double_kernel)
1505 1: movi a0, unrecoverable_exception
1506 callx0 a0 # should not return
1509 /* First-level entry handler for user, kernel, and double 2nd-level
1510 * TLB miss exceptions. Note that for now, user and kernel miss
1511 * exceptions share the same entry point and are handled identically.
1513 * An old, less-efficient C version of this function used to exist.
1514 * We include it below, interleaved as comments, for reference.
1518 * a0: trashed, original value saved on stack (PT_AREG0)
1520 * a2: new stack pointer, original in DEPC
1521 * a3: dispatch table
1522 * depc: a2, original value saved on stack (PT_DEPC)
1525 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
1526 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
1529 ENTRY(fast_second_level_miss)
1531 /* Save a1. Note: we don't expect a double exception. */
1533 s32i a1, a2, PT_AREG1
1535 /* We need to map the page of PTEs for the user task. Find
1536 * the pointer to that page. Also, it's possible for tsk->mm
1537 * to be NULL while tsk->active_mm is nonzero if we faulted on
1538 * a vmalloc address. In that rare case, we must use
1539 * active_mm instead to avoid a fault in this handler. See
1541 * http://mail.nl.linux.org/linux-mm/2002-08/msg00258.html
1542 * (or search Internet on "mm vs. active_mm")
1545 * mm = tsk->active_mm;
1546 * pgd = pgd_offset (mm, regs->excvaddr);
1547 * pmd = pmd_offset (pgd, regs->excvaddr);
1552 l32i a0, a1, TASK_MM # tsk->mm
1556 /* We deliberately destroy a3 that holds the exception table. */
1558 8: rsr a3, EXCVADDR # fault address
1559 _PGD_OFFSET(a0, a3, a1)
1560 l32i a0, a0, 0 # read pmdval
1563 /* Read ptevaddr and convert to top of page-table page.
1565 * vpnval = read_ptevaddr_register() & PAGE_MASK;
1566 * vpnval += DTLB_WAY_PGTABLE;
1567 * pteval = mk_pte (virt_to_page(pmd_val(pmdval)), PAGE_KERNEL);
1568 * write_dtlb_entry (pteval, vpnval);
1570 * The messy computation for 'pteval' above really simplifies
1571 * into the following:
1573 * pteval = ((pmdval - PAGE_OFFSET) & PAGE_MASK) | PAGE_DIRECTORY
1576 movi a1, -PAGE_OFFSET
1577 add a0, a0, a1 # pmdval - PAGE_OFFSET
1578 extui a1, a0, 0, PAGE_SHIFT # ... & PAGE_MASK
1581 movi a1, _PAGE_DIRECTORY
1582 or a0, a0, a1 # ... | PAGE_DIRECTORY
1585 * We utilize all three wired-ways (7-9) to hold pmd translations.
1586 * Memory regions are mapped to the DTLBs according to bits 28 and 29.
1587 * This allows to map the three most common regions to three different
1589 * 0,1 -> way 7 program (0040.0000) and virtual (c000.0000)
1590 * 2 -> way 8 shared libaries (2000.0000)
1591 * 3 -> way 0 stack (3000.0000)
1594 extui a3, a3, 28, 2 # addr. bit 28 and 29 0,1,2,3
1596 addx2 a3, a3, a3 # -> 0,3,6,9
1597 srli a1, a1, PAGE_SHIFT
1598 extui a3, a3, 2, 2 # -> 0,0,1,2
1599 slli a1, a1, PAGE_SHIFT # ptevaddr & PAGE_MASK
1600 addi a3, a3, DTLB_WAY_PGD
1601 add a1, a1, a3 # ... + way_number
1606 /* Exit critical section. */
1608 4: movi a3, exc_table # restore a3
1610 s32i a0, a3, EXC_TABLE_FIXUP
1612 /* Restore the working registers, and return. */
1614 l32i a0, a2, PT_AREG0
1615 l32i a1, a2, PT_AREG1
1616 l32i a2, a2, PT_DEPC
1619 bgeui a2, VALID_DOUBLE_EXCEPTION_ADDRESS, 1f
1621 /* Restore excsave1 and return. */
1626 /* Return from double exception. */
1632 9: l32i a0, a1, TASK_ACTIVE_MM # unlikely case mm == 0
1635 #if (DCACHE_WAY_SIZE > PAGE_SIZE)
1637 2: /* Special case for cache aliasing.
1638 * We (should) only get here if a clear_user_page, copy_user_page
1639 * or the aliased cache flush functions got preemptively interrupted
1640 * by another task. Re-establish temporary mapping to the
1641 * TLBTEMP_BASE areas.
1644 /* We shouldn't be in a double exception */
1646 l32i a0, a2, PT_DEPC
1647 bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, 2f
1649 /* Make sure the exception originated in the special functions */
1651 movi a0, __tlbtemp_mapping_start
1654 movi a0, __tlbtemp_mapping_end
1657 /* Check if excvaddr was in one of the TLBTEMP_BASE areas. */
1659 movi a3, TLBTEMP_BASE_1
1663 addi a1, a0, -(2 << (DCACHE_ALIAS_ORDER + PAGE_SHIFT))
1666 /* Check if we have to restore an ITLB mapping. */
1668 movi a1, __tlbtemp_mapping_itlb
1677 /* Jump for ITLB entry */
1681 /* We can use up to two TLBTEMP areas, one for src and one for dst. */
1683 extui a3, a0, PAGE_SHIFT + DCACHE_ALIAS_ORDER, 1
1686 /* PPN is in a6 for the first TLBTEMP area and in a7 for the second. */
1692 /* ITLB entry. We only use dst in a6. */
1699 #endif // DCACHE_WAY_SIZE > PAGE_SIZE
1702 2: /* Invalid PGD, default exception handling */
1707 s32i a1, a2, PT_AREG2
1708 s32i a3, a2, PT_AREG3
1712 bbsi.l a2, PS_UM_BIT, 1f
1714 1: j _user_exception
1718 * StoreProhibitedException
1720 * Update the pte and invalidate the itlb mapping for this pte.
1724 * a0: trashed, original value saved on stack (PT_AREG0)
1726 * a2: new stack pointer, original in DEPC
1727 * a3: dispatch table
1728 * depc: a2, original value saved on stack (PT_DEPC)
1731 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
1732 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
1735 ENTRY(fast_store_prohibited)
1737 /* Save a1 and a4. */
1739 s32i a1, a2, PT_AREG1
1740 s32i a4, a2, PT_AREG4
1743 l32i a0, a1, TASK_MM # tsk->mm
1746 8: rsr a1, EXCVADDR # fault address
1747 _PGD_OFFSET(a0, a1, a4)
1751 /* Note that we assume _PAGE_WRITABLE_BIT is only set if pte is valid.*/
1753 _PTE_OFFSET(a0, a1, a4)
1754 l32i a4, a0, 0 # read pteval
1755 bbci.l a4, _PAGE_WRITABLE_BIT, 2f
1757 movi a1, _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_HW_WRITE
1762 /* We need to flush the cache if we have page coloring. */
1763 #if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK
1769 /* Exit critical section. */
1772 s32i a0, a3, EXC_TABLE_FIXUP
1774 /* Restore the working registers, and return. */
1776 l32i a4, a2, PT_AREG4
1777 l32i a1, a2, PT_AREG1
1778 l32i a0, a2, PT_AREG0
1779 l32i a2, a2, PT_DEPC
1781 /* Restore excsave1 and a3. */
1784 bgeui a2, VALID_DOUBLE_EXCEPTION_ADDRESS, 1f
1789 /* Double exception. Restore FIXUP handler and return. */
1795 9: l32i a0, a1, TASK_ACTIVE_MM # unlikely case mm == 0
1798 2: /* If there was a problem, handle fault in C */
1800 rsr a4, DEPC # still holds a2
1802 s32i a4, a2, PT_AREG2
1803 s32i a3, a2, PT_AREG3
1804 l32i a4, a2, PT_AREG4
1808 bbsi.l a2, PS_UM_BIT, 1f
1810 1: j _user_exception
1813 #if XCHAL_EXTRA_SA_SIZE
1815 #warning fast_coprocessor untested
1820 * a0: trashed, original value saved on stack (PT_AREG0)
1822 * a2: new stack pointer, original in DEPC
1823 * a3: dispatch table
1824 * depc: a2, original value saved on stack (PT_DEPC)
1827 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
1828 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
1831 ENTRY(fast_coprocessor_double)
1833 movi a0, unrecoverable_exception
1836 ENTRY(fast_coprocessor)
1838 /* Fatal if we are in a double exception. */
1840 l32i a0, a2, PT_DEPC
1841 _bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, fast_coprocessor_double
1843 /* Save some registers a1, a3, a4, SAR */
1846 s32i a3, a2, PT_AREG3
1848 s32i a4, a2, PT_AREG4
1849 s32i a1, a2, PT_AREG1
1850 s32i a5, a1, PT_AREG5
1854 /* Currently, the HAL macros only guarantee saving a0 and a1.
1855 * These can and will be refined in the future, but for now,
1856 * just save the remaining registers of a2...a15.
1858 s32i a6, a1, PT_AREG6
1859 s32i a7, a1, PT_AREG7
1860 s32i a8, a1, PT_AREG8
1861 s32i a9, a1, PT_AREG9
1862 s32i a10, a1, PT_AREG10
1863 s32i a11, a1, PT_AREG11
1864 s32i a12, a1, PT_AREG12
1865 s32i a13, a1, PT_AREG13
1866 s32i a14, a1, PT_AREG14
1867 s32i a15, a1, PT_AREG15
1869 /* Find coprocessor number. Subtract first CP EXCCAUSE from EXCCAUSE */
1872 addi a3, a0, -XCHAL_EXCCAUSE_COPROCESSOR0_DISABLED
1874 /* Set corresponding CPENABLE bit */
1877 ssl a3 # SAR: 32 - coprocessor_number
1883 movi a5, coprocessor_info # list of owner and offset into cp_save
1884 addx8 a0, a4, a5 # entry for CP
1886 bne a4, a5, .Lload # bit wasn't set before, cp not in use
1888 /* Now compare the current task with the owner of the coprocessor.
1889 * If they are the same, there is no reason to save or restore any
1890 * coprocessor state. Having already enabled the coprocessor,
1891 * branch ahead to return.
1894 l32i a4, a0, COPROCESSOR_INFO_OWNER # a4: current owner for this CP
1897 /* Find location to dump current coprocessor state:
1898 * task_struct->task_cp_save_offset + coprocessor_offset[coprocessor]
1900 * Note: a0 pointer to the entry in the coprocessor owner table,
1901 * a3 coprocessor number,
1902 * a4 current owner of coprocessor.
1904 l32i a5, a0, COPROCESSOR_INFO_OFFSET
1905 addi a2, a4, THREAD_CP_SAVE
1908 /* Store current coprocessor states. (a5 still has CP number) */
1910 xchal_cpi_store_funcbody
1912 /* The macro might have destroyed a3 (coprocessor number), but
1913 * SAR still has 32 - coprocessor_number!
1919 .Lload: /* A new task now owns the corpocessors. Save its TCB pointer into
1920 * the coprocessor owner table.
1922 * Note: a0 pointer to the entry in the coprocessor owner table,
1923 * a3 coprocessor number.
1928 /* Find location from where to restore the current coprocessor state.*/
1930 l32i a5, a0, COPROCESSOR_INFO_OFFSET
1931 addi a2, a4, THREAD_CP_SAVE
1934 xchal_cpi_load_funcbody
1936 /* We must assume that the xchal_cpi_store_funcbody macro destroyed
1937 * registers a2..a15.
1940 .Ldone: l32i a15, a1, PT_AREG15
1941 l32i a14, a1, PT_AREG14
1942 l32i a13, a1, PT_AREG13
1943 l32i a12, a1, PT_AREG12
1944 l32i a11, a1, PT_AREG11
1945 l32i a10, a1, PT_AREG10
1946 l32i a9, a1, PT_AREG9
1947 l32i a8, a1, PT_AREG8
1948 l32i a7, a1, PT_AREG7
1949 l32i a6, a1, PT_AREG6
1950 l32i a5, a1, PT_AREG5
1951 l32i a4, a1, PT_AREG4
1952 l32i a3, a1, PT_AREG3
1953 l32i a2, a1, PT_AREG2
1954 l32i a0, a1, PT_AREG0
1955 l32i a1, a1, PT_AREG1
1959 #endif /* XCHAL_EXTRA_SA_SIZE */
1964 * void system_call (struct pt_regs* regs, int exccause)
1971 /* regs->syscall = regs->areg[2] */
1973 l32i a3, a2, PT_AREG2
1975 movi a4, do_syscall_trace_enter
1976 s32i a3, a2, PT_SYSCALL
1979 /* syscall = sys_call_table[syscall_nr] */
1981 movi a4, sys_call_table;
1982 movi a5, __NR_syscall_count
1988 movi a5, sys_ni_syscall;
1991 /* Load args: arg0 - arg5 are passed via regs. */
1993 l32i a6, a2, PT_AREG6
1994 l32i a7, a2, PT_AREG3
1995 l32i a8, a2, PT_AREG4
1996 l32i a9, a2, PT_AREG5
1997 l32i a10, a2, PT_AREG8
1998 l32i a11, a2, PT_AREG9
2000 /* Pass one additional argument to the syscall: pt_regs (on stack) */
2005 1: /* regs->areg[2] = return_value */
2007 s32i a6, a2, PT_AREG2
2008 movi a4, do_syscall_trace_leave
2015 * Create a kernel thread
2017 * int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
2021 ENTRY(kernel_thread)
2024 mov a5, a2 # preserve fn over syscall
2025 mov a7, a3 # preserve args over syscall
2027 movi a3, _CLONE_VM | _CLONE_UNTRACED
2029 or a6, a4, a3 # arg0: flags
2030 mov a3, a1 # arg1: sp
2033 beq a3, a1, 1f # branch if parent
2035 callx4 a5 # fn(args)
2038 syscall # return value of fn(args) still in a6
2043 * Do a system call from kernel instead of calling sys_execve, so we end up
2044 * with proper pt_regs.
2046 * int kernel_execve(const char *fname, char *const argv[], charg *const envp[])
2050 ENTRY(kernel_execve)
2052 mov a6, a2 # arg0 is in a6
2053 movi a2, __NR_execve
2061 * struct task* _switch_to (struct task* prev, struct task* next)
2069 mov a4, a3 # preserve a3
2071 s32i a0, a2, THREAD_RA # save return address
2072 s32i a1, a2, THREAD_SP # save stack pointer
2074 /* Disable ints while we manipulate the stack pointer; spill regs. */
2076 movi a5, (1 << PS_EXCM_BIT) | LOCKLEVEL
2080 s32i a3, a3, EXC_TABLE_FIXUP /* enter critical section */
2082 call0 _spill_registers
2084 /* Set kernel stack (and leave critical section)
2085 * Note: It's save to set it here. The stack will not be overwritten
2086 * because the kernel stack will only be loaded again after
2087 * we return from kernel space.
2090 l32i a0, a4, TASK_THREAD_INFO
2091 rsr a3, EXCSAVE_1 # exc_table
2093 addi a0, a0, PT_REGS_OFFSET
2094 s32i a1, a3, EXC_TABLE_FIXUP
2095 s32i a0, a3, EXC_TABLE_KSTK
2097 /* restore context of the task that 'next' addresses */
2099 l32i a0, a4, THREAD_RA /* restore return address */
2100 l32i a1, a4, THREAD_SP /* restore stack pointer */
2108 ENTRY(ret_from_fork)
2110 /* void schedule_tail (struct task_struct *prev)
2111 * Note: prev is still in a6 (return value from fake call4 frame)
2113 movi a4, schedule_tail
2116 movi a4, do_syscall_trace_leave
2120 j common_exception_return