x86: cpa, check if we changed anything and tlb flushing is necessary
[sfrench/cifs-2.6.git] / arch / x86 / mm / pageattr.c
1 /*
2  * Copyright 2002 Andi Kleen, SuSE Labs.
3  * Thanks to Ben LaHaise for precious feedback.
4  */
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/module.h>
8 #include <linux/sched.h>
9 #include <linux/slab.h>
10 #include <linux/mm.h>
11
12 #include <asm/e820.h>
13 #include <asm/processor.h>
14 #include <asm/tlbflush.h>
15 #include <asm/sections.h>
16 #include <asm/uaccess.h>
17 #include <asm/pgalloc.h>
18
19 struct cpa_data {
20         unsigned long   vaddr;
21         int             numpages;
22         pgprot_t        mask_set;
23         pgprot_t        mask_clr;
24         int             flushtlb;
25 };
26
27 static inline int
28 within(unsigned long addr, unsigned long start, unsigned long end)
29 {
30         return addr >= start && addr < end;
31 }
32
33 /*
34  * Flushing functions
35  */
36
37 /**
38  * clflush_cache_range - flush a cache range with clflush
39  * @addr:       virtual start address
40  * @size:       number of bytes to flush
41  *
42  * clflush is an unordered instruction which needs fencing with mfence
43  * to avoid ordering issues.
44  */
45 void clflush_cache_range(void *vaddr, unsigned int size)
46 {
47         void *vend = vaddr + size - 1;
48
49         mb();
50
51         for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size)
52                 clflush(vaddr);
53         /*
54          * Flush any possible final partial cacheline:
55          */
56         clflush(vend);
57
58         mb();
59 }
60
61 static void __cpa_flush_all(void *arg)
62 {
63         unsigned long cache = (unsigned long)arg;
64
65         /*
66          * Flush all to work around Errata in early athlons regarding
67          * large page flushing.
68          */
69         __flush_tlb_all();
70
71         if (cache && boot_cpu_data.x86_model >= 4)
72                 wbinvd();
73 }
74
75 static void cpa_flush_all(unsigned long cache)
76 {
77         BUG_ON(irqs_disabled());
78
79         on_each_cpu(__cpa_flush_all, (void *) cache, 1, 1);
80 }
81
82 static void __cpa_flush_range(void *arg)
83 {
84         /*
85          * We could optimize that further and do individual per page
86          * tlb invalidates for a low number of pages. Caveat: we must
87          * flush the high aliases on 64bit as well.
88          */
89         __flush_tlb_all();
90 }
91
92 static void cpa_flush_range(unsigned long start, int numpages, int cache)
93 {
94         unsigned int i, level;
95         unsigned long addr;
96
97         BUG_ON(irqs_disabled());
98         WARN_ON(PAGE_ALIGN(start) != start);
99
100         on_each_cpu(__cpa_flush_range, NULL, 1, 1);
101
102         if (!cache)
103                 return;
104
105         /*
106          * We only need to flush on one CPU,
107          * clflush is a MESI-coherent instruction that
108          * will cause all other CPUs to flush the same
109          * cachelines:
110          */
111         for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
112                 pte_t *pte = lookup_address(addr, &level);
113
114                 /*
115                  * Only flush present addresses:
116                  */
117                 if (pte && pte_present(*pte))
118                         clflush_cache_range((void *) addr, PAGE_SIZE);
119         }
120 }
121
122 #define HIGH_MAP_START  __START_KERNEL_map
123 #define HIGH_MAP_END    (__START_KERNEL_map + KERNEL_TEXT_SIZE)
124
125
126 /*
127  * Converts a virtual address to a X86-64 highmap address
128  */
129 static unsigned long virt_to_highmap(void *address)
130 {
131 #ifdef CONFIG_X86_64
132         return __pa((unsigned long)address) + HIGH_MAP_START - phys_base;
133 #else
134         return (unsigned long)address;
135 #endif
136 }
137
138 /*
139  * Certain areas of memory on x86 require very specific protection flags,
140  * for example the BIOS area or kernel text. Callers don't always get this
141  * right (again, ioremap() on BIOS memory is not uncommon) so this function
142  * checks and fixes these known static required protection bits.
143  */
144 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address)
145 {
146         pgprot_t forbidden = __pgprot(0);
147
148         /*
149          * The BIOS area between 640k and 1Mb needs to be executable for
150          * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
151          */
152         if (within(__pa(address), BIOS_BEGIN, BIOS_END))
153                 pgprot_val(forbidden) |= _PAGE_NX;
154
155         /*
156          * The kernel text needs to be executable for obvious reasons
157          * Does not cover __inittext since that is gone later on
158          */
159         if (within(address, (unsigned long)_text, (unsigned long)_etext))
160                 pgprot_val(forbidden) |= _PAGE_NX;
161         /*
162          * Do the same for the x86-64 high kernel mapping
163          */
164         if (within(address, virt_to_highmap(_text), virt_to_highmap(_etext)))
165                 pgprot_val(forbidden) |= _PAGE_NX;
166
167
168 #ifdef CONFIG_DEBUG_RODATA
169         /* The .rodata section needs to be read-only */
170         if (within(address, (unsigned long)__start_rodata,
171                                 (unsigned long)__end_rodata))
172                 pgprot_val(forbidden) |= _PAGE_RW;
173         /*
174          * Do the same for the x86-64 high kernel mapping
175          */
176         if (within(address, virt_to_highmap(__start_rodata),
177                                 virt_to_highmap(__end_rodata)))
178                 pgprot_val(forbidden) |= _PAGE_RW;
179 #endif
180
181         prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
182
183         return prot;
184 }
185
186 pte_t *lookup_address(unsigned long address, int *level)
187 {
188         pgd_t *pgd = pgd_offset_k(address);
189         pud_t *pud;
190         pmd_t *pmd;
191
192         *level = PG_LEVEL_NONE;
193
194         if (pgd_none(*pgd))
195                 return NULL;
196         pud = pud_offset(pgd, address);
197         if (pud_none(*pud))
198                 return NULL;
199         pmd = pmd_offset(pud, address);
200         if (pmd_none(*pmd))
201                 return NULL;
202
203         *level = PG_LEVEL_2M;
204         if (pmd_large(*pmd))
205                 return (pte_t *)pmd;
206
207         *level = PG_LEVEL_4K;
208         return pte_offset_kernel(pmd, address);
209 }
210
211 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
212 {
213         /* change init_mm */
214         set_pte_atomic(kpte, pte);
215 #ifdef CONFIG_X86_32
216         if (!SHARED_KERNEL_PMD) {
217                 struct page *page;
218
219                 list_for_each_entry(page, &pgd_list, lru) {
220                         pgd_t *pgd;
221                         pud_t *pud;
222                         pmd_t *pmd;
223
224                         pgd = (pgd_t *)page_address(page) + pgd_index(address);
225                         pud = pud_offset(pgd, address);
226                         pmd = pmd_offset(pud, address);
227                         set_pte_atomic((pte_t *)pmd, pte);
228                 }
229         }
230 #endif
231 }
232
233 static int split_large_page(pte_t *kpte, unsigned long address)
234 {
235         pgprot_t ref_prot = pte_pgprot(pte_clrhuge(*kpte));
236         gfp_t gfp_flags = GFP_KERNEL;
237         unsigned long flags, addr, pfn;
238         pte_t *pbase, *tmp;
239         struct page *base;
240         unsigned int i, level;
241
242 #ifdef CONFIG_DEBUG_PAGEALLOC
243         gfp_flags = __GFP_HIGH | __GFP_NOFAIL | __GFP_NOWARN;
244         gfp_flags = GFP_ATOMIC | __GFP_NOWARN;
245 #endif
246         base = alloc_pages(gfp_flags, 0);
247         if (!base)
248                 return -ENOMEM;
249
250         spin_lock_irqsave(&pgd_lock, flags);
251         /*
252          * Check for races, another CPU might have split this page
253          * up for us already:
254          */
255         tmp = lookup_address(address, &level);
256         if (tmp != kpte) {
257                 WARN_ON_ONCE(1);
258                 goto out_unlock;
259         }
260
261         address = __pa(address);
262         addr = address & LARGE_PAGE_MASK;
263         pbase = (pte_t *)page_address(base);
264 #ifdef CONFIG_X86_32
265         paravirt_alloc_pt(&init_mm, page_to_pfn(base));
266 #endif
267
268         /*
269          * Get the target pfn from the original entry:
270          */
271         pfn = pte_pfn(*kpte);
272         for (i = 0; i < PTRS_PER_PTE; i++, pfn++)
273                 set_pte(&pbase[i], pfn_pte(pfn, ref_prot));
274
275         /*
276          * Install the new, split up pagetable. Important detail here:
277          *
278          * On Intel the NX bit of all levels must be cleared to make a
279          * page executable. See section 4.13.2 of Intel 64 and IA-32
280          * Architectures Software Developer's Manual).
281          */
282         ref_prot = pte_pgprot(pte_mkexec(pte_clrhuge(*kpte)));
283         __set_pmd_pte(kpte, address, mk_pte(base, ref_prot));
284         base = NULL;
285
286 out_unlock:
287         spin_unlock_irqrestore(&pgd_lock, flags);
288
289         if (base)
290                 __free_pages(base, 0);
291
292         return 0;
293 }
294
295 static int __change_page_attr(unsigned long address, struct cpa_data *cpa)
296 {
297         struct page *kpte_page;
298         int level, err = 0;
299         pte_t *kpte;
300
301 repeat:
302         kpte = lookup_address(address, &level);
303         if (!kpte)
304                 return -EINVAL;
305
306         kpte_page = virt_to_page(kpte);
307         BUG_ON(PageLRU(kpte_page));
308         BUG_ON(PageCompound(kpte_page));
309
310         if (level == PG_LEVEL_4K) {
311                 pte_t new_pte, old_pte = *kpte;
312                 pgprot_t new_prot = pte_pgprot(old_pte);
313
314                 if(!pte_val(old_pte)) {
315                         printk(KERN_WARNING "CPA: called for zero pte. "
316                                "vaddr = %lx cpa->vaddr = %lx\n", address,
317                                 cpa->vaddr);
318                         WARN_ON(1);
319                         return -EINVAL;
320                 }
321
322                 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
323                 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
324
325                 new_prot = static_protections(new_prot, address);
326
327                 /*
328                  * We need to keep the pfn from the existing PTE,
329                  * after all we're only going to change it's attributes
330                  * not the memory it points to
331                  */
332                 new_pte = pfn_pte(pte_pfn(old_pte), canon_pgprot(new_prot));
333
334                 /*
335                  * Do we really change anything ?
336                  */
337                 if (pte_val(old_pte) != pte_val(new_pte)) {
338                         set_pte_atomic(kpte, new_pte);
339                         cpa->flushtlb = 1;
340                 }
341         } else {
342                 err = split_large_page(kpte, address);
343                 if (!err)
344                         goto repeat;
345                 cpa->flushtlb = 1;
346         }
347         return err;
348 }
349
350 /**
351  * change_page_attr_addr - Change page table attributes in linear mapping
352  * @address: Virtual address in linear mapping.
353  * @prot:    New page table attribute (PAGE_*)
354  *
355  * Change page attributes of a page in the direct mapping. This is a variant
356  * of change_page_attr() that also works on memory holes that do not have
357  * mem_map entry (pfn_valid() is false).
358  *
359  * See change_page_attr() documentation for more details.
360  *
361  * Modules and drivers should use the set_memory_* APIs instead.
362  */
363
364 static int change_page_attr_addr(struct cpa_data *cpa)
365 {
366         int err;
367         unsigned long address = cpa->vaddr;
368
369 #ifdef CONFIG_X86_64
370         unsigned long phys_addr = __pa(address);
371
372         /*
373          * If we are inside the high mapped kernel range, then we
374          * fixup the low mapping first. __va() returns the virtual
375          * address in the linear mapping:
376          */
377         if (within(address, HIGH_MAP_START, HIGH_MAP_END))
378                 address = (unsigned long) __va(phys_addr);
379 #endif
380
381         err = __change_page_attr(address, cpa);
382         if (err)
383                 return err;
384
385 #ifdef CONFIG_X86_64
386         /*
387          * If the physical address is inside the kernel map, we need
388          * to touch the high mapped kernel as well:
389          */
390         if (within(phys_addr, 0, KERNEL_TEXT_SIZE)) {
391                 /*
392                  * Calc the high mapping address. See __phys_addr()
393                  * for the non obvious details.
394                  *
395                  * Note that NX and other required permissions are
396                  * checked in static_protections().
397                  */
398                 address = phys_addr + HIGH_MAP_START - phys_base;
399
400                 /*
401                  * Our high aliases are imprecise, because we check
402                  * everything between 0 and KERNEL_TEXT_SIZE, so do
403                  * not propagate lookup failures back to users:
404                  */
405                 __change_page_attr(address, cpa);
406         }
407 #endif
408         return err;
409 }
410
411 static int __change_page_attr_set_clr(struct cpa_data *cpa)
412 {
413         unsigned int i;
414         int ret;
415
416         for (i = 0; i < cpa->numpages ; i++, cpa->vaddr += PAGE_SIZE) {
417                 ret = change_page_attr_addr(cpa);
418                 if (ret)
419                         return ret;
420         }
421
422         return 0;
423 }
424
425 static inline int cache_attr(pgprot_t attr)
426 {
427         return pgprot_val(attr) &
428                 (_PAGE_PAT | _PAGE_PAT_LARGE | _PAGE_PWT | _PAGE_PCD);
429 }
430
431 static int change_page_attr_set_clr(unsigned long addr, int numpages,
432                                     pgprot_t mask_set, pgprot_t mask_clr)
433 {
434         struct cpa_data cpa;
435         int ret, cache;
436
437         /*
438          * Check, if we are requested to change a not supported
439          * feature:
440          */
441         mask_set = canon_pgprot(mask_set);
442         mask_clr = canon_pgprot(mask_clr);
443         if (!pgprot_val(mask_set) && !pgprot_val(mask_clr))
444                 return 0;
445
446         cpa.vaddr = addr;
447         cpa.numpages = numpages;
448         cpa.mask_set = mask_set;
449         cpa.mask_clr = mask_clr;
450         cpa.flushtlb = 0;
451
452         ret = __change_page_attr_set_clr(&cpa);
453
454         /*
455          * Check whether we really changed something:
456          */
457         if (!cpa.flushtlb)
458                 return ret;
459
460         /*
461          * No need to flush, when we did not set any of the caching
462          * attributes:
463          */
464         cache = cache_attr(mask_set);
465
466         /*
467          * On success we use clflush, when the CPU supports it to
468          * avoid the wbindv. If the CPU does not support it and in the
469          * error case we fall back to cpa_flush_all (which uses
470          * wbindv):
471          */
472         if (!ret && cpu_has_clflush)
473                 cpa_flush_range(addr, numpages, cache);
474         else
475                 cpa_flush_all(cache);
476
477         return ret;
478 }
479
480 static inline int change_page_attr_set(unsigned long addr, int numpages,
481                                        pgprot_t mask)
482 {
483         return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0));
484 }
485
486 static inline int change_page_attr_clear(unsigned long addr, int numpages,
487                                          pgprot_t mask)
488 {
489         return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask);
490 }
491
492 int set_memory_uc(unsigned long addr, int numpages)
493 {
494         return change_page_attr_set(addr, numpages,
495                                     __pgprot(_PAGE_PCD | _PAGE_PWT));
496 }
497 EXPORT_SYMBOL(set_memory_uc);
498
499 int set_memory_wb(unsigned long addr, int numpages)
500 {
501         return change_page_attr_clear(addr, numpages,
502                                       __pgprot(_PAGE_PCD | _PAGE_PWT));
503 }
504 EXPORT_SYMBOL(set_memory_wb);
505
506 int set_memory_x(unsigned long addr, int numpages)
507 {
508         return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_NX));
509 }
510 EXPORT_SYMBOL(set_memory_x);
511
512 int set_memory_nx(unsigned long addr, int numpages)
513 {
514         return change_page_attr_set(addr, numpages, __pgprot(_PAGE_NX));
515 }
516 EXPORT_SYMBOL(set_memory_nx);
517
518 int set_memory_ro(unsigned long addr, int numpages)
519 {
520         return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_RW));
521 }
522
523 int set_memory_rw(unsigned long addr, int numpages)
524 {
525         return change_page_attr_set(addr, numpages, __pgprot(_PAGE_RW));
526 }
527
528 int set_memory_np(unsigned long addr, int numpages)
529 {
530         return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_PRESENT));
531 }
532
533 int set_pages_uc(struct page *page, int numpages)
534 {
535         unsigned long addr = (unsigned long)page_address(page);
536
537         return set_memory_uc(addr, numpages);
538 }
539 EXPORT_SYMBOL(set_pages_uc);
540
541 int set_pages_wb(struct page *page, int numpages)
542 {
543         unsigned long addr = (unsigned long)page_address(page);
544
545         return set_memory_wb(addr, numpages);
546 }
547 EXPORT_SYMBOL(set_pages_wb);
548
549 int set_pages_x(struct page *page, int numpages)
550 {
551         unsigned long addr = (unsigned long)page_address(page);
552
553         return set_memory_x(addr, numpages);
554 }
555 EXPORT_SYMBOL(set_pages_x);
556
557 int set_pages_nx(struct page *page, int numpages)
558 {
559         unsigned long addr = (unsigned long)page_address(page);
560
561         return set_memory_nx(addr, numpages);
562 }
563 EXPORT_SYMBOL(set_pages_nx);
564
565 int set_pages_ro(struct page *page, int numpages)
566 {
567         unsigned long addr = (unsigned long)page_address(page);
568
569         return set_memory_ro(addr, numpages);
570 }
571
572 int set_pages_rw(struct page *page, int numpages)
573 {
574         unsigned long addr = (unsigned long)page_address(page);
575
576         return set_memory_rw(addr, numpages);
577 }
578
579 #ifdef CONFIG_DEBUG_PAGEALLOC
580
581 static int __set_pages_p(struct page *page, int numpages)
582 {
583         struct cpa_data cpa = { .vaddr = (unsigned long) page_address(page),
584                                 .numpages = numpages,
585                                 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
586                                 .mask_clr = __pgprot(0)};
587
588         return __change_page_attr_set_clr(&cpa);
589 }
590
591 static int __set_pages_np(struct page *page, int numpages)
592 {
593         struct cpa_data cpa = { .vaddr = (unsigned long) page_address(page),
594                                 .numpages = numpages,
595                                 .mask_set = __pgprot(0),
596                                 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW)};
597
598         return __change_page_attr_set_clr(&cpa);
599 }
600
601 void kernel_map_pages(struct page *page, int numpages, int enable)
602 {
603         if (PageHighMem(page))
604                 return;
605         if (!enable) {
606                 debug_check_no_locks_freed(page_address(page),
607                                            numpages * PAGE_SIZE);
608         }
609
610         /*
611          * If page allocator is not up yet then do not call c_p_a():
612          */
613         if (!debug_pagealloc_enabled)
614                 return;
615
616         /*
617          * The return value is ignored - the calls cannot fail,
618          * large pages are disabled at boot time:
619          */
620         if (enable)
621                 __set_pages_p(page, numpages);
622         else
623                 __set_pages_np(page, numpages);
624
625         /*
626          * We should perform an IPI and flush all tlbs,
627          * but that can deadlock->flush only current cpu:
628          */
629         __flush_tlb_all();
630 }
631 #endif
632
633 /*
634  * The testcases use internal knowledge of the implementation that shouldn't
635  * be exposed to the rest of the kernel. Include these directly here.
636  */
637 #ifdef CONFIG_CPA_DEBUG
638 #include "pageattr-test.c"
639 #endif