arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32 #include "xen.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/export.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/mman.h>
  42 #include <linux/highmem.h>
  43 #include <linux/iommu.h>
  44 #include <linux/intel-iommu.h>
  45 #include <linux/cpufreq.h>
  46 #include <linux/user-return-notifier.h>
  47 #include <linux/srcu.h>
  48 #include <linux/slab.h>
  49 #include <linux/perf_event.h>
  50 #include <linux/uaccess.h>
  51 #include <linux/hash.h>
  52 #include <linux/pci.h>
  53 #include <linux/timekeeper_internal.h>
  54 #include <linux/pvclock_gtod.h>
  55 #include <linux/kvm_irqfd.h>
  56 #include <linux/irqbypass.h>
  57 #include <linux/sched/stat.h>
  58 #include <linux/sched/isolation.h>
  59 #include <linux/mem_encrypt.h>
  60 #include <linux/entry-kvm.h>
  61
  62 #include <trace/events/kvm.h>
  63
  64 #include <asm/debugreg.h>
  65 #include <asm/msr.h>
  66 #include <asm/desc.h>
  67 #include <asm/mce.h>
  68 #include <linux/kernel_stat.h>
  69 #include <asm/fpu/internal.h> /* Ugh! */
  70 #include <asm/pvclock.h>
  71 #include <asm/div64.h>
  72 #include <asm/irq_remapping.h>
  73 #include <asm/mshyperv.h>
  74 #include <asm/hypervisor.h>
  75 #include <asm/tlbflush.h>
  76 #include <asm/intel_pt.h>
  77 #include <asm/emulate_prefix.h>
  78 #include <clocksource/hyperv_timer.h>
  79
  80 #define CREATE_TRACE_POINTS
  81 #include "trace.h"
  82
  83 #define MAX_IO_MSRS 256
  84 #define KVM_MAX_MCE_BANKS 32
  85 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  86 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  87
  88 #define emul_to_vcpu(ctxt) \
  89         ((struct kvm_vcpu *)(ctxt)->vcpu)
  90
  91 /* EFER defaults:
  92  * - enable syscall per default because its emulated by KVM
  93  * - enable LME and LMA per default on 64 bit KVM
  94  */
  95 #ifdef CONFIG_X86_64
  96 static
  97 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  98 #else
  99 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
 100 #endif
 101
 102 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 103
 104 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 105                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 106
 107 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 108 static void process_nmi(struct kvm_vcpu *vcpu);
 109 static void process_smi(struct kvm_vcpu *vcpu);
 110 static void enter_smm(struct kvm_vcpu *vcpu);
 111 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 112 static void store_regs(struct kvm_vcpu *vcpu);
 113 static int sync_regs(struct kvm_vcpu *vcpu);
 114
 115 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 116 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 117
 118 #define KVM_X86_OP(func)                                             \
 119         DEFINE_STATIC_CALL_NULL(kvm_x86_##func,                      \
 120                                 *(((struct kvm_x86_ops *)0)->func));
 121 #define KVM_X86_OP_NULL KVM_X86_OP
 122 #include <asm/kvm-x86-ops.h>
 123 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
 124 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
 125 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current);
 126
 127 static bool __read_mostly ignore_msrs = 0;
 128 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 129
 130 bool __read_mostly report_ignored_msrs = true;
 131 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 132 EXPORT_SYMBOL_GPL(report_ignored_msrs);
 133
 134 unsigned int min_timer_period_us = 200;
 135 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 136
 137 static bool __read_mostly kvmclock_periodic_sync = true;
 138 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 139
 140 bool __read_mostly kvm_has_tsc_control;
 141 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 142 u32  __read_mostly kvm_max_guest_tsc_khz;
 143 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 144 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 145 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 146 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 147 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 148 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 149 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 150 bool __read_mostly kvm_has_bus_lock_exit;
 151 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
 152
 153 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 154 static u32 __read_mostly tsc_tolerance_ppm = 250;
 155 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 156
 157 /*
 158  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 159  * adaptive tuning starting from default advancment of 1000ns.  '0' disables
 160  * advancement entirely.  Any other value is used as-is and disables adaptive
 161  * tuning, i.e. allows priveleged userspace to set an exact advancement time.
 162  */
 163 static int __read_mostly lapic_timer_advance_ns = -1;
 164 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 165
 166 static bool __read_mostly vector_hashing = true;
 167 module_param(vector_hashing, bool, S_IRUGO);
 168
 169 bool __read_mostly enable_vmware_backdoor = false;
 170 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 171 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 172
 173 static bool __read_mostly force_emulation_prefix = false;
 174 module_param(force_emulation_prefix, bool, S_IRUGO);
 175
 176 int __read_mostly pi_inject_timer = -1;
 177 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 178
 179 /*
 180  * Restoring the host value for MSRs that are only consumed when running in
 181  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 182  * returns to userspace, i.e. the kernel can run with the guest's value.
 183  */
 184 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 185
 186 struct kvm_user_return_msrs_global {
 187         int nr;
 188         u32 msrs[KVM_MAX_NR_USER_RETURN_MSRS];
 189 };
 190
 191 struct kvm_user_return_msrs {
 192         struct user_return_notifier urn;
 193         bool registered;
 194         struct kvm_user_return_msr_values {
 195                 u64 host;
 196                 u64 curr;
 197         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 198 };
 199
 200 static struct kvm_user_return_msrs_global __read_mostly user_return_msrs_global;
 201 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 202
 203 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 204                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 205                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 206                                 | XFEATURE_MASK_PKRU)
 207
 208 u64 __read_mostly host_efer;
 209 EXPORT_SYMBOL_GPL(host_efer);
 210
 211 bool __read_mostly allow_smaller_maxphyaddr = 0;
 212 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 213
 214 u64 __read_mostly host_xss;
 215 EXPORT_SYMBOL_GPL(host_xss);
 216 u64 __read_mostly supported_xss;
 217 EXPORT_SYMBOL_GPL(supported_xss);
 218
 219 struct kvm_stats_debugfs_item debugfs_entries[] = {
 220         VCPU_STAT("pf_fixed", pf_fixed),
 221         VCPU_STAT("pf_guest", pf_guest),
 222         VCPU_STAT("tlb_flush", tlb_flush),
 223         VCPU_STAT("invlpg", invlpg),
 224         VCPU_STAT("exits", exits),
 225         VCPU_STAT("io_exits", io_exits),
 226         VCPU_STAT("mmio_exits", mmio_exits),
 227         VCPU_STAT("signal_exits", signal_exits),
 228         VCPU_STAT("irq_window", irq_window_exits),
 229         VCPU_STAT("nmi_window", nmi_window_exits),
 230         VCPU_STAT("halt_exits", halt_exits),
 231         VCPU_STAT("halt_successful_poll", halt_successful_poll),
 232         VCPU_STAT("halt_attempted_poll", halt_attempted_poll),
 233         VCPU_STAT("halt_poll_invalid", halt_poll_invalid),
 234         VCPU_STAT("halt_wakeup", halt_wakeup),
 235         VCPU_STAT("hypercalls", hypercalls),
 236         VCPU_STAT("request_irq", request_irq_exits),
 237         VCPU_STAT("irq_exits", irq_exits),
 238         VCPU_STAT("host_state_reload", host_state_reload),
 239         VCPU_STAT("fpu_reload", fpu_reload),
 240         VCPU_STAT("insn_emulation", insn_emulation),
 241         VCPU_STAT("insn_emulation_fail", insn_emulation_fail),
 242         VCPU_STAT("irq_injections", irq_injections),
 243         VCPU_STAT("nmi_injections", nmi_injections),
 244         VCPU_STAT("req_event", req_event),
 245         VCPU_STAT("l1d_flush", l1d_flush),
 246         VCPU_STAT("halt_poll_success_ns", halt_poll_success_ns),
 247         VCPU_STAT("halt_poll_fail_ns", halt_poll_fail_ns),
 248         VM_STAT("mmu_shadow_zapped", mmu_shadow_zapped),
 249         VM_STAT("mmu_pte_write", mmu_pte_write),
 250         VM_STAT("mmu_pde_zapped", mmu_pde_zapped),
 251         VM_STAT("mmu_flooded", mmu_flooded),
 252         VM_STAT("mmu_recycled", mmu_recycled),
 253         VM_STAT("mmu_cache_miss", mmu_cache_miss),
 254         VM_STAT("mmu_unsync", mmu_unsync),
 255         VM_STAT("remote_tlb_flush", remote_tlb_flush),
 256         VM_STAT("largepages", lpages, .mode = 0444),
 257         VM_STAT("nx_largepages_splitted", nx_lpage_splits, .mode = 0444),
 258         VM_STAT("max_mmu_page_hash_collisions", max_mmu_page_hash_collisions),
 259         { NULL }
 260 };
 261
 262 u64 __read_mostly host_xcr0;
 263 u64 __read_mostly supported_xcr0;
 264 EXPORT_SYMBOL_GPL(supported_xcr0);
 265
 266 static struct kmem_cache *x86_fpu_cache;
 267
 268 static struct kmem_cache *x86_emulator_cache;
 269
 270 /*
 271  * When called, it means the previous get/set msr reached an invalid msr.
 272  * Return true if we want to ignore/silent this failed msr access.
 273  */
 274 static bool kvm_msr_ignored_check(struct kvm_vcpu *vcpu, u32 msr,
 275                                   u64 data, bool write)
 276 {
 277         const char *op = write ? "wrmsr" : "rdmsr";
 278
 279         if (ignore_msrs) {
 280                 if (report_ignored_msrs)
 281                         kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
 282                                       op, msr, data);
 283                 /* Mask the error */
 284                 return true;
 285         } else {
 286                 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
 287                                       op, msr, data);
 288                 return false;
 289         }
 290 }
 291
 292 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 293 {
 294         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 295         unsigned int size = sizeof(struct x86_emulate_ctxt);
 296
 297         return kmem_cache_create_usercopy("x86_emulator", size,
 298                                           __alignof__(struct x86_emulate_ctxt),
 299                                           SLAB_ACCOUNT, useroffset,
 300                                           size - useroffset, NULL);
 301 }
 302
 303 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 304
 305 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 306 {
 307         int i;
 308         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 309                 vcpu->arch.apf.gfns[i] = ~0;
 310 }
 311
 312 static void kvm_on_user_return(struct user_return_notifier *urn)
 313 {
 314         unsigned slot;
 315         struct kvm_user_return_msrs *msrs
 316                 = container_of(urn, struct kvm_user_return_msrs, urn);
 317         struct kvm_user_return_msr_values *values;
 318         unsigned long flags;
 319
 320         /*
 321          * Disabling irqs at this point since the following code could be
 322          * interrupted and executed through kvm_arch_hardware_disable()
 323          */
 324         local_irq_save(flags);
 325         if (msrs->registered) {
 326                 msrs->registered = false;
 327                 user_return_notifier_unregister(urn);
 328         }
 329         local_irq_restore(flags);
 330         for (slot = 0; slot < user_return_msrs_global.nr; ++slot) {
 331                 values = &msrs->values[slot];
 332                 if (values->host != values->curr) {
 333                         wrmsrl(user_return_msrs_global.msrs[slot], values->host);
 334                         values->curr = values->host;
 335                 }
 336         }
 337 }
 338
 339 void kvm_define_user_return_msr(unsigned slot, u32 msr)
 340 {
 341         BUG_ON(slot >= KVM_MAX_NR_USER_RETURN_MSRS);
 342         user_return_msrs_global.msrs[slot] = msr;
 343         if (slot >= user_return_msrs_global.nr)
 344                 user_return_msrs_global.nr = slot + 1;
 345 }
 346 EXPORT_SYMBOL_GPL(kvm_define_user_return_msr);
 347
 348 static void kvm_user_return_msr_cpu_online(void)
 349 {
 350         unsigned int cpu = smp_processor_id();
 351         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 352         u64 value;
 353         int i;
 354
 355         for (i = 0; i < user_return_msrs_global.nr; ++i) {
 356                 rdmsrl_safe(user_return_msrs_global.msrs[i], &value);
 357                 msrs->values[i].host = value;
 358                 msrs->values[i].curr = value;
 359         }
 360 }
 361
 362 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 363 {
 364         unsigned int cpu = smp_processor_id();
 365         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 366         int err;
 367
 368         value = (value & mask) | (msrs->values[slot].host & ~mask);
 369         if (value == msrs->values[slot].curr)
 370                 return 0;
 371         err = wrmsrl_safe(user_return_msrs_global.msrs[slot], value);
 372         if (err)
 373                 return 1;
 374
 375         msrs->values[slot].curr = value;
 376         if (!msrs->registered) {
 377                 msrs->urn.on_user_return = kvm_on_user_return;
 378                 user_return_notifier_register(&msrs->urn);
 379                 msrs->registered = true;
 380         }
 381         return 0;
 382 }
 383 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 384
 385 static void drop_user_return_notifiers(void)
 386 {
 387         unsigned int cpu = smp_processor_id();
 388         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 389
 390         if (msrs->registered)
 391                 kvm_on_user_return(&msrs->urn);
 392 }
 393
 394 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 395 {
 396         return vcpu->arch.apic_base;
 397 }
 398 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 399
 400 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 401 {
 402         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 403 }
 404 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 405
 406 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 407 {
 408         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 409         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 410         u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
 411                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 412
 413         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 414                 return 1;
 415         if (!msr_info->host_initiated) {
 416                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 417                         return 1;
 418                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 419                         return 1;
 420         }
 421
 422         kvm_lapic_set_base(vcpu, msr_info->data);
 423         kvm_recalculate_apic_map(vcpu->kvm);
 424         return 0;
 425 }
 426 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 427
 428 asmlinkage __visible noinstr void kvm_spurious_fault(void)
 429 {
 430         /* Fault while not rebooting.  We want the trace. */
 431         BUG_ON(!kvm_rebooting);
 432 }
 433 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 434
 435 #define EXCPT_BENIGN            0
 436 #define EXCPT_CONTRIBUTORY      1
 437 #define EXCPT_PF                2
 438
 439 static int exception_class(int vector)
 440 {
 441         switch (vector) {
 442         case PF_VECTOR:
 443                 return EXCPT_PF;
 444         case DE_VECTOR:
 445         case TS_VECTOR:
 446         case NP_VECTOR:
 447         case SS_VECTOR:
 448         case GP_VECTOR:
 449                 return EXCPT_CONTRIBUTORY;
 450         default:
 451                 break;
 452         }
 453         return EXCPT_BENIGN;
 454 }
 455
 456 #define EXCPT_FAULT             0
 457 #define EXCPT_TRAP              1
 458 #define EXCPT_ABORT             2
 459 #define EXCPT_INTERRUPT         3
 460
 461 static int exception_type(int vector)
 462 {
 463         unsigned int mask;
 464
 465         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 466                 return EXCPT_INTERRUPT;
 467
 468         mask = 1 << vector;
 469
 470         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 471         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 472                 return EXCPT_TRAP;
 473
 474         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 475                 return EXCPT_ABORT;
 476
 477         /* Reserved exceptions will result in fault */
 478         return EXCPT_FAULT;
 479 }
 480
 481 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 482 {
 483         unsigned nr = vcpu->arch.exception.nr;
 484         bool has_payload = vcpu->arch.exception.has_payload;
 485         unsigned long payload = vcpu->arch.exception.payload;
 486
 487         if (!has_payload)
 488                 return;
 489
 490         switch (nr) {
 491         case DB_VECTOR:
 492                 /*
 493                  * "Certain debug exceptions may clear bit 0-3.  The
 494                  * remaining contents of the DR6 register are never
 495                  * cleared by the processor".
 496                  */
 497                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 498                 /*
 499                  * In order to reflect the #DB exception payload in guest
 500                  * dr6, three components need to be considered: active low
 501                  * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
 502                  * DR6_BS and DR6_BT)
 503                  * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
 504                  * In the target guest dr6:
 505                  * FIXED_1 bits should always be set.
 506                  * Active low bits should be cleared if 1-setting in payload.
 507                  * Active high bits should be set if 1-setting in payload.
 508                  *
 509                  * Note, the payload is compatible with the pending debug
 510                  * exceptions/exit qualification under VMX, that active_low bits
 511                  * are active high in payload.
 512                  * So they need to be flipped for DR6.
 513                  */
 514                 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
 515                 vcpu->arch.dr6 |= payload;
 516                 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
 517
 518                 /*
 519                  * The #DB payload is defined as compatible with the 'pending
 520                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 521                  * defined in the 'pending debug exceptions' field (enabled
 522                  * breakpoint), it is reserved and must be zero in DR6.
 523                  */
 524                 vcpu->arch.dr6 &= ~BIT(12);
 525                 break;
 526         case PF_VECTOR:
 527                 vcpu->arch.cr2 = payload;
 528                 break;
 529         }
 530
 531         vcpu->arch.exception.has_payload = false;
 532         vcpu->arch.exception.payload = 0;
 533 }
 534 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 535
 536 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 537                 unsigned nr, bool has_error, u32 error_code,
 538                 bool has_payload, unsigned long payload, bool reinject)
 539 {
 540         u32 prev_nr;
 541         int class1, class2;
 542
 543         kvm_make_request(KVM_REQ_EVENT, vcpu);
 544
 545         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 546         queue:
 547                 if (has_error && !is_protmode(vcpu))
 548                         has_error = false;
 549                 if (reinject) {
 550                         /*
 551                          * On vmentry, vcpu->arch.exception.pending is only
 552                          * true if an event injection was blocked by
 553                          * nested_run_pending.  In that case, however,
 554                          * vcpu_enter_guest requests an immediate exit,
 555                          * and the guest shouldn't proceed far enough to
 556                          * need reinjection.
 557                          */
 558                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 559                         vcpu->arch.exception.injected = true;
 560                         if (WARN_ON_ONCE(has_payload)) {
 561                                 /*
 562                                  * A reinjected event has already
 563                                  * delivered its payload.
 564                                  */
 565                                 has_payload = false;
 566                                 payload = 0;
 567                         }
 568                 } else {
 569                         vcpu->arch.exception.pending = true;
 570                         vcpu->arch.exception.injected = false;
 571                 }
 572                 vcpu->arch.exception.has_error_code = has_error;
 573                 vcpu->arch.exception.nr = nr;
 574                 vcpu->arch.exception.error_code = error_code;
 575                 vcpu->arch.exception.has_payload = has_payload;
 576                 vcpu->arch.exception.payload = payload;
 577                 if (!is_guest_mode(vcpu))
 578                         kvm_deliver_exception_payload(vcpu);
 579                 return;
 580         }
 581
 582         /* to check exception */
 583         prev_nr = vcpu->arch.exception.nr;
 584         if (prev_nr == DF_VECTOR) {
 585                 /* triple fault -> shutdown */
 586                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 587                 return;
 588         }
 589         class1 = exception_class(prev_nr);
 590         class2 = exception_class(nr);
 591         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 592                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 593                 /*
 594                  * Generate double fault per SDM Table 5-5.  Set
 595                  * exception.pending = true so that the double fault
 596                  * can trigger a nested vmexit.
 597                  */
 598                 vcpu->arch.exception.pending = true;
 599                 vcpu->arch.exception.injected = false;
 600                 vcpu->arch.exception.has_error_code = true;
 601                 vcpu->arch.exception.nr = DF_VECTOR;
 602                 vcpu->arch.exception.error_code = 0;
 603                 vcpu->arch.exception.has_payload = false;
 604                 vcpu->arch.exception.payload = 0;
 605         } else
 606                 /* replace previous exception with a new one in a hope
 607                    that instruction re-execution will regenerate lost
 608                    exception */
 609                 goto queue;
 610 }
 611
 612 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 613 {
 614         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 615 }
 616 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 617
 618 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 619 {
 620         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 621 }
 622 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 623
 624 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 625                            unsigned long payload)
 626 {
 627         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 628 }
 629 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 630
 631 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 632                                     u32 error_code, unsigned long payload)
 633 {
 634         kvm_multiple_exception(vcpu, nr, true, error_code,
 635                                true, payload, false);
 636 }
 637
 638 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 639 {
 640         if (err)
 641                 kvm_inject_gp(vcpu, 0);
 642         else
 643                 return kvm_skip_emulated_instruction(vcpu);
 644
 645         return 1;
 646 }
 647 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 648
 649 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 650 {
 651         ++vcpu->stat.pf_guest;
 652         vcpu->arch.exception.nested_apf =
 653                 is_guest_mode(vcpu) && fault->async_page_fault;
 654         if (vcpu->arch.exception.nested_apf) {
 655                 vcpu->arch.apf.nested_apf_token = fault->address;
 656                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 657         } else {
 658                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 659                                         fault->address);
 660         }
 661 }
 662 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 663
 664 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 665                                     struct x86_exception *fault)
 666 {
 667         struct kvm_mmu *fault_mmu;
 668         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 669
 670         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 671                                                vcpu->arch.walk_mmu;
 672
 673         /*
 674          * Invalidate the TLB entry for the faulting address, if it exists,
 675          * else the access will fault indefinitely (and to emulate hardware).
 676          */
 677         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 678             !(fault->error_code & PFERR_RSVD_MASK))
 679                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 680                                        fault_mmu->root_hpa);
 681
 682         fault_mmu->inject_page_fault(vcpu, fault);
 683         return fault->nested_page_fault;
 684 }
 685 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 686
 687 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 688 {
 689         atomic_inc(&vcpu->arch.nmi_queued);
 690         kvm_make_request(KVM_REQ_NMI, vcpu);
 691 }
 692 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 693
 694 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 695 {
 696         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 697 }
 698 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 699
 700 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 701 {
 702         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 703 }
 704 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 705
 706 /*
 707  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 708  * a #GP and return false.
 709  */
 710 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 711 {
 712         if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
 713                 return true;
 714         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 715         return false;
 716 }
 717 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 718
 719 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 720 {
 721         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 722                 return true;
 723
 724         kvm_queue_exception(vcpu, UD_VECTOR);
 725         return false;
 726 }
 727 EXPORT_SYMBOL_GPL(kvm_require_dr);
 728
 729 /*
 730  * This function will be used to read from the physical memory of the currently
 731  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 732  * can read from guest physical or from the guest's guest physical memory.
 733  */
 734 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 735                             gfn_t ngfn, void *data, int offset, int len,
 736                             u32 access)
 737 {
 738         struct x86_exception exception;
 739         gfn_t real_gfn;
 740         gpa_t ngpa;
 741
 742         ngpa     = gfn_to_gpa(ngfn);
 743         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 744         if (real_gfn == UNMAPPED_GVA)
 745                 return -EFAULT;
 746
 747         real_gfn = gpa_to_gfn(real_gfn);
 748
 749         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 750 }
 751 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 752
 753 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 754                                void *data, int offset, int len, u32 access)
 755 {
 756         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 757                                        data, offset, len, access);
 758 }
 759
 760 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 761 {
 762         return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
 763 }
 764
 765 /*
 766  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 767  */
 768 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 769 {
 770         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 771         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 772         int i;
 773         int ret;
 774         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 775
 776         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 777                                       offset * sizeof(u64), sizeof(pdpte),
 778                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 779         if (ret < 0) {
 780                 ret = 0;
 781                 goto out;
 782         }
 783         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 784                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 785                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 786                         ret = 0;
 787                         goto out;
 788                 }
 789         }
 790         ret = 1;
 791
 792         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 793         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 794
 795 out:
 796
 797         return ret;
 798 }
 799 EXPORT_SYMBOL_GPL(load_pdptrs);
 800
 801 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 802 {
 803         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 804         int offset;
 805         gfn_t gfn;
 806         int r;
 807
 808         if (!is_pae_paging(vcpu))
 809                 return false;
 810
 811         if (!kvm_register_is_available(vcpu, VCPU_EXREG_PDPTR))
 812                 return true;
 813
 814         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 815         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 816         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 817                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 818         if (r < 0)
 819                 return true;
 820
 821         return memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 822 }
 823 EXPORT_SYMBOL_GPL(pdptrs_changed);
 824
 825 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
 826 {
 827         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 828
 829         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 830                 kvm_clear_async_pf_completion_queue(vcpu);
 831                 kvm_async_pf_hash_reset(vcpu);
 832         }
 833
 834         if ((cr0 ^ old_cr0) & update_bits)
 835                 kvm_mmu_reset_context(vcpu);
 836
 837         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 838             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 839             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 840                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 841 }
 842 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
 843
 844 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 845 {
 846         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 847         unsigned long pdptr_bits = X86_CR0_CD | X86_CR0_NW | X86_CR0_PG;
 848
 849         cr0 |= X86_CR0_ET;
 850
 851 #ifdef CONFIG_X86_64
 852         if (cr0 & 0xffffffff00000000UL)
 853                 return 1;
 854 #endif
 855
 856         cr0 &= ~CR0_RESERVED_BITS;
 857
 858         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 859                 return 1;
 860
 861         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 862                 return 1;
 863
 864 #ifdef CONFIG_X86_64
 865         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 866             (cr0 & X86_CR0_PG)) {
 867                 int cs_db, cs_l;
 868
 869                 if (!is_pae(vcpu))
 870                         return 1;
 871                 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
 872                 if (cs_l)
 873                         return 1;
 874         }
 875 #endif
 876         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 877             is_pae(vcpu) && ((cr0 ^ old_cr0) & pdptr_bits) &&
 878             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)))
 879                 return 1;
 880
 881         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 882                 return 1;
 883
 884         static_call(kvm_x86_set_cr0)(vcpu, cr0);
 885
 886         kvm_post_set_cr0(vcpu, old_cr0, cr0);
 887
 888         return 0;
 889 }
 890 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 891
 892 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 893 {
 894         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 895 }
 896 EXPORT_SYMBOL_GPL(kvm_lmsw);
 897
 898 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 899 {
 900         if (vcpu->arch.guest_state_protected)
 901                 return;
 902
 903         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 904
 905                 if (vcpu->arch.xcr0 != host_xcr0)
 906                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 907
 908                 if (vcpu->arch.xsaves_enabled &&
 909                     vcpu->arch.ia32_xss != host_xss)
 910                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 911         }
 912
 913         if (static_cpu_has(X86_FEATURE_PKU) &&
 914             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 915              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
 916             vcpu->arch.pkru != vcpu->arch.host_pkru)
 917                 __write_pkru(vcpu->arch.pkru);
 918 }
 919 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 920
 921 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 922 {
 923         if (vcpu->arch.guest_state_protected)
 924                 return;
 925
 926         if (static_cpu_has(X86_FEATURE_PKU) &&
 927             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 928              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
 929                 vcpu->arch.pkru = rdpkru();
 930                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
 931                         __write_pkru(vcpu->arch.host_pkru);
 932         }
 933
 934         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 935
 936                 if (vcpu->arch.xcr0 != host_xcr0)
 937                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 938
 939                 if (vcpu->arch.xsaves_enabled &&
 940                     vcpu->arch.ia32_xss != host_xss)
 941                         wrmsrl(MSR_IA32_XSS, host_xss);
 942         }
 943
 944 }
 945 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
 946
 947 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 948 {
 949         u64 xcr0 = xcr;
 950         u64 old_xcr0 = vcpu->arch.xcr0;
 951         u64 valid_bits;
 952
 953         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 954         if (index != XCR_XFEATURE_ENABLED_MASK)
 955                 return 1;
 956         if (!(xcr0 & XFEATURE_MASK_FP))
 957                 return 1;
 958         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 959                 return 1;
 960
 961         /*
 962          * Do not allow the guest to set bits that we do not support
 963          * saving.  However, xcr0 bit 0 is always set, even if the
 964          * emulated CPU does not support XSAVE (see fx_init).
 965          */
 966         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 967         if (xcr0 & ~valid_bits)
 968                 return 1;
 969
 970         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 971             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 972                 return 1;
 973
 974         if (xcr0 & XFEATURE_MASK_AVX512) {
 975                 if (!(xcr0 & XFEATURE_MASK_YMM))
 976                         return 1;
 977                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 978                         return 1;
 979         }
 980         vcpu->arch.xcr0 = xcr0;
 981
 982         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 983                 kvm_update_cpuid_runtime(vcpu);
 984         return 0;
 985 }
 986
 987 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 988 {
 989         if (static_call(kvm_x86_get_cpl)(vcpu) == 0)
 990                 return __kvm_set_xcr(vcpu, index, xcr);
 991
 992         return 1;
 993 }
 994 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 995
 996 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 997 {
 998         if (cr4 & cr4_reserved_bits)
 999                 return false;
1000
1001         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1002                 return false;
1003
1004         return static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1005 }
1006 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
1007
1008 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1009 {
1010         unsigned long mmu_role_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1011                                       X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
1012
1013         if (((cr4 ^ old_cr4) & mmu_role_bits) ||
1014             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1015                 kvm_mmu_reset_context(vcpu);
1016 }
1017 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1018
1019 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1020 {
1021         unsigned long old_cr4 = kvm_read_cr4(vcpu);
1022         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1023                                    X86_CR4_SMEP;
1024
1025         if (!kvm_is_valid_cr4(vcpu, cr4))
1026                 return 1;
1027
1028         if (is_long_mode(vcpu)) {
1029                 if (!(cr4 & X86_CR4_PAE))
1030                         return 1;
1031                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1032                         return 1;
1033         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1034                    && ((cr4 ^ old_cr4) & pdptr_bits)
1035                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
1036                                    kvm_read_cr3(vcpu)))
1037                 return 1;
1038
1039         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1040                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1041                         return 1;
1042
1043                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1044                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1045                         return 1;
1046         }
1047
1048         static_call(kvm_x86_set_cr4)(vcpu, cr4);
1049
1050         kvm_post_set_cr4(vcpu, old_cr4, cr4);
1051
1052         return 0;
1053 }
1054 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1055
1056 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1057 {
1058         bool skip_tlb_flush = false;
1059 #ifdef CONFIG_X86_64
1060         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1061
1062         if (pcid_enabled) {
1063                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1064                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1065         }
1066 #endif
1067
1068         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
1069                 if (!skip_tlb_flush) {
1070                         kvm_mmu_sync_roots(vcpu);
1071                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1072                 }
1073                 return 0;
1074         }
1075
1076         if (is_long_mode(vcpu) && kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1077                 return 1;
1078         else if (is_pae_paging(vcpu) &&
1079                  !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
1080                 return 1;
1081
1082         kvm_mmu_new_pgd(vcpu, cr3, skip_tlb_flush, skip_tlb_flush);
1083         vcpu->arch.cr3 = cr3;
1084         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
1085
1086         return 0;
1087 }
1088 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1089
1090 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1091 {
1092         if (cr8 & CR8_RESERVED_BITS)
1093                 return 1;
1094         if (lapic_in_kernel(vcpu))
1095                 kvm_lapic_set_tpr(vcpu, cr8);
1096         else
1097                 vcpu->arch.cr8 = cr8;
1098         return 0;
1099 }
1100 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1101
1102 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1103 {
1104         if (lapic_in_kernel(vcpu))
1105                 return kvm_lapic_get_cr8(vcpu);
1106         else
1107                 return vcpu->arch.cr8;
1108 }
1109 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1110
1111 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1112 {
1113         int i;
1114
1115         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1116                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1117                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1118                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1119         }
1120 }
1121
1122 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1123 {
1124         unsigned long dr7;
1125
1126         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1127                 dr7 = vcpu->arch.guest_debug_dr7;
1128         else
1129                 dr7 = vcpu->arch.dr7;
1130         static_call(kvm_x86_set_dr7)(vcpu, dr7);
1131         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1132         if (dr7 & DR7_BP_EN_MASK)
1133                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1134 }
1135 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1136
1137 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1138 {
1139         u64 fixed = DR6_FIXED_1;
1140
1141         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1142                 fixed |= DR6_RTM;
1143         return fixed;
1144 }
1145
1146 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1147 {
1148         size_t size = ARRAY_SIZE(vcpu->arch.db);
1149
1150         switch (dr) {
1151         case 0 ... 3:
1152                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1153                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1154                         vcpu->arch.eff_db[dr] = val;
1155                 break;
1156         case 4:
1157         case 6:
1158                 if (!kvm_dr6_valid(val))
1159                         return 1; /* #GP */
1160                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1161                 break;
1162         case 5:
1163         default: /* 7 */
1164                 if (!kvm_dr7_valid(val))
1165                         return 1; /* #GP */
1166                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1167                 kvm_update_dr7(vcpu);
1168                 break;
1169         }
1170
1171         return 0;
1172 }
1173 EXPORT_SYMBOL_GPL(kvm_set_dr);
1174
1175 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1176 {
1177         size_t size = ARRAY_SIZE(vcpu->arch.db);
1178
1179         switch (dr) {
1180         case 0 ... 3:
1181                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1182                 break;
1183         case 4:
1184         case 6:
1185                 *val = vcpu->arch.dr6;
1186                 break;
1187         case 5:
1188         default: /* 7 */
1189                 *val = vcpu->arch.dr7;
1190                 break;
1191         }
1192 }
1193 EXPORT_SYMBOL_GPL(kvm_get_dr);
1194
1195 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
1196 {
1197         u32 ecx = kvm_rcx_read(vcpu);
1198         u64 data;
1199         int err;
1200
1201         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
1202         if (err)
1203                 return err;
1204         kvm_rax_write(vcpu, (u32)data);
1205         kvm_rdx_write(vcpu, data >> 32);
1206         return err;
1207 }
1208 EXPORT_SYMBOL_GPL(kvm_rdpmc);
1209
1210 /*
1211  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1212  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1213  *
1214  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1215  * extract the supported MSRs from the related const lists.
1216  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1217  * capabilities of the host cpu. This capabilities test skips MSRs that are
1218  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1219  * may depend on host virtualization features rather than host cpu features.
1220  */
1221
1222 static const u32 msrs_to_save_all[] = {
1223         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1224         MSR_STAR,
1225 #ifdef CONFIG_X86_64
1226         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1227 #endif
1228         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1229         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1230         MSR_IA32_SPEC_CTRL,
1231         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1232         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1233         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1234         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1235         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1236         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1237         MSR_IA32_UMWAIT_CONTROL,
1238
1239         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1240         MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1241         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1242         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1243         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1244         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1245         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1246         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1247         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1248         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1249         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1250         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1251         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1252         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1253         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1254         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1255         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1256         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1257         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1258         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1259         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1260         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1261 };
1262
1263 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1264 static unsigned num_msrs_to_save;
1265
1266 static const u32 emulated_msrs_all[] = {
1267         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1268         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1269         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1270         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1271         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1272         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1273         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1274         HV_X64_MSR_RESET,
1275         HV_X64_MSR_VP_INDEX,
1276         HV_X64_MSR_VP_RUNTIME,
1277         HV_X64_MSR_SCONTROL,
1278         HV_X64_MSR_STIMER0_CONFIG,
1279         HV_X64_MSR_VP_ASSIST_PAGE,
1280         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1281         HV_X64_MSR_TSC_EMULATION_STATUS,
1282         HV_X64_MSR_SYNDBG_OPTIONS,
1283         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1284         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1285         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1286
1287         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1288         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1289
1290         MSR_IA32_TSC_ADJUST,
1291         MSR_IA32_TSCDEADLINE,
1292         MSR_IA32_ARCH_CAPABILITIES,
1293         MSR_IA32_PERF_CAPABILITIES,
1294         MSR_IA32_MISC_ENABLE,
1295         MSR_IA32_MCG_STATUS,
1296         MSR_IA32_MCG_CTL,
1297         MSR_IA32_MCG_EXT_CTL,
1298         MSR_IA32_SMBASE,
1299         MSR_SMI_COUNT,
1300         MSR_PLATFORM_INFO,
1301         MSR_MISC_FEATURES_ENABLES,
1302         MSR_AMD64_VIRT_SPEC_CTRL,
1303         MSR_IA32_POWER_CTL,
1304         MSR_IA32_UCODE_REV,
1305
1306         /*
1307          * The following list leaves out MSRs whose values are determined
1308          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1309          * We always support the "true" VMX control MSRs, even if the host
1310          * processor does not, so I am putting these registers here rather
1311          * than in msrs_to_save_all.
1312          */
1313         MSR_IA32_VMX_BASIC,
1314         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1315         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1316         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1317         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1318         MSR_IA32_VMX_MISC,
1319         MSR_IA32_VMX_CR0_FIXED0,
1320         MSR_IA32_VMX_CR4_FIXED0,
1321         MSR_IA32_VMX_VMCS_ENUM,
1322         MSR_IA32_VMX_PROCBASED_CTLS2,
1323         MSR_IA32_VMX_EPT_VPID_CAP,
1324         MSR_IA32_VMX_VMFUNC,
1325
1326         MSR_K7_HWCR,
1327         MSR_KVM_POLL_CONTROL,
1328 };
1329
1330 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1331 static unsigned num_emulated_msrs;
1332
1333 /*
1334  * List of msr numbers which are used to expose MSR-based features that
1335  * can be used by a hypervisor to validate requested CPU features.
1336  */
1337 static const u32 msr_based_features_all[] = {
1338         MSR_IA32_VMX_BASIC,
1339         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1340         MSR_IA32_VMX_PINBASED_CTLS,
1341         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1342         MSR_IA32_VMX_PROCBASED_CTLS,
1343         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1344         MSR_IA32_VMX_EXIT_CTLS,
1345         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1346         MSR_IA32_VMX_ENTRY_CTLS,
1347         MSR_IA32_VMX_MISC,
1348         MSR_IA32_VMX_CR0_FIXED0,
1349         MSR_IA32_VMX_CR0_FIXED1,
1350         MSR_IA32_VMX_CR4_FIXED0,
1351         MSR_IA32_VMX_CR4_FIXED1,
1352         MSR_IA32_VMX_VMCS_ENUM,
1353         MSR_IA32_VMX_PROCBASED_CTLS2,
1354         MSR_IA32_VMX_EPT_VPID_CAP,
1355         MSR_IA32_VMX_VMFUNC,
1356
1357         MSR_F10H_DECFG,
1358         MSR_IA32_UCODE_REV,
1359         MSR_IA32_ARCH_CAPABILITIES,
1360         MSR_IA32_PERF_CAPABILITIES,
1361 };
1362
1363 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1364 static unsigned int num_msr_based_features;
1365
1366 static u64 kvm_get_arch_capabilities(void)
1367 {
1368         u64 data = 0;
1369
1370         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1371                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1372
1373         /*
1374          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1375          * the nested hypervisor runs with NX huge pages.  If it is not,
1376          * L1 is anyway vulnerable to ITLB_MULTIHIT explots from other
1377          * L1 guests, so it need not worry about its own (L2) guests.
1378          */
1379         data |= ARCH_CAP_PSCHANGE_MC_NO;
1380
1381         /*
1382          * If we're doing cache flushes (either "always" or "cond")
1383          * we will do one whenever the guest does a vmlaunch/vmresume.
1384          * If an outer hypervisor is doing the cache flush for us
1385          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1386          * capability to the guest too, and if EPT is disabled we're not
1387          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1388          * require a nested hypervisor to do a flush of its own.
1389          */
1390         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1391                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1392
1393         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1394                 data |= ARCH_CAP_RDCL_NO;
1395         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1396                 data |= ARCH_CAP_SSB_NO;
1397         if (!boot_cpu_has_bug(X86_BUG_MDS))
1398                 data |= ARCH_CAP_MDS_NO;
1399
1400         if (!boot_cpu_has(X86_FEATURE_RTM)) {
1401                 /*
1402                  * If RTM=0 because the kernel has disabled TSX, the host might
1403                  * have TAA_NO or TSX_CTRL.  Clear TAA_NO (the guest sees RTM=0
1404                  * and therefore knows that there cannot be TAA) but keep
1405                  * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1406                  * and we want to allow migrating those guests to tsx=off hosts.
1407                  */
1408                 data &= ~ARCH_CAP_TAA_NO;
1409         } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1410                 data |= ARCH_CAP_TAA_NO;
1411         } else {
1412                 /*
1413                  * Nothing to do here; we emulate TSX_CTRL if present on the
1414                  * host so the guest can choose between disabling TSX or
1415                  * using VERW to clear CPU buffers.
1416                  */
1417         }
1418
1419         return data;
1420 }
1421
1422 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1423 {
1424         switch (msr->index) {
1425         case MSR_IA32_ARCH_CAPABILITIES:
1426                 msr->data = kvm_get_arch_capabilities();
1427                 break;
1428         case MSR_IA32_UCODE_REV:
1429                 rdmsrl_safe(msr->index, &msr->data);
1430                 break;
1431         default:
1432                 return static_call(kvm_x86_get_msr_feature)(msr);
1433         }
1434         return 0;
1435 }
1436
1437 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1438 {
1439         struct kvm_msr_entry msr;
1440         int r;
1441
1442         msr.index = index;
1443         r = kvm_get_msr_feature(&msr);
1444
1445         if (r == KVM_MSR_RET_INVALID) {
1446                 /* Unconditionally clear the output for simplicity */
1447                 *data = 0;
1448                 if (kvm_msr_ignored_check(vcpu, index, 0, false))
1449                         r = 0;
1450         }
1451
1452         if (r)
1453                 return r;
1454
1455         *data = msr.data;
1456
1457         return 0;
1458 }
1459
1460 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1461 {
1462         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1463                 return false;
1464
1465         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1466                 return false;
1467
1468         if (efer & (EFER_LME | EFER_LMA) &&
1469             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1470                 return false;
1471
1472         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1473                 return false;
1474
1475         return true;
1476
1477 }
1478 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1479 {
1480         if (efer & efer_reserved_bits)
1481                 return false;
1482
1483         return __kvm_valid_efer(vcpu, efer);
1484 }
1485 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1486
1487 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1488 {
1489         u64 old_efer = vcpu->arch.efer;
1490         u64 efer = msr_info->data;
1491         int r;
1492
1493         if (efer & efer_reserved_bits)
1494                 return 1;
1495
1496         if (!msr_info->host_initiated) {
1497                 if (!__kvm_valid_efer(vcpu, efer))
1498                         return 1;
1499
1500                 if (is_paging(vcpu) &&
1501                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1502                         return 1;
1503         }
1504
1505         efer &= ~EFER_LMA;
1506         efer |= vcpu->arch.efer & EFER_LMA;
1507
1508         r = static_call(kvm_x86_set_efer)(vcpu, efer);
1509         if (r) {
1510                 WARN_ON(r > 0);
1511                 return r;
1512         }
1513
1514         /* Update reserved bits */
1515         if ((efer ^ old_efer) & EFER_NX)
1516                 kvm_mmu_reset_context(vcpu);
1517
1518         return 0;
1519 }
1520
1521 void kvm_enable_efer_bits(u64 mask)
1522 {
1523        efer_reserved_bits &= ~mask;
1524 }
1525 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1526
1527 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1528 {
1529         struct kvm_x86_msr_filter *msr_filter;
1530         struct msr_bitmap_range *ranges;
1531         struct kvm *kvm = vcpu->kvm;
1532         bool allowed;
1533         int idx;
1534         u32 i;
1535
1536         /* x2APIC MSRs do not support filtering. */
1537         if (index >= 0x800 && index <= 0x8ff)
1538                 return true;
1539
1540         idx = srcu_read_lock(&kvm->srcu);
1541
1542         msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1543         if (!msr_filter) {
1544                 allowed = true;
1545                 goto out;
1546         }
1547
1548         allowed = msr_filter->default_allow;
1549         ranges = msr_filter->ranges;
1550
1551         for (i = 0; i < msr_filter->count; i++) {
1552                 u32 start = ranges[i].base;
1553                 u32 end = start + ranges[i].nmsrs;
1554                 u32 flags = ranges[i].flags;
1555                 unsigned long *bitmap = ranges[i].bitmap;
1556
1557                 if ((index >= start) && (index < end) && (flags & type)) {
1558                         allowed = !!test_bit(index - start, bitmap);
1559                         break;
1560                 }
1561         }
1562
1563 out:
1564         srcu_read_unlock(&kvm->srcu, idx);
1565
1566         return allowed;
1567 }
1568 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1569
1570 /*
1571  * Write @data into the MSR specified by @index.  Select MSR specific fault
1572  * checks are bypassed if @host_initiated is %true.
1573  * Returns 0 on success, non-0 otherwise.
1574  * Assumes vcpu_load() was already called.
1575  */
1576 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1577                          bool host_initiated)
1578 {
1579         struct msr_data msr;
1580
1581         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1582                 return KVM_MSR_RET_FILTERED;
1583
1584         switch (index) {
1585         case MSR_FS_BASE:
1586         case MSR_GS_BASE:
1587         case MSR_KERNEL_GS_BASE:
1588         case MSR_CSTAR:
1589         case MSR_LSTAR:
1590                 if (is_noncanonical_address(data, vcpu))
1591                         return 1;
1592                 break;
1593         case MSR_IA32_SYSENTER_EIP:
1594         case MSR_IA32_SYSENTER_ESP:
1595                 /*
1596                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1597                  * non-canonical address is written on Intel but not on
1598                  * AMD (which ignores the top 32-bits, because it does
1599                  * not implement 64-bit SYSENTER).
1600                  *
1601                  * 64-bit code should hence be able to write a non-canonical
1602                  * value on AMD.  Making the address canonical ensures that
1603                  * vmentry does not fail on Intel after writing a non-canonical
1604                  * value, and that something deterministic happens if the guest
1605                  * invokes 64-bit SYSENTER.
1606                  */
1607                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1608         }
1609
1610         msr.data = data;
1611         msr.index = index;
1612         msr.host_initiated = host_initiated;
1613
1614         return static_call(kvm_x86_set_msr)(vcpu, &msr);
1615 }
1616
1617 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1618                                      u32 index, u64 data, bool host_initiated)
1619 {
1620         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1621
1622         if (ret == KVM_MSR_RET_INVALID)
1623                 if (kvm_msr_ignored_check(vcpu, index, data, true))
1624                         ret = 0;
1625
1626         return ret;
1627 }
1628
1629 /*
1630  * Read the MSR specified by @index into @data.  Select MSR specific fault
1631  * checks are bypassed if @host_initiated is %true.
1632  * Returns 0 on success, non-0 otherwise.
1633  * Assumes vcpu_load() was already called.
1634  */
1635 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1636                   bool host_initiated)
1637 {
1638         struct msr_data msr;
1639         int ret;
1640
1641         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1642                 return KVM_MSR_RET_FILTERED;
1643
1644         msr.index = index;
1645         msr.host_initiated = host_initiated;
1646
1647         ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1648         if (!ret)
1649                 *data = msr.data;
1650         return ret;
1651 }
1652
1653 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1654                                      u32 index, u64 *data, bool host_initiated)
1655 {
1656         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1657
1658         if (ret == KVM_MSR_RET_INVALID) {
1659                 /* Unconditionally clear *data for simplicity */
1660                 *data = 0;
1661                 if (kvm_msr_ignored_check(vcpu, index, 0, false))
1662                         ret = 0;
1663         }
1664
1665         return ret;
1666 }
1667
1668 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1669 {
1670         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1671 }
1672 EXPORT_SYMBOL_GPL(kvm_get_msr);
1673
1674 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1675 {
1676         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1677 }
1678 EXPORT_SYMBOL_GPL(kvm_set_msr);
1679
1680 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1681 {
1682         int err = vcpu->run->msr.error;
1683         if (!err) {
1684                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1685                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1686         }
1687
1688         return static_call(kvm_x86_complete_emulated_msr)(vcpu, err);
1689 }
1690
1691 static int complete_emulated_wrmsr(struct kvm_vcpu *vcpu)
1692 {
1693         return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1694 }
1695
1696 static u64 kvm_msr_reason(int r)
1697 {
1698         switch (r) {
1699         case KVM_MSR_RET_INVALID:
1700                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1701         case KVM_MSR_RET_FILTERED:
1702                 return KVM_MSR_EXIT_REASON_FILTER;
1703         default:
1704                 return KVM_MSR_EXIT_REASON_INVAL;
1705         }
1706 }
1707
1708 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1709                               u32 exit_reason, u64 data,
1710                               int (*completion)(struct kvm_vcpu *vcpu),
1711                               int r)
1712 {
1713         u64 msr_reason = kvm_msr_reason(r);
1714
1715         /* Check if the user wanted to know about this MSR fault */
1716         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1717                 return 0;
1718
1719         vcpu->run->exit_reason = exit_reason;
1720         vcpu->run->msr.error = 0;
1721         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1722         vcpu->run->msr.reason = msr_reason;
1723         vcpu->run->msr.index = index;
1724         vcpu->run->msr.data = data;
1725         vcpu->arch.complete_userspace_io = completion;
1726
1727         return 1;
1728 }
1729
1730 static int kvm_get_msr_user_space(struct kvm_vcpu *vcpu, u32 index, int r)
1731 {
1732         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_RDMSR, 0,
1733                                    complete_emulated_rdmsr, r);
1734 }
1735
1736 static int kvm_set_msr_user_space(struct kvm_vcpu *vcpu, u32 index, u64 data, int r)
1737 {
1738         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_WRMSR, data,
1739                                    complete_emulated_wrmsr, r);
1740 }
1741
1742 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1743 {
1744         u32 ecx = kvm_rcx_read(vcpu);
1745         u64 data;
1746         int r;
1747
1748         r = kvm_get_msr(vcpu, ecx, &data);
1749
1750         /* MSR read failed? See if we should ask user space */
1751         if (r && kvm_get_msr_user_space(vcpu, ecx, r)) {
1752                 /* Bounce to user space */
1753                 return 0;
1754         }
1755
1756         if (!r) {
1757                 trace_kvm_msr_read(ecx, data);
1758
1759                 kvm_rax_write(vcpu, data & -1u);
1760                 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1761         } else {
1762                 trace_kvm_msr_read_ex(ecx);
1763         }
1764
1765         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1766 }
1767 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1768
1769 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1770 {
1771         u32 ecx = kvm_rcx_read(vcpu);
1772         u64 data = kvm_read_edx_eax(vcpu);
1773         int r;
1774
1775         r = kvm_set_msr(vcpu, ecx, data);
1776
1777         /* MSR write failed? See if we should ask user space */
1778         if (r && kvm_set_msr_user_space(vcpu, ecx, data, r))
1779                 /* Bounce to user space */
1780                 return 0;
1781
1782         /* Signal all other negative errors to userspace */
1783         if (r < 0)
1784                 return r;
1785
1786         if (!r)
1787                 trace_kvm_msr_write(ecx, data);
1788         else
1789                 trace_kvm_msr_write_ex(ecx, data);
1790
1791         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1792 }
1793 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1794
1795 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1796 {
1797         xfer_to_guest_mode_prepare();
1798         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
1799                 xfer_to_guest_mode_work_pending();
1800 }
1801
1802 /*
1803  * The fast path for frequent and performance sensitive wrmsr emulation,
1804  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1805  * the latency of virtual IPI by avoiding the expensive bits of transitioning
1806  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1807  * other cases which must be called after interrupts are enabled on the host.
1808  */
1809 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
1810 {
1811         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
1812                 return 1;
1813
1814         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
1815                 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
1816                 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
1817                 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
1818
1819                 data &= ~(1 << 12);
1820                 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
1821                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
1822                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
1823                 trace_kvm_apic_write(APIC_ICR, (u32)data);
1824                 return 0;
1825         }
1826
1827         return 1;
1828 }
1829
1830 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
1831 {
1832         if (!kvm_can_use_hv_timer(vcpu))
1833                 return 1;
1834
1835         kvm_set_lapic_tscdeadline_msr(vcpu, data);
1836         return 0;
1837 }
1838
1839 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
1840 {
1841         u32 msr = kvm_rcx_read(vcpu);
1842         u64 data;
1843         fastpath_t ret = EXIT_FASTPATH_NONE;
1844
1845         switch (msr) {
1846         case APIC_BASE_MSR + (APIC_ICR >> 4):
1847                 data = kvm_read_edx_eax(vcpu);
1848                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
1849                         kvm_skip_emulated_instruction(vcpu);
1850                         ret = EXIT_FASTPATH_EXIT_HANDLED;
1851                 }
1852                 break;
1853         case MSR_IA32_TSCDEADLINE:
1854                 data = kvm_read_edx_eax(vcpu);
1855                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
1856                         kvm_skip_emulated_instruction(vcpu);
1857                         ret = EXIT_FASTPATH_REENTER_GUEST;
1858                 }
1859                 break;
1860         default:
1861                 break;
1862         }
1863
1864         if (ret != EXIT_FASTPATH_NONE)
1865                 trace_kvm_msr_write(msr, data);
1866
1867         return ret;
1868 }
1869 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
1870
1871 /*
1872  * Adapt set_msr() to msr_io()'s calling convention
1873  */
1874 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1875 {
1876         return kvm_get_msr_ignored_check(vcpu, index, data, true);
1877 }
1878
1879 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1880 {
1881         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
1882 }
1883
1884 #ifdef CONFIG_X86_64
1885 struct pvclock_clock {
1886         int vclock_mode;
1887         u64 cycle_last;
1888         u64 mask;
1889         u32 mult;
1890         u32 shift;
1891         u64 base_cycles;
1892         u64 offset;
1893 };
1894
1895 struct pvclock_gtod_data {
1896         seqcount_t      seq;
1897
1898         struct pvclock_clock clock; /* extract of a clocksource struct */
1899         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
1900
1901         ktime_t         offs_boot;
1902         u64             wall_time_sec;
1903 };
1904
1905 static struct pvclock_gtod_data pvclock_gtod_data;
1906
1907 static void update_pvclock_gtod(struct timekeeper *tk)
1908 {
1909         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1910
1911         write_seqcount_begin(&vdata->seq);
1912
1913         /* copy pvclock gtod data */
1914         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
1915         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1916         vdata->clock.mask               = tk->tkr_mono.mask;
1917         vdata->clock.mult               = tk->tkr_mono.mult;
1918         vdata->clock.shift              = tk->tkr_mono.shift;
1919         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
1920         vdata->clock.offset             = tk->tkr_mono.base;
1921
1922         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
1923         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
1924         vdata->raw_clock.mask           = tk->tkr_raw.mask;
1925         vdata->raw_clock.mult           = tk->tkr_raw.mult;
1926         vdata->raw_clock.shift          = tk->tkr_raw.shift;
1927         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
1928         vdata->raw_clock.offset         = tk->tkr_raw.base;
1929
1930         vdata->wall_time_sec            = tk->xtime_sec;
1931
1932         vdata->offs_boot                = tk->offs_boot;
1933
1934         write_seqcount_end(&vdata->seq);
1935 }
1936
1937 static s64 get_kvmclock_base_ns(void)
1938 {
1939         /* Count up from boot time, but with the frequency of the raw clock.  */
1940         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
1941 }
1942 #else
1943 static s64 get_kvmclock_base_ns(void)
1944 {
1945         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
1946         return ktime_get_boottime_ns();
1947 }
1948 #endif
1949
1950 void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
1951 {
1952         int version;
1953         int r;
1954         struct pvclock_wall_clock wc;
1955         u32 wc_sec_hi;
1956         u64 wall_nsec;
1957
1958         if (!wall_clock)
1959                 return;
1960
1961         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1962         if (r)
1963                 return;
1964
1965         if (version & 1)
1966                 ++version;  /* first time write, random junk */
1967
1968         ++version;
1969
1970         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1971                 return;
1972
1973         /*
1974          * The guest calculates current wall clock time by adding
1975          * system time (updated by kvm_guest_time_update below) to the
1976          * wall clock specified here.  We do the reverse here.
1977          */
1978         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
1979
1980         wc.nsec = do_div(wall_nsec, 1000000000);
1981         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
1982         wc.version = version;
1983
1984         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1985
1986         if (sec_hi_ofs) {
1987                 wc_sec_hi = wall_nsec >> 32;
1988                 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
1989                                 &wc_sec_hi, sizeof(wc_sec_hi));
1990         }
1991
1992         version++;
1993         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1994 }
1995
1996 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
1997                                   bool old_msr, bool host_initiated)
1998 {
1999         struct kvm_arch *ka = &vcpu->kvm->arch;
2000
2001         if (vcpu->vcpu_id == 0 && !host_initiated) {
2002                 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2003                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2004
2005                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2006         }
2007
2008         vcpu->arch.time = system_time;
2009         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2010
2011         /* we verify if the enable bit is set... */
2012         vcpu->arch.pv_time_enabled = false;
2013         if (!(system_time & 1))
2014                 return;
2015
2016         if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2017                                        &vcpu->arch.pv_time, system_time & ~1ULL,
2018                                        sizeof(struct pvclock_vcpu_time_info)))
2019                 vcpu->arch.pv_time_enabled = true;
2020
2021         return;
2022 }
2023
2024 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2025 {
2026         do_shl32_div32(dividend, divisor);
2027         return dividend;
2028 }
2029
2030 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2031                                s8 *pshift, u32 *pmultiplier)
2032 {
2033         uint64_t scaled64;
2034         int32_t  shift = 0;
2035         uint64_t tps64;
2036         uint32_t tps32;
2037
2038         tps64 = base_hz;
2039         scaled64 = scaled_hz;
2040         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2041                 tps64 >>= 1;
2042                 shift--;
2043         }
2044
2045         tps32 = (uint32_t)tps64;
2046         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2047                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2048                         scaled64 >>= 1;
2049                 else
2050                         tps32 <<= 1;
2051                 shift++;
2052         }
2053
2054         *pshift = shift;
2055         *pmultiplier = div_frac(scaled64, tps32);
2056 }
2057
2058 #ifdef CONFIG_X86_64
2059 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2060 #endif
2061
2062 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2063 static unsigned long max_tsc_khz;
2064
2065 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2066 {
2067         u64 v = (u64)khz * (1000000 + ppm);
2068         do_div(v, 1000000);
2069         return v;
2070 }
2071
2072 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2073 {
2074         u64 ratio;
2075
2076         /* Guest TSC same frequency as host TSC? */
2077         if (!scale) {
2078                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2079                 return 0;
2080         }
2081
2082         /* TSC scaling supported? */
2083         if (!kvm_has_tsc_control) {
2084                 if (user_tsc_khz > tsc_khz) {
2085                         vcpu->arch.tsc_catchup = 1;
2086                         vcpu->arch.tsc_always_catchup = 1;
2087                         return 0;
2088                 } else {
2089                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2090                         return -1;
2091                 }
2092         }
2093
2094         /* TSC scaling required  - calculate ratio */
2095         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2096                                 user_tsc_khz, tsc_khz);
2097
2098         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2099                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2100                                     user_tsc_khz);
2101                 return -1;
2102         }
2103
2104         vcpu->arch.tsc_scaling_ratio = ratio;
2105         return 0;
2106 }
2107
2108 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2109 {
2110         u32 thresh_lo, thresh_hi;
2111         int use_scaling = 0;
2112
2113         /* tsc_khz can be zero if TSC calibration fails */
2114         if (user_tsc_khz == 0) {
2115                 /* set tsc_scaling_ratio to a safe value */
2116                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2117                 return -1;
2118         }
2119
2120         /* Compute a scale to convert nanoseconds in TSC cycles */
2121         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2122                            &vcpu->arch.virtual_tsc_shift,
2123                            &vcpu->arch.virtual_tsc_mult);
2124         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2125
2126         /*
2127          * Compute the variation in TSC rate which is acceptable
2128          * within the range of tolerance and decide if the
2129          * rate being applied is within that bounds of the hardware
2130          * rate.  If so, no scaling or compensation need be done.
2131          */
2132         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2133         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2134         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2135                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2136                 use_scaling = 1;
2137         }
2138         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2139 }
2140
2141 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2142 {
2143         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2144                                       vcpu->arch.virtual_tsc_mult,
2145                                       vcpu->arch.virtual_tsc_shift);
2146         tsc += vcpu->arch.this_tsc_write;
2147         return tsc;
2148 }
2149
2150 static inline int gtod_is_based_on_tsc(int mode)
2151 {
2152         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2153 }
2154
2155 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2156 {
2157 #ifdef CONFIG_X86_64
2158         bool vcpus_matched;
2159         struct kvm_arch *ka = &vcpu->kvm->arch;
2160         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2161
2162         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2163                          atomic_read(&vcpu->kvm->online_vcpus));
2164
2165         /*
2166          * Once the masterclock is enabled, always perform request in
2167          * order to update it.
2168          *
2169          * In order to enable masterclock, the host clocksource must be TSC
2170          * and the vcpus need to have matched TSCs.  When that happens,
2171          * perform request to enable masterclock.
2172          */
2173         if (ka->use_master_clock ||
2174             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2175                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2176
2177         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2178                             atomic_read(&vcpu->kvm->online_vcpus),
2179                             ka->use_master_clock, gtod->clock.vclock_mode);
2180 #endif
2181 }
2182
2183 /*
2184  * Multiply tsc by a fixed point number represented by ratio.
2185  *
2186  * The most significant 64-N bits (mult) of ratio represent the
2187  * integral part of the fixed point number; the remaining N bits
2188  * (frac) represent the fractional part, ie. ratio represents a fixed
2189  * point number (mult + frac * 2^(-N)).
2190  *
2191  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2192  */
2193 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2194 {
2195         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2196 }
2197
2198 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
2199 {
2200         u64 _tsc = tsc;
2201         u64 ratio = vcpu->arch.tsc_scaling_ratio;
2202
2203         if (ratio != kvm_default_tsc_scaling_ratio)
2204                 _tsc = __scale_tsc(ratio, tsc);
2205
2206         return _tsc;
2207 }
2208 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2209
2210 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2211 {
2212         u64 tsc;
2213
2214         tsc = kvm_scale_tsc(vcpu, rdtsc());
2215
2216         return target_tsc - tsc;
2217 }
2218
2219 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2220 {
2221         return vcpu->arch.l1_tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
2222 }
2223 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2224
2225 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
2226 {
2227         vcpu->arch.l1_tsc_offset = offset;
2228         vcpu->arch.tsc_offset = static_call(kvm_x86_write_l1_tsc_offset)(vcpu, offset);
2229 }
2230
2231 static inline bool kvm_check_tsc_unstable(void)
2232 {
2233 #ifdef CONFIG_X86_64
2234         /*
2235          * TSC is marked unstable when we're running on Hyper-V,
2236          * 'TSC page' clocksource is good.
2237          */
2238         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2239                 return false;
2240 #endif
2241         return check_tsc_unstable();
2242 }
2243
2244 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2245 {
2246         struct kvm *kvm = vcpu->kvm;
2247         u64 offset, ns, elapsed;
2248         unsigned long flags;
2249         bool matched;
2250         bool already_matched;
2251         bool synchronizing = false;
2252
2253         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2254         offset = kvm_compute_tsc_offset(vcpu, data);
2255         ns = get_kvmclock_base_ns();
2256         elapsed = ns - kvm->arch.last_tsc_nsec;
2257
2258         if (vcpu->arch.virtual_tsc_khz) {
2259                 if (data == 0) {
2260                         /*
2261                          * detection of vcpu initialization -- need to sync
2262                          * with other vCPUs. This particularly helps to keep
2263                          * kvm_clock stable after CPU hotplug
2264                          */
2265                         synchronizing = true;
2266                 } else {
2267                         u64 tsc_exp = kvm->arch.last_tsc_write +
2268                                                 nsec_to_cycles(vcpu, elapsed);
2269                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2270                         /*
2271                          * Special case: TSC write with a small delta (1 second)
2272                          * of virtual cycle time against real time is
2273                          * interpreted as an attempt to synchronize the CPU.
2274                          */
2275                         synchronizing = data < tsc_exp + tsc_hz &&
2276                                         data + tsc_hz > tsc_exp;
2277                 }
2278         }
2279
2280         /*
2281          * For a reliable TSC, we can match TSC offsets, and for an unstable
2282          * TSC, we add elapsed time in this computation.  We could let the
2283          * compensation code attempt to catch up if we fall behind, but
2284          * it's better to try to match offsets from the beginning.
2285          */
2286         if (synchronizing &&
2287             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2288                 if (!kvm_check_tsc_unstable()) {
2289                         offset = kvm->arch.cur_tsc_offset;
2290                 } else {
2291                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2292                         data += delta;
2293                         offset = kvm_compute_tsc_offset(vcpu, data);
2294                 }
2295                 matched = true;
2296                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
2297         } else {
2298                 /*
2299                  * We split periods of matched TSC writes into generations.
2300                  * For each generation, we track the original measured
2301                  * nanosecond time, offset, and write, so if TSCs are in
2302                  * sync, we can match exact offset, and if not, we can match
2303                  * exact software computation in compute_guest_tsc()
2304                  *
2305                  * These values are tracked in kvm->arch.cur_xxx variables.
2306                  */
2307                 kvm->arch.cur_tsc_generation++;
2308                 kvm->arch.cur_tsc_nsec = ns;
2309                 kvm->arch.cur_tsc_write = data;
2310                 kvm->arch.cur_tsc_offset = offset;
2311                 matched = false;
2312         }
2313
2314         /*
2315          * We also track th most recent recorded KHZ, write and time to
2316          * allow the matching interval to be extended at each write.
2317          */
2318         kvm->arch.last_tsc_nsec = ns;
2319         kvm->arch.last_tsc_write = data;
2320         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2321
2322         vcpu->arch.last_guest_tsc = data;
2323
2324         /* Keep track of which generation this VCPU has synchronized to */
2325         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2326         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2327         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2328
2329         kvm_vcpu_write_tsc_offset(vcpu, offset);
2330         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2331
2332         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
2333         if (!matched) {
2334                 kvm->arch.nr_vcpus_matched_tsc = 0;
2335         } else if (!already_matched) {
2336                 kvm->arch.nr_vcpus_matched_tsc++;
2337         }
2338
2339         kvm_track_tsc_matching(vcpu);
2340         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
2341 }
2342
2343 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2344                                            s64 adjustment)
2345 {
2346         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2347         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2348 }
2349
2350 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2351 {
2352         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2353                 WARN_ON(adjustment < 0);
2354         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
2355         adjust_tsc_offset_guest(vcpu, adjustment);
2356 }
2357
2358 #ifdef CONFIG_X86_64
2359
2360 static u64 read_tsc(void)
2361 {
2362         u64 ret = (u64)rdtsc_ordered();
2363         u64 last = pvclock_gtod_data.clock.cycle_last;
2364
2365         if (likely(ret >= last))
2366                 return ret;
2367
2368         /*
2369          * GCC likes to generate cmov here, but this branch is extremely
2370          * predictable (it's just a function of time and the likely is
2371          * very likely) and there's a data dependence, so force GCC
2372          * to generate a branch instead.  I don't barrier() because
2373          * we don't actually need a barrier, and if this function
2374          * ever gets inlined it will generate worse code.
2375          */
2376         asm volatile ("");
2377         return last;
2378 }
2379
2380 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2381                           int *mode)
2382 {
2383         long v;
2384         u64 tsc_pg_val;
2385
2386         switch (clock->vclock_mode) {
2387         case VDSO_CLOCKMODE_HVCLOCK:
2388                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2389                                                   tsc_timestamp);
2390                 if (tsc_pg_val != U64_MAX) {
2391                         /* TSC page valid */
2392                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2393                         v = (tsc_pg_val - clock->cycle_last) &
2394                                 clock->mask;
2395                 } else {
2396                         /* TSC page invalid */
2397                         *mode = VDSO_CLOCKMODE_NONE;
2398                 }
2399                 break;
2400         case VDSO_CLOCKMODE_TSC:
2401                 *mode = VDSO_CLOCKMODE_TSC;
2402                 *tsc_timestamp = read_tsc();
2403                 v = (*tsc_timestamp - clock->cycle_last) &
2404                         clock->mask;
2405                 break;
2406         default:
2407                 *mode = VDSO_CLOCKMODE_NONE;
2408         }
2409
2410         if (*mode == VDSO_CLOCKMODE_NONE)
2411                 *tsc_timestamp = v = 0;
2412
2413         return v * clock->mult;
2414 }
2415
2416 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2417 {
2418         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2419         unsigned long seq;
2420         int mode;
2421         u64 ns;
2422
2423         do {
2424                 seq = read_seqcount_begin(&gtod->seq);
2425                 ns = gtod->raw_clock.base_cycles;
2426                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2427                 ns >>= gtod->raw_clock.shift;
2428                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2429         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2430         *t = ns;
2431
2432         return mode;
2433 }
2434
2435 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2436 {
2437         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2438         unsigned long seq;
2439         int mode;
2440         u64 ns;
2441
2442         do {
2443                 seq = read_seqcount_begin(&gtod->seq);
2444                 ts->tv_sec = gtod->wall_time_sec;
2445                 ns = gtod->clock.base_cycles;
2446                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2447                 ns >>= gtod->clock.shift;
2448         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2449
2450         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2451         ts->tv_nsec = ns;
2452
2453         return mode;
2454 }
2455
2456 /* returns true if host is using TSC based clocksource */
2457 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2458 {
2459         /* checked again under seqlock below */
2460         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2461                 return false;
2462
2463         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2464                                                       tsc_timestamp));
2465 }
2466
2467 /* returns true if host is using TSC based clocksource */
2468 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2469                                            u64 *tsc_timestamp)
2470 {
2471         /* checked again under seqlock below */
2472         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2473                 return false;
2474
2475         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2476 }
2477 #endif
2478
2479 /*
2480  *
2481  * Assuming a stable TSC across physical CPUS, and a stable TSC
2482  * across virtual CPUs, the following condition is possible.
2483  * Each numbered line represents an event visible to both
2484  * CPUs at the next numbered event.
2485  *
2486  * "timespecX" represents host monotonic time. "tscX" represents
2487  * RDTSC value.
2488  *
2489  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2490  *
2491  * 1.  read timespec0,tsc0
2492  * 2.                                   | timespec1 = timespec0 + N
2493  *                                      | tsc1 = tsc0 + M
2494  * 3. transition to guest               | transition to guest
2495  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2496  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2497  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2498  *
2499  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2500  *
2501  *      - ret0 < ret1
2502  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2503  *              ...
2504  *      - 0 < N - M => M < N
2505  *
2506  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2507  * always the case (the difference between two distinct xtime instances
2508  * might be smaller then the difference between corresponding TSC reads,
2509  * when updating guest vcpus pvclock areas).
2510  *
2511  * To avoid that problem, do not allow visibility of distinct
2512  * system_timestamp/tsc_timestamp values simultaneously: use a master
2513  * copy of host monotonic time values. Update that master copy
2514  * in lockstep.
2515  *
2516  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2517  *
2518  */
2519
2520 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2521 {
2522 #ifdef CONFIG_X86_64
2523         struct kvm_arch *ka = &kvm->arch;
2524         int vclock_mode;
2525         bool host_tsc_clocksource, vcpus_matched;
2526
2527         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2528                         atomic_read(&kvm->online_vcpus));
2529
2530         /*
2531          * If the host uses TSC clock, then passthrough TSC as stable
2532          * to the guest.
2533          */
2534         host_tsc_clocksource = kvm_get_time_and_clockread(
2535                                         &ka->master_kernel_ns,
2536                                         &ka->master_cycle_now);
2537
2538         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2539                                 && !ka->backwards_tsc_observed
2540                                 && !ka->boot_vcpu_runs_old_kvmclock;
2541
2542         if (ka->use_master_clock)
2543                 atomic_set(&kvm_guest_has_master_clock, 1);
2544
2545         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2546         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2547                                         vcpus_matched);
2548 #endif
2549 }
2550
2551 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2552 {
2553         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2554 }
2555
2556 static void kvm_gen_update_masterclock(struct kvm *kvm)
2557 {
2558 #ifdef CONFIG_X86_64
2559         int i;
2560         struct kvm_vcpu *vcpu;
2561         struct kvm_arch *ka = &kvm->arch;
2562
2563         kvm_hv_invalidate_tsc_page(kvm);
2564
2565         spin_lock(&ka->pvclock_gtod_sync_lock);
2566         kvm_make_mclock_inprogress_request(kvm);
2567         /* no guest entries from this point */
2568         pvclock_update_vm_gtod_copy(kvm);
2569
2570         kvm_for_each_vcpu(i, vcpu, kvm)
2571                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2572
2573         /* guest entries allowed */
2574         kvm_for_each_vcpu(i, vcpu, kvm)
2575                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2576
2577         spin_unlock(&ka->pvclock_gtod_sync_lock);
2578 #endif
2579 }
2580
2581 u64 get_kvmclock_ns(struct kvm *kvm)
2582 {
2583         struct kvm_arch *ka = &kvm->arch;
2584         struct pvclock_vcpu_time_info hv_clock;
2585         u64 ret;
2586
2587         spin_lock(&ka->pvclock_gtod_sync_lock);
2588         if (!ka->use_master_clock) {
2589                 spin_unlock(&ka->pvclock_gtod_sync_lock);
2590                 return get_kvmclock_base_ns() + ka->kvmclock_offset;
2591         }
2592
2593         hv_clock.tsc_timestamp = ka->master_cycle_now;
2594         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2595         spin_unlock(&ka->pvclock_gtod_sync_lock);
2596
2597         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2598         get_cpu();
2599
2600         if (__this_cpu_read(cpu_tsc_khz)) {
2601                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2602                                    &hv_clock.tsc_shift,
2603                                    &hv_clock.tsc_to_system_mul);
2604                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2605         } else
2606                 ret = get_kvmclock_base_ns() + ka->kvmclock_offset;
2607
2608         put_cpu();
2609
2610         return ret;
2611 }
2612
2613 static void kvm_setup_pvclock_page(struct kvm_vcpu *v,
2614                                    struct gfn_to_hva_cache *cache,
2615                                    unsigned int offset)
2616 {
2617         struct kvm_vcpu_arch *vcpu = &v->arch;
2618         struct pvclock_vcpu_time_info guest_hv_clock;
2619
2620         if (unlikely(kvm_read_guest_offset_cached(v->kvm, cache,
2621                 &guest_hv_clock, offset, sizeof(guest_hv_clock))))
2622                 return;
2623
2624         /* This VCPU is paused, but it's legal for a guest to read another
2625          * VCPU's kvmclock, so we really have to follow the specification where
2626          * it says that version is odd if data is being modified, and even after
2627          * it is consistent.
2628          *
2629          * Version field updates must be kept separate.  This is because
2630          * kvm_write_guest_cached might use a "rep movs" instruction, and
2631          * writes within a string instruction are weakly ordered.  So there
2632          * are three writes overall.
2633          *
2634          * As a small optimization, only write the version field in the first
2635          * and third write.  The vcpu->pv_time cache is still valid, because the
2636          * version field is the first in the struct.
2637          */
2638         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2639
2640         if (guest_hv_clock.version & 1)
2641                 ++guest_hv_clock.version;  /* first time write, random junk */
2642
2643         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2644         kvm_write_guest_offset_cached(v->kvm, cache,
2645                                       &vcpu->hv_clock, offset,
2646                                       sizeof(vcpu->hv_clock.version));
2647
2648         smp_wmb();
2649
2650         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2651         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2652
2653         if (vcpu->pvclock_set_guest_stopped_request) {
2654                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2655                 vcpu->pvclock_set_guest_stopped_request = false;
2656         }
2657
2658         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2659
2660         kvm_write_guest_offset_cached(v->kvm, cache,
2661                                       &vcpu->hv_clock, offset,
2662                                       sizeof(vcpu->hv_clock));
2663
2664         smp_wmb();
2665
2666         vcpu->hv_clock.version++;
2667         kvm_write_guest_offset_cached(v->kvm, cache,
2668                                      &vcpu->hv_clock, offset,
2669                                      sizeof(vcpu->hv_clock.version));
2670 }
2671
2672 static int kvm_guest_time_update(struct kvm_vcpu *v)
2673 {
2674         unsigned long flags, tgt_tsc_khz;
2675         struct kvm_vcpu_arch *vcpu = &v->arch;
2676         struct kvm_arch *ka = &v->kvm->arch;
2677         s64 kernel_ns;
2678         u64 tsc_timestamp, host_tsc;
2679         u8 pvclock_flags;
2680         bool use_master_clock;
2681
2682         kernel_ns = 0;
2683         host_tsc = 0;
2684
2685         /*
2686          * If the host uses TSC clock, then passthrough TSC as stable
2687          * to the guest.
2688          */
2689         spin_lock(&ka->pvclock_gtod_sync_lock);
2690         use_master_clock = ka->use_master_clock;
2691         if (use_master_clock) {
2692                 host_tsc = ka->master_cycle_now;
2693                 kernel_ns = ka->master_kernel_ns;
2694         }
2695         spin_unlock(&ka->pvclock_gtod_sync_lock);
2696
2697         /* Keep irq disabled to prevent changes to the clock */
2698         local_irq_save(flags);
2699         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2700         if (unlikely(tgt_tsc_khz == 0)) {
2701                 local_irq_restore(flags);
2702                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2703                 return 1;
2704         }
2705         if (!use_master_clock) {
2706                 host_tsc = rdtsc();
2707                 kernel_ns = get_kvmclock_base_ns();
2708         }
2709
2710         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2711
2712         /*
2713          * We may have to catch up the TSC to match elapsed wall clock
2714          * time for two reasons, even if kvmclock is used.
2715          *   1) CPU could have been running below the maximum TSC rate
2716          *   2) Broken TSC compensation resets the base at each VCPU
2717          *      entry to avoid unknown leaps of TSC even when running
2718          *      again on the same CPU.  This may cause apparent elapsed
2719          *      time to disappear, and the guest to stand still or run
2720          *      very slowly.
2721          */
2722         if (vcpu->tsc_catchup) {
2723                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2724                 if (tsc > tsc_timestamp) {
2725                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2726                         tsc_timestamp = tsc;
2727                 }
2728         }
2729
2730         local_irq_restore(flags);
2731
2732         /* With all the info we got, fill in the values */
2733
2734         if (kvm_has_tsc_control)
2735                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2736
2737         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2738                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2739                                    &vcpu->hv_clock.tsc_shift,
2740                                    &vcpu->hv_clock.tsc_to_system_mul);
2741                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2742         }
2743
2744         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2745         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2746         vcpu->last_guest_tsc = tsc_timestamp;
2747
2748         /* If the host uses TSC clocksource, then it is stable */
2749         pvclock_flags = 0;
2750         if (use_master_clock)
2751                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2752
2753         vcpu->hv_clock.flags = pvclock_flags;
2754
2755         if (vcpu->pv_time_enabled)
2756                 kvm_setup_pvclock_page(v, &vcpu->pv_time, 0);
2757         if (vcpu->xen.vcpu_info_set)
2758                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_info_cache,
2759                                        offsetof(struct compat_vcpu_info, time));
2760         if (vcpu->xen.vcpu_time_info_set)
2761                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_time_info_cache, 0);
2762         if (v == kvm_get_vcpu(v->kvm, 0))
2763                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2764         return 0;
2765 }
2766
2767 /*
2768  * kvmclock updates which are isolated to a given vcpu, such as
2769  * vcpu->cpu migration, should not allow system_timestamp from
2770  * the rest of the vcpus to remain static. Otherwise ntp frequency
2771  * correction applies to one vcpu's system_timestamp but not
2772  * the others.
2773  *
2774  * So in those cases, request a kvmclock update for all vcpus.
2775  * We need to rate-limit these requests though, as they can
2776  * considerably slow guests that have a large number of vcpus.
2777  * The time for a remote vcpu to update its kvmclock is bound
2778  * by the delay we use to rate-limit the updates.
2779  */
2780
2781 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2782
2783 static void kvmclock_update_fn(struct work_struct *work)
2784 {
2785         int i;
2786         struct delayed_work *dwork = to_delayed_work(work);
2787         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2788                                            kvmclock_update_work);
2789         struct kvm *kvm = container_of(ka, struct kvm, arch);
2790         struct kvm_vcpu *vcpu;
2791
2792         kvm_for_each_vcpu(i, vcpu, kvm) {
2793                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2794                 kvm_vcpu_kick(vcpu);
2795         }
2796 }
2797
2798 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2799 {
2800         struct kvm *kvm = v->kvm;
2801
2802         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2803         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2804                                         KVMCLOCK_UPDATE_DELAY);
2805 }
2806
2807 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2808
2809 static void kvmclock_sync_fn(struct work_struct *work)
2810 {
2811         struct delayed_work *dwork = to_delayed_work(work);
2812         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2813                                            kvmclock_sync_work);
2814         struct kvm *kvm = container_of(ka, struct kvm, arch);
2815
2816         if (!kvmclock_periodic_sync)
2817                 return;
2818
2819         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2820         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2821                                         KVMCLOCK_SYNC_PERIOD);
2822 }
2823
2824 /*
2825  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2826  */
2827 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
2828 {
2829         /* McStatusWrEn enabled? */
2830         if (guest_cpuid_is_amd_or_hygon(vcpu))
2831                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
2832
2833         return false;
2834 }
2835
2836 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2837 {
2838         u64 mcg_cap = vcpu->arch.mcg_cap;
2839         unsigned bank_num = mcg_cap & 0xff;
2840         u32 msr = msr_info->index;
2841         u64 data = msr_info->data;
2842
2843         switch (msr) {
2844         case MSR_IA32_MCG_STATUS:
2845                 vcpu->arch.mcg_status = data;
2846                 break;
2847         case MSR_IA32_MCG_CTL:
2848                 if (!(mcg_cap & MCG_CTL_P) &&
2849                     (data || !msr_info->host_initiated))
2850                         return 1;
2851                 if (data != 0 && data != ~(u64)0)
2852                         return 1;
2853                 vcpu->arch.mcg_ctl = data;
2854                 break;
2855         default:
2856                 if (msr >= MSR_IA32_MC0_CTL &&
2857                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2858                         u32 offset = array_index_nospec(
2859                                 msr - MSR_IA32_MC0_CTL,
2860                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
2861
2862                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2863                          * some Linux kernels though clear bit 10 in bank 4 to
2864                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2865                          * this to avoid an uncatched #GP in the guest
2866                          */
2867                         if ((offset & 0x3) == 0 &&
2868                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2869                                 return -1;
2870
2871                         /* MCi_STATUS */
2872                         if (!msr_info->host_initiated &&
2873                             (offset & 0x3) == 1 && data != 0) {
2874                                 if (!can_set_mci_status(vcpu))
2875                                         return -1;
2876                         }
2877
2878                         vcpu->arch.mce_banks[offset] = data;
2879                         break;
2880                 }
2881                 return 1;
2882         }
2883         return 0;
2884 }
2885
2886 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
2887 {
2888         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
2889
2890         return (vcpu->arch.apf.msr_en_val & mask) == mask;
2891 }
2892
2893 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2894 {
2895         gpa_t gpa = data & ~0x3f;
2896
2897         /* Bits 4:5 are reserved, Should be zero */
2898         if (data & 0x30)
2899                 return 1;
2900
2901         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
2902             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
2903                 return 1;
2904
2905         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
2906             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
2907                 return 1;
2908
2909         if (!lapic_in_kernel(vcpu))
2910                 return data ? 1 : 0;
2911
2912         vcpu->arch.apf.msr_en_val = data;
2913
2914         if (!kvm_pv_async_pf_enabled(vcpu)) {
2915                 kvm_clear_async_pf_completion_queue(vcpu);
2916                 kvm_async_pf_hash_reset(vcpu);
2917                 return 0;
2918         }
2919
2920         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2921                                         sizeof(u64)))
2922                 return 1;
2923
2924         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2925         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2926
2927         kvm_async_pf_wakeup_all(vcpu);
2928
2929         return 0;
2930 }
2931
2932 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
2933 {
2934         /* Bits 8-63 are reserved */
2935         if (data >> 8)
2936                 return 1;
2937
2938         if (!lapic_in_kernel(vcpu))
2939                 return 1;
2940
2941         vcpu->arch.apf.msr_int_val = data;
2942
2943         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
2944
2945         return 0;
2946 }
2947
2948 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2949 {
2950         vcpu->arch.pv_time_enabled = false;
2951         vcpu->arch.time = 0;
2952 }
2953
2954 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
2955 {
2956         ++vcpu->stat.tlb_flush;
2957         static_call(kvm_x86_tlb_flush_all)(vcpu);
2958 }
2959
2960 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
2961 {
2962         ++vcpu->stat.tlb_flush;
2963         static_call(kvm_x86_tlb_flush_guest)(vcpu);
2964 }
2965
2966 static void record_steal_time(struct kvm_vcpu *vcpu)
2967 {
2968         struct kvm_host_map map;
2969         struct kvm_steal_time *st;
2970
2971         if (kvm_xen_msr_enabled(vcpu->kvm)) {
2972                 kvm_xen_runstate_set_running(vcpu);
2973                 return;
2974         }
2975
2976         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2977                 return;
2978
2979         /* -EAGAIN is returned in atomic context so we can just return. */
2980         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT,
2981                         &map, &vcpu->arch.st.cache, false))
2982                 return;
2983
2984         st = map.hva +
2985                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
2986
2987         /*
2988          * Doing a TLB flush here, on the guest's behalf, can avoid
2989          * expensive IPIs.
2990          */
2991         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
2992                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
2993                                        st->preempted & KVM_VCPU_FLUSH_TLB);
2994                 if (xchg(&st->preempted, 0) & KVM_VCPU_FLUSH_TLB)
2995                         kvm_vcpu_flush_tlb_guest(vcpu);
2996         }
2997
2998         vcpu->arch.st.preempted = 0;
2999
3000         if (st->version & 1)
3001                 st->version += 1;  /* first time write, random junk */
3002
3003         st->version += 1;
3004
3005         smp_wmb();
3006
3007         st->steal += current->sched_info.run_delay -
3008                 vcpu->arch.st.last_steal;
3009         vcpu->arch.st.last_steal = current->sched_info.run_delay;
3010
3011         smp_wmb();
3012
3013         st->version += 1;
3014
3015         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, false);
3016 }
3017
3018 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3019 {
3020         bool pr = false;
3021         u32 msr = msr_info->index;
3022         u64 data = msr_info->data;
3023
3024         if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3025                 return kvm_xen_write_hypercall_page(vcpu, data);
3026
3027         switch (msr) {
3028         case MSR_AMD64_NB_CFG:
3029         case MSR_IA32_UCODE_WRITE:
3030         case MSR_VM_HSAVE_PA:
3031         case MSR_AMD64_PATCH_LOADER:
3032         case MSR_AMD64_BU_CFG2:
3033         case MSR_AMD64_DC_CFG:
3034         case MSR_F15H_EX_CFG:
3035                 break;
3036
3037         case MSR_IA32_UCODE_REV:
3038                 if (msr_info->host_initiated)
3039                         vcpu->arch.microcode_version = data;
3040                 break;
3041         case MSR_IA32_ARCH_CAPABILITIES:
3042                 if (!msr_info->host_initiated)
3043                         return 1;
3044                 vcpu->arch.arch_capabilities = data;
3045                 break;
3046         case MSR_IA32_PERF_CAPABILITIES: {
3047                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3048
3049                 if (!msr_info->host_initiated)
3050                         return 1;
3051                 if (guest_cpuid_has(vcpu, X86_FEATURE_PDCM) && kvm_get_msr_feature(&msr_ent))
3052                         return 1;
3053                 if (data & ~msr_ent.data)
3054                         return 1;
3055
3056                 vcpu->arch.perf_capabilities = data;
3057
3058                 return 0;
3059                 }
3060         case MSR_EFER:
3061                 return set_efer(vcpu, msr_info);
3062         case MSR_K7_HWCR:
3063                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3064                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3065                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3066
3067                 /* Handle McStatusWrEn */
3068                 if (data == BIT_ULL(18)) {
3069                         vcpu->arch.msr_hwcr = data;
3070                 } else if (data != 0) {
3071                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3072                                     data);
3073                         return 1;
3074                 }
3075                 break;
3076         case MSR_FAM10H_MMIO_CONF_BASE:
3077                 if (data != 0) {
3078                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3079                                     "0x%llx\n", data);
3080                         return 1;
3081                 }
3082                 break;
3083         case 0x200 ... 0x2ff:
3084                 return kvm_mtrr_set_msr(vcpu, msr, data);
3085         case MSR_IA32_APICBASE:
3086                 return kvm_set_apic_base(vcpu, msr_info);
3087         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3088                 return kvm_x2apic_msr_write(vcpu, msr, data);
3089         case MSR_IA32_TSCDEADLINE:
3090                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3091                 break;
3092         case MSR_IA32_TSC_ADJUST:
3093                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3094                         if (!msr_info->host_initiated) {
3095                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3096                                 adjust_tsc_offset_guest(vcpu, adj);
3097                         }
3098                         vcpu->arch.ia32_tsc_adjust_msr = data;
3099                 }
3100                 break;
3101         case MSR_IA32_MISC_ENABLE:
3102                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3103                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3104                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3105                                 return 1;
3106                         vcpu->arch.ia32_misc_enable_msr = data;
3107                         kvm_update_cpuid_runtime(vcpu);
3108                 } else {
3109                         vcpu->arch.ia32_misc_enable_msr = data;
3110                 }
3111                 break;
3112         case MSR_IA32_SMBASE:
3113                 if (!msr_info->host_initiated)
3114                         return 1;
3115                 vcpu->arch.smbase = data;
3116                 break;
3117         case MSR_IA32_POWER_CTL:
3118                 vcpu->arch.msr_ia32_power_ctl = data;
3119                 break;
3120         case MSR_IA32_TSC:
3121                 if (msr_info->host_initiated) {
3122                         kvm_synchronize_tsc(vcpu, data);
3123                 } else {
3124                         u64 adj = kvm_compute_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3125                         adjust_tsc_offset_guest(vcpu, adj);
3126                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3127                 }
3128                 break;
3129         case MSR_IA32_XSS:
3130                 if (!msr_info->host_initiated &&
3131                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3132                         return 1;
3133                 /*
3134                  * KVM supports exposing PT to the guest, but does not support
3135                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3136                  * XSAVES/XRSTORS to save/restore PT MSRs.
3137                  */
3138                 if (data & ~supported_xss)
3139                         return 1;
3140                 vcpu->arch.ia32_xss = data;
3141                 break;
3142         case MSR_SMI_COUNT:
3143                 if (!msr_info->host_initiated)
3144                         return 1;
3145                 vcpu->arch.smi_count = data;
3146                 break;
3147         case MSR_KVM_WALL_CLOCK_NEW:
3148                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3149                         return 1;
3150
3151                 vcpu->kvm->arch.wall_clock = data;
3152                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3153                 break;
3154         case MSR_KVM_WALL_CLOCK:
3155                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3156                         return 1;
3157
3158                 vcpu->kvm->arch.wall_clock = data;
3159                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3160                 break;
3161         case MSR_KVM_SYSTEM_TIME_NEW:
3162                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3163                         return 1;
3164
3165                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3166                 break;
3167         case MSR_KVM_SYSTEM_TIME:
3168                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3169                         return 1;
3170
3171                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3172                 break;
3173         case MSR_KVM_ASYNC_PF_EN:
3174                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3175                         return 1;
3176
3177                 if (kvm_pv_enable_async_pf(vcpu, data))
3178                         return 1;
3179                 break;
3180         case MSR_KVM_ASYNC_PF_INT:
3181                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3182                         return 1;
3183
3184                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3185                         return 1;
3186                 break;
3187         case MSR_KVM_ASYNC_PF_ACK:
3188                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3189                         return 1;
3190                 if (data & 0x1) {
3191                         vcpu->arch.apf.pageready_pending = false;
3192                         kvm_check_async_pf_completion(vcpu);
3193                 }
3194                 break;
3195         case MSR_KVM_STEAL_TIME:
3196                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3197                         return 1;
3198
3199                 if (unlikely(!sched_info_on()))
3200                         return 1;
3201
3202                 if (data & KVM_STEAL_RESERVED_MASK)
3203                         return 1;
3204
3205                 vcpu->arch.st.msr_val = data;
3206
3207                 if (!(data & KVM_MSR_ENABLED))
3208                         break;
3209
3210                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3211
3212                 break;
3213         case MSR_KVM_PV_EOI_EN:
3214                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3215                         return 1;
3216
3217                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
3218                         return 1;
3219                 break;
3220
3221         case MSR_KVM_POLL_CONTROL:
3222                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3223                         return 1;
3224
3225                 /* only enable bit supported */
3226                 if (data & (-1ULL << 1))
3227                         return 1;
3228
3229                 vcpu->arch.msr_kvm_poll_control = data;
3230                 break;
3231
3232         case MSR_IA32_MCG_CTL:
3233         case MSR_IA32_MCG_STATUS:
3234         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3235                 return set_msr_mce(vcpu, msr_info);
3236
3237         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3238         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3239                 pr = true;
3240                 fallthrough;
3241         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3242         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3243                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3244                         return kvm_pmu_set_msr(vcpu, msr_info);
3245
3246                 if (pr || data != 0)
3247                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3248                                     "0x%x data 0x%llx\n", msr, data);
3249                 break;
3250         case MSR_K7_CLK_CTL:
3251                 /*
3252                  * Ignore all writes to this no longer documented MSR.
3253                  * Writes are only relevant for old K7 processors,
3254                  * all pre-dating SVM, but a recommended workaround from
3255                  * AMD for these chips. It is possible to specify the
3256                  * affected processor models on the command line, hence
3257                  * the need to ignore the workaround.
3258                  */
3259                 break;
3260         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3261         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3262         case HV_X64_MSR_SYNDBG_OPTIONS:
3263         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3264         case HV_X64_MSR_CRASH_CTL:
3265         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3266         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3267         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3268         case HV_X64_MSR_TSC_EMULATION_STATUS:
3269                 return kvm_hv_set_msr_common(vcpu, msr, data,
3270                                              msr_info->host_initiated);
3271         case MSR_IA32_BBL_CR_CTL3:
3272                 /* Drop writes to this legacy MSR -- see rdmsr
3273                  * counterpart for further detail.
3274                  */
3275                 if (report_ignored_msrs)
3276                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3277                                 msr, data);
3278                 break;
3279         case MSR_AMD64_OSVW_ID_LENGTH:
3280                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3281                         return 1;
3282                 vcpu->arch.osvw.length = data;
3283                 break;
3284         case MSR_AMD64_OSVW_STATUS:
3285                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3286                         return 1;
3287                 vcpu->arch.osvw.status = data;
3288                 break;
3289         case MSR_PLATFORM_INFO:
3290                 if (!msr_info->host_initiated ||
3291                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3292                      cpuid_fault_enabled(vcpu)))
3293                         return 1;
3294                 vcpu->arch.msr_platform_info = data;
3295                 break;
3296         case MSR_MISC_FEATURES_ENABLES:
3297                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3298                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3299                      !supports_cpuid_fault(vcpu)))
3300                         return 1;
3301                 vcpu->arch.msr_misc_features_enables = data;
3302                 break;
3303         default:
3304                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3305                         return kvm_pmu_set_msr(vcpu, msr_info);
3306                 return KVM_MSR_RET_INVALID;
3307         }
3308         return 0;
3309 }
3310 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3311
3312 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3313 {
3314         u64 data;
3315         u64 mcg_cap = vcpu->arch.mcg_cap;
3316         unsigned bank_num = mcg_cap & 0xff;
3317
3318         switch (msr) {
3319         case MSR_IA32_P5_MC_ADDR:
3320         case MSR_IA32_P5_MC_TYPE:
3321                 data = 0;
3322                 break;
3323         case MSR_IA32_MCG_CAP:
3324                 data = vcpu->arch.mcg_cap;
3325                 break;
3326         case MSR_IA32_MCG_CTL:
3327                 if (!(mcg_cap & MCG_CTL_P) && !host)
3328                         return 1;
3329                 data = vcpu->arch.mcg_ctl;
3330                 break;
3331         case MSR_IA32_MCG_STATUS:
3332                 data = vcpu->arch.mcg_status;
3333                 break;
3334         default:
3335                 if (msr >= MSR_IA32_MC0_CTL &&
3336                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3337                         u32 offset = array_index_nospec(
3338                                 msr - MSR_IA32_MC0_CTL,
3339                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3340
3341                         data = vcpu->arch.mce_banks[offset];
3342                         break;
3343                 }
3344                 return 1;
3345         }
3346         *pdata = data;
3347         return 0;
3348 }
3349
3350 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3351 {
3352         switch (msr_info->index) {
3353         case MSR_IA32_PLATFORM_ID:
3354         case MSR_IA32_EBL_CR_POWERON:
3355         case MSR_IA32_LASTBRANCHFROMIP:
3356         case MSR_IA32_LASTBRANCHTOIP:
3357         case MSR_IA32_LASTINTFROMIP:
3358         case MSR_IA32_LASTINTTOIP:
3359         case MSR_K8_SYSCFG:
3360         case MSR_K8_TSEG_ADDR:
3361         case MSR_K8_TSEG_MASK:
3362         case MSR_VM_HSAVE_PA:
3363         case MSR_K8_INT_PENDING_MSG:
3364         case MSR_AMD64_NB_CFG:
3365         case MSR_FAM10H_MMIO_CONF_BASE:
3366         case MSR_AMD64_BU_CFG2:
3367         case MSR_IA32_PERF_CTL:
3368         case MSR_AMD64_DC_CFG:
3369         case MSR_F15H_EX_CFG:
3370         /*
3371          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3372          * limit) MSRs. Just return 0, as we do not want to expose the host
3373          * data here. Do not conditionalize this on CPUID, as KVM does not do
3374          * so for existing CPU-specific MSRs.
3375          */
3376         case MSR_RAPL_POWER_UNIT:
3377         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3378         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3379         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3380         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3381                 msr_info->data = 0;
3382                 break;
3383         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3384         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3385         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3386         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3387         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3388                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3389                         return kvm_pmu_get_msr(vcpu, msr_info);
3390                 msr_info->data = 0;
3391                 break;
3392         case MSR_IA32_UCODE_REV:
3393                 msr_info->data = vcpu->arch.microcode_version;
3394                 break;
3395         case MSR_IA32_ARCH_CAPABILITIES:
3396                 if (!msr_info->host_initiated &&
3397                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3398                         return 1;
3399                 msr_info->data = vcpu->arch.arch_capabilities;
3400                 break;
3401         case MSR_IA32_PERF_CAPABILITIES:
3402                 if (!msr_info->host_initiated &&
3403                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3404                         return 1;
3405                 msr_info->data = vcpu->arch.perf_capabilities;
3406                 break;
3407         case MSR_IA32_POWER_CTL:
3408                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3409                 break;
3410         case MSR_IA32_TSC: {
3411                 /*
3412                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3413                  * even when not intercepted. AMD manual doesn't explicitly
3414                  * state this but appears to behave the same.
3415                  *
3416                  * On userspace reads and writes, however, we unconditionally
3417                  * return L1's TSC value to ensure backwards-compatible
3418                  * behavior for migration.
3419                  */
3420                 u64 tsc_offset = msr_info->host_initiated ? vcpu->arch.l1_tsc_offset :
3421                                                             vcpu->arch.tsc_offset;
3422
3423                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + tsc_offset;
3424                 break;
3425         }
3426         case MSR_MTRRcap:
3427         case 0x200 ... 0x2ff:
3428                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3429         case 0xcd: /* fsb frequency */
3430                 msr_info->data = 3;
3431                 break;
3432                 /*
3433                  * MSR_EBC_FREQUENCY_ID
3434                  * Conservative value valid for even the basic CPU models.
3435                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3436                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3437                  * and 266MHz for model 3, or 4. Set Core Clock
3438                  * Frequency to System Bus Frequency Ratio to 1 (bits
3439                  * 31:24) even though these are only valid for CPU
3440                  * models > 2, however guests may end up dividing or
3441                  * multiplying by zero otherwise.
3442                  */
3443         case MSR_EBC_FREQUENCY_ID:
3444                 msr_info->data = 1 << 24;
3445                 break;
3446         case MSR_IA32_APICBASE:
3447                 msr_info->data = kvm_get_apic_base(vcpu);
3448                 break;
3449         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3450                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3451         case MSR_IA32_TSCDEADLINE:
3452                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3453                 break;
3454         case MSR_IA32_TSC_ADJUST:
3455                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3456                 break;
3457         case MSR_IA32_MISC_ENABLE:
3458                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3459                 break;
3460         case MSR_IA32_SMBASE:
3461                 if (!msr_info->host_initiated)
3462                         return 1;
3463                 msr_info->data = vcpu->arch.smbase;
3464                 break;
3465         case MSR_SMI_COUNT:
3466                 msr_info->data = vcpu->arch.smi_count;
3467                 break;
3468         case MSR_IA32_PERF_STATUS:
3469                 /* TSC increment by tick */
3470                 msr_info->data = 1000ULL;
3471                 /* CPU multiplier */
3472                 msr_info->data |= (((uint64_t)4ULL) << 40);
3473                 break;
3474         case MSR_EFER:
3475                 msr_info->data = vcpu->arch.efer;
3476                 break;
3477         case MSR_KVM_WALL_CLOCK:
3478                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3479                         return 1;
3480
3481                 msr_info->data = vcpu->kvm->arch.wall_clock;
3482                 break;
3483         case MSR_KVM_WALL_CLOCK_NEW:
3484                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3485                         return 1;
3486
3487                 msr_info->data = vcpu->kvm->arch.wall_clock;
3488                 break;
3489         case MSR_KVM_SYSTEM_TIME:
3490                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3491                         return 1;
3492
3493                 msr_info->data = vcpu->arch.time;
3494                 break;
3495         case MSR_KVM_SYSTEM_TIME_NEW:
3496                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3497                         return 1;
3498
3499                 msr_info->data = vcpu->arch.time;
3500                 break;
3501         case MSR_KVM_ASYNC_PF_EN:
3502                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3503                         return 1;
3504
3505                 msr_info->data = vcpu->arch.apf.msr_en_val;
3506                 break;
3507         case MSR_KVM_ASYNC_PF_INT:
3508                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3509                         return 1;
3510
3511                 msr_info->data = vcpu->arch.apf.msr_int_val;
3512                 break;
3513         case MSR_KVM_ASYNC_PF_ACK:
3514                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3515                         return 1;
3516
3517                 msr_info->data = 0;
3518                 break;
3519         case MSR_KVM_STEAL_TIME:
3520                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3521                         return 1;
3522
3523                 msr_info->data = vcpu->arch.st.msr_val;
3524                 break;
3525         case MSR_KVM_PV_EOI_EN:
3526                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3527                         return 1;
3528
3529                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3530                 break;
3531         case MSR_KVM_POLL_CONTROL:
3532                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3533                         return 1;
3534
3535                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3536                 break;
3537         case MSR_IA32_P5_MC_ADDR:
3538         case MSR_IA32_P5_MC_TYPE:
3539         case MSR_IA32_MCG_CAP:
3540         case MSR_IA32_MCG_CTL:
3541         case MSR_IA32_MCG_STATUS:
3542         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3543                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3544                                    msr_info->host_initiated);
3545         case MSR_IA32_XSS:
3546                 if (!msr_info->host_initiated &&
3547                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3548                         return 1;
3549                 msr_info->data = vcpu->arch.ia32_xss;
3550                 break;
3551         case MSR_K7_CLK_CTL:
3552                 /*
3553                  * Provide expected ramp-up count for K7. All other
3554                  * are set to zero, indicating minimum divisors for
3555                  * every field.
3556                  *
3557                  * This prevents guest kernels on AMD host with CPU
3558                  * type 6, model 8 and higher from exploding due to
3559                  * the rdmsr failing.
3560                  */
3561                 msr_info->data = 0x20000000;
3562                 break;
3563         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3564         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3565         case HV_X64_MSR_SYNDBG_OPTIONS:
3566         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3567         case HV_X64_MSR_CRASH_CTL:
3568         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3569         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3570         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3571         case HV_X64_MSR_TSC_EMULATION_STATUS:
3572                 return kvm_hv_get_msr_common(vcpu,
3573                                              msr_info->index, &msr_info->data,
3574                                              msr_info->host_initiated);
3575         case MSR_IA32_BBL_CR_CTL3:
3576                 /* This legacy MSR exists but isn't fully documented in current
3577                  * silicon.  It is however accessed by winxp in very narrow
3578                  * scenarios where it sets bit #19, itself documented as
3579                  * a "reserved" bit.  Best effort attempt to source coherent
3580                  * read data here should the balance of the register be
3581                  * interpreted by the guest:
3582                  *
3583                  * L2 cache control register 3: 64GB range, 256KB size,
3584                  * enabled, latency 0x1, configured
3585                  */
3586                 msr_info->data = 0xbe702111;
3587                 break;
3588         case MSR_AMD64_OSVW_ID_LENGTH:
3589                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3590                         return 1;
3591                 msr_info->data = vcpu->arch.osvw.length;
3592                 break;
3593         case MSR_AMD64_OSVW_STATUS:
3594                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3595                         return 1;
3596                 msr_info->data = vcpu->arch.osvw.status;
3597                 break;
3598         case MSR_PLATFORM_INFO:
3599                 if (!msr_info->host_initiated &&
3600                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3601                         return 1;
3602                 msr_info->data = vcpu->arch.msr_platform_info;
3603                 break;
3604         case MSR_MISC_FEATURES_ENABLES:
3605                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3606                 break;
3607         case MSR_K7_HWCR:
3608                 msr_info->data = vcpu->arch.msr_hwcr;
3609                 break;
3610         default:
3611                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3612                         return kvm_pmu_get_msr(vcpu, msr_info);
3613                 return KVM_MSR_RET_INVALID;
3614         }
3615         return 0;
3616 }
3617 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3618
3619 /*
3620  * Read or write a bunch of msrs. All parameters are kernel addresses.
3621  *
3622  * @return number of msrs set successfully.
3623  */
3624 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3625                     struct kvm_msr_entry *entries,
3626                     int (*do_msr)(struct kvm_vcpu *vcpu,
3627                                   unsigned index, u64 *data))
3628 {
3629         int i;
3630
3631         for (i = 0; i < msrs->nmsrs; ++i)
3632                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3633                         break;
3634
3635         return i;
3636 }
3637
3638 /*
3639  * Read or write a bunch of msrs. Parameters are user addresses.
3640  *
3641  * @return number of msrs set successfully.
3642  */
3643 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3644                   int (*do_msr)(struct kvm_vcpu *vcpu,
3645                                 unsigned index, u64 *data),
3646                   int writeback)
3647 {
3648         struct kvm_msrs msrs;
3649         struct kvm_msr_entry *entries;
3650         int r, n;
3651         unsigned size;
3652
3653         r = -EFAULT;
3654         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3655                 goto out;
3656
3657         r = -E2BIG;
3658         if (msrs.nmsrs >= MAX_IO_MSRS)
3659                 goto out;
3660
3661         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3662         entries = memdup_user(user_msrs->entries, size);
3663         if (IS_ERR(entries)) {
3664                 r = PTR_ERR(entries);
3665                 goto out;
3666         }
3667
3668         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3669         if (r < 0)
3670                 goto out_free;
3671
3672         r = -EFAULT;
3673         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3674                 goto out_free;
3675
3676         r = n;
3677
3678 out_free:
3679         kfree(entries);
3680 out:
3681         return r;
3682 }
3683
3684 static inline bool kvm_can_mwait_in_guest(void)
3685 {
3686         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3687                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3688                 boot_cpu_has(X86_FEATURE_ARAT);
3689 }
3690
3691 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
3692                                             struct kvm_cpuid2 __user *cpuid_arg)
3693 {
3694         struct kvm_cpuid2 cpuid;
3695         int r;
3696
3697         r = -EFAULT;
3698         if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3699                 return r;
3700
3701         r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3702         if (r)
3703                 return r;
3704
3705         r = -EFAULT;
3706         if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3707                 return r;
3708
3709         return 0;
3710 }
3711
3712 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3713 {
3714         int r = 0;
3715
3716         switch (ext) {
3717         case KVM_CAP_IRQCHIP:
3718         case KVM_CAP_HLT:
3719         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3720         case KVM_CAP_SET_TSS_ADDR:
3721         case KVM_CAP_EXT_CPUID:
3722         case KVM_CAP_EXT_EMUL_CPUID:
3723         case KVM_CAP_CLOCKSOURCE:
3724         case KVM_CAP_PIT:
3725         case KVM_CAP_NOP_IO_DELAY:
3726         case KVM_CAP_MP_STATE:
3727         case KVM_CAP_SYNC_MMU:
3728         case KVM_CAP_USER_NMI:
3729         case KVM_CAP_REINJECT_CONTROL:
3730         case KVM_CAP_IRQ_INJECT_STATUS:
3731         case KVM_CAP_IOEVENTFD:
3732         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3733         case KVM_CAP_PIT2:
3734         case KVM_CAP_PIT_STATE2:
3735         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3736         case KVM_CAP_VCPU_EVENTS:
3737         case KVM_CAP_HYPERV:
3738         case KVM_CAP_HYPERV_VAPIC:
3739         case KVM_CAP_HYPERV_SPIN:
3740         case KVM_CAP_HYPERV_SYNIC:
3741         case KVM_CAP_HYPERV_SYNIC2:
3742         case KVM_CAP_HYPERV_VP_INDEX:
3743         case KVM_CAP_HYPERV_EVENTFD:
3744         case KVM_CAP_HYPERV_TLBFLUSH:
3745         case KVM_CAP_HYPERV_SEND_IPI:
3746         case KVM_CAP_HYPERV_CPUID:
3747         case KVM_CAP_SYS_HYPERV_CPUID:
3748         case KVM_CAP_PCI_SEGMENT:
3749         case KVM_CAP_DEBUGREGS:
3750         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3751         case KVM_CAP_XSAVE:
3752         case KVM_CAP_ASYNC_PF:
3753         case KVM_CAP_ASYNC_PF_INT:
3754         case KVM_CAP_GET_TSC_KHZ:
3755         case KVM_CAP_KVMCLOCK_CTRL:
3756         case KVM_CAP_READONLY_MEM:
3757         case KVM_CAP_HYPERV_TIME:
3758         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3759         case KVM_CAP_TSC_DEADLINE_TIMER:
3760         case KVM_CAP_DISABLE_QUIRKS:
3761         case KVM_CAP_SET_BOOT_CPU_ID:
3762         case KVM_CAP_SPLIT_IRQCHIP:
3763         case KVM_CAP_IMMEDIATE_EXIT:
3764         case KVM_CAP_PMU_EVENT_FILTER:
3765         case KVM_CAP_GET_MSR_FEATURES:
3766         case KVM_CAP_MSR_PLATFORM_INFO:
3767         case KVM_CAP_EXCEPTION_PAYLOAD:
3768         case KVM_CAP_SET_GUEST_DEBUG:
3769         case KVM_CAP_LAST_CPU:
3770         case KVM_CAP_X86_USER_SPACE_MSR:
3771         case KVM_CAP_X86_MSR_FILTER:
3772         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
3773                 r = 1;
3774                 break;
3775 #ifdef CONFIG_KVM_XEN
3776         case KVM_CAP_XEN_HVM:
3777                 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
3778                     KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
3779                     KVM_XEN_HVM_CONFIG_SHARED_INFO;
3780                 if (sched_info_on())
3781                         r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
3782                 break;
3783 #endif
3784         case KVM_CAP_SYNC_REGS:
3785                 r = KVM_SYNC_X86_VALID_FIELDS;
3786                 break;
3787         case KVM_CAP_ADJUST_CLOCK:
3788                 r = KVM_CLOCK_TSC_STABLE;
3789                 break;
3790         case KVM_CAP_X86_DISABLE_EXITS:
3791                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
3792                       KVM_X86_DISABLE_EXITS_CSTATE;
3793                 if(kvm_can_mwait_in_guest())
3794                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
3795                 break;
3796         case KVM_CAP_X86_SMM:
3797                 /* SMBASE is usually relocated above 1M on modern chipsets,
3798                  * and SMM handlers might indeed rely on 4G segment limits,
3799                  * so do not report SMM to be available if real mode is
3800                  * emulated via vm86 mode.  Still, do not go to great lengths
3801                  * to avoid userspace's usage of the feature, because it is a
3802                  * fringe case that is not enabled except via specific settings
3803                  * of the module parameters.
3804                  */
3805                 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
3806                 break;
3807         case KVM_CAP_VAPIC:
3808                 r = !static_call(kvm_x86_cpu_has_accelerated_tpr)();
3809                 break;
3810         case KVM_CAP_NR_VCPUS:
3811                 r = KVM_SOFT_MAX_VCPUS;
3812                 break;
3813         case KVM_CAP_MAX_VCPUS:
3814                 r = KVM_MAX_VCPUS;
3815                 break;
3816         case KVM_CAP_MAX_VCPU_ID:
3817                 r = KVM_MAX_VCPU_ID;
3818                 break;
3819         case KVM_CAP_PV_MMU:    /* obsolete */
3820                 r = 0;
3821                 break;
3822         case KVM_CAP_MCE:
3823                 r = KVM_MAX_MCE_BANKS;
3824                 break;
3825         case KVM_CAP_XCRS:
3826                 r = boot_cpu_has(X86_FEATURE_XSAVE);
3827                 break;
3828         case KVM_CAP_TSC_CONTROL:
3829                 r = kvm_has_tsc_control;
3830                 break;
3831         case KVM_CAP_X2APIC_API:
3832                 r = KVM_X2APIC_API_VALID_FLAGS;
3833                 break;
3834         case KVM_CAP_NESTED_STATE:
3835                 r = kvm_x86_ops.nested_ops->get_state ?
3836                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
3837                 break;
3838         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
3839                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
3840                 break;
3841         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3842                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
3843                 break;
3844         case KVM_CAP_SMALLER_MAXPHYADDR:
3845                 r = (int) allow_smaller_maxphyaddr;
3846                 break;
3847         case KVM_CAP_STEAL_TIME:
3848                 r = sched_info_on();
3849                 break;
3850         case KVM_CAP_X86_BUS_LOCK_EXIT:
3851                 if (kvm_has_bus_lock_exit)
3852                         r = KVM_BUS_LOCK_DETECTION_OFF |
3853                             KVM_BUS_LOCK_DETECTION_EXIT;
3854                 else
3855                         r = 0;
3856                 break;
3857         default:
3858                 break;
3859         }
3860         return r;
3861
3862 }
3863
3864 long kvm_arch_dev_ioctl(struct file *filp,
3865                         unsigned int ioctl, unsigned long arg)
3866 {
3867         void __user *argp = (void __user *)arg;
3868         long r;
3869
3870         switch (ioctl) {
3871         case KVM_GET_MSR_INDEX_LIST: {
3872                 struct kvm_msr_list __user *user_msr_list = argp;
3873                 struct kvm_msr_list msr_list;
3874                 unsigned n;
3875
3876                 r = -EFAULT;
3877                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3878                         goto out;
3879                 n = msr_list.nmsrs;
3880                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
3881                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3882                         goto out;
3883                 r = -E2BIG;
3884                 if (n < msr_list.nmsrs)
3885                         goto out;
3886                 r = -EFAULT;
3887                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
3888                                  num_msrs_to_save * sizeof(u32)))
3889                         goto out;
3890                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
3891                                  &emulated_msrs,
3892                                  num_emulated_msrs * sizeof(u32)))
3893                         goto out;
3894                 r = 0;
3895                 break;
3896         }
3897         case KVM_GET_SUPPORTED_CPUID:
3898         case KVM_GET_EMULATED_CPUID: {
3899                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3900                 struct kvm_cpuid2 cpuid;
3901
3902                 r = -EFAULT;
3903                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3904                         goto out;
3905
3906                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
3907                                             ioctl);
3908                 if (r)
3909                         goto out;
3910
3911                 r = -EFAULT;
3912                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3913                         goto out;
3914                 r = 0;
3915                 break;
3916         }
3917         case KVM_X86_GET_MCE_CAP_SUPPORTED:
3918                 r = -EFAULT;
3919                 if (copy_to_user(argp, &kvm_mce_cap_supported,
3920                                  sizeof(kvm_mce_cap_supported)))
3921                         goto out;
3922                 r = 0;
3923                 break;
3924         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
3925                 struct kvm_msr_list __user *user_msr_list = argp;
3926                 struct kvm_msr_list msr_list;
3927                 unsigned int n;
3928
3929                 r = -EFAULT;
3930                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3931                         goto out;
3932                 n = msr_list.nmsrs;
3933                 msr_list.nmsrs = num_msr_based_features;
3934                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3935                         goto out;
3936                 r = -E2BIG;
3937                 if (n < msr_list.nmsrs)
3938                         goto out;
3939                 r = -EFAULT;
3940                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
3941                                  num_msr_based_features * sizeof(u32)))
3942                         goto out;
3943                 r = 0;
3944                 break;
3945         }
3946         case KVM_GET_MSRS:
3947                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3948                 break;
3949         case KVM_GET_SUPPORTED_HV_CPUID:
3950                 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
3951                 break;
3952         default:
3953                 r = -EINVAL;
3954                 break;
3955         }
3956 out:
3957         return r;
3958 }
3959
3960 static void wbinvd_ipi(void *garbage)
3961 {
3962         wbinvd();
3963 }
3964
3965 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3966 {
3967         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3968 }
3969
3970 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3971 {
3972         /* Address WBINVD may be executed by guest */
3973         if (need_emulate_wbinvd(vcpu)) {
3974                 if (static_call(kvm_x86_has_wbinvd_exit)())
3975                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3976                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3977                         smp_call_function_single(vcpu->cpu,
3978                                         wbinvd_ipi, NULL, 1);
3979         }
3980
3981         static_call(kvm_x86_vcpu_load)(vcpu, cpu);
3982
3983         /* Save host pkru register if supported */
3984         vcpu->arch.host_pkru = read_pkru();
3985
3986         /* Apply any externally detected TSC adjustments (due to suspend) */
3987         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3988                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3989                 vcpu->arch.tsc_offset_adjustment = 0;
3990                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3991         }
3992
3993         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3994                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3995                                 rdtsc() - vcpu->arch.last_host_tsc;
3996                 if (tsc_delta < 0)
3997                         mark_tsc_unstable("KVM discovered backwards TSC");
3998
3999                 if (kvm_check_tsc_unstable()) {
4000                         u64 offset = kvm_compute_tsc_offset(vcpu,
4001                                                 vcpu->arch.last_guest_tsc);
4002                         kvm_vcpu_write_tsc_offset(vcpu, offset);
4003                         vcpu->arch.tsc_catchup = 1;
4004                 }
4005
4006                 if (kvm_lapic_hv_timer_in_use(vcpu))
4007                         kvm_lapic_restart_hv_timer(vcpu);
4008
4009                 /*
4010                  * On a host with synchronized TSC, there is no need to update
4011                  * kvmclock on vcpu->cpu migration
4012                  */
4013                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4014                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4015                 if (vcpu->cpu != cpu)
4016                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4017                 vcpu->cpu = cpu;
4018         }
4019
4020         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4021 }
4022
4023 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4024 {
4025         struct kvm_host_map map;
4026         struct kvm_steal_time *st;
4027         int idx;
4028
4029         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4030                 return;
4031
4032         if (vcpu->arch.st.preempted)
4033                 return;
4034
4035         /*
4036          * Take the srcu lock as memslots will be accessed to check the gfn
4037          * cache generation against the memslots generation.
4038          */
4039         idx = srcu_read_lock(&vcpu->kvm->srcu);
4040
4041         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT, &map,
4042                         &vcpu->arch.st.cache, true))
4043                 goto out;
4044
4045         st = map.hva +
4046                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
4047
4048         st->preempted = vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4049
4050         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, true);
4051
4052 out:
4053         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4054 }
4055
4056 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4057 {
4058         if (vcpu->preempted && !vcpu->arch.guest_state_protected)
4059                 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4060
4061         if (kvm_xen_msr_enabled(vcpu->kvm))
4062                 kvm_xen_runstate_set_preempted(vcpu);
4063         else
4064                 kvm_steal_time_set_preempted(vcpu);
4065
4066         static_call(kvm_x86_vcpu_put)(vcpu);
4067         vcpu->arch.last_host_tsc = rdtsc();
4068         /*
4069          * If userspace has set any breakpoints or watchpoints, dr6 is restored
4070          * on every vmexit, but if not, we might have a stale dr6 from the
4071          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
4072          */
4073         set_debugreg(0, 6);
4074 }
4075
4076 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4077                                     struct kvm_lapic_state *s)
4078 {
4079         if (vcpu->arch.apicv_active)
4080                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
4081
4082         return kvm_apic_get_state(vcpu, s);
4083 }
4084
4085 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4086                                     struct kvm_lapic_state *s)
4087 {
4088         int r;
4089
4090         r = kvm_apic_set_state(vcpu, s);
4091         if (r)
4092                 return r;
4093         update_cr8_intercept(vcpu);
4094
4095         return 0;
4096 }
4097
4098 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4099 {
4100         /*
4101          * We can accept userspace's request for interrupt injection
4102          * as long as we have a place to store the interrupt number.
4103          * The actual injection will happen when the CPU is able to
4104          * deliver the interrupt.
4105          */
4106         if (kvm_cpu_has_extint(vcpu))
4107                 return false;
4108
4109         /* Acknowledging ExtINT does not happen if LINT0 is masked.  */
4110         return (!lapic_in_kernel(vcpu) ||
4111                 kvm_apic_accept_pic_intr(vcpu));
4112 }
4113
4114 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4115 {
4116         return kvm_arch_interrupt_allowed(vcpu) &&
4117                 kvm_cpu_accept_dm_intr(vcpu);
4118 }
4119
4120 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4121                                     struct kvm_interrupt *irq)
4122 {
4123         if (irq->irq >= KVM_NR_INTERRUPTS)
4124                 return -EINVAL;
4125
4126         if (!irqchip_in_kernel(vcpu->kvm)) {
4127                 kvm_queue_interrupt(vcpu, irq->irq, false);
4128                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4129                 return 0;
4130         }
4131
4132         /*
4133          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4134          * fail for in-kernel 8259.
4135          */
4136         if (pic_in_kernel(vcpu->kvm))
4137                 return -ENXIO;
4138
4139         if (vcpu->arch.pending_external_vector != -1)
4140                 return -EEXIST;
4141
4142         vcpu->arch.pending_external_vector = irq->irq;
4143         kvm_make_request(KVM_REQ_EVENT, vcpu);
4144         return 0;
4145 }
4146
4147 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4148 {
4149         kvm_inject_nmi(vcpu);
4150
4151         return 0;
4152 }
4153
4154 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4155 {
4156         kvm_make_request(KVM_REQ_SMI, vcpu);
4157
4158         return 0;
4159 }
4160
4161 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4162                                            struct kvm_tpr_access_ctl *tac)
4163 {
4164         if (tac->flags)
4165                 return -EINVAL;
4166         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4167         return 0;
4168 }
4169
4170 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4171                                         u64 mcg_cap)
4172 {
4173         int r;
4174         unsigned bank_num = mcg_cap & 0xff, bank;
4175
4176         r = -EINVAL;
4177         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4178                 goto out;
4179         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4180                 goto out;
4181         r = 0;
4182         vcpu->arch.mcg_cap = mcg_cap;
4183         /* Init IA32_MCG_CTL to all 1s */
4184         if (mcg_cap & MCG_CTL_P)
4185                 vcpu->arch.mcg_ctl = ~(u64)0;
4186         /* Init IA32_MCi_CTL to all 1s */
4187         for (bank = 0; bank < bank_num; bank++)
4188                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4189
4190         static_call(kvm_x86_setup_mce)(vcpu);
4191 out:
4192         return r;
4193 }
4194
4195 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4196                                       struct kvm_x86_mce *mce)
4197 {
4198         u64 mcg_cap = vcpu->arch.mcg_cap;
4199         unsigned bank_num = mcg_cap & 0xff;
4200         u64 *banks = vcpu->arch.mce_banks;
4201
4202         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4203                 return -EINVAL;
4204         /*
4205          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4206          * reporting is disabled
4207          */
4208         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4209             vcpu->arch.mcg_ctl != ~(u64)0)
4210                 return 0;
4211         banks += 4 * mce->bank;
4212         /*
4213          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4214          * reporting is disabled for the bank
4215          */
4216         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4217                 return 0;
4218         if (mce->status & MCI_STATUS_UC) {
4219                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4220                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4221                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4222                         return 0;
4223                 }
4224                 if (banks[1] & MCI_STATUS_VAL)
4225                         mce->status |= MCI_STATUS_OVER;
4226                 banks[2] = mce->addr;
4227                 banks[3] = mce->misc;
4228                 vcpu->arch.mcg_status = mce->mcg_status;
4229                 banks[1] = mce->status;
4230                 kvm_queue_exception(vcpu, MC_VECTOR);
4231         } else if (!(banks[1] & MCI_STATUS_VAL)
4232                    || !(banks[1] & MCI_STATUS_UC)) {
4233                 if (banks[1] & MCI_STATUS_VAL)
4234                         mce->status |= MCI_STATUS_OVER;
4235                 banks[2] = mce->addr;
4236                 banks[3] = mce->misc;
4237                 banks[1] = mce->status;
4238         } else
4239                 banks[1] |= MCI_STATUS_OVER;
4240         return 0;
4241 }
4242
4243 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4244                                                struct kvm_vcpu_events *events)
4245 {
4246         process_nmi(vcpu);
4247
4248         if (kvm_check_request(KVM_REQ_SMI, vcpu))
4249                 process_smi(vcpu);
4250
4251         /*
4252          * In guest mode, payload delivery should be deferred,
4253          * so that the L1 hypervisor can intercept #PF before
4254          * CR2 is modified (or intercept #DB before DR6 is
4255          * modified under nVMX). Unless the per-VM capability,
4256          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4257          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4258          * opportunistically defer the exception payload, deliver it if the
4259          * capability hasn't been requested before processing a
4260          * KVM_GET_VCPU_EVENTS.
4261          */
4262         if (!vcpu->kvm->arch.exception_payload_enabled &&
4263             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4264                 kvm_deliver_exception_payload(vcpu);
4265
4266         /*
4267          * The API doesn't provide the instruction length for software
4268          * exceptions, so don't report them. As long as the guest RIP
4269          * isn't advanced, we should expect to encounter the exception
4270          * again.
4271          */
4272         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4273                 events->exception.injected = 0;
4274                 events->exception.pending = 0;
4275         } else {
4276                 events->exception.injected = vcpu->arch.exception.injected;
4277                 events->exception.pending = vcpu->arch.exception.pending;
4278                 /*
4279                  * For ABI compatibility, deliberately conflate
4280                  * pending and injected exceptions when
4281                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4282                  */
4283                 if (!vcpu->kvm->arch.exception_payload_enabled)
4284                         events->exception.injected |=
4285                                 vcpu->arch.exception.pending;
4286         }
4287         events->exception.nr = vcpu->arch.exception.nr;
4288         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4289         events->exception.error_code = vcpu->arch.exception.error_code;
4290         events->exception_has_payload = vcpu->arch.exception.has_payload;
4291         events->exception_payload = vcpu->arch.exception.payload;
4292
4293         events->interrupt.injected =
4294                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4295         events->interrupt.nr = vcpu->arch.interrupt.nr;
4296         events->interrupt.soft = 0;
4297         events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4298
4299         events->nmi.injected = vcpu->arch.nmi_injected;
4300         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4301         events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4302         events->nmi.pad = 0;
4303
4304         events->sipi_vector = 0; /* never valid when reporting to user space */
4305
4306         events->smi.smm = is_smm(vcpu);
4307         events->smi.pending = vcpu->arch.smi_pending;
4308         events->smi.smm_inside_nmi =
4309                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4310         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4311
4312         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4313                          | KVM_VCPUEVENT_VALID_SHADOW
4314                          | KVM_VCPUEVENT_VALID_SMM);
4315         if (vcpu->kvm->arch.exception_payload_enabled)
4316                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4317
4318         memset(&events->reserved, 0, sizeof(events->reserved));
4319 }
4320
4321 static void kvm_smm_changed(struct kvm_vcpu *vcpu);
4322
4323 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4324                                               struct kvm_vcpu_events *events)
4325 {
4326         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4327                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4328                               | KVM_VCPUEVENT_VALID_SHADOW
4329                               | KVM_VCPUEVENT_VALID_SMM
4330                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4331                 return -EINVAL;
4332
4333         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4334                 if (!vcpu->kvm->arch.exception_payload_enabled)
4335                         return -EINVAL;
4336                 if (events->exception.pending)
4337                         events->exception.injected = 0;
4338                 else
4339                         events->exception_has_payload = 0;
4340         } else {
4341                 events->exception.pending = 0;
4342                 events->exception_has_payload = 0;
4343         }
4344
4345         if ((events->exception.injected || events->exception.pending) &&
4346             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4347                 return -EINVAL;
4348
4349         /* INITs are latched while in SMM */
4350         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4351             (events->smi.smm || events->smi.pending) &&
4352             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4353                 return -EINVAL;
4354
4355         process_nmi(vcpu);
4356         vcpu->arch.exception.injected = events->exception.injected;
4357         vcpu->arch.exception.pending = events->exception.pending;
4358         vcpu->arch.exception.nr = events->exception.nr;
4359         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4360         vcpu->arch.exception.error_code = events->exception.error_code;
4361         vcpu->arch.exception.has_payload = events->exception_has_payload;
4362         vcpu->arch.exception.payload = events->exception_payload;
4363
4364         vcpu->arch.interrupt.injected = events->interrupt.injected;
4365         vcpu->arch.interrupt.nr = events->interrupt.nr;
4366         vcpu->arch.interrupt.soft = events->interrupt.soft;
4367         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4368                 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4369                                                 events->interrupt.shadow);
4370
4371         vcpu->arch.nmi_injected = events->nmi.injected;
4372         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4373                 vcpu->arch.nmi_pending = events->nmi.pending;
4374         static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
4375
4376         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4377             lapic_in_kernel(vcpu))
4378                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4379
4380         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4381                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
4382                         if (events->smi.smm)
4383                                 vcpu->arch.hflags |= HF_SMM_MASK;
4384                         else
4385                                 vcpu->arch.hflags &= ~HF_SMM_MASK;
4386                         kvm_smm_changed(vcpu);
4387                 }
4388
4389                 vcpu->arch.smi_pending = events->smi.pending;
4390
4391                 if (events->smi.smm) {
4392                         if (events->smi.smm_inside_nmi)
4393                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4394                         else
4395                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4396                 }
4397
4398                 if (lapic_in_kernel(vcpu)) {
4399                         if (events->smi.latched_init)
4400                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4401                         else
4402                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4403                 }
4404         }
4405
4406         kvm_make_request(KVM_REQ_EVENT, vcpu);
4407
4408         return 0;
4409 }
4410
4411 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4412                                              struct kvm_debugregs *dbgregs)
4413 {
4414         unsigned long val;
4415
4416         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4417         kvm_get_dr(vcpu, 6, &val);
4418         dbgregs->dr6 = val;
4419         dbgregs->dr7 = vcpu->arch.dr7;
4420         dbgregs->flags = 0;
4421         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4422 }
4423
4424 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4425                                             struct kvm_debugregs *dbgregs)
4426 {
4427         if (dbgregs->flags)
4428                 return -EINVAL;
4429
4430         if (!kvm_dr6_valid(dbgregs->dr6))
4431                 return -EINVAL;
4432         if (!kvm_dr7_valid(dbgregs->dr7))
4433                 return -EINVAL;
4434
4435         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4436         kvm_update_dr0123(vcpu);
4437         vcpu->arch.dr6 = dbgregs->dr6;
4438         vcpu->arch.dr7 = dbgregs->dr7;
4439         kvm_update_dr7(vcpu);
4440
4441         return 0;
4442 }
4443
4444 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4445
4446 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
4447 {
4448         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4449         u64 xstate_bv = xsave->header.xfeatures;
4450         u64 valid;
4451
4452         /*
4453          * Copy legacy XSAVE area, to avoid complications with CPUID
4454          * leaves 0 and 1 in the loop below.
4455          */
4456         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
4457
4458         /* Set XSTATE_BV */
4459         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
4460         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
4461
4462         /*
4463          * Copy each region from the possibly compacted offset to the
4464          * non-compacted offset.
4465          */
4466         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4467         while (valid) {
4468                 u64 xfeature_mask = valid & -valid;
4469                 int xfeature_nr = fls64(xfeature_mask) - 1;
4470                 void *src = get_xsave_addr(xsave, xfeature_nr);
4471
4472                 if (src) {
4473                         u32 size, offset, ecx, edx;
4474                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4475                                     &size, &offset, &ecx, &edx);
4476                         if (xfeature_nr == XFEATURE_PKRU)
4477                                 memcpy(dest + offset, &vcpu->arch.pkru,
4478                                        sizeof(vcpu->arch.pkru));
4479                         else
4480                                 memcpy(dest + offset, src, size);
4481
4482                 }
4483
4484                 valid -= xfeature_mask;
4485         }
4486 }
4487
4488 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
4489 {
4490         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4491         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
4492         u64 valid;
4493
4494         /*
4495          * Copy legacy XSAVE area, to avoid complications with CPUID
4496          * leaves 0 and 1 in the loop below.
4497          */
4498         memcpy(xsave, src, XSAVE_HDR_OFFSET);
4499
4500         /* Set XSTATE_BV and possibly XCOMP_BV.  */
4501         xsave->header.xfeatures = xstate_bv;
4502         if (boot_cpu_has(X86_FEATURE_XSAVES))
4503                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
4504
4505         /*
4506          * Copy each region from the non-compacted offset to the
4507          * possibly compacted offset.
4508          */
4509         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4510         while (valid) {
4511                 u64 xfeature_mask = valid & -valid;
4512                 int xfeature_nr = fls64(xfeature_mask) - 1;
4513                 void *dest = get_xsave_addr(xsave, xfeature_nr);
4514
4515                 if (dest) {
4516                         u32 size, offset, ecx, edx;
4517                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4518                                     &size, &offset, &ecx, &edx);
4519                         if (xfeature_nr == XFEATURE_PKRU)
4520                                 memcpy(&vcpu->arch.pkru, src + offset,
4521                                        sizeof(vcpu->arch.pkru));
4522                         else
4523                                 memcpy(dest, src + offset, size);
4524                 }
4525
4526                 valid -= xfeature_mask;
4527         }
4528 }
4529
4530 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4531                                          struct kvm_xsave *guest_xsave)
4532 {
4533         if (!vcpu->arch.guest_fpu)
4534                 return;
4535
4536         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4537                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
4538                 fill_xsave((u8 *) guest_xsave->region, vcpu);
4539         } else {
4540                 memcpy(guest_xsave->region,
4541                         &vcpu->arch.guest_fpu->state.fxsave,
4542                         sizeof(struct fxregs_state));
4543                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
4544                         XFEATURE_MASK_FPSSE;
4545         }
4546 }
4547
4548 #define XSAVE_MXCSR_OFFSET 24
4549
4550 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4551                                         struct kvm_xsave *guest_xsave)
4552 {
4553         u64 xstate_bv;
4554         u32 mxcsr;
4555
4556         if (!vcpu->arch.guest_fpu)
4557                 return 0;
4558
4559         xstate_bv = *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
4560         mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
4561
4562         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4563                 /*
4564                  * Here we allow setting states that are not present in
4565                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
4566                  * with old userspace.
4567                  */
4568                 if (xstate_bv & ~supported_xcr0 || mxcsr & ~mxcsr_feature_mask)
4569                         return -EINVAL;
4570                 load_xsave(vcpu, (u8 *)guest_xsave->region);
4571         } else {
4572                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
4573                         mxcsr & ~mxcsr_feature_mask)
4574                         return -EINVAL;
4575                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
4576                         guest_xsave->region, sizeof(struct fxregs_state));
4577         }
4578         return 0;
4579 }
4580
4581 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4582                                         struct kvm_xcrs *guest_xcrs)
4583 {
4584         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4585                 guest_xcrs->nr_xcrs = 0;
4586                 return;
4587         }
4588
4589         guest_xcrs->nr_xcrs = 1;
4590         guest_xcrs->flags = 0;
4591         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4592         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4593 }
4594
4595 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4596                                        struct kvm_xcrs *guest_xcrs)
4597 {
4598         int i, r = 0;
4599
4600         if (!boot_cpu_has(X86_FEATURE_XSAVE))
4601                 return -EINVAL;
4602
4603         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4604                 return -EINVAL;
4605
4606         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4607                 /* Only support XCR0 currently */
4608                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4609                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4610                                 guest_xcrs->xcrs[i].value);
4611                         break;
4612                 }
4613         if (r)
4614                 r = -EINVAL;
4615         return r;
4616 }
4617
4618 /*
4619  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4620  * stopped by the hypervisor.  This function will be called from the host only.
4621  * EINVAL is returned when the host attempts to set the flag for a guest that
4622  * does not support pv clocks.
4623  */
4624 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4625 {
4626         if (!vcpu->arch.pv_time_enabled)
4627                 return -EINVAL;
4628         vcpu->arch.pvclock_set_guest_stopped_request = true;
4629         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4630         return 0;
4631 }
4632
4633 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4634                                      struct kvm_enable_cap *cap)
4635 {
4636         int r;
4637         uint16_t vmcs_version;
4638         void __user *user_ptr;
4639
4640         if (cap->flags)
4641                 return -EINVAL;
4642
4643         switch (cap->cap) {
4644         case KVM_CAP_HYPERV_SYNIC2:
4645                 if (cap->args[0])
4646                         return -EINVAL;
4647                 fallthrough;
4648
4649         case KVM_CAP_HYPERV_SYNIC:
4650                 if (!irqchip_in_kernel(vcpu->kvm))
4651                         return -EINVAL;
4652                 return kvm_hv_activate_synic(vcpu, cap->cap ==
4653                                              KVM_CAP_HYPERV_SYNIC2);
4654         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4655                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
4656                         return -ENOTTY;
4657                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
4658                 if (!r) {
4659                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
4660                         if (copy_to_user(user_ptr, &vmcs_version,
4661                                          sizeof(vmcs_version)))
4662                                 r = -EFAULT;
4663                 }
4664                 return r;
4665         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4666                 if (!kvm_x86_ops.enable_direct_tlbflush)
4667                         return -ENOTTY;
4668
4669                 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
4670
4671         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4672                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
4673                 if (vcpu->arch.pv_cpuid.enforce)
4674                         kvm_update_pv_runtime(vcpu);
4675
4676                 return 0;
4677
4678         default:
4679                 return -EINVAL;
4680         }
4681 }
4682
4683 long kvm_arch_vcpu_ioctl(struct file *filp,
4684                          unsigned int ioctl, unsigned long arg)
4685 {
4686         struct kvm_vcpu *vcpu = filp->private_data;
4687         void __user *argp = (void __user *)arg;
4688         int r;
4689         union {
4690                 struct kvm_lapic_state *lapic;
4691                 struct kvm_xsave *xsave;
4692                 struct kvm_xcrs *xcrs;
4693                 void *buffer;
4694         } u;
4695
4696         vcpu_load(vcpu);
4697
4698         u.buffer = NULL;
4699         switch (ioctl) {
4700         case KVM_GET_LAPIC: {
4701                 r = -EINVAL;
4702                 if (!lapic_in_kernel(vcpu))
4703                         goto out;
4704                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4705                                 GFP_KERNEL_ACCOUNT);
4706
4707                 r = -ENOMEM;
4708                 if (!u.lapic)
4709                         goto out;
4710                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4711                 if (r)
4712                         goto out;
4713                 r = -EFAULT;
4714                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4715                         goto out;
4716                 r = 0;
4717                 break;
4718         }
4719         case KVM_SET_LAPIC: {
4720                 r = -EINVAL;
4721                 if (!lapic_in_kernel(vcpu))
4722                         goto out;
4723                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4724                 if (IS_ERR(u.lapic)) {
4725                         r = PTR_ERR(u.lapic);
4726                         goto out_nofree;
4727                 }
4728
4729                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4730                 break;
4731         }
4732         case KVM_INTERRUPT: {
4733                 struct kvm_interrupt irq;
4734
4735                 r = -EFAULT;
4736                 if (copy_from_user(&irq, argp, sizeof(irq)))
4737                         goto out;
4738                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4739                 break;
4740         }
4741         case KVM_NMI: {
4742                 r = kvm_vcpu_ioctl_nmi(vcpu);
4743                 break;
4744         }
4745         case KVM_SMI: {
4746                 r = kvm_vcpu_ioctl_smi(vcpu);
4747                 break;
4748         }
4749         case KVM_SET_CPUID: {
4750                 struct kvm_cpuid __user *cpuid_arg = argp;
4751                 struct kvm_cpuid cpuid;
4752
4753                 r = -EFAULT;
4754                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4755                         goto out;
4756                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4757                 break;
4758         }
4759         case KVM_SET_CPUID2: {
4760                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4761                 struct kvm_cpuid2 cpuid;
4762
4763                 r = -EFAULT;
4764                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4765                         goto out;
4766                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4767                                               cpuid_arg->entries);
4768                 break;
4769         }
4770         case KVM_GET_CPUID2: {
4771                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4772                 struct kvm_cpuid2 cpuid;
4773
4774                 r = -EFAULT;
4775                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4776                         goto out;
4777                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
4778                                               cpuid_arg->entries);
4779                 if (r)
4780                         goto out;
4781                 r = -EFAULT;
4782                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4783                         goto out;
4784                 r = 0;
4785                 break;
4786         }
4787         case KVM_GET_MSRS: {
4788                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4789                 r = msr_io(vcpu, argp, do_get_msr, 1);
4790                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4791                 break;
4792         }
4793         case KVM_SET_MSRS: {
4794                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4795                 r = msr_io(vcpu, argp, do_set_msr, 0);
4796                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4797                 break;
4798         }
4799         case KVM_TPR_ACCESS_REPORTING: {
4800                 struct kvm_tpr_access_ctl tac;
4801
4802                 r = -EFAULT;
4803                 if (copy_from_user(&tac, argp, sizeof(tac)))
4804                         goto out;
4805                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
4806                 if (r)
4807                         goto out;
4808                 r = -EFAULT;
4809                 if (copy_to_user(argp, &tac, sizeof(tac)))
4810                         goto out;
4811                 r = 0;
4812                 break;
4813         };
4814         case KVM_SET_VAPIC_ADDR: {
4815                 struct kvm_vapic_addr va;
4816                 int idx;
4817
4818                 r = -EINVAL;
4819                 if (!lapic_in_kernel(vcpu))
4820                         goto out;
4821                 r = -EFAULT;
4822                 if (copy_from_user(&va, argp, sizeof(va)))
4823                         goto out;
4824                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4825                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
4826                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4827                 break;
4828         }
4829         case KVM_X86_SETUP_MCE: {
4830                 u64 mcg_cap;
4831
4832                 r = -EFAULT;
4833                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
4834                         goto out;
4835                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
4836                 break;
4837         }
4838         case KVM_X86_SET_MCE: {
4839                 struct kvm_x86_mce mce;
4840
4841                 r = -EFAULT;
4842                 if (copy_from_user(&mce, argp, sizeof(mce)))
4843                         goto out;
4844                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
4845                 break;
4846         }
4847         case KVM_GET_VCPU_EVENTS: {
4848                 struct kvm_vcpu_events events;
4849
4850                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
4851
4852                 r = -EFAULT;
4853                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
4854                         break;
4855                 r = 0;
4856                 break;
4857         }
4858         case KVM_SET_VCPU_EVENTS: {
4859                 struct kvm_vcpu_events events;
4860
4861                 r = -EFAULT;
4862                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
4863                         break;
4864
4865                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
4866                 break;
4867         }
4868         case KVM_GET_DEBUGREGS: {
4869                 struct kvm_debugregs dbgregs;
4870
4871                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
4872
4873                 r = -EFAULT;
4874                 if (copy_to_user(argp, &dbgregs,
4875                                  sizeof(struct kvm_debugregs)))
4876                         break;
4877                 r = 0;
4878                 break;
4879         }
4880         case KVM_SET_DEBUGREGS: {
4881                 struct kvm_debugregs dbgregs;
4882
4883                 r = -EFAULT;
4884                 if (copy_from_user(&dbgregs, argp,
4885                                    sizeof(struct kvm_debugregs)))
4886                         break;
4887
4888                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
4889                 break;
4890         }
4891         case KVM_GET_XSAVE: {
4892                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
4893                 r = -ENOMEM;
4894                 if (!u.xsave)
4895                         break;
4896
4897                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
4898
4899                 r = -EFAULT;
4900                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
4901                         break;
4902                 r = 0;
4903                 break;
4904         }
4905         case KVM_SET_XSAVE: {
4906                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
4907                 if (IS_ERR(u.xsave)) {
4908                         r = PTR_ERR(u.xsave);
4909                         goto out_nofree;
4910                 }
4911
4912                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
4913                 break;
4914         }
4915         case KVM_GET_XCRS: {
4916                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
4917                 r = -ENOMEM;
4918                 if (!u.xcrs)
4919                         break;
4920
4921                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
4922
4923                 r = -EFAULT;
4924                 if (copy_to_user(argp, u.xcrs,
4925                                  sizeof(struct kvm_xcrs)))
4926                         break;
4927                 r = 0;
4928                 break;
4929         }
4930         case KVM_SET_XCRS: {
4931                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
4932                 if (IS_ERR(u.xcrs)) {
4933                         r = PTR_ERR(u.xcrs);
4934                         goto out_nofree;
4935                 }
4936
4937                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
4938                 break;
4939         }
4940         case KVM_SET_TSC_KHZ: {
4941                 u32 user_tsc_khz;
4942
4943                 r = -EINVAL;
4944                 user_tsc_khz = (u32)arg;
4945
4946                 if (kvm_has_tsc_control &&
4947                     user_tsc_khz >= kvm_max_guest_tsc_khz)
4948                         goto out;
4949
4950                 if (user_tsc_khz == 0)
4951                         user_tsc_khz = tsc_khz;
4952
4953                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
4954                         r = 0;
4955
4956                 goto out;
4957         }
4958         case KVM_GET_TSC_KHZ: {
4959                 r = vcpu->arch.virtual_tsc_khz;
4960                 goto out;
4961         }
4962         case KVM_KVMCLOCK_CTRL: {
4963                 r = kvm_set_guest_paused(vcpu);
4964                 goto out;
4965         }
4966         case KVM_ENABLE_CAP: {
4967                 struct kvm_enable_cap cap;
4968
4969                 r = -EFAULT;
4970                 if (copy_from_user(&cap, argp, sizeof(cap)))
4971                         goto out;
4972                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
4973                 break;
4974         }
4975         case KVM_GET_NESTED_STATE: {
4976                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4977                 u32 user_data_size;
4978
4979                 r = -EINVAL;
4980                 if (!kvm_x86_ops.nested_ops->get_state)
4981                         break;
4982
4983                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
4984                 r = -EFAULT;
4985                 if (get_user(user_data_size, &user_kvm_nested_state->size))
4986                         break;
4987
4988                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
4989                                                      user_data_size);
4990                 if (r < 0)
4991                         break;
4992
4993                 if (r > user_data_size) {
4994                         if (put_user(r, &user_kvm_nested_state->size))
4995                                 r = -EFAULT;
4996                         else
4997                                 r = -E2BIG;
4998                         break;
4999                 }
5000
5001                 r = 0;
5002                 break;
5003         }
5004         case KVM_SET_NESTED_STATE: {
5005                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5006                 struct kvm_nested_state kvm_state;
5007                 int idx;
5008
5009                 r = -EINVAL;
5010                 if (!kvm_x86_ops.nested_ops->set_state)
5011                         break;
5012
5013                 r = -EFAULT;
5014                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5015                         break;
5016
5017                 r = -EINVAL;
5018                 if (kvm_state.size < sizeof(kvm_state))
5019                         break;
5020
5021                 if (kvm_state.flags &
5022                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5023                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5024                       | KVM_STATE_NESTED_GIF_SET))
5025                         break;
5026
5027                 /* nested_run_pending implies guest_mode.  */
5028                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5029                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5030                         break;
5031
5032                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5033                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5034                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5035                 break;
5036         }
5037         case KVM_GET_SUPPORTED_HV_CPUID:
5038                 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5039                 break;
5040 #ifdef CONFIG_KVM_XEN
5041         case KVM_XEN_VCPU_GET_ATTR: {
5042                 struct kvm_xen_vcpu_attr xva;
5043
5044                 r = -EFAULT;
5045                 if (copy_from_user(&xva, argp, sizeof(xva)))
5046                         goto out;
5047                 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5048                 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5049                         r = -EFAULT;
5050                 break;
5051         }
5052         case KVM_XEN_VCPU_SET_ATTR: {
5053                 struct kvm_xen_vcpu_attr xva;
5054
5055                 r = -EFAULT;
5056                 if (copy_from_user(&xva, argp, sizeof(xva)))
5057                         goto out;
5058                 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5059                 break;
5060         }
5061 #endif
5062         default:
5063                 r = -EINVAL;
5064         }
5065 out:
5066         kfree(u.buffer);
5067 out_nofree:
5068         vcpu_put(vcpu);
5069         return r;
5070 }
5071
5072 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5073 {
5074         return VM_FAULT_SIGBUS;
5075 }
5076
5077 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5078 {
5079         int ret;
5080
5081         if (addr > (unsigned int)(-3 * PAGE_SIZE))
5082                 return -EINVAL;
5083         ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5084         return ret;
5085 }
5086
5087 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5088                                               u64 ident_addr)
5089 {
5090         return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5091 }
5092
5093 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5094                                          unsigned long kvm_nr_mmu_pages)
5095 {
5096         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5097                 return -EINVAL;
5098
5099         mutex_lock(&kvm->slots_lock);
5100
5101         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5102         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5103
5104         mutex_unlock(&kvm->slots_lock);
5105         return 0;
5106 }
5107
5108 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5109 {
5110         return kvm->arch.n_max_mmu_pages;
5111 }
5112
5113 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5114 {
5115         struct kvm_pic *pic = kvm->arch.vpic;
5116         int r;
5117
5118         r = 0;
5119         switch (chip->chip_id) {
5120         case KVM_IRQCHIP_PIC_MASTER:
5121                 memcpy(&chip->chip.pic, &pic->pics[0],
5122                         sizeof(struct kvm_pic_state));
5123                 break;
5124         case KVM_IRQCHIP_PIC_SLAVE:
5125                 memcpy(&chip->chip.pic, &pic->pics[1],
5126                         sizeof(struct kvm_pic_state));
5127                 break;
5128         case KVM_IRQCHIP_IOAPIC:
5129                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5130                 break;
5131         default:
5132                 r = -EINVAL;
5133                 break;
5134         }
5135         return r;
5136 }
5137
5138 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5139 {
5140         struct kvm_pic *pic = kvm->arch.vpic;
5141         int r;
5142
5143         r = 0;
5144         switch (chip->chip_id) {
5145         case KVM_IRQCHIP_PIC_MASTER:
5146                 spin_lock(&pic->lock);
5147                 memcpy(&pic->pics[0], &chip->chip.pic,
5148                         sizeof(struct kvm_pic_state));
5149                 spin_unlock(&pic->lock);
5150                 break;
5151         case KVM_IRQCHIP_PIC_SLAVE:
5152                 spin_lock(&pic->lock);
5153                 memcpy(&pic->pics[1], &chip->chip.pic,
5154                         sizeof(struct kvm_pic_state));
5155                 spin_unlock(&pic->lock);
5156                 break;
5157         case KVM_IRQCHIP_IOAPIC:
5158                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5159                 break;
5160         default:
5161                 r = -EINVAL;
5162                 break;
5163         }
5164         kvm_pic_update_irq(pic);
5165         return r;
5166 }
5167
5168 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5169 {
5170         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5171
5172         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5173
5174         mutex_lock(&kps->lock);
5175         memcpy(ps, &kps->channels, sizeof(*ps));
5176         mutex_unlock(&kps->lock);
5177         return 0;
5178 }
5179
5180 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5181 {
5182         int i;
5183         struct kvm_pit *pit = kvm->arch.vpit;
5184
5185         mutex_lock(&pit->pit_state.lock);
5186         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5187         for (i = 0; i < 3; i++)
5188                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5189         mutex_unlock(&pit->pit_state.lock);
5190         return 0;
5191 }
5192
5193 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5194 {
5195         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5196         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5197                 sizeof(ps->channels));
5198         ps->flags = kvm->arch.vpit->pit_state.flags;
5199         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5200         memset(&ps->reserved, 0, sizeof(ps->reserved));
5201         return 0;
5202 }
5203
5204 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5205 {
5206         int start = 0;
5207         int i;
5208         u32 prev_legacy, cur_legacy;
5209         struct kvm_pit *pit = kvm->arch.vpit;
5210
5211         mutex_lock(&pit->pit_state.lock);
5212         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5213         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5214         if (!prev_legacy && cur_legacy)
5215                 start = 1;
5216         memcpy(&pit->pit_state.channels, &ps->channels,
5217                sizeof(pit->pit_state.channels));
5218         pit->pit_state.flags = ps->flags;
5219         for (i = 0; i < 3; i++)
5220                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5221                                    start && i == 0);
5222         mutex_unlock(&pit->pit_state.lock);
5223         return 0;
5224 }
5225
5226 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5227                                  struct kvm_reinject_control *control)
5228 {
5229         struct kvm_pit *pit = kvm->arch.vpit;
5230
5231         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5232          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5233          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5234          */
5235         mutex_lock(&pit->pit_state.lock);
5236         kvm_pit_set_reinject(pit, control->pit_reinject);
5237         mutex_unlock(&pit->pit_state.lock);
5238
5239         return 0;
5240 }
5241
5242 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5243 {
5244
5245         /*
5246          * Flush all CPUs' dirty log buffers to the  dirty_bitmap.  Called
5247          * before reporting dirty_bitmap to userspace.  KVM flushes the buffers
5248          * on all VM-Exits, thus we only need to kick running vCPUs to force a
5249          * VM-Exit.
5250          */
5251         struct kvm_vcpu *vcpu;
5252         int i;
5253
5254         kvm_for_each_vcpu(i, vcpu, kvm)
5255                 kvm_vcpu_kick(vcpu);
5256 }
5257
5258 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5259                         bool line_status)
5260 {
5261         if (!irqchip_in_kernel(kvm))
5262                 return -ENXIO;
5263
5264         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5265                                         irq_event->irq, irq_event->level,
5266                                         line_status);
5267         return 0;
5268 }
5269
5270 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5271                             struct kvm_enable_cap *cap)
5272 {
5273         int r;
5274
5275         if (cap->flags)
5276                 return -EINVAL;
5277
5278         switch (cap->cap) {
5279         case KVM_CAP_DISABLE_QUIRKS:
5280                 kvm->arch.disabled_quirks = cap->args[0];
5281                 r = 0;
5282                 break;
5283         case KVM_CAP_SPLIT_IRQCHIP: {
5284                 mutex_lock(&kvm->lock);
5285                 r = -EINVAL;
5286                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5287                         goto split_irqchip_unlock;
5288                 r = -EEXIST;
5289                 if (irqchip_in_kernel(kvm))
5290                         goto split_irqchip_unlock;
5291                 if (kvm->created_vcpus)
5292                         goto split_irqchip_unlock;
5293                 r = kvm_setup_empty_irq_routing(kvm);
5294                 if (r)
5295                         goto split_irqchip_unlock;
5296                 /* Pairs with irqchip_in_kernel. */
5297                 smp_wmb();
5298                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5299                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5300                 r = 0;
5301 split_irqchip_unlock:
5302                 mutex_unlock(&kvm->lock);
5303                 break;
5304         }
5305         case KVM_CAP_X2APIC_API:
5306                 r = -EINVAL;
5307                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5308                         break;
5309
5310                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5311                         kvm->arch.x2apic_format = true;
5312                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5313                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5314
5315                 r = 0;
5316                 break;
5317         case KVM_CAP_X86_DISABLE_EXITS:
5318                 r = -EINVAL;
5319                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5320                         break;
5321
5322                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5323                         kvm_can_mwait_in_guest())
5324                         kvm->arch.mwait_in_guest = true;
5325                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5326                         kvm->arch.hlt_in_guest = true;
5327                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5328                         kvm->arch.pause_in_guest = true;
5329                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5330                         kvm->arch.cstate_in_guest = true;
5331                 r = 0;
5332                 break;
5333         case KVM_CAP_MSR_PLATFORM_INFO:
5334                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5335                 r = 0;
5336                 break;
5337         case KVM_CAP_EXCEPTION_PAYLOAD:
5338                 kvm->arch.exception_payload_enabled = cap->args[0];
5339                 r = 0;
5340                 break;
5341         case KVM_CAP_X86_USER_SPACE_MSR:
5342                 kvm->arch.user_space_msr_mask = cap->args[0];
5343                 r = 0;
5344                 break;
5345         case KVM_CAP_X86_BUS_LOCK_EXIT:
5346                 r = -EINVAL;
5347                 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
5348                         break;
5349
5350                 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
5351                     (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
5352                         break;
5353
5354                 if (kvm_has_bus_lock_exit &&
5355                     cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
5356                         kvm->arch.bus_lock_detection_enabled = true;
5357                 r = 0;
5358                 break;
5359         default:
5360                 r = -EINVAL;
5361                 break;
5362         }
5363         return r;
5364 }
5365
5366 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
5367 {
5368         struct kvm_x86_msr_filter *msr_filter;
5369
5370         msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
5371         if (!msr_filter)
5372                 return NULL;
5373
5374         msr_filter->default_allow = default_allow;
5375         return msr_filter;
5376 }
5377
5378 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
5379 {
5380         u32 i;
5381
5382         if (!msr_filter)
5383                 return;
5384
5385         for (i = 0; i < msr_filter->count; i++)
5386                 kfree(msr_filter->ranges[i].bitmap);
5387
5388         kfree(msr_filter);
5389 }
5390
5391 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
5392                               struct kvm_msr_filter_range *user_range)
5393 {
5394         struct msr_bitmap_range range;
5395         unsigned long *bitmap = NULL;
5396         size_t bitmap_size;
5397         int r;
5398
5399         if (!user_range->nmsrs)
5400                 return 0;
5401
5402         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
5403         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
5404                 return -EINVAL;
5405
5406         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
5407         if (IS_ERR(bitmap))
5408                 return PTR_ERR(bitmap);
5409
5410         range = (struct msr_bitmap_range) {
5411                 .flags = user_range->flags,
5412                 .base = user_range->base,
5413                 .nmsrs = user_range->nmsrs,
5414                 .bitmap = bitmap,
5415         };
5416
5417         if (range.flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE)) {
5418                 r = -EINVAL;
5419                 goto err;
5420         }
5421
5422         if (!range.flags) {
5423                 r = -EINVAL;
5424                 goto err;
5425         }
5426
5427         /* Everything ok, add this range identifier. */
5428         msr_filter->ranges[msr_filter->count] = range;
5429         msr_filter->count++;
5430
5431         return 0;
5432 err:
5433         kfree(bitmap);
5434         return r;
5435 }
5436
5437 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
5438 {
5439         struct kvm_msr_filter __user *user_msr_filter = argp;
5440         struct kvm_x86_msr_filter *new_filter, *old_filter;
5441         struct kvm_msr_filter filter;
5442         bool default_allow;
5443         bool empty = true;
5444         int r = 0;
5445         u32 i;
5446
5447         if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
5448                 return -EFAULT;
5449
5450         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
5451                 empty &= !filter.ranges[i].nmsrs;
5452
5453         default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
5454         if (empty && !default_allow)
5455                 return -EINVAL;
5456
5457         new_filter = kvm_alloc_msr_filter(default_allow);
5458         if (!new_filter)
5459                 return -ENOMEM;
5460
5461         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
5462                 r = kvm_add_msr_filter(new_filter, &filter.ranges[i]);
5463                 if (r) {
5464                         kvm_free_msr_filter(new_filter);
5465                         return r;
5466                 }
5467         }
5468
5469         mutex_lock(&kvm->lock);
5470
5471         /* The per-VM filter is protected by kvm->lock... */
5472         old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
5473
5474         rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
5475         synchronize_srcu(&kvm->srcu);
5476
5477         kvm_free_msr_filter(old_filter);
5478
5479         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
5480         mutex_unlock(&kvm->lock);
5481
5482         return 0;
5483 }
5484
5485 long kvm_arch_vm_ioctl(struct file *filp,
5486                        unsigned int ioctl, unsigned long arg)
5487 {
5488         struct kvm *kvm = filp->private_data;
5489         void __user *argp = (void __user *)arg;
5490         int r = -ENOTTY;
5491         /*
5492          * This union makes it completely explicit to gcc-3.x
5493          * that these two variables' stack usage should be
5494          * combined, not added together.
5495          */
5496         union {
5497                 struct kvm_pit_state ps;
5498                 struct kvm_pit_state2 ps2;
5499                 struct kvm_pit_config pit_config;
5500         } u;
5501
5502         switch (ioctl) {
5503         case KVM_SET_TSS_ADDR:
5504                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
5505                 break;
5506         case KVM_SET_IDENTITY_MAP_ADDR: {
5507                 u64 ident_addr;
5508
5509                 mutex_lock(&kvm->lock);
5510                 r = -EINVAL;
5511                 if (kvm->created_vcpus)
5512                         goto set_identity_unlock;
5513                 r = -EFAULT;
5514                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
5515                         goto set_identity_unlock;
5516                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
5517 set_identity_unlock:
5518                 mutex_unlock(&kvm->lock);
5519                 break;
5520         }
5521         case KVM_SET_NR_MMU_PAGES:
5522                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
5523                 break;
5524         case KVM_GET_NR_MMU_PAGES:
5525                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
5526                 break;
5527         case KVM_CREATE_IRQCHIP: {
5528                 mutex_lock(&kvm->lock);
5529
5530                 r = -EEXIST;
5531                 if (irqchip_in_kernel(kvm))
5532                         goto create_irqchip_unlock;
5533
5534                 r = -EINVAL;
5535                 if (kvm->created_vcpus)
5536                         goto create_irqchip_unlock;
5537
5538                 r = kvm_pic_init(kvm);
5539                 if (r)
5540                         goto create_irqchip_unlock;
5541
5542                 r = kvm_ioapic_init(kvm);
5543                 if (r) {
5544                         kvm_pic_destroy(kvm);
5545                         goto create_irqchip_unlock;
5546                 }
5547
5548                 r = kvm_setup_default_irq_routing(kvm);
5549                 if (r) {
5550                         kvm_ioapic_destroy(kvm);
5551                         kvm_pic_destroy(kvm);
5552                         goto create_irqchip_unlock;
5553                 }
5554                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5555                 smp_wmb();
5556                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
5557         create_irqchip_unlock:
5558                 mutex_unlock(&kvm->lock);
5559                 break;
5560         }
5561         case KVM_CREATE_PIT:
5562                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
5563                 goto create_pit;
5564         case KVM_CREATE_PIT2:
5565                 r = -EFAULT;
5566                 if (copy_from_user(&u.pit_config, argp,
5567                                    sizeof(struct kvm_pit_config)))
5568                         goto out;
5569         create_pit:
5570                 mutex_lock(&kvm->lock);
5571                 r = -EEXIST;
5572                 if (kvm->arch.vpit)
5573                         goto create_pit_unlock;
5574                 r = -ENOMEM;
5575                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
5576                 if (kvm->arch.vpit)
5577                         r = 0;
5578         create_pit_unlock:
5579                 mutex_unlock(&kvm->lock);
5580                 break;
5581         case KVM_GET_IRQCHIP: {
5582                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5583                 struct kvm_irqchip *chip;
5584
5585                 chip = memdup_user(argp, sizeof(*chip));
5586                 if (IS_ERR(chip)) {
5587                         r = PTR_ERR(chip);
5588                         goto out;
5589                 }
5590
5591                 r = -ENXIO;
5592                 if (!irqchip_kernel(kvm))
5593                         goto get_irqchip_out;
5594                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
5595                 if (r)
5596                         goto get_irqchip_out;
5597                 r = -EFAULT;
5598                 if (copy_to_user(argp, chip, sizeof(*chip)))
5599                         goto get_irqchip_out;
5600                 r = 0;
5601         get_irqchip_out:
5602                 kfree(chip);
5603                 break;
5604         }
5605         case KVM_SET_IRQCHIP: {
5606                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5607                 struct kvm_irqchip *chip;
5608
5609                 chip = memdup_user(argp, sizeof(*chip));
5610                 if (IS_ERR(chip)) {
5611                         r = PTR_ERR(chip);
5612                         goto out;
5613                 }
5614
5615                 r = -ENXIO;
5616                 if (!irqchip_kernel(kvm))
5617                         goto set_irqchip_out;
5618                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
5619         set_irqchip_out:
5620                 kfree(chip);
5621                 break;
5622         }
5623         case KVM_GET_PIT: {
5624                 r = -EFAULT;
5625                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
5626                         goto out;
5627                 r = -ENXIO;
5628                 if (!kvm->arch.vpit)
5629                         goto out;
5630                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
5631                 if (r)
5632                         goto out;
5633                 r = -EFAULT;
5634                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
5635                         goto out;
5636                 r = 0;
5637                 break;
5638         }
5639         case KVM_SET_PIT: {
5640                 r = -EFAULT;
5641                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
5642                         goto out;
5643                 mutex_lock(&kvm->lock);
5644                 r = -ENXIO;
5645                 if (!kvm->arch.vpit)
5646                         goto set_pit_out;
5647                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
5648 set_pit_out:
5649                 mutex_unlock(&kvm->lock);
5650                 break;
5651         }
5652         case KVM_GET_PIT2: {
5653                 r = -ENXIO;
5654                 if (!kvm->arch.vpit)
5655                         goto out;
5656                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
5657                 if (r)
5658                         goto out;
5659                 r = -EFAULT;
5660                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
5661                         goto out;
5662                 r = 0;
5663                 break;
5664         }
5665         case KVM_SET_PIT2: {
5666                 r = -EFAULT;
5667                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
5668                         goto out;
5669                 mutex_lock(&kvm->lock);
5670                 r = -ENXIO;
5671                 if (!kvm->arch.vpit)
5672                         goto set_pit2_out;
5673                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
5674 set_pit2_out:
5675                 mutex_unlock(&kvm->lock);
5676                 break;
5677         }
5678         case KVM_REINJECT_CONTROL: {
5679                 struct kvm_reinject_control control;
5680                 r =  -EFAULT;
5681                 if (copy_from_user(&control, argp, sizeof(control)))
5682                         goto out;
5683                 r = -ENXIO;
5684                 if (!kvm->arch.vpit)
5685                         goto out;
5686                 r = kvm_vm_ioctl_reinject(kvm, &control);
5687                 break;
5688         }
5689         case KVM_SET_BOOT_CPU_ID:
5690                 r = 0;
5691                 mutex_lock(&kvm->lock);
5692                 if (kvm->created_vcpus)
5693                         r = -EBUSY;
5694                 else
5695                         kvm->arch.bsp_vcpu_id = arg;
5696                 mutex_unlock(&kvm->lock);
5697                 break;
5698 #ifdef CONFIG_KVM_XEN
5699         case KVM_XEN_HVM_CONFIG: {
5700                 struct kvm_xen_hvm_config xhc;
5701                 r = -EFAULT;
5702                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
5703                         goto out;
5704                 r = kvm_xen_hvm_config(kvm, &xhc);
5705                 break;
5706         }
5707         case KVM_XEN_HVM_GET_ATTR: {
5708                 struct kvm_xen_hvm_attr xha;
5709
5710                 r = -EFAULT;
5711                 if (copy_from_user(&xha, argp, sizeof(xha)))
5712                         goto out;
5713                 r = kvm_xen_hvm_get_attr(kvm, &xha);
5714                 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
5715                         r = -EFAULT;
5716                 break;
5717         }
5718         case KVM_XEN_HVM_SET_ATTR: {
5719                 struct kvm_xen_hvm_attr xha;
5720
5721                 r = -EFAULT;
5722                 if (copy_from_user(&xha, argp, sizeof(xha)))
5723                         goto out;
5724                 r = kvm_xen_hvm_set_attr(kvm, &xha);
5725                 break;
5726         }
5727 #endif
5728         case KVM_SET_CLOCK: {
5729                 struct kvm_clock_data user_ns;
5730                 u64 now_ns;
5731
5732                 r = -EFAULT;
5733                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
5734                         goto out;
5735
5736                 r = -EINVAL;
5737                 if (user_ns.flags)
5738                         goto out;
5739
5740                 r = 0;
5741                 /*
5742                  * TODO: userspace has to take care of races with VCPU_RUN, so
5743                  * kvm_gen_update_masterclock() can be cut down to locked
5744                  * pvclock_update_vm_gtod_copy().
5745                  */
5746                 kvm_gen_update_masterclock(kvm);
5747                 now_ns = get_kvmclock_ns(kvm);
5748                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
5749                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
5750                 break;
5751         }
5752         case KVM_GET_CLOCK: {
5753                 struct kvm_clock_data user_ns;
5754                 u64 now_ns;
5755
5756                 now_ns = get_kvmclock_ns(kvm);
5757                 user_ns.clock = now_ns;
5758                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
5759                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
5760
5761                 r = -EFAULT;
5762                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
5763                         goto out;
5764                 r = 0;
5765                 break;
5766         }
5767         case KVM_MEMORY_ENCRYPT_OP: {
5768                 r = -ENOTTY;
5769                 if (kvm_x86_ops.mem_enc_op)
5770                         r = static_call(kvm_x86_mem_enc_op)(kvm, argp);
5771                 break;
5772         }
5773         case KVM_MEMORY_ENCRYPT_REG_REGION: {
5774                 struct kvm_enc_region region;
5775
5776                 r = -EFAULT;
5777                 if (copy_from_user(&region, argp, sizeof(region)))
5778                         goto out;
5779
5780                 r = -ENOTTY;
5781                 if (kvm_x86_ops.mem_enc_reg_region)
5782                         r = static_call(kvm_x86_mem_enc_reg_region)(kvm, &region);
5783                 break;
5784         }
5785         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
5786                 struct kvm_enc_region region;
5787
5788                 r = -EFAULT;
5789                 if (copy_from_user(&region, argp, sizeof(region)))
5790                         goto out;
5791
5792                 r = -ENOTTY;
5793                 if (kvm_x86_ops.mem_enc_unreg_region)
5794                         r = static_call(kvm_x86_mem_enc_unreg_region)(kvm, &region);
5795                 break;
5796         }
5797         case KVM_HYPERV_EVENTFD: {
5798                 struct kvm_hyperv_eventfd hvevfd;
5799
5800                 r = -EFAULT;
5801                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
5802                         goto out;
5803                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
5804                 break;
5805         }
5806         case KVM_SET_PMU_EVENT_FILTER:
5807                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
5808                 break;
5809         case KVM_X86_SET_MSR_FILTER:
5810                 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
5811                 break;
5812         default:
5813                 r = -ENOTTY;
5814         }
5815 out:
5816         return r;
5817 }
5818
5819 static void kvm_init_msr_list(void)
5820 {
5821         struct x86_pmu_capability x86_pmu;
5822         u32 dummy[2];
5823         unsigned i;
5824
5825         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
5826                          "Please update the fixed PMCs in msrs_to_saved_all[]");
5827
5828         perf_get_x86_pmu_capability(&x86_pmu);
5829
5830         num_msrs_to_save = 0;
5831         num_emulated_msrs = 0;
5832         num_msr_based_features = 0;
5833
5834         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
5835                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
5836                         continue;
5837
5838                 /*
5839                  * Even MSRs that are valid in the host may not be exposed
5840                  * to the guests in some cases.
5841                  */
5842                 switch (msrs_to_save_all[i]) {
5843                 case MSR_IA32_BNDCFGS:
5844                         if (!kvm_mpx_supported())
5845                                 continue;
5846                         break;
5847                 case MSR_TSC_AUX:
5848                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP))
5849                                 continue;
5850                         break;
5851                 case MSR_IA32_UMWAIT_CONTROL:
5852                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
5853                                 continue;
5854                         break;
5855                 case MSR_IA32_RTIT_CTL:
5856                 case MSR_IA32_RTIT_STATUS:
5857                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
5858                                 continue;
5859                         break;
5860                 case MSR_IA32_RTIT_CR3_MATCH:
5861                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5862                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
5863                                 continue;
5864                         break;
5865                 case MSR_IA32_RTIT_OUTPUT_BASE:
5866                 case MSR_IA32_RTIT_OUTPUT_MASK:
5867                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5868                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
5869                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
5870                                 continue;
5871                         break;
5872                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
5873                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5874                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
5875                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
5876                                 continue;
5877                         break;
5878                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
5879                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
5880                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5881                                 continue;
5882                         break;
5883                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
5884                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
5885                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5886                                 continue;
5887                         break;
5888                 default:
5889                         break;
5890                 }
5891
5892                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
5893         }
5894
5895         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
5896                 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
5897                         continue;
5898
5899                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
5900         }
5901
5902         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
5903                 struct kvm_msr_entry msr;
5904
5905                 msr.index = msr_based_features_all[i];
5906                 if (kvm_get_msr_feature(&msr))
5907                         continue;
5908
5909                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
5910         }
5911 }
5912
5913 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
5914                            const void *v)
5915 {
5916         int handled = 0;
5917         int n;
5918
5919         do {
5920                 n = min(len, 8);
5921                 if (!(lapic_in_kernel(vcpu) &&
5922                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
5923                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
5924                         break;
5925                 handled += n;
5926                 addr += n;
5927                 len -= n;
5928                 v += n;
5929         } while (len);
5930
5931         return handled;
5932 }
5933
5934 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
5935 {
5936         int handled = 0;
5937         int n;
5938
5939         do {
5940                 n = min(len, 8);
5941                 if (!(lapic_in_kernel(vcpu) &&
5942                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
5943                                          addr, n, v))
5944                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
5945                         break;
5946                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
5947                 handled += n;
5948                 addr += n;
5949                 len -= n;
5950                 v += n;
5951         } while (len);
5952
5953         return handled;
5954 }
5955
5956 static void kvm_set_segment(struct kvm_vcpu *vcpu,
5957                         struct kvm_segment *var, int seg)
5958 {
5959         static_call(kvm_x86_set_segment)(vcpu, var, seg);
5960 }
5961
5962 void kvm_get_segment(struct kvm_vcpu *vcpu,
5963                      struct kvm_segment *var, int seg)
5964 {
5965         static_call(kvm_x86_get_segment)(vcpu, var, seg);
5966 }
5967
5968 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
5969                            struct x86_exception *exception)
5970 {
5971         gpa_t t_gpa;
5972
5973         BUG_ON(!mmu_is_nested(vcpu));
5974
5975         /* NPT walks are always user-walks */
5976         access |= PFERR_USER_MASK;
5977         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
5978
5979         return t_gpa;
5980 }
5981
5982 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
5983                               struct x86_exception *exception)
5984 {
5985         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
5986         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5987 }
5988
5989  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
5990                                 struct x86_exception *exception)
5991 {
5992         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
5993         access |= PFERR_FETCH_MASK;
5994         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5995 }
5996
5997 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
5998                                struct x86_exception *exception)
5999 {
6000         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6001         access |= PFERR_WRITE_MASK;
6002         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6003 }
6004
6005 /* uses this to access any guest's mapped memory without checking CPL */
6006 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
6007                                 struct x86_exception *exception)
6008 {
6009         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
6010 }
6011
6012 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6013                                       struct kvm_vcpu *vcpu, u32 access,
6014                                       struct x86_exception *exception)
6015 {
6016         void *data = val;
6017         int r = X86EMUL_CONTINUE;
6018
6019         while (bytes) {
6020                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
6021                                                             exception);
6022                 unsigned offset = addr & (PAGE_SIZE-1);
6023                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
6024                 int ret;
6025
6026                 if (gpa == UNMAPPED_GVA)
6027                         return X86EMUL_PROPAGATE_FAULT;
6028                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
6029                                                offset, toread);
6030                 if (ret < 0) {
6031                         r = X86EMUL_IO_NEEDED;
6032                         goto out;
6033                 }
6034
6035                 bytes -= toread;
6036                 data += toread;
6037                 addr += toread;
6038         }
6039 out:
6040         return r;
6041 }
6042
6043 /* used for instruction fetching */
6044 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6045                                 gva_t addr, void *val, unsigned int bytes,
6046                                 struct x86_exception *exception)
6047 {
6048         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6049         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6050         unsigned offset;
6051         int ret;
6052
6053         /* Inline kvm_read_guest_virt_helper for speed.  */
6054         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
6055                                                     exception);
6056         if (unlikely(gpa == UNMAPPED_GVA))
6057                 return X86EMUL_PROPAGATE_FAULT;
6058
6059         offset = addr & (PAGE_SIZE-1);
6060         if (WARN_ON(offset + bytes > PAGE_SIZE))
6061                 bytes = (unsigned)PAGE_SIZE - offset;
6062         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6063                                        offset, bytes);
6064         if (unlikely(ret < 0))
6065                 return X86EMUL_IO_NEEDED;
6066
6067         return X86EMUL_CONTINUE;
6068 }
6069
6070 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6071                                gva_t addr, void *val, unsigned int bytes,
6072                                struct x86_exception *exception)
6073 {
6074         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6075
6076         /*
6077          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6078          * is returned, but our callers are not ready for that and they blindly
6079          * call kvm_inject_page_fault.  Ensure that they at least do not leak
6080          * uninitialized kernel stack memory into cr2 and error code.
6081          */
6082         memset(exception, 0, sizeof(*exception));
6083         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6084                                           exception);
6085 }
6086 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6087
6088 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6089                              gva_t addr, void *val, unsigned int bytes,
6090                              struct x86_exception *exception, bool system)
6091 {
6092         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6093         u32 access = 0;
6094
6095         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6096                 access |= PFERR_USER_MASK;
6097
6098         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6099 }
6100
6101 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6102                 unsigned long addr, void *val, unsigned int bytes)
6103 {
6104         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6105         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6106
6107         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6108 }
6109
6110 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6111                                       struct kvm_vcpu *vcpu, u32 access,
6112                                       struct x86_exception *exception)
6113 {
6114         void *data = val;
6115         int r = X86EMUL_CONTINUE;
6116
6117         while (bytes) {
6118                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
6119                                                              access,
6120                                                              exception);
6121                 unsigned offset = addr & (PAGE_SIZE-1);
6122                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6123                 int ret;
6124
6125                 if (gpa == UNMAPPED_GVA)
6126                         return X86EMUL_PROPAGATE_FAULT;
6127                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6128                 if (ret < 0) {
6129                         r = X86EMUL_IO_NEEDED;
6130                         goto out;
6131                 }
6132
6133                 bytes -= towrite;
6134                 data += towrite;
6135                 addr += towrite;
6136         }
6137 out:
6138         return r;
6139 }
6140
6141 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6142                               unsigned int bytes, struct x86_exception *exception,
6143                               bool system)
6144 {
6145         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6146         u32 access = PFERR_WRITE_MASK;
6147
6148         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6149                 access |= PFERR_USER_MASK;
6150
6151         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6152                                            access, exception);
6153 }
6154
6155 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6156                                 unsigned int bytes, struct x86_exception *exception)
6157 {
6158         /* kvm_write_guest_virt_system can pull in tons of pages. */
6159         vcpu->arch.l1tf_flush_l1d = true;
6160
6161         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6162                                            PFERR_WRITE_MASK, exception);
6163 }
6164 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6165
6166 int handle_ud(struct kvm_vcpu *vcpu)
6167 {
6168         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6169         int emul_type = EMULTYPE_TRAP_UD;
6170         char sig[5]; /* ud2; .ascii "kvm" */
6171         struct x86_exception e;
6172
6173         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, NULL, 0)))
6174                 return 1;
6175
6176         if (force_emulation_prefix &&
6177             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6178                                 sig, sizeof(sig), &e) == 0 &&
6179             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6180                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6181                 emul_type = EMULTYPE_TRAP_UD_FORCED;
6182         }
6183
6184         return kvm_emulate_instruction(vcpu, emul_type);
6185 }
6186 EXPORT_SYMBOL_GPL(handle_ud);
6187
6188 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6189                             gpa_t gpa, bool write)
6190 {
6191         /* For APIC access vmexit */
6192         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6193                 return 1;
6194
6195         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6196                 trace_vcpu_match_mmio(gva, gpa, write, true);
6197                 return 1;
6198         }
6199
6200         return 0;
6201 }
6202
6203 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6204                                 gpa_t *gpa, struct x86_exception *exception,
6205                                 bool write)
6206 {
6207         u32 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
6208                 | (write ? PFERR_WRITE_MASK : 0);
6209
6210         /*
6211          * currently PKRU is only applied to ept enabled guest so
6212          * there is no pkey in EPT page table for L1 guest or EPT
6213          * shadow page table for L2 guest.
6214          */
6215         if (vcpu_match_mmio_gva(vcpu, gva)
6216             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
6217                                  vcpu->arch.mmio_access, 0, access)) {
6218                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6219                                         (gva & (PAGE_SIZE - 1));
6220                 trace_vcpu_match_mmio(gva, *gpa, write, false);
6221                 return 1;
6222         }
6223
6224         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6225
6226         if (*gpa == UNMAPPED_GVA)
6227                 return -1;
6228
6229         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6230 }
6231
6232 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6233                         const void *val, int bytes)
6234 {
6235         int ret;
6236
6237         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6238         if (ret < 0)
6239                 return 0;
6240         kvm_page_track_write(vcpu, gpa, val, bytes);
6241         return 1;
6242 }
6243
6244 struct read_write_emulator_ops {
6245         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6246                                   int bytes);
6247         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6248                                   void *val, int bytes);
6249         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6250                                int bytes, void *val);
6251         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6252                                     void *val, int bytes);
6253         bool write;
6254 };
6255
6256 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6257 {
6258         if (vcpu->mmio_read_completed) {
6259                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6260                                vcpu->mmio_fragments[0].gpa, val);
6261                 vcpu->mmio_read_completed = 0;
6262                 return 1;
6263         }
6264
6265         return 0;
6266 }
6267
6268 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6269                         void *val, int bytes)
6270 {
6271         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6272 }
6273
6274 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6275                          void *val, int bytes)
6276 {
6277         return emulator_write_phys(vcpu, gpa, val, bytes);
6278 }
6279
6280 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6281 {
6282         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
6283         return vcpu_mmio_write(vcpu, gpa, bytes, val);
6284 }
6285
6286 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6287                           void *val, int bytes)
6288 {
6289         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
6290         return X86EMUL_IO_NEEDED;
6291 }
6292
6293 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6294                            void *val, int bytes)
6295 {
6296         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
6297
6298         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
6299         return X86EMUL_CONTINUE;
6300 }
6301
6302 static const struct read_write_emulator_ops read_emultor = {
6303         .read_write_prepare = read_prepare,
6304         .read_write_emulate = read_emulate,
6305         .read_write_mmio = vcpu_mmio_read,
6306         .read_write_exit_mmio = read_exit_mmio,
6307 };
6308
6309 static const struct read_write_emulator_ops write_emultor = {
6310         .read_write_emulate = write_emulate,
6311         .read_write_mmio = write_mmio,
6312         .read_write_exit_mmio = write_exit_mmio,
6313         .write = true,
6314 };
6315
6316 static int emulator_read_write_onepage(unsigned long addr, void *val,
6317                                        unsigned int bytes,
6318                                        struct x86_exception *exception,
6319                                        struct kvm_vcpu *vcpu,
6320                                        const struct read_write_emulator_ops *ops)
6321 {
6322         gpa_t gpa;
6323         int handled, ret;
6324         bool write = ops->write;
6325         struct kvm_mmio_fragment *frag;
6326         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6327
6328         /*
6329          * If the exit was due to a NPF we may already have a GPA.
6330          * If the GPA is present, use it to avoid the GVA to GPA table walk.
6331          * Note, this cannot be used on string operations since string
6332          * operation using rep will only have the initial GPA from the NPF
6333          * occurred.
6334          */
6335         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
6336             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
6337                 gpa = ctxt->gpa_val;
6338                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
6339         } else {
6340                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
6341                 if (ret < 0)
6342                         return X86EMUL_PROPAGATE_FAULT;
6343         }
6344
6345         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
6346                 return X86EMUL_CONTINUE;
6347
6348         /*
6349          * Is this MMIO handled locally?
6350          */
6351         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
6352         if (handled == bytes)
6353                 return X86EMUL_CONTINUE;
6354
6355         gpa += handled;
6356         bytes -= handled;
6357         val += handled;
6358
6359         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
6360         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
6361         frag->gpa = gpa;
6362         frag->data = val;
6363         frag->len = bytes;
6364         return X86EMUL_CONTINUE;
6365 }
6366
6367 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
6368                         unsigned long addr,
6369                         void *val, unsigned int bytes,
6370                         struct x86_exception *exception,
6371                         const struct read_write_emulator_ops *ops)
6372 {
6373         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6374         gpa_t gpa;
6375         int rc;
6376
6377         if (ops->read_write_prepare &&
6378                   ops->read_write_prepare(vcpu, val, bytes))
6379                 return X86EMUL_CONTINUE;
6380
6381         vcpu->mmio_nr_fragments = 0;
6382
6383         /* Crossing a page boundary? */
6384         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
6385                 int now;
6386
6387                 now = -addr & ~PAGE_MASK;
6388                 rc = emulator_read_write_onepage(addr, val, now, exception,
6389                                                  vcpu, ops);
6390
6391                 if (rc != X86EMUL_CONTINUE)
6392                         return rc;
6393                 addr += now;
6394                 if (ctxt->mode != X86EMUL_MODE_PROT64)
6395                         addr = (u32)addr;
6396                 val += now;
6397                 bytes -= now;
6398         }
6399
6400         rc = emulator_read_write_onepage(addr, val, bytes, exception,
6401                                          vcpu, ops);
6402         if (rc != X86EMUL_CONTINUE)
6403                 return rc;
6404
6405         if (!vcpu->mmio_nr_fragments)
6406                 return rc;
6407
6408         gpa = vcpu->mmio_fragments[0].gpa;
6409
6410         vcpu->mmio_needed = 1;
6411         vcpu->mmio_cur_fragment = 0;
6412
6413         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
6414         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
6415         vcpu->run->exit_reason = KVM_EXIT_MMIO;
6416         vcpu->run->mmio.phys_addr = gpa;
6417
6418         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
6419 }
6420
6421 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
6422                                   unsigned long addr,
6423                                   void *val,
6424                                   unsigned int bytes,
6425                                   struct x86_exception *exception)
6426 {
6427         return emulator_read_write(ctxt, addr, val, bytes,
6428                                    exception, &read_emultor);
6429 }
6430
6431 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
6432                             unsigned long addr,
6433                             const void *val,
6434                             unsigned int bytes,
6435                             struct x86_exception *exception)
6436 {
6437         return emulator_read_write(ctxt, addr, (void *)val, bytes,
6438                                    exception, &write_emultor);
6439 }
6440
6441 #define CMPXCHG_TYPE(t, ptr, old, new) \
6442         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6443
6444 #ifdef CONFIG_X86_64
6445 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6446 #else
6447 #  define CMPXCHG64(ptr, old, new) \
6448         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6449 #endif
6450
6451 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
6452                                      unsigned long addr,
6453                                      const void *old,
6454                                      const void *new,
6455                                      unsigned int bytes,
6456                                      struct x86_exception *exception)
6457 {
6458         struct kvm_host_map map;
6459         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6460         u64 page_line_mask;
6461         gpa_t gpa;
6462         char *kaddr;
6463         bool exchanged;
6464
6465         /* guests cmpxchg8b have to be emulated atomically */
6466         if (bytes > 8 || (bytes & (bytes - 1)))
6467                 goto emul_write;
6468
6469         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
6470
6471         if (gpa == UNMAPPED_GVA ||
6472             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6473                 goto emul_write;
6474
6475         /*
6476          * Emulate the atomic as a straight write to avoid #AC if SLD is
6477          * enabled in the host and the access splits a cache line.
6478          */
6479         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
6480                 page_line_mask = ~(cache_line_size() - 1);
6481         else
6482                 page_line_mask = PAGE_MASK;
6483
6484         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
6485                 goto emul_write;
6486
6487         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
6488                 goto emul_write;
6489
6490         kaddr = map.hva + offset_in_page(gpa);
6491
6492         switch (bytes) {
6493         case 1:
6494                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
6495                 break;
6496         case 2:
6497                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
6498                 break;
6499         case 4:
6500                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
6501                 break;
6502         case 8:
6503                 exchanged = CMPXCHG64(kaddr, old, new);
6504                 break;
6505         default:
6506                 BUG();
6507         }
6508
6509         kvm_vcpu_unmap(vcpu, &map, true);
6510
6511         if (!exchanged)
6512                 return X86EMUL_CMPXCHG_FAILED;
6513
6514         kvm_page_track_write(vcpu, gpa, new, bytes);
6515
6516         return X86EMUL_CONTINUE;
6517
6518 emul_write:
6519         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
6520
6521         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
6522 }
6523
6524 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
6525 {
6526         int r = 0, i;
6527
6528         for (i = 0; i < vcpu->arch.pio.count; i++) {
6529                 if (vcpu->arch.pio.in)
6530                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
6531                                             vcpu->arch.pio.size, pd);
6532                 else
6533                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
6534                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
6535                                              pd);
6536                 if (r)
6537                         break;
6538                 pd += vcpu->arch.pio.size;
6539         }
6540         return r;
6541 }
6542
6543 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
6544                                unsigned short port, void *val,
6545                                unsigned int count, bool in)
6546 {
6547         vcpu->arch.pio.port = port;
6548         vcpu->arch.pio.in = in;
6549         vcpu->arch.pio.count  = count;
6550         vcpu->arch.pio.size = size;
6551
6552         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
6553                 vcpu->arch.pio.count = 0;
6554                 return 1;
6555         }
6556
6557         vcpu->run->exit_reason = KVM_EXIT_IO;
6558         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
6559         vcpu->run->io.size = size;
6560         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
6561         vcpu->run->io.count = count;
6562         vcpu->run->io.port = port;
6563
6564         return 0;
6565 }
6566
6567 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
6568                            unsigned short port, void *val, unsigned int count)
6569 {
6570         int ret;
6571
6572         if (vcpu->arch.pio.count)
6573                 goto data_avail;
6574
6575         memset(vcpu->arch.pio_data, 0, size * count);
6576
6577         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
6578         if (ret) {
6579 data_avail:
6580                 memcpy(val, vcpu->arch.pio_data, size * count);
6581                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
6582                 vcpu->arch.pio.count = 0;
6583                 return 1;
6584         }
6585
6586         return 0;
6587 }
6588
6589 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
6590                                     int size, unsigned short port, void *val,
6591                                     unsigned int count)
6592 {
6593         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
6594
6595 }
6596
6597 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
6598                             unsigned short port, const void *val,
6599                             unsigned int count)
6600 {
6601         memcpy(vcpu->arch.pio_data, val, size * count);
6602         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
6603         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
6604 }
6605
6606 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
6607                                      int size, unsigned short port,
6608                                      const void *val, unsigned int count)
6609 {
6610         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
6611 }
6612
6613 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
6614 {
6615         return static_call(kvm_x86_get_segment_base)(vcpu, seg);
6616 }
6617
6618 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
6619 {
6620         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
6621 }
6622
6623 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
6624 {
6625         if (!need_emulate_wbinvd(vcpu))
6626                 return X86EMUL_CONTINUE;
6627
6628         if (static_call(kvm_x86_has_wbinvd_exit)()) {
6629                 int cpu = get_cpu();
6630
6631                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
6632                 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
6633                                 wbinvd_ipi, NULL, 1);
6634                 put_cpu();
6635                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
6636         } else
6637                 wbinvd();
6638         return X86EMUL_CONTINUE;
6639 }
6640
6641 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
6642 {
6643         kvm_emulate_wbinvd_noskip(vcpu);
6644         return kvm_skip_emulated_instruction(vcpu);
6645 }
6646 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
6647
6648
6649
6650 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
6651 {
6652         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
6653 }
6654
6655 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
6656                             unsigned long *dest)
6657 {
6658         kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
6659 }
6660
6661 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
6662                            unsigned long value)
6663 {
6664
6665         return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
6666 }
6667
6668 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
6669 {
6670         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
6671 }
6672
6673 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
6674 {
6675         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6676         unsigned long value;
6677
6678         switch (cr) {
6679         case 0:
6680                 value = kvm_read_cr0(vcpu);
6681                 break;
6682         case 2:
6683                 value = vcpu->arch.cr2;
6684                 break;
6685         case 3:
6686                 value = kvm_read_cr3(vcpu);
6687                 break;
6688         case 4:
6689                 value = kvm_read_cr4(vcpu);
6690                 break;
6691         case 8:
6692                 value = kvm_get_cr8(vcpu);
6693                 break;
6694         default:
6695                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6696                 return 0;
6697         }
6698
6699         return value;
6700 }
6701
6702 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
6703 {
6704         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6705         int res = 0;
6706
6707         switch (cr) {
6708         case 0:
6709                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
6710                 break;
6711         case 2:
6712                 vcpu->arch.cr2 = val;
6713                 break;
6714         case 3:
6715                 res = kvm_set_cr3(vcpu, val);
6716                 break;
6717         case 4:
6718                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
6719                 break;
6720         case 8:
6721                 res = kvm_set_cr8(vcpu, val);
6722                 break;
6723         default:
6724                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6725                 res = -1;
6726         }
6727
6728         return res;
6729 }
6730
6731 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
6732 {
6733         return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
6734 }
6735
6736 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6737 {
6738         static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
6739 }
6740
6741 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6742 {
6743         static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
6744 }
6745
6746 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6747 {
6748         static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
6749 }
6750
6751 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6752 {
6753         static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
6754 }
6755
6756 static unsigned long emulator_get_cached_segment_base(
6757         struct x86_emulate_ctxt *ctxt, int seg)
6758 {
6759         return get_segment_base(emul_to_vcpu(ctxt), seg);
6760 }
6761
6762 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
6763                                  struct desc_struct *desc, u32 *base3,
6764                                  int seg)
6765 {
6766         struct kvm_segment var;
6767
6768         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
6769         *selector = var.selector;
6770
6771         if (var.unusable) {
6772                 memset(desc, 0, sizeof(*desc));
6773                 if (base3)
6774                         *base3 = 0;
6775                 return false;
6776         }
6777
6778         if (var.g)
6779                 var.limit >>= 12;
6780         set_desc_limit(desc, var.limit);
6781         set_desc_base(desc, (unsigned long)var.base);
6782 #ifdef CONFIG_X86_64
6783         if (base3)
6784                 *base3 = var.base >> 32;
6785 #endif
6786         desc->type = var.type;
6787         desc->s = var.s;
6788         desc->dpl = var.dpl;
6789         desc->p = var.present;
6790         desc->avl = var.avl;
6791         desc->l = var.l;
6792         desc->d = var.db;
6793         desc->g = var.g;
6794
6795         return true;
6796 }
6797
6798 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
6799                                  struct desc_struct *desc, u32 base3,
6800                                  int seg)
6801 {
6802         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6803         struct kvm_segment var;
6804
6805         var.selector = selector;
6806         var.base = get_desc_base(desc);
6807 #ifdef CONFIG_X86_64
6808         var.base |= ((u64)base3) << 32;
6809 #endif
6810         var.limit = get_desc_limit(desc);
6811         if (desc->g)
6812                 var.limit = (var.limit << 12) | 0xfff;
6813         var.type = desc->type;
6814         var.dpl = desc->dpl;
6815         var.db = desc->d;
6816         var.s = desc->s;
6817         var.l = desc->l;
6818         var.g = desc->g;
6819         var.avl = desc->avl;
6820         var.present = desc->p;
6821         var.unusable = !var.present;
6822         var.padding = 0;
6823
6824         kvm_set_segment(vcpu, &var, seg);
6825         return;
6826 }
6827
6828 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
6829                             u32 msr_index, u64 *pdata)
6830 {
6831         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6832         int r;
6833
6834         r = kvm_get_msr(vcpu, msr_index, pdata);
6835
6836         if (r && kvm_get_msr_user_space(vcpu, msr_index, r)) {
6837                 /* Bounce to user space */
6838                 return X86EMUL_IO_NEEDED;
6839         }
6840
6841         return r;
6842 }
6843
6844 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
6845                             u32 msr_index, u64 data)
6846 {
6847         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6848         int r;
6849
6850         r = kvm_set_msr(vcpu, msr_index, data);
6851
6852         if (r && kvm_set_msr_user_space(vcpu, msr_index, data, r)) {
6853                 /* Bounce to user space */
6854                 return X86EMUL_IO_NEEDED;
6855         }
6856
6857         return r;
6858 }
6859
6860 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
6861 {
6862         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6863
6864         return vcpu->arch.smbase;
6865 }
6866
6867 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
6868 {
6869         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6870
6871         vcpu->arch.smbase = smbase;
6872 }
6873
6874 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
6875                               u32 pmc)
6876 {
6877         return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc);
6878 }
6879
6880 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
6881                              u32 pmc, u64 *pdata)
6882 {
6883         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
6884 }
6885
6886 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
6887 {
6888         emul_to_vcpu(ctxt)->arch.halt_request = 1;
6889 }
6890
6891 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
6892                               struct x86_instruction_info *info,
6893                               enum x86_intercept_stage stage)
6894 {
6895         return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
6896                                             &ctxt->exception);
6897 }
6898
6899 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
6900                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
6901                               bool exact_only)
6902 {
6903         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
6904 }
6905
6906 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
6907 {
6908         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
6909 }
6910
6911 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
6912 {
6913         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
6914 }
6915
6916 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
6917 {
6918         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
6919 }
6920
6921 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
6922 {
6923         return kvm_register_read(emul_to_vcpu(ctxt), reg);
6924 }
6925
6926 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
6927 {
6928         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
6929 }
6930
6931 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
6932 {
6933         static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
6934 }
6935
6936 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
6937 {
6938         return emul_to_vcpu(ctxt)->arch.hflags;
6939 }
6940
6941 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
6942 {
6943         emul_to_vcpu(ctxt)->arch.hflags = emul_flags;
6944 }
6945
6946 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt,
6947                                   const char *smstate)
6948 {
6949         return static_call(kvm_x86_pre_leave_smm)(emul_to_vcpu(ctxt), smstate);
6950 }
6951
6952 static void emulator_post_leave_smm(struct x86_emulate_ctxt *ctxt)
6953 {
6954         kvm_smm_changed(emul_to_vcpu(ctxt));
6955 }
6956
6957 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
6958 {
6959         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
6960 }
6961
6962 static const struct x86_emulate_ops emulate_ops = {
6963         .read_gpr            = emulator_read_gpr,
6964         .write_gpr           = emulator_write_gpr,
6965         .read_std            = emulator_read_std,
6966         .write_std           = emulator_write_std,
6967         .read_phys           = kvm_read_guest_phys_system,
6968         .fetch               = kvm_fetch_guest_virt,
6969         .read_emulated       = emulator_read_emulated,
6970         .write_emulated      = emulator_write_emulated,
6971         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
6972         .invlpg              = emulator_invlpg,
6973         .pio_in_emulated     = emulator_pio_in_emulated,
6974         .pio_out_emulated    = emulator_pio_out_emulated,
6975         .get_segment         = emulator_get_segment,
6976         .set_segment         = emulator_set_segment,
6977         .get_cached_segment_base = emulator_get_cached_segment_base,
6978         .get_gdt             = emulator_get_gdt,
6979         .get_idt             = emulator_get_idt,
6980         .set_gdt             = emulator_set_gdt,
6981         .set_idt             = emulator_set_idt,
6982         .get_cr              = emulator_get_cr,
6983         .set_cr              = emulator_set_cr,
6984         .cpl                 = emulator_get_cpl,
6985         .get_dr              = emulator_get_dr,
6986         .set_dr              = emulator_set_dr,
6987         .get_smbase          = emulator_get_smbase,
6988         .set_smbase          = emulator_set_smbase,
6989         .set_msr             = emulator_set_msr,
6990         .get_msr             = emulator_get_msr,
6991         .check_pmc           = emulator_check_pmc,
6992         .read_pmc            = emulator_read_pmc,
6993         .halt                = emulator_halt,
6994         .wbinvd              = emulator_wbinvd,
6995         .fix_hypercall       = emulator_fix_hypercall,
6996         .intercept           = emulator_intercept,
6997         .get_cpuid           = emulator_get_cpuid,
6998         .guest_has_long_mode = emulator_guest_has_long_mode,
6999         .guest_has_movbe     = emulator_guest_has_movbe,
7000         .guest_has_fxsr      = emulator_guest_has_fxsr,
7001         .set_nmi_mask        = emulator_set_nmi_mask,
7002         .get_hflags          = emulator_get_hflags,
7003         .set_hflags          = emulator_set_hflags,
7004         .pre_leave_smm       = emulator_pre_leave_smm,
7005         .post_leave_smm      = emulator_post_leave_smm,
7006         .set_xcr             = emulator_set_xcr,
7007 };
7008
7009 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
7010 {
7011         u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
7012         /*
7013          * an sti; sti; sequence only disable interrupts for the first
7014          * instruction. So, if the last instruction, be it emulated or
7015          * not, left the system with the INT_STI flag enabled, it
7016          * means that the last instruction is an sti. We should not
7017          * leave the flag on in this case. The same goes for mov ss
7018          */
7019         if (int_shadow & mask)
7020                 mask = 0;
7021         if (unlikely(int_shadow || mask)) {
7022                 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
7023                 if (!mask)
7024                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7025         }
7026 }
7027
7028 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
7029 {
7030         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7031         if (ctxt->exception.vector == PF_VECTOR)
7032                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
7033
7034         if (ctxt->exception.error_code_valid)
7035                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
7036                                       ctxt->exception.error_code);
7037         else
7038                 kvm_queue_exception(vcpu, ctxt->exception.vector);
7039         return false;
7040 }
7041
7042 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7043 {
7044         struct x86_emulate_ctxt *ctxt;
7045
7046         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7047         if (!ctxt) {
7048                 pr_err("kvm: failed to allocate vcpu's emulator\n");
7049                 return NULL;
7050         }
7051
7052         ctxt->vcpu = vcpu;
7053         ctxt->ops = &emulate_ops;
7054         vcpu->arch.emulate_ctxt = ctxt;
7055
7056         return ctxt;
7057 }
7058
7059 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7060 {
7061         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7062         int cs_db, cs_l;
7063
7064         static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7065
7066         ctxt->gpa_available = false;
7067         ctxt->eflags = kvm_get_rflags(vcpu);
7068         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7069
7070         ctxt->eip = kvm_rip_read(vcpu);
7071         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
7072                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
7073                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
7074                      cs_db                              ? X86EMUL_MODE_PROT32 :
7075                                                           X86EMUL_MODE_PROT16;
7076         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7077         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7078         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7079
7080         init_decode_cache(ctxt);
7081         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7082 }
7083
7084 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
7085 {
7086         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7087         int ret;
7088
7089         init_emulate_ctxt(vcpu);
7090
7091         ctxt->op_bytes = 2;
7092         ctxt->ad_bytes = 2;
7093         ctxt->_eip = ctxt->eip + inc_eip;
7094         ret = emulate_int_real(ctxt, irq);
7095
7096         if (ret != X86EMUL_CONTINUE) {
7097                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
7098         } else {
7099                 ctxt->eip = ctxt->_eip;
7100                 kvm_rip_write(vcpu, ctxt->eip);
7101                 kvm_set_rflags(vcpu, ctxt->eflags);
7102         }
7103 }
7104 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
7105
7106 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
7107 {
7108         ++vcpu->stat.insn_emulation_fail;
7109         trace_kvm_emulate_insn_failed(vcpu);
7110
7111         if (emulation_type & EMULTYPE_VMWARE_GP) {
7112                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7113                 return 1;
7114         }
7115
7116         if (emulation_type & EMULTYPE_SKIP) {
7117                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7118                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7119                 vcpu->run->internal.ndata = 0;
7120                 return 0;
7121         }
7122
7123         kvm_queue_exception(vcpu, UD_VECTOR);
7124
7125         if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
7126                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7127                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7128                 vcpu->run->internal.ndata = 0;
7129                 return 0;
7130         }
7131
7132         return 1;
7133 }
7134
7135 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7136                                   bool write_fault_to_shadow_pgtable,
7137                                   int emulation_type)
7138 {
7139         gpa_t gpa = cr2_or_gpa;
7140         kvm_pfn_t pfn;
7141
7142         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7143                 return false;
7144
7145         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7146             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7147                 return false;
7148
7149         if (!vcpu->arch.mmu->direct_map) {
7150                 /*
7151                  * Write permission should be allowed since only
7152                  * write access need to be emulated.
7153                  */
7154                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7155
7156                 /*
7157                  * If the mapping is invalid in guest, let cpu retry
7158                  * it to generate fault.
7159                  */
7160                 if (gpa == UNMAPPED_GVA)
7161                         return true;
7162         }
7163
7164         /*
7165          * Do not retry the unhandleable instruction if it faults on the
7166          * readonly host memory, otherwise it will goto a infinite loop:
7167          * retry instruction -> write #PF -> emulation fail -> retry
7168          * instruction -> ...
7169          */
7170         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7171
7172         /*
7173          * If the instruction failed on the error pfn, it can not be fixed,
7174          * report the error to userspace.
7175          */
7176         if (is_error_noslot_pfn(pfn))
7177                 return false;
7178
7179         kvm_release_pfn_clean(pfn);
7180
7181         /* The instructions are well-emulated on direct mmu. */
7182         if (vcpu->arch.mmu->direct_map) {
7183                 unsigned int indirect_shadow_pages;
7184
7185                 write_lock(&vcpu->kvm->mmu_lock);
7186                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
7187                 write_unlock(&vcpu->kvm->mmu_lock);
7188
7189                 if (indirect_shadow_pages)
7190                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7191
7192                 return true;
7193         }
7194
7195         /*
7196          * if emulation was due to access to shadowed page table
7197          * and it failed try to unshadow page and re-enter the
7198          * guest to let CPU execute the instruction.
7199          */
7200         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7201
7202         /*
7203          * If the access faults on its page table, it can not
7204          * be fixed by unprotecting shadow page and it should
7205          * be reported to userspace.
7206          */
7207         return !write_fault_to_shadow_pgtable;
7208 }
7209
7210 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
7211                               gpa_t cr2_or_gpa,  int emulation_type)
7212 {
7213         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7214         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
7215
7216         last_retry_eip = vcpu->arch.last_retry_eip;
7217         last_retry_addr = vcpu->arch.last_retry_addr;
7218
7219         /*
7220          * If the emulation is caused by #PF and it is non-page_table
7221          * writing instruction, it means the VM-EXIT is caused by shadow
7222          * page protected, we can zap the shadow page and retry this
7223          * instruction directly.
7224          *
7225          * Note: if the guest uses a non-page-table modifying instruction
7226          * on the PDE that points to the instruction, then we will unmap
7227          * the instruction and go to an infinite loop. So, we cache the
7228          * last retried eip and the last fault address, if we meet the eip
7229          * and the address again, we can break out of the potential infinite
7230          * loop.
7231          */
7232         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
7233
7234         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7235                 return false;
7236
7237         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7238             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7239                 return false;
7240
7241         if (x86_page_table_writing_insn(ctxt))
7242                 return false;
7243
7244         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
7245                 return false;
7246
7247         vcpu->arch.last_retry_eip = ctxt->eip;
7248         vcpu->arch.last_retry_addr = cr2_or_gpa;
7249
7250         if (!vcpu->arch.mmu->direct_map)
7251                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7252
7253         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7254
7255         return true;
7256 }
7257
7258 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
7259 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
7260
7261 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
7262 {
7263         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
7264                 /* This is a good place to trace that we are exiting SMM.  */
7265                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
7266
7267                 /* Process a latched INIT or SMI, if any.  */
7268                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7269         }
7270
7271         kvm_mmu_reset_context(vcpu);
7272 }
7273
7274 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
7275                                 unsigned long *db)
7276 {
7277         u32 dr6 = 0;
7278         int i;
7279         u32 enable, rwlen;
7280
7281         enable = dr7;
7282         rwlen = dr7 >> 16;
7283         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
7284                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
7285                         dr6 |= (1 << i);
7286         return dr6;
7287 }
7288
7289 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
7290 {
7291         struct kvm_run *kvm_run = vcpu->run;
7292
7293         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
7294                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
7295                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
7296                 kvm_run->debug.arch.exception = DB_VECTOR;
7297                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7298                 return 0;
7299         }
7300         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
7301         return 1;
7302 }
7303
7304 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
7305 {
7306         unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7307         int r;
7308
7309         r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
7310         if (unlikely(!r))
7311                 return 0;
7312
7313         /*
7314          * rflags is the old, "raw" value of the flags.  The new value has
7315          * not been saved yet.
7316          *
7317          * This is correct even for TF set by the guest, because "the
7318          * processor will not generate this exception after the instruction
7319          * that sets the TF flag".
7320          */
7321         if (unlikely(rflags & X86_EFLAGS_TF))
7322                 r = kvm_vcpu_do_singlestep(vcpu);
7323         return r;
7324 }
7325 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
7326
7327 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
7328 {
7329         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
7330             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
7331                 struct kvm_run *kvm_run = vcpu->run;
7332                 unsigned long eip = kvm_get_linear_rip(vcpu);
7333                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7334                                            vcpu->arch.guest_debug_dr7,
7335                                            vcpu->arch.eff_db);
7336
7337                 if (dr6 != 0) {
7338                         kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
7339                         kvm_run->debug.arch.pc = eip;
7340                         kvm_run->debug.arch.exception = DB_VECTOR;
7341                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
7342                         *r = 0;
7343                         return true;
7344                 }
7345         }
7346
7347         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
7348             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
7349                 unsigned long eip = kvm_get_linear_rip(vcpu);
7350                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7351                                            vcpu->arch.dr7,
7352                                            vcpu->arch.db);
7353
7354                 if (dr6 != 0) {
7355                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
7356                         *r = 1;
7357                         return true;
7358                 }
7359         }
7360
7361         return false;
7362 }
7363
7364 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
7365 {
7366         switch (ctxt->opcode_len) {
7367         case 1:
7368                 switch (ctxt->b) {
7369                 case 0xe4:      /* IN */
7370                 case 0xe5:
7371                 case 0xec:
7372                 case 0xed:
7373                 case 0xe6:      /* OUT */
7374                 case 0xe7:
7375                 case 0xee:
7376                 case 0xef:
7377                 case 0x6c:      /* INS */
7378                 case 0x6d:
7379                 case 0x6e:      /* OUTS */
7380                 case 0x6f:
7381                         return true;
7382                 }
7383                 break;
7384         case 2:
7385                 switch (ctxt->b) {
7386                 case 0x33:      /* RDPMC */
7387                         return true;
7388                 }
7389                 break;
7390         }
7391
7392         return false;
7393 }
7394
7395 /*
7396  * Decode to be emulated instruction. Return EMULATION_OK if success.
7397  */
7398 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
7399                                     void *insn, int insn_len)
7400 {
7401         int r = EMULATION_OK;
7402         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7403
7404         init_emulate_ctxt(vcpu);
7405
7406         /*
7407          * We will reenter on the same instruction since we do not set
7408          * complete_userspace_io. This does not handle watchpoints yet,
7409          * those would be handled in the emulate_ops.
7410          */
7411         if (!(emulation_type & EMULTYPE_SKIP) &&
7412             kvm_vcpu_check_breakpoint(vcpu, &r))
7413                 return r;
7414
7415         ctxt->interruptibility = 0;
7416         ctxt->have_exception = false;
7417         ctxt->exception.vector = -1;
7418         ctxt->perm_ok = false;
7419
7420         ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
7421
7422         r = x86_decode_insn(ctxt, insn, insn_len);
7423
7424         trace_kvm_emulate_insn_start(vcpu);
7425         ++vcpu->stat.insn_emulation;
7426
7427         return r;
7428 }
7429 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
7430
7431 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7432                             int emulation_type, void *insn, int insn_len)
7433 {
7434         int r;
7435         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7436         bool writeback = true;
7437         bool write_fault_to_spt;
7438
7439         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, insn, insn_len)))
7440                 return 1;
7441
7442         vcpu->arch.l1tf_flush_l1d = true;
7443
7444         /*
7445          * Clear write_fault_to_shadow_pgtable here to ensure it is
7446          * never reused.
7447          */
7448         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
7449         vcpu->arch.write_fault_to_shadow_pgtable = false;
7450
7451         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
7452                 kvm_clear_exception_queue(vcpu);
7453
7454                 r = x86_decode_emulated_instruction(vcpu, emulation_type,
7455                                                     insn, insn_len);
7456                 if (r != EMULATION_OK)  {
7457                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
7458                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
7459                                 kvm_queue_exception(vcpu, UD_VECTOR);
7460                                 return 1;
7461                         }
7462                         if (reexecute_instruction(vcpu, cr2_or_gpa,
7463                                                   write_fault_to_spt,
7464                                                   emulation_type))
7465                                 return 1;
7466                         if (ctxt->have_exception) {
7467                                 /*
7468                                  * #UD should result in just EMULATION_FAILED, and trap-like
7469                                  * exception should not be encountered during decode.
7470                                  */
7471                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
7472                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
7473                                 inject_emulated_exception(vcpu);
7474                                 return 1;
7475                         }
7476                         return handle_emulation_failure(vcpu, emulation_type);
7477                 }
7478         }
7479
7480         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
7481             !is_vmware_backdoor_opcode(ctxt)) {
7482                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7483                 return 1;
7484         }
7485
7486         /*
7487          * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
7488          * for kvm_skip_emulated_instruction().  The caller is responsible for
7489          * updating interruptibility state and injecting single-step #DBs.
7490          */
7491         if (emulation_type & EMULTYPE_SKIP) {
7492                 kvm_rip_write(vcpu, ctxt->_eip);
7493                 if (ctxt->eflags & X86_EFLAGS_RF)
7494                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
7495                 return 1;
7496         }
7497
7498         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
7499                 return 1;
7500
7501         /* this is needed for vmware backdoor interface to work since it
7502            changes registers values  during IO operation */
7503         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
7504                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7505                 emulator_invalidate_register_cache(ctxt);
7506         }
7507
7508 restart:
7509         if (emulation_type & EMULTYPE_PF) {
7510                 /* Save the faulting GPA (cr2) in the address field */
7511                 ctxt->exception.address = cr2_or_gpa;
7512
7513                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
7514                 if (vcpu->arch.mmu->direct_map) {
7515                         ctxt->gpa_available = true;
7516                         ctxt->gpa_val = cr2_or_gpa;
7517                 }
7518         } else {
7519                 /* Sanitize the address out of an abundance of paranoia. */
7520                 ctxt->exception.address = 0;
7521         }
7522
7523         r = x86_emulate_insn(ctxt);
7524
7525         if (r == EMULATION_INTERCEPTED)
7526                 return 1;
7527
7528         if (r == EMULATION_FAILED) {
7529                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
7530                                         emulation_type))
7531                         return 1;
7532
7533                 return handle_emulation_failure(vcpu, emulation_type);
7534         }
7535
7536         if (ctxt->have_exception) {
7537                 r = 1;
7538                 if (inject_emulated_exception(vcpu))
7539                         return r;
7540         } else if (vcpu->arch.pio.count) {
7541                 if (!vcpu->arch.pio.in) {
7542                         /* FIXME: return into emulator if single-stepping.  */
7543                         vcpu->arch.pio.count = 0;
7544                 } else {
7545                         writeback = false;
7546                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
7547                 }
7548                 r = 0;
7549         } else if (vcpu->mmio_needed) {
7550                 ++vcpu->stat.mmio_exits;
7551
7552                 if (!vcpu->mmio_is_write)
7553                         writeback = false;
7554                 r = 0;
7555                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7556         } else if (r == EMULATION_RESTART)
7557                 goto restart;
7558         else
7559                 r = 1;
7560
7561         if (writeback) {
7562                 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7563                 toggle_interruptibility(vcpu, ctxt->interruptibility);
7564                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7565                 if (!ctxt->have_exception ||
7566                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
7567                         kvm_rip_write(vcpu, ctxt->eip);
7568                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
7569                                 r = kvm_vcpu_do_singlestep(vcpu);
7570                         if (kvm_x86_ops.update_emulated_instruction)
7571                                 static_call(kvm_x86_update_emulated_instruction)(vcpu);
7572                         __kvm_set_rflags(vcpu, ctxt->eflags);
7573                 }
7574
7575                 /*
7576                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
7577                  * do nothing, and it will be requested again as soon as
7578                  * the shadow expires.  But we still need to check here,
7579                  * because POPF has no interrupt shadow.
7580                  */
7581                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
7582                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7583         } else
7584                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
7585
7586         return r;
7587 }
7588
7589 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
7590 {
7591         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
7592 }
7593 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
7594
7595 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
7596                                         void *insn, int insn_len)
7597 {
7598         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
7599 }
7600 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
7601
7602 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
7603 {
7604         vcpu->arch.pio.count = 0;
7605         return 1;
7606 }
7607
7608 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
7609 {
7610         vcpu->arch.pio.count = 0;
7611
7612         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
7613                 return 1;
7614
7615         return kvm_skip_emulated_instruction(vcpu);
7616 }
7617
7618 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
7619                             unsigned short port)
7620 {
7621         unsigned long val = kvm_rax_read(vcpu);
7622         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
7623
7624         if (ret)
7625                 return ret;
7626
7627         /*
7628          * Workaround userspace that relies on old KVM behavior of %rip being
7629          * incremented prior to exiting to userspace to handle "OUT 0x7e".
7630          */
7631         if (port == 0x7e &&
7632             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
7633                 vcpu->arch.complete_userspace_io =
7634                         complete_fast_pio_out_port_0x7e;
7635                 kvm_skip_emulated_instruction(vcpu);
7636         } else {
7637                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7638                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
7639         }
7640         return 0;
7641 }
7642
7643 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
7644 {
7645         unsigned long val;
7646
7647         /* We should only ever be called with arch.pio.count equal to 1 */
7648         BUG_ON(vcpu->arch.pio.count != 1);
7649
7650         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
7651                 vcpu->arch.pio.count = 0;
7652                 return 1;
7653         }
7654
7655         /* For size less than 4 we merge, else we zero extend */
7656         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
7657
7658         /*
7659          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
7660          * the copy and tracing
7661          */
7662         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
7663         kvm_rax_write(vcpu, val);
7664
7665         return kvm_skip_emulated_instruction(vcpu);
7666 }
7667
7668 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
7669                            unsigned short port)
7670 {
7671         unsigned long val;
7672         int ret;
7673
7674         /* For size less than 4 we merge, else we zero extend */
7675         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
7676
7677         ret = emulator_pio_in(vcpu, size, port, &val, 1);
7678         if (ret) {
7679                 kvm_rax_write(vcpu, val);
7680                 return ret;
7681         }
7682
7683         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7684         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
7685
7686         return 0;
7687 }
7688
7689 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
7690 {
7691         int ret;
7692
7693         if (in)
7694                 ret = kvm_fast_pio_in(vcpu, size, port);
7695         else
7696                 ret = kvm_fast_pio_out(vcpu, size, port);
7697         return ret && kvm_skip_emulated_instruction(vcpu);
7698 }
7699 EXPORT_SYMBOL_GPL(kvm_fast_pio);
7700
7701 static int kvmclock_cpu_down_prep(unsigned int cpu)
7702 {
7703         __this_cpu_write(cpu_tsc_khz, 0);
7704         return 0;
7705 }
7706
7707 static void tsc_khz_changed(void *data)
7708 {
7709         struct cpufreq_freqs *freq = data;
7710         unsigned long khz = 0;
7711
7712         if (data)
7713                 khz = freq->new;
7714         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7715                 khz = cpufreq_quick_get(raw_smp_processor_id());
7716         if (!khz)
7717                 khz = tsc_khz;
7718         __this_cpu_write(cpu_tsc_khz, khz);
7719 }
7720
7721 #ifdef CONFIG_X86_64
7722 static void kvm_hyperv_tsc_notifier(void)
7723 {
7724         struct kvm *kvm;
7725         struct kvm_vcpu *vcpu;
7726         int cpu;
7727
7728         mutex_lock(&kvm_lock);
7729         list_for_each_entry(kvm, &vm_list, vm_list)
7730                 kvm_make_mclock_inprogress_request(kvm);
7731
7732         hyperv_stop_tsc_emulation();
7733
7734         /* TSC frequency always matches when on Hyper-V */
7735         for_each_present_cpu(cpu)
7736                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
7737         kvm_max_guest_tsc_khz = tsc_khz;
7738
7739         list_for_each_entry(kvm, &vm_list, vm_list) {
7740                 struct kvm_arch *ka = &kvm->arch;
7741
7742                 spin_lock(&ka->pvclock_gtod_sync_lock);
7743
7744                 pvclock_update_vm_gtod_copy(kvm);
7745
7746                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7747                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7748
7749                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7750                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
7751
7752                 spin_unlock(&ka->pvclock_gtod_sync_lock);
7753         }
7754         mutex_unlock(&kvm_lock);
7755 }
7756 #endif
7757
7758 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
7759 {
7760         struct kvm *kvm;
7761         struct kvm_vcpu *vcpu;
7762         int i, send_ipi = 0;
7763
7764         /*
7765          * We allow guests to temporarily run on slowing clocks,
7766          * provided we notify them after, or to run on accelerating
7767          * clocks, provided we notify them before.  Thus time never
7768          * goes backwards.
7769          *
7770          * However, we have a problem.  We can't atomically update
7771          * the frequency of a given CPU from this function; it is
7772          * merely a notifier, which can be called from any CPU.
7773          * Changing the TSC frequency at arbitrary points in time
7774          * requires a recomputation of local variables related to
7775          * the TSC for each VCPU.  We must flag these local variables
7776          * to be updated and be sure the update takes place with the
7777          * new frequency before any guests proceed.
7778          *
7779          * Unfortunately, the combination of hotplug CPU and frequency
7780          * change creates an intractable locking scenario; the order
7781          * of when these callouts happen is undefined with respect to
7782          * CPU hotplug, and they can race with each other.  As such,
7783          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
7784          * undefined; you can actually have a CPU frequency change take
7785          * place in between the computation of X and the setting of the
7786          * variable.  To protect against this problem, all updates of
7787          * the per_cpu tsc_khz variable are done in an interrupt
7788          * protected IPI, and all callers wishing to update the value
7789          * must wait for a synchronous IPI to complete (which is trivial
7790          * if the caller is on the CPU already).  This establishes the
7791          * necessary total order on variable updates.
7792          *
7793          * Note that because a guest time update may take place
7794          * anytime after the setting of the VCPU's request bit, the
7795          * correct TSC value must be set before the request.  However,
7796          * to ensure the update actually makes it to any guest which
7797          * starts running in hardware virtualization between the set
7798          * and the acquisition of the spinlock, we must also ping the
7799          * CPU after setting the request bit.
7800          *
7801          */
7802
7803         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7804
7805         mutex_lock(&kvm_lock);
7806         list_for_each_entry(kvm, &vm_list, vm_list) {
7807                 kvm_for_each_vcpu(i, vcpu, kvm) {
7808                         if (vcpu->cpu != cpu)
7809                                 continue;
7810                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7811                         if (vcpu->cpu != raw_smp_processor_id())
7812                                 send_ipi = 1;
7813                 }
7814         }
7815         mutex_unlock(&kvm_lock);
7816
7817         if (freq->old < freq->new && send_ipi) {
7818                 /*
7819                  * We upscale the frequency.  Must make the guest
7820                  * doesn't see old kvmclock values while running with
7821                  * the new frequency, otherwise we risk the guest sees
7822                  * time go backwards.
7823                  *
7824                  * In case we update the frequency for another cpu
7825                  * (which might be in guest context) send an interrupt
7826                  * to kick the cpu out of guest context.  Next time
7827                  * guest context is entered kvmclock will be updated,
7828                  * so the guest will not see stale values.
7829                  */
7830                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7831         }
7832 }
7833
7834 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
7835                                      void *data)
7836 {
7837         struct cpufreq_freqs *freq = data;
7838         int cpu;
7839
7840         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
7841                 return 0;
7842         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
7843                 return 0;
7844
7845         for_each_cpu(cpu, freq->policy->cpus)
7846                 __kvmclock_cpufreq_notifier(freq, cpu);
7847
7848         return 0;
7849 }
7850
7851 static struct notifier_block kvmclock_cpufreq_notifier_block = {
7852         .notifier_call  = kvmclock_cpufreq_notifier
7853 };
7854
7855 static int kvmclock_cpu_online(unsigned int cpu)
7856 {
7857         tsc_khz_changed(NULL);
7858         return 0;
7859 }
7860
7861 static void kvm_timer_init(void)
7862 {
7863         max_tsc_khz = tsc_khz;
7864
7865         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
7866 #ifdef CONFIG_CPU_FREQ
7867                 struct cpufreq_policy *policy;
7868                 int cpu;
7869
7870                 cpu = get_cpu();
7871                 policy = cpufreq_cpu_get(cpu);
7872                 if (policy) {
7873                         if (policy->cpuinfo.max_freq)
7874                                 max_tsc_khz = policy->cpuinfo.max_freq;
7875                         cpufreq_cpu_put(policy);
7876                 }
7877                 put_cpu();
7878 #endif
7879                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
7880                                           CPUFREQ_TRANSITION_NOTIFIER);
7881         }
7882
7883         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
7884                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
7885 }
7886
7887 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
7888 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
7889
7890 int kvm_is_in_guest(void)
7891 {
7892         return __this_cpu_read(current_vcpu) != NULL;
7893 }
7894
7895 static int kvm_is_user_mode(void)
7896 {
7897         int user_mode = 3;
7898
7899         if (__this_cpu_read(current_vcpu))
7900                 user_mode = static_call(kvm_x86_get_cpl)(__this_cpu_read(current_vcpu));
7901
7902         return user_mode != 0;
7903 }
7904
7905 static unsigned long kvm_get_guest_ip(void)
7906 {
7907         unsigned long ip = 0;
7908
7909         if (__this_cpu_read(current_vcpu))
7910                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
7911
7912         return ip;
7913 }
7914
7915 static void kvm_handle_intel_pt_intr(void)
7916 {
7917         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
7918
7919         kvm_make_request(KVM_REQ_PMI, vcpu);
7920         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
7921                         (unsigned long *)&vcpu->arch.pmu.global_status);
7922 }
7923
7924 static struct perf_guest_info_callbacks kvm_guest_cbs = {
7925         .is_in_guest            = kvm_is_in_guest,
7926         .is_user_mode           = kvm_is_user_mode,
7927         .get_guest_ip           = kvm_get_guest_ip,
7928         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
7929 };
7930
7931 #ifdef CONFIG_X86_64
7932 static void pvclock_gtod_update_fn(struct work_struct *work)
7933 {
7934         struct kvm *kvm;
7935
7936         struct kvm_vcpu *vcpu;
7937         int i;
7938
7939         mutex_lock(&kvm_lock);
7940         list_for_each_entry(kvm, &vm_list, vm_list)
7941                 kvm_for_each_vcpu(i, vcpu, kvm)
7942                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7943         atomic_set(&kvm_guest_has_master_clock, 0);
7944         mutex_unlock(&kvm_lock);
7945 }
7946
7947 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
7948
7949 /*
7950  * Notification about pvclock gtod data update.
7951  */
7952 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
7953                                void *priv)
7954 {
7955         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
7956         struct timekeeper *tk = priv;
7957
7958         update_pvclock_gtod(tk);
7959
7960         /* disable master clock if host does not trust, or does not
7961          * use, TSC based clocksource.
7962          */
7963         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
7964             atomic_read(&kvm_guest_has_master_clock) != 0)
7965                 queue_work(system_long_wq, &pvclock_gtod_work);
7966
7967         return 0;
7968 }
7969
7970 static struct notifier_block pvclock_gtod_notifier = {
7971         .notifier_call = pvclock_gtod_notify,
7972 };
7973 #endif
7974
7975 int kvm_arch_init(void *opaque)
7976 {
7977         struct kvm_x86_init_ops *ops = opaque;
7978         int r;
7979
7980         if (kvm_x86_ops.hardware_enable) {
7981                 printk(KERN_ERR "kvm: already loaded the other module\n");
7982                 r = -EEXIST;
7983                 goto out;
7984         }
7985
7986         if (!ops->cpu_has_kvm_support()) {
7987                 pr_err_ratelimited("kvm: no hardware support\n");
7988                 r = -EOPNOTSUPP;
7989                 goto out;
7990         }
7991         if (ops->disabled_by_bios()) {
7992                 pr_err_ratelimited("kvm: disabled by bios\n");
7993                 r = -EOPNOTSUPP;
7994                 goto out;
7995         }
7996
7997         /*
7998          * KVM explicitly assumes that the guest has an FPU and
7999          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8000          * vCPU's FPU state as a fxregs_state struct.
8001          */
8002         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
8003                 printk(KERN_ERR "kvm: inadequate fpu\n");
8004                 r = -EOPNOTSUPP;
8005                 goto out;
8006         }
8007
8008         r = -ENOMEM;
8009         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
8010                                           __alignof__(struct fpu), SLAB_ACCOUNT,
8011                                           NULL);
8012         if (!x86_fpu_cache) {
8013                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
8014                 goto out;
8015         }
8016
8017         x86_emulator_cache = kvm_alloc_emulator_cache();
8018         if (!x86_emulator_cache) {
8019                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8020                 goto out_free_x86_fpu_cache;
8021         }
8022
8023         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
8024         if (!user_return_msrs) {
8025                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
8026                 goto out_free_x86_emulator_cache;
8027         }
8028
8029         r = kvm_mmu_module_init();
8030         if (r)
8031                 goto out_free_percpu;
8032
8033         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
8034                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
8035                         PT_PRESENT_MASK, 0, sme_me_mask);
8036         kvm_timer_init();
8037
8038         perf_register_guest_info_callbacks(&kvm_guest_cbs);
8039
8040         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
8041                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
8042                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
8043         }
8044
8045         if (pi_inject_timer == -1)
8046                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
8047 #ifdef CONFIG_X86_64
8048         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
8049
8050         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8051                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
8052 #endif
8053
8054         return 0;
8055
8056 out_free_percpu:
8057         free_percpu(user_return_msrs);
8058 out_free_x86_emulator_cache:
8059         kmem_cache_destroy(x86_emulator_cache);
8060 out_free_x86_fpu_cache:
8061         kmem_cache_destroy(x86_fpu_cache);
8062 out:
8063         return r;
8064 }
8065
8066 void kvm_arch_exit(void)
8067 {
8068 #ifdef CONFIG_X86_64
8069         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8070                 clear_hv_tscchange_cb();
8071 #endif
8072         kvm_lapic_exit();
8073         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
8074
8075         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8076                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
8077                                             CPUFREQ_TRANSITION_NOTIFIER);
8078         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
8079 #ifdef CONFIG_X86_64
8080         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
8081 #endif
8082         kvm_x86_ops.hardware_enable = NULL;
8083         kvm_mmu_module_exit();
8084         free_percpu(user_return_msrs);
8085         kmem_cache_destroy(x86_fpu_cache);
8086 #ifdef CONFIG_KVM_XEN
8087         static_key_deferred_flush(&kvm_xen_enabled);
8088         WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
8089 #endif
8090 }
8091
8092 static int __kvm_vcpu_halt(struct kvm_vcpu *vcpu, int state, int reason)
8093 {
8094         ++vcpu->stat.halt_exits;
8095         if (lapic_in_kernel(vcpu)) {
8096                 vcpu->arch.mp_state = state;
8097                 return 1;
8098         } else {
8099                 vcpu->run->exit_reason = reason;
8100                 return 0;
8101         }
8102 }
8103
8104 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
8105 {
8106         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
8107 }
8108 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
8109
8110 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
8111 {
8112         int ret = kvm_skip_emulated_instruction(vcpu);
8113         /*
8114          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8115          * KVM_EXIT_DEBUG here.
8116          */
8117         return kvm_vcpu_halt(vcpu) && ret;
8118 }
8119 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
8120
8121 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
8122 {
8123         int ret = kvm_skip_emulated_instruction(vcpu);
8124
8125         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD, KVM_EXIT_AP_RESET_HOLD) && ret;
8126 }
8127 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
8128
8129 #ifdef CONFIG_X86_64
8130 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
8131                                 unsigned long clock_type)
8132 {
8133         struct kvm_clock_pairing clock_pairing;
8134         struct timespec64 ts;
8135         u64 cycle;
8136         int ret;
8137
8138         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
8139                 return -KVM_EOPNOTSUPP;
8140
8141         if (!kvm_get_walltime_and_clockread(&ts, &cycle))
8142                 return -KVM_EOPNOTSUPP;
8143
8144         clock_pairing.sec = ts.tv_sec;
8145         clock_pairing.nsec = ts.tv_nsec;
8146         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
8147         clock_pairing.flags = 0;
8148         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
8149
8150         ret = 0;
8151         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
8152                             sizeof(struct kvm_clock_pairing)))
8153                 ret = -KVM_EFAULT;
8154
8155         return ret;
8156 }
8157 #endif
8158
8159 /*
8160  * kvm_pv_kick_cpu_op:  Kick a vcpu.
8161  *
8162  * @apicid - apicid of vcpu to be kicked.
8163  */
8164 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
8165 {
8166         struct kvm_lapic_irq lapic_irq;
8167
8168         lapic_irq.shorthand = APIC_DEST_NOSHORT;
8169         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
8170         lapic_irq.level = 0;
8171         lapic_irq.dest_id = apicid;
8172         lapic_irq.msi_redir_hint = false;
8173
8174         lapic_irq.delivery_mode = APIC_DM_REMRD;
8175         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
8176 }
8177
8178 bool kvm_apicv_activated(struct kvm *kvm)
8179 {
8180         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
8181 }
8182 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
8183
8184 void kvm_apicv_init(struct kvm *kvm, bool enable)
8185 {
8186         if (enable)
8187                 clear_bit(APICV_INHIBIT_REASON_DISABLE,
8188                           &kvm->arch.apicv_inhibit_reasons);
8189         else
8190                 set_bit(APICV_INHIBIT_REASON_DISABLE,
8191                         &kvm->arch.apicv_inhibit_reasons);
8192 }
8193 EXPORT_SYMBOL_GPL(kvm_apicv_init);
8194
8195 static void kvm_sched_yield(struct kvm *kvm, unsigned long dest_id)
8196 {
8197         struct kvm_vcpu *target = NULL;
8198         struct kvm_apic_map *map;
8199
8200         rcu_read_lock();
8201         map = rcu_dereference(kvm->arch.apic_map);
8202
8203         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
8204                 target = map->phys_map[dest_id]->vcpu;
8205
8206         rcu_read_unlock();
8207
8208         if (target && READ_ONCE(target->ready))
8209                 kvm_vcpu_yield_to(target);
8210 }
8211
8212 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
8213 {
8214         unsigned long nr, a0, a1, a2, a3, ret;
8215         int op_64_bit;
8216
8217         if (kvm_xen_hypercall_enabled(vcpu->kvm))
8218                 return kvm_xen_hypercall(vcpu);
8219
8220         if (kvm_hv_hypercall_enabled(vcpu))
8221                 return kvm_hv_hypercall(vcpu);
8222
8223         nr = kvm_rax_read(vcpu);
8224         a0 = kvm_rbx_read(vcpu);
8225         a1 = kvm_rcx_read(vcpu);
8226         a2 = kvm_rdx_read(vcpu);
8227         a3 = kvm_rsi_read(vcpu);
8228
8229         trace_kvm_hypercall(nr, a0, a1, a2, a3);
8230
8231         op_64_bit = is_64_bit_mode(vcpu);
8232         if (!op_64_bit) {
8233                 nr &= 0xFFFFFFFF;
8234                 a0 &= 0xFFFFFFFF;
8235                 a1 &= 0xFFFFFFFF;
8236                 a2 &= 0xFFFFFFFF;
8237                 a3 &= 0xFFFFFFFF;
8238         }
8239
8240         if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
8241                 ret = -KVM_EPERM;
8242                 goto out;
8243         }
8244
8245         ret = -KVM_ENOSYS;
8246
8247         switch (nr) {
8248         case KVM_HC_VAPIC_POLL_IRQ:
8249                 ret = 0;
8250                 break;
8251         case KVM_HC_KICK_CPU:
8252                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
8253                         break;
8254
8255                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
8256                 kvm_sched_yield(vcpu->kvm, a1);
8257                 ret = 0;
8258                 break;
8259 #ifdef CONFIG_X86_64
8260         case KVM_HC_CLOCK_PAIRING:
8261                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
8262                 break;
8263 #endif
8264         case KVM_HC_SEND_IPI:
8265                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
8266                         break;
8267
8268                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
8269                 break;
8270         case KVM_HC_SCHED_YIELD:
8271                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
8272                         break;
8273
8274                 kvm_sched_yield(vcpu->kvm, a0);
8275                 ret = 0;
8276                 break;
8277         default:
8278                 ret = -KVM_ENOSYS;
8279                 break;
8280         }
8281 out:
8282         if (!op_64_bit)
8283                 ret = (u32)ret;
8284         kvm_rax_write(vcpu, ret);
8285
8286         ++vcpu->stat.hypercalls;
8287         return kvm_skip_emulated_instruction(vcpu);
8288 }
8289 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
8290
8291 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
8292 {
8293         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8294         char instruction[3];
8295         unsigned long rip = kvm_rip_read(vcpu);
8296
8297         static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
8298
8299         return emulator_write_emulated(ctxt, rip, instruction, 3,
8300                 &ctxt->exception);
8301 }
8302
8303 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
8304 {
8305         return vcpu->run->request_interrupt_window &&
8306                 likely(!pic_in_kernel(vcpu->kvm));
8307 }
8308
8309 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
8310 {
8311         struct kvm_run *kvm_run = vcpu->run;
8312
8313         /*
8314          * if_flag is obsolete and useless, so do not bother
8315          * setting it for SEV-ES guests.  Userspace can just
8316          * use kvm_run->ready_for_interrupt_injection.
8317          */
8318         kvm_run->if_flag = !vcpu->arch.guest_state_protected
8319                 && (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
8320
8321         kvm_run->cr8 = kvm_get_cr8(vcpu);
8322         kvm_run->apic_base = kvm_get_apic_base(vcpu);
8323         kvm_run->ready_for_interrupt_injection =
8324                 pic_in_kernel(vcpu->kvm) ||
8325                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
8326
8327         if (is_smm(vcpu))
8328                 kvm_run->flags |= KVM_RUN_X86_SMM;
8329 }
8330
8331 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
8332 {
8333         int max_irr, tpr;
8334
8335         if (!kvm_x86_ops.update_cr8_intercept)
8336                 return;
8337
8338         if (!lapic_in_kernel(vcpu))
8339                 return;
8340
8341         if (vcpu->arch.apicv_active)
8342                 return;
8343
8344         if (!vcpu->arch.apic->vapic_addr)
8345                 max_irr = kvm_lapic_find_highest_irr(vcpu);
8346         else
8347                 max_irr = -1;
8348
8349         if (max_irr != -1)
8350                 max_irr >>= 4;
8351
8352         tpr = kvm_lapic_get_cr8(vcpu);
8353
8354         static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
8355 }
8356
8357 static void inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
8358 {
8359         int r;
8360         bool can_inject = true;
8361
8362         /* try to reinject previous events if any */
8363
8364         if (vcpu->arch.exception.injected) {
8365                 static_call(kvm_x86_queue_exception)(vcpu);
8366                 can_inject = false;
8367         }
8368         /*
8369          * Do not inject an NMI or interrupt if there is a pending
8370          * exception.  Exceptions and interrupts are recognized at
8371          * instruction boundaries, i.e. the start of an instruction.
8372          * Trap-like exceptions, e.g. #DB, have higher priority than
8373          * NMIs and interrupts, i.e. traps are recognized before an
8374          * NMI/interrupt that's pending on the same instruction.
8375          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8376          * priority, but are only generated (pended) during instruction
8377          * execution, i.e. a pending fault-like exception means the
8378          * fault occurred on the *previous* instruction and must be
8379          * serviced prior to recognizing any new events in order to
8380          * fully complete the previous instruction.
8381          */
8382         else if (!vcpu->arch.exception.pending) {
8383                 if (vcpu->arch.nmi_injected) {
8384                         static_call(kvm_x86_set_nmi)(vcpu);
8385                         can_inject = false;
8386                 } else if (vcpu->arch.interrupt.injected) {
8387                         static_call(kvm_x86_set_irq)(vcpu);
8388                         can_inject = false;
8389                 }
8390         }
8391
8392         WARN_ON_ONCE(vcpu->arch.exception.injected &&
8393                      vcpu->arch.exception.pending);
8394
8395         /*
8396          * Call check_nested_events() even if we reinjected a previous event
8397          * in order for caller to determine if it should require immediate-exit
8398          * from L2 to L1 due to pending L1 events which require exit
8399          * from L2 to L1.
8400          */
8401         if (is_guest_mode(vcpu)) {
8402                 r = kvm_x86_ops.nested_ops->check_events(vcpu);
8403                 if (r < 0)
8404                         goto busy;
8405         }
8406
8407         /* try to inject new event if pending */
8408         if (vcpu->arch.exception.pending) {
8409                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
8410                                         vcpu->arch.exception.has_error_code,
8411                                         vcpu->arch.exception.error_code);
8412
8413                 vcpu->arch.exception.pending = false;
8414                 vcpu->arch.exception.injected = true;
8415
8416                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
8417                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
8418                                              X86_EFLAGS_RF);
8419
8420                 if (vcpu->arch.exception.nr == DB_VECTOR) {
8421                         kvm_deliver_exception_payload(vcpu);
8422                         if (vcpu->arch.dr7 & DR7_GD) {
8423                                 vcpu->arch.dr7 &= ~DR7_GD;
8424                                 kvm_update_dr7(vcpu);
8425                         }
8426                 }
8427
8428                 static_call(kvm_x86_queue_exception)(vcpu);
8429                 can_inject = false;
8430         }
8431
8432         /*
8433          * Finally, inject interrupt events.  If an event cannot be injected
8434          * due to architectural conditions (e.g. IF=0) a window-open exit
8435          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
8436          * and can architecturally be injected, but we cannot do it right now:
8437          * an interrupt could have arrived just now and we have to inject it
8438          * as a vmexit, or there could already an event in the queue, which is
8439          * indicated by can_inject.  In that case we request an immediate exit
8440          * in order to make progress and get back here for another iteration.
8441          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
8442          */
8443         if (vcpu->arch.smi_pending) {
8444                 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
8445                 if (r < 0)
8446                         goto busy;
8447                 if (r) {
8448                         vcpu->arch.smi_pending = false;
8449                         ++vcpu->arch.smi_count;
8450                         enter_smm(vcpu);
8451                         can_inject = false;
8452                 } else
8453                         static_call(kvm_x86_enable_smi_window)(vcpu);
8454         }
8455
8456         if (vcpu->arch.nmi_pending) {
8457                 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
8458                 if (r < 0)
8459                         goto busy;
8460                 if (r) {
8461                         --vcpu->arch.nmi_pending;
8462                         vcpu->arch.nmi_injected = true;
8463                         static_call(kvm_x86_set_nmi)(vcpu);
8464                         can_inject = false;
8465                         WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
8466                 }
8467                 if (vcpu->arch.nmi_pending)
8468                         static_call(kvm_x86_enable_nmi_window)(vcpu);
8469         }
8470
8471         if (kvm_cpu_has_injectable_intr(vcpu)) {
8472                 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
8473                 if (r < 0)
8474                         goto busy;
8475                 if (r) {
8476                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
8477                         static_call(kvm_x86_set_irq)(vcpu);
8478                         WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
8479                 }
8480                 if (kvm_cpu_has_injectable_intr(vcpu))
8481                         static_call(kvm_x86_enable_irq_window)(vcpu);
8482         }
8483
8484         if (is_guest_mode(vcpu) &&
8485             kvm_x86_ops.nested_ops->hv_timer_pending &&
8486             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
8487                 *req_immediate_exit = true;
8488
8489         WARN_ON(vcpu->arch.exception.pending);
8490         return;
8491
8492 busy:
8493         *req_immediate_exit = true;
8494         return;
8495 }
8496
8497 static void process_nmi(struct kvm_vcpu *vcpu)
8498 {
8499         unsigned limit = 2;
8500
8501         /*
8502          * x86 is limited to one NMI running, and one NMI pending after it.
8503          * If an NMI is already in progress, limit further NMIs to just one.
8504          * Otherwise, allow two (and we'll inject the first one immediately).
8505          */
8506         if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
8507                 limit = 1;
8508
8509         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
8510         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
8511         kvm_make_request(KVM_REQ_EVENT, vcpu);
8512 }
8513
8514 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
8515 {
8516         u32 flags = 0;
8517         flags |= seg->g       << 23;
8518         flags |= seg->db      << 22;
8519         flags |= seg->l       << 21;
8520         flags |= seg->avl     << 20;
8521         flags |= seg->present << 15;
8522         flags |= seg->dpl     << 13;
8523         flags |= seg->s       << 12;
8524         flags |= seg->type    << 8;
8525         return flags;
8526 }
8527
8528 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
8529 {
8530         struct kvm_segment seg;
8531         int offset;
8532
8533         kvm_get_segment(vcpu, &seg, n);
8534         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
8535
8536         if (n < 3)
8537                 offset = 0x7f84 + n * 12;
8538         else
8539                 offset = 0x7f2c + (n - 3) * 12;
8540
8541         put_smstate(u32, buf, offset + 8, seg.base);
8542         put_smstate(u32, buf, offset + 4, seg.limit);
8543         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
8544 }
8545
8546 #ifdef CONFIG_X86_64
8547 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
8548 {
8549         struct kvm_segment seg;
8550         int offset;
8551         u16 flags;
8552
8553         kvm_get_segment(vcpu, &seg, n);
8554         offset = 0x7e00 + n * 16;
8555
8556         flags = enter_smm_get_segment_flags(&seg) >> 8;
8557         put_smstate(u16, buf, offset, seg.selector);
8558         put_smstate(u16, buf, offset + 2, flags);
8559         put_smstate(u32, buf, offset + 4, seg.limit);
8560         put_smstate(u64, buf, offset + 8, seg.base);
8561 }
8562 #endif
8563
8564 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
8565 {
8566         struct desc_ptr dt;
8567         struct kvm_segment seg;
8568         unsigned long val;
8569         int i;
8570
8571         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
8572         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
8573         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
8574         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
8575
8576         for (i = 0; i < 8; i++)
8577                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
8578
8579         kvm_get_dr(vcpu, 6, &val);
8580         put_smstate(u32, buf, 0x7fcc, (u32)val);
8581         kvm_get_dr(vcpu, 7, &val);
8582         put_smstate(u32, buf, 0x7fc8, (u32)val);
8583
8584         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8585         put_smstate(u32, buf, 0x7fc4, seg.selector);
8586         put_smstate(u32, buf, 0x7f64, seg.base);
8587         put_smstate(u32, buf, 0x7f60, seg.limit);
8588         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
8589
8590         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8591         put_smstate(u32, buf, 0x7fc0, seg.selector);
8592         put_smstate(u32, buf, 0x7f80, seg.base);
8593         put_smstate(u32, buf, 0x7f7c, seg.limit);
8594         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
8595
8596         static_call(kvm_x86_get_gdt)(vcpu, &dt);
8597         put_smstate(u32, buf, 0x7f74, dt.address);
8598         put_smstate(u32, buf, 0x7f70, dt.size);
8599
8600         static_call(kvm_x86_get_idt)(vcpu, &dt);
8601         put_smstate(u32, buf, 0x7f58, dt.address);
8602         put_smstate(u32, buf, 0x7f54, dt.size);
8603
8604         for (i = 0; i < 6; i++)
8605                 enter_smm_save_seg_32(vcpu, buf, i);
8606
8607         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
8608
8609         /* revision id */
8610         put_smstate(u32, buf, 0x7efc, 0x00020000);
8611         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
8612 }
8613
8614 #ifdef CONFIG_X86_64
8615 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
8616 {
8617         struct desc_ptr dt;
8618         struct kvm_segment seg;
8619         unsigned long val;
8620         int i;
8621
8622         for (i = 0; i < 16; i++)
8623                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
8624
8625         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
8626         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
8627
8628         kvm_get_dr(vcpu, 6, &val);
8629         put_smstate(u64, buf, 0x7f68, val);
8630         kvm_get_dr(vcpu, 7, &val);
8631         put_smstate(u64, buf, 0x7f60, val);
8632
8633         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
8634         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
8635         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
8636
8637         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
8638
8639         /* revision id */
8640         put_smstate(u32, buf, 0x7efc, 0x00020064);
8641
8642         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
8643
8644         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8645         put_smstate(u16, buf, 0x7e90, seg.selector);
8646         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
8647         put_smstate(u32, buf, 0x7e94, seg.limit);
8648         put_smstate(u64, buf, 0x7e98, seg.base);
8649
8650         static_call(kvm_x86_get_idt)(vcpu, &dt);
8651         put_smstate(u32, buf, 0x7e84, dt.size);
8652         put_smstate(u64, buf, 0x7e88, dt.address);
8653
8654         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8655         put_smstate(u16, buf, 0x7e70, seg.selector);
8656         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
8657         put_smstate(u32, buf, 0x7e74, seg.limit);
8658         put_smstate(u64, buf, 0x7e78, seg.base);
8659
8660         static_call(kvm_x86_get_gdt)(vcpu, &dt);
8661         put_smstate(u32, buf, 0x7e64, dt.size);
8662         put_smstate(u64, buf, 0x7e68, dt.address);
8663
8664         for (i = 0; i < 6; i++)
8665                 enter_smm_save_seg_64(vcpu, buf, i);
8666 }
8667 #endif
8668
8669 static void enter_smm(struct kvm_vcpu *vcpu)
8670 {
8671         struct kvm_segment cs, ds;
8672         struct desc_ptr dt;
8673         char buf[512];
8674         u32 cr0;
8675
8676         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
8677         memset(buf, 0, 512);
8678 #ifdef CONFIG_X86_64
8679         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
8680                 enter_smm_save_state_64(vcpu, buf);
8681         else
8682 #endif
8683                 enter_smm_save_state_32(vcpu, buf);
8684
8685         /*
8686          * Give pre_enter_smm() a chance to make ISA-specific changes to the
8687          * vCPU state (e.g. leave guest mode) after we've saved the state into
8688          * the SMM state-save area.
8689          */
8690         static_call(kvm_x86_pre_enter_smm)(vcpu, buf);
8691
8692         vcpu->arch.hflags |= HF_SMM_MASK;
8693         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
8694
8695         if (static_call(kvm_x86_get_nmi_mask)(vcpu))
8696                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
8697         else
8698                 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
8699
8700         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
8701         kvm_rip_write(vcpu, 0x8000);
8702
8703         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
8704         static_call(kvm_x86_set_cr0)(vcpu, cr0);
8705         vcpu->arch.cr0 = cr0;
8706
8707         static_call(kvm_x86_set_cr4)(vcpu, 0);
8708
8709         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
8710         dt.address = dt.size = 0;
8711         static_call(kvm_x86_set_idt)(vcpu, &dt);
8712
8713         kvm_set_dr(vcpu, 7, DR7_FIXED_1);
8714
8715         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
8716         cs.base = vcpu->arch.smbase;
8717
8718         ds.selector = 0;
8719         ds.base = 0;
8720
8721         cs.limit    = ds.limit = 0xffffffff;
8722         cs.type     = ds.type = 0x3;
8723         cs.dpl      = ds.dpl = 0;
8724         cs.db       = ds.db = 0;
8725         cs.s        = ds.s = 1;
8726         cs.l        = ds.l = 0;
8727         cs.g        = ds.g = 1;
8728         cs.avl      = ds.avl = 0;
8729         cs.present  = ds.present = 1;
8730         cs.unusable = ds.unusable = 0;
8731         cs.padding  = ds.padding = 0;
8732
8733         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
8734         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
8735         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
8736         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
8737         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
8738         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
8739
8740 #ifdef CONFIG_X86_64
8741         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
8742                 static_call(kvm_x86_set_efer)(vcpu, 0);
8743 #endif
8744
8745         kvm_update_cpuid_runtime(vcpu);
8746         kvm_mmu_reset_context(vcpu);
8747 }
8748
8749 static void process_smi(struct kvm_vcpu *vcpu)
8750 {
8751         vcpu->arch.smi_pending = true;
8752         kvm_make_request(KVM_REQ_EVENT, vcpu);
8753 }
8754
8755 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
8756                                        unsigned long *vcpu_bitmap)
8757 {
8758         cpumask_var_t cpus;
8759
8760         zalloc_cpumask_var(&cpus, GFP_ATOMIC);
8761
8762         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC,
8763                                     NULL, vcpu_bitmap, cpus);
8764
8765         free_cpumask_var(cpus);
8766 }
8767
8768 void kvm_make_scan_ioapic_request(struct kvm *kvm)
8769 {
8770         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
8771 }
8772
8773 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
8774 {
8775         if (!lapic_in_kernel(vcpu))
8776                 return;
8777
8778         vcpu->arch.apicv_active = kvm_apicv_activated(vcpu->kvm);
8779         kvm_apic_update_apicv(vcpu);
8780         static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
8781 }
8782 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
8783
8784 /*
8785  * NOTE: Do not hold any lock prior to calling this.
8786  *
8787  * In particular, kvm_request_apicv_update() expects kvm->srcu not to be
8788  * locked, because it calls __x86_set_memory_region() which does
8789  * synchronize_srcu(&kvm->srcu).
8790  */
8791 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
8792 {
8793         struct kvm_vcpu *except;
8794         unsigned long old, new, expected;
8795
8796         if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
8797             !static_call(kvm_x86_check_apicv_inhibit_reasons)(bit))
8798                 return;
8799
8800         old = READ_ONCE(kvm->arch.apicv_inhibit_reasons);
8801         do {
8802                 expected = new = old;
8803                 if (activate)
8804                         __clear_bit(bit, &new);
8805                 else
8806                         __set_bit(bit, &new);
8807                 if (new == old)
8808                         break;
8809                 old = cmpxchg(&kvm->arch.apicv_inhibit_reasons, expected, new);
8810         } while (old != expected);
8811
8812         if (!!old == !!new)
8813                 return;
8814
8815         trace_kvm_apicv_update_request(activate, bit);
8816         if (kvm_x86_ops.pre_update_apicv_exec_ctrl)
8817                 static_call(kvm_x86_pre_update_apicv_exec_ctrl)(kvm, activate);
8818
8819         /*
8820          * Sending request to update APICV for all other vcpus,
8821          * while update the calling vcpu immediately instead of
8822          * waiting for another #VMEXIT to handle the request.
8823          */
8824         except = kvm_get_running_vcpu();
8825         kvm_make_all_cpus_request_except(kvm, KVM_REQ_APICV_UPDATE,
8826                                          except);
8827         if (except)
8828                 kvm_vcpu_update_apicv(except);
8829 }
8830 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
8831
8832 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
8833 {
8834         if (!kvm_apic_present(vcpu))
8835                 return;
8836
8837         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
8838
8839         if (irqchip_split(vcpu->kvm))
8840                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
8841         else {
8842                 if (vcpu->arch.apicv_active)
8843                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
8844                 if (ioapic_in_kernel(vcpu->kvm))
8845                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
8846         }
8847
8848         if (is_guest_mode(vcpu))
8849                 vcpu->arch.load_eoi_exitmap_pending = true;
8850         else
8851                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
8852 }
8853
8854 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
8855 {
8856         u64 eoi_exit_bitmap[4];
8857
8858         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
8859                 return;
8860
8861         if (to_hv_vcpu(vcpu))
8862                 bitmap_or((ulong *)eoi_exit_bitmap,
8863                           vcpu->arch.ioapic_handled_vectors,
8864                           to_hv_synic(vcpu)->vec_bitmap, 256);
8865
8866         static_call(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
8867 }
8868
8869 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
8870                                             unsigned long start, unsigned long end)
8871 {
8872         unsigned long apic_address;
8873
8874         /*
8875          * The physical address of apic access page is stored in the VMCS.
8876          * Update it when it becomes invalid.
8877          */
8878         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
8879         if (start <= apic_address && apic_address < end)
8880                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
8881 }
8882
8883 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
8884 {
8885         if (!lapic_in_kernel(vcpu))
8886                 return;
8887
8888         if (!kvm_x86_ops.set_apic_access_page_addr)
8889                 return;
8890
8891         static_call(kvm_x86_set_apic_access_page_addr)(vcpu);
8892 }
8893
8894 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
8895 {
8896         smp_send_reschedule(vcpu->cpu);
8897 }
8898 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
8899
8900 /*
8901  * Returns 1 to let vcpu_run() continue the guest execution loop without
8902  * exiting to the userspace.  Otherwise, the value will be returned to the
8903  * userspace.
8904  */
8905 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
8906 {
8907         int r;
8908         bool req_int_win =
8909                 dm_request_for_irq_injection(vcpu) &&
8910                 kvm_cpu_accept_dm_intr(vcpu);
8911         fastpath_t exit_fastpath;
8912
8913         bool req_immediate_exit = false;
8914
8915         /* Forbid vmenter if vcpu dirty ring is soft-full */
8916         if (unlikely(vcpu->kvm->dirty_ring_size &&
8917                      kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
8918                 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
8919                 trace_kvm_dirty_ring_exit(vcpu);
8920                 r = 0;
8921                 goto out;
8922         }
8923
8924         if (kvm_request_pending(vcpu)) {
8925                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
8926                         if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
8927                                 r = 0;
8928                                 goto out;
8929                         }
8930                 }
8931                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
8932                         kvm_mmu_unload(vcpu);
8933                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
8934                         __kvm_migrate_timers(vcpu);
8935                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
8936                         kvm_gen_update_masterclock(vcpu->kvm);
8937                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
8938                         kvm_gen_kvmclock_update(vcpu);
8939                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
8940                         r = kvm_guest_time_update(vcpu);
8941                         if (unlikely(r))
8942                                 goto out;
8943                 }
8944                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
8945                         kvm_mmu_sync_roots(vcpu);
8946                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
8947                         kvm_mmu_load_pgd(vcpu);
8948                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
8949                         kvm_vcpu_flush_tlb_all(vcpu);
8950
8951                         /* Flushing all ASIDs flushes the current ASID... */
8952                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
8953                 }
8954                 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
8955                         kvm_vcpu_flush_tlb_current(vcpu);
8956                 if (kvm_check_request(KVM_REQ_HV_TLB_FLUSH, vcpu))
8957                         kvm_vcpu_flush_tlb_guest(vcpu);
8958
8959                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
8960                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
8961                         r = 0;
8962                         goto out;
8963                 }
8964                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
8965                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
8966                         vcpu->mmio_needed = 0;
8967                         r = 0;
8968                         goto out;
8969                 }
8970                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
8971                         /* Page is swapped out. Do synthetic halt */
8972                         vcpu->arch.apf.halted = true;
8973                         r = 1;
8974                         goto out;
8975                 }
8976                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
8977                         record_steal_time(vcpu);
8978                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
8979                         process_smi(vcpu);
8980                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
8981                         process_nmi(vcpu);
8982                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
8983                         kvm_pmu_handle_event(vcpu);
8984                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
8985                         kvm_pmu_deliver_pmi(vcpu);
8986                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
8987                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
8988                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
8989                                      vcpu->arch.ioapic_handled_vectors)) {
8990                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
8991                                 vcpu->run->eoi.vector =
8992                                                 vcpu->arch.pending_ioapic_eoi;
8993                                 r = 0;
8994                                 goto out;
8995                         }
8996                 }
8997                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
8998                         vcpu_scan_ioapic(vcpu);
8999                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
9000                         vcpu_load_eoi_exitmap(vcpu);
9001                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
9002                         kvm_vcpu_reload_apic_access_page(vcpu);
9003                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
9004                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9005                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
9006                         r = 0;
9007                         goto out;
9008                 }
9009                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
9010                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9011                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
9012                         r = 0;
9013                         goto out;
9014                 }
9015                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
9016                         struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
9017
9018                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
9019                         vcpu->run->hyperv = hv_vcpu->exit;
9020                         r = 0;
9021                         goto out;
9022                 }
9023
9024                 /*
9025                  * KVM_REQ_HV_STIMER has to be processed after
9026                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9027                  * depend on the guest clock being up-to-date
9028                  */
9029                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
9030                         kvm_hv_process_stimers(vcpu);
9031                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
9032                         kvm_vcpu_update_apicv(vcpu);
9033                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
9034                         kvm_check_async_pf_completion(vcpu);
9035                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
9036                         static_call(kvm_x86_msr_filter_changed)(vcpu);
9037
9038                 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
9039                         static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
9040         }
9041
9042         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
9043             kvm_xen_has_interrupt(vcpu)) {
9044                 ++vcpu->stat.req_event;
9045                 kvm_apic_accept_events(vcpu);
9046                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
9047                         r = 1;
9048                         goto out;
9049                 }
9050
9051                 inject_pending_event(vcpu, &req_immediate_exit);
9052                 if (req_int_win)
9053                         static_call(kvm_x86_enable_irq_window)(vcpu);
9054
9055                 if (kvm_lapic_enabled(vcpu)) {
9056                         update_cr8_intercept(vcpu);
9057                         kvm_lapic_sync_to_vapic(vcpu);
9058                 }
9059         }
9060
9061         r = kvm_mmu_reload(vcpu);
9062         if (unlikely(r)) {
9063                 goto cancel_injection;
9064         }
9065
9066         preempt_disable();
9067
9068         static_call(kvm_x86_prepare_guest_switch)(vcpu);
9069
9070         /*
9071          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
9072          * IPI are then delayed after guest entry, which ensures that they
9073          * result in virtual interrupt delivery.
9074          */
9075         local_irq_disable();
9076         vcpu->mode = IN_GUEST_MODE;
9077
9078         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9079
9080         /*
9081          * 1) We should set ->mode before checking ->requests.  Please see
9082          * the comment in kvm_vcpu_exiting_guest_mode().
9083          *
9084          * 2) For APICv, we should set ->mode before checking PID.ON. This
9085          * pairs with the memory barrier implicit in pi_test_and_set_on
9086          * (see vmx_deliver_posted_interrupt).
9087          *
9088          * 3) This also orders the write to mode from any reads to the page
9089          * tables done while the VCPU is running.  Please see the comment
9090          * in kvm_flush_remote_tlbs.
9091          */
9092         smp_mb__after_srcu_read_unlock();
9093
9094         /*
9095          * This handles the case where a posted interrupt was
9096          * notified with kvm_vcpu_kick.
9097          */
9098         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
9099                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9100
9101         if (kvm_vcpu_exit_request(vcpu)) {
9102                 vcpu->mode = OUTSIDE_GUEST_MODE;
9103                 smp_wmb();
9104                 local_irq_enable();
9105                 preempt_enable();
9106                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9107                 r = 1;
9108                 goto cancel_injection;
9109         }
9110
9111         if (req_immediate_exit) {
9112                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9113                 static_call(kvm_x86_request_immediate_exit)(vcpu);
9114         }
9115
9116         fpregs_assert_state_consistent();
9117         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9118                 switch_fpu_return();
9119
9120         if (unlikely(vcpu->arch.switch_db_regs)) {
9121                 set_debugreg(0, 7);
9122                 set_debugreg(vcpu->arch.eff_db[0], 0);
9123                 set_debugreg(vcpu->arch.eff_db[1], 1);
9124                 set_debugreg(vcpu->arch.eff_db[2], 2);
9125                 set_debugreg(vcpu->arch.eff_db[3], 3);
9126                 set_debugreg(vcpu->arch.dr6, 6);
9127                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
9128         }
9129
9130         for (;;) {
9131                 exit_fastpath = static_call(kvm_x86_run)(vcpu);
9132                 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
9133                         break;
9134
9135                 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
9136                         exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
9137                         break;
9138                 }
9139
9140                 if (vcpu->arch.apicv_active)
9141                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9142         }
9143
9144         /*
9145          * Do this here before restoring debug registers on the host.  And
9146          * since we do this before handling the vmexit, a DR access vmexit
9147          * can (a) read the correct value of the debug registers, (b) set
9148          * KVM_DEBUGREG_WONT_EXIT again.
9149          */
9150         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
9151                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
9152                 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
9153                 kvm_update_dr0123(vcpu);
9154                 kvm_update_dr7(vcpu);
9155                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
9156         }
9157
9158         /*
9159          * If the guest has used debug registers, at least dr7
9160          * will be disabled while returning to the host.
9161          * If we don't have active breakpoints in the host, we don't
9162          * care about the messed up debug address registers. But if
9163          * we have some of them active, restore the old state.
9164          */
9165         if (hw_breakpoint_active())
9166                 hw_breakpoint_restore();
9167
9168         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
9169         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
9170
9171         vcpu->mode = OUTSIDE_GUEST_MODE;
9172         smp_wmb();
9173
9174         static_call(kvm_x86_handle_exit_irqoff)(vcpu);
9175
9176         /*
9177          * Consume any pending interrupts, including the possible source of
9178          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
9179          * An instruction is required after local_irq_enable() to fully unblock
9180          * interrupts on processors that implement an interrupt shadow, the
9181          * stat.exits increment will do nicely.
9182          */
9183         kvm_before_interrupt(vcpu);
9184         local_irq_enable();
9185         ++vcpu->stat.exits;
9186         local_irq_disable();
9187         kvm_after_interrupt(vcpu);
9188
9189         if (lapic_in_kernel(vcpu)) {
9190                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
9191                 if (delta != S64_MIN) {
9192                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
9193                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
9194                 }
9195         }
9196
9197         local_irq_enable();
9198         preempt_enable();
9199
9200         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9201
9202         /*
9203          * Profile KVM exit RIPs:
9204          */
9205         if (unlikely(prof_on == KVM_PROFILING)) {
9206                 unsigned long rip = kvm_rip_read(vcpu);
9207                 profile_hit(KVM_PROFILING, (void *)rip);
9208         }
9209
9210         if (unlikely(vcpu->arch.tsc_always_catchup))
9211                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9212
9213         if (vcpu->arch.apic_attention)
9214                 kvm_lapic_sync_from_vapic(vcpu);
9215
9216         r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
9217         return r;
9218
9219 cancel_injection:
9220         if (req_immediate_exit)
9221                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9222         static_call(kvm_x86_cancel_injection)(vcpu);
9223         if (unlikely(vcpu->arch.apic_attention))
9224                 kvm_lapic_sync_from_vapic(vcpu);
9225 out:
9226         return r;
9227 }
9228
9229 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
9230 {
9231         if (!kvm_arch_vcpu_runnable(vcpu) &&
9232             (!kvm_x86_ops.pre_block || static_call(kvm_x86_pre_block)(vcpu) == 0)) {
9233                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9234                 kvm_vcpu_block(vcpu);
9235                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9236
9237                 if (kvm_x86_ops.post_block)
9238                         static_call(kvm_x86_post_block)(vcpu);
9239
9240                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
9241                         return 1;
9242         }
9243
9244         kvm_apic_accept_events(vcpu);
9245         switch(vcpu->arch.mp_state) {
9246         case KVM_MP_STATE_HALTED:
9247         case KVM_MP_STATE_AP_RESET_HOLD:
9248                 vcpu->arch.pv.pv_unhalted = false;
9249                 vcpu->arch.mp_state =
9250                         KVM_MP_STATE_RUNNABLE;
9251                 fallthrough;
9252         case KVM_MP_STATE_RUNNABLE:
9253                 vcpu->arch.apf.halted = false;
9254                 break;
9255         case KVM_MP_STATE_INIT_RECEIVED:
9256                 break;
9257         default:
9258                 return -EINTR;
9259         }
9260         return 1;
9261 }
9262
9263 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
9264 {
9265         if (is_guest_mode(vcpu))
9266                 kvm_x86_ops.nested_ops->check_events(vcpu);
9267
9268         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
9269                 !vcpu->arch.apf.halted);
9270 }
9271
9272 static int vcpu_run(struct kvm_vcpu *vcpu)
9273 {
9274         int r;
9275         struct kvm *kvm = vcpu->kvm;
9276
9277         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9278         vcpu->arch.l1tf_flush_l1d = true;
9279
9280         for (;;) {
9281                 if (kvm_vcpu_running(vcpu)) {
9282                         r = vcpu_enter_guest(vcpu);
9283                 } else {
9284                         r = vcpu_block(kvm, vcpu);
9285                 }
9286
9287                 if (r <= 0)
9288                         break;
9289
9290                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
9291                 if (kvm_cpu_has_pending_timer(vcpu))
9292                         kvm_inject_pending_timer_irqs(vcpu);
9293
9294                 if (dm_request_for_irq_injection(vcpu) &&
9295                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
9296                         r = 0;
9297                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
9298                         ++vcpu->stat.request_irq_exits;
9299                         break;
9300                 }
9301
9302                 if (__xfer_to_guest_mode_work_pending()) {
9303                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9304                         r = xfer_to_guest_mode_handle_work(vcpu);
9305                         if (r)
9306                                 return r;
9307                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9308                 }
9309         }
9310
9311         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9312
9313         return r;
9314 }
9315
9316 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
9317 {
9318         int r;
9319
9320         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9321         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
9322         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9323         return r;
9324 }
9325
9326 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
9327 {
9328         BUG_ON(!vcpu->arch.pio.count);
9329
9330         return complete_emulated_io(vcpu);
9331 }
9332
9333 /*
9334  * Implements the following, as a state machine:
9335  *
9336  * read:
9337  *   for each fragment
9338  *     for each mmio piece in the fragment
9339  *       write gpa, len
9340  *       exit
9341  *       copy data
9342  *   execute insn
9343  *
9344  * write:
9345  *   for each fragment
9346  *     for each mmio piece in the fragment
9347  *       write gpa, len
9348  *       copy data
9349  *       exit
9350  */
9351 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
9352 {
9353         struct kvm_run *run = vcpu->run;
9354         struct kvm_mmio_fragment *frag;
9355         unsigned len;
9356
9357         BUG_ON(!vcpu->mmio_needed);
9358
9359         /* Complete previous fragment */
9360         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
9361         len = min(8u, frag->len);
9362         if (!vcpu->mmio_is_write)
9363                 memcpy(frag->data, run->mmio.data, len);
9364
9365         if (frag->len <= 8) {
9366                 /* Switch to the next fragment. */
9367                 frag++;
9368                 vcpu->mmio_cur_fragment++;
9369         } else {
9370                 /* Go forward to the next mmio piece. */
9371                 frag->data += len;
9372                 frag->gpa += len;
9373                 frag->len -= len;
9374         }
9375
9376         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
9377                 vcpu->mmio_needed = 0;
9378
9379                 /* FIXME: return into emulator if single-stepping.  */
9380                 if (vcpu->mmio_is_write)
9381                         return 1;
9382                 vcpu->mmio_read_completed = 1;
9383                 return complete_emulated_io(vcpu);
9384         }
9385
9386         run->exit_reason = KVM_EXIT_MMIO;
9387         run->mmio.phys_addr = frag->gpa;
9388         if (vcpu->mmio_is_write)
9389                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
9390         run->mmio.len = min(8u, frag->len);
9391         run->mmio.is_write = vcpu->mmio_is_write;
9392         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
9393         return 0;
9394 }
9395
9396 static void kvm_save_current_fpu(struct fpu *fpu)
9397 {
9398         /*
9399          * If the target FPU state is not resident in the CPU registers, just
9400          * memcpy() from current, else save CPU state directly to the target.
9401          */
9402         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9403                 memcpy(&fpu->state, &current->thread.fpu.state,
9404                        fpu_kernel_xstate_size);
9405         else
9406                 copy_fpregs_to_fpstate(fpu);
9407 }
9408
9409 /* Swap (qemu) user FPU context for the guest FPU context. */
9410 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
9411 {
9412         fpregs_lock();
9413
9414         kvm_save_current_fpu(vcpu->arch.user_fpu);
9415
9416         /*
9417          * Guests with protected state can't have it set by the hypervisor,
9418          * so skip trying to set it.
9419          */
9420         if (vcpu->arch.guest_fpu)
9421                 /* PKRU is separately restored in kvm_x86_ops.run. */
9422                 __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
9423                                         ~XFEATURE_MASK_PKRU);
9424
9425         fpregs_mark_activate();
9426         fpregs_unlock();
9427
9428         trace_kvm_fpu(1);
9429 }
9430
9431 /* When vcpu_run ends, restore user space FPU context. */
9432 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
9433 {
9434         fpregs_lock();
9435
9436         /*
9437          * Guests with protected state can't have it read by the hypervisor,
9438          * so skip trying to save it.
9439          */
9440         if (vcpu->arch.guest_fpu)
9441                 kvm_save_current_fpu(vcpu->arch.guest_fpu);
9442
9443         copy_kernel_to_fpregs(&vcpu->arch.user_fpu->state);
9444
9445         fpregs_mark_activate();
9446         fpregs_unlock();
9447
9448         ++vcpu->stat.fpu_reload;
9449         trace_kvm_fpu(0);
9450 }
9451
9452 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
9453 {
9454         struct kvm_run *kvm_run = vcpu->run;
9455         int r;
9456
9457         vcpu_load(vcpu);
9458         kvm_sigset_activate(vcpu);
9459         kvm_run->flags = 0;
9460         kvm_load_guest_fpu(vcpu);
9461
9462         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
9463                 if (kvm_run->immediate_exit) {
9464                         r = -EINTR;
9465                         goto out;
9466                 }
9467                 kvm_vcpu_block(vcpu);
9468                 kvm_apic_accept_events(vcpu);
9469                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
9470                 r = -EAGAIN;
9471                 if (signal_pending(current)) {
9472                         r = -EINTR;
9473                         kvm_run->exit_reason = KVM_EXIT_INTR;
9474                         ++vcpu->stat.signal_exits;
9475                 }
9476                 goto out;
9477         }
9478
9479         if (kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
9480                 r = -EINVAL;
9481                 goto out;
9482         }
9483
9484         if (kvm_run->kvm_dirty_regs) {
9485                 r = sync_regs(vcpu);
9486                 if (r != 0)
9487                         goto out;
9488         }
9489
9490         /* re-sync apic's tpr */
9491         if (!lapic_in_kernel(vcpu)) {
9492                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
9493                         r = -EINVAL;
9494                         goto out;
9495                 }
9496         }
9497
9498         if (unlikely(vcpu->arch.complete_userspace_io)) {
9499                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
9500                 vcpu->arch.complete_userspace_io = NULL;
9501                 r = cui(vcpu);
9502                 if (r <= 0)
9503                         goto out;
9504         } else
9505                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
9506
9507         if (kvm_run->immediate_exit)
9508                 r = -EINTR;
9509         else
9510                 r = vcpu_run(vcpu);
9511
9512 out:
9513         kvm_put_guest_fpu(vcpu);
9514         if (kvm_run->kvm_valid_regs)
9515                 store_regs(vcpu);
9516         post_kvm_run_save(vcpu);
9517         kvm_sigset_deactivate(vcpu);
9518
9519         vcpu_put(vcpu);
9520         return r;
9521 }
9522
9523 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9524 {
9525         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
9526                 /*
9527                  * We are here if userspace calls get_regs() in the middle of
9528                  * instruction emulation. Registers state needs to be copied
9529                  * back from emulation context to vcpu. Userspace shouldn't do
9530                  * that usually, but some bad designed PV devices (vmware
9531                  * backdoor interface) need this to work
9532                  */
9533                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
9534                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9535         }
9536         regs->rax = kvm_rax_read(vcpu);
9537         regs->rbx = kvm_rbx_read(vcpu);
9538         regs->rcx = kvm_rcx_read(vcpu);
9539         regs->rdx = kvm_rdx_read(vcpu);
9540         regs->rsi = kvm_rsi_read(vcpu);
9541         regs->rdi = kvm_rdi_read(vcpu);
9542         regs->rsp = kvm_rsp_read(vcpu);
9543         regs->rbp = kvm_rbp_read(vcpu);
9544 #ifdef CONFIG_X86_64
9545         regs->r8 = kvm_r8_read(vcpu);
9546         regs->r9 = kvm_r9_read(vcpu);
9547         regs->r10 = kvm_r10_read(vcpu);
9548         regs->r11 = kvm_r11_read(vcpu);
9549         regs->r12 = kvm_r12_read(vcpu);
9550         regs->r13 = kvm_r13_read(vcpu);
9551         regs->r14 = kvm_r14_read(vcpu);
9552         regs->r15 = kvm_r15_read(vcpu);
9553 #endif
9554
9555         regs->rip = kvm_rip_read(vcpu);
9556         regs->rflags = kvm_get_rflags(vcpu);
9557 }
9558
9559 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9560 {
9561         vcpu_load(vcpu);
9562         __get_regs(vcpu, regs);
9563         vcpu_put(vcpu);
9564         return 0;
9565 }
9566
9567 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9568 {
9569         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
9570         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9571
9572         kvm_rax_write(vcpu, regs->rax);
9573         kvm_rbx_write(vcpu, regs->rbx);
9574         kvm_rcx_write(vcpu, regs->rcx);
9575         kvm_rdx_write(vcpu, regs->rdx);
9576         kvm_rsi_write(vcpu, regs->rsi);
9577         kvm_rdi_write(vcpu, regs->rdi);
9578         kvm_rsp_write(vcpu, regs->rsp);
9579         kvm_rbp_write(vcpu, regs->rbp);
9580 #ifdef CONFIG_X86_64
9581         kvm_r8_write(vcpu, regs->r8);
9582         kvm_r9_write(vcpu, regs->r9);
9583         kvm_r10_write(vcpu, regs->r10);
9584         kvm_r11_write(vcpu, regs->r11);
9585         kvm_r12_write(vcpu, regs->r12);
9586         kvm_r13_write(vcpu, regs->r13);
9587         kvm_r14_write(vcpu, regs->r14);
9588         kvm_r15_write(vcpu, regs->r15);
9589 #endif
9590
9591         kvm_rip_write(vcpu, regs->rip);
9592         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
9593
9594         vcpu->arch.exception.pending = false;
9595
9596         kvm_make_request(KVM_REQ_EVENT, vcpu);
9597 }
9598
9599 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9600 {
9601         vcpu_load(vcpu);
9602         __set_regs(vcpu, regs);
9603         vcpu_put(vcpu);
9604         return 0;
9605 }
9606
9607 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
9608 {
9609         struct kvm_segment cs;
9610
9611         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
9612         *db = cs.db;
9613         *l = cs.l;
9614 }
9615 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
9616
9617 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9618 {
9619         struct desc_ptr dt;
9620
9621         if (vcpu->arch.guest_state_protected)
9622                 goto skip_protected_regs;
9623
9624         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9625         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9626         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9627         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9628         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9629         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9630
9631         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9632         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9633
9634         static_call(kvm_x86_get_idt)(vcpu, &dt);
9635         sregs->idt.limit = dt.size;
9636         sregs->idt.base = dt.address;
9637         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9638         sregs->gdt.limit = dt.size;
9639         sregs->gdt.base = dt.address;
9640
9641         sregs->cr2 = vcpu->arch.cr2;
9642         sregs->cr3 = kvm_read_cr3(vcpu);
9643
9644 skip_protected_regs:
9645         sregs->cr0 = kvm_read_cr0(vcpu);
9646         sregs->cr4 = kvm_read_cr4(vcpu);
9647         sregs->cr8 = kvm_get_cr8(vcpu);
9648         sregs->efer = vcpu->arch.efer;
9649         sregs->apic_base = kvm_get_apic_base(vcpu);
9650
9651         memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
9652
9653         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
9654                 set_bit(vcpu->arch.interrupt.nr,
9655                         (unsigned long *)sregs->interrupt_bitmap);
9656 }
9657
9658 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
9659                                   struct kvm_sregs *sregs)
9660 {
9661         vcpu_load(vcpu);
9662         __get_sregs(vcpu, sregs);
9663         vcpu_put(vcpu);
9664         return 0;
9665 }
9666
9667 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
9668                                     struct kvm_mp_state *mp_state)
9669 {
9670         vcpu_load(vcpu);
9671         if (kvm_mpx_supported())
9672                 kvm_load_guest_fpu(vcpu);
9673
9674         kvm_apic_accept_events(vcpu);
9675         if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
9676              vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
9677             vcpu->arch.pv.pv_unhalted)
9678                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
9679         else
9680                 mp_state->mp_state = vcpu->arch.mp_state;
9681
9682         if (kvm_mpx_supported())
9683                 kvm_put_guest_fpu(vcpu);
9684         vcpu_put(vcpu);
9685         return 0;
9686 }
9687
9688 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
9689                                     struct kvm_mp_state *mp_state)
9690 {
9691         int ret = -EINVAL;
9692
9693         vcpu_load(vcpu);
9694
9695         if (!lapic_in_kernel(vcpu) &&
9696             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
9697                 goto out;
9698
9699         /*
9700          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
9701          * INIT state; latched init should be reported using
9702          * KVM_SET_VCPU_EVENTS, so reject it here.
9703          */
9704         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
9705             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
9706              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
9707                 goto out;
9708
9709         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
9710                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
9711                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
9712         } else
9713                 vcpu->arch.mp_state = mp_state->mp_state;
9714         kvm_make_request(KVM_REQ_EVENT, vcpu);
9715
9716         ret = 0;
9717 out:
9718         vcpu_put(vcpu);
9719         return ret;
9720 }
9721
9722 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
9723                     int reason, bool has_error_code, u32 error_code)
9724 {
9725         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
9726         int ret;
9727
9728         init_emulate_ctxt(vcpu);
9729
9730         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
9731                                    has_error_code, error_code);
9732         if (ret) {
9733                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
9734                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
9735                 vcpu->run->internal.ndata = 0;
9736                 return 0;
9737         }
9738
9739         kvm_rip_write(vcpu, ctxt->eip);
9740         kvm_set_rflags(vcpu, ctxt->eflags);
9741         return 1;
9742 }
9743 EXPORT_SYMBOL_GPL(kvm_task_switch);
9744
9745 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9746 {
9747         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
9748                 /*
9749                  * When EFER.LME and CR0.PG are set, the processor is in
9750                  * 64-bit mode (though maybe in a 32-bit code segment).
9751                  * CR4.PAE and EFER.LMA must be set.
9752                  */
9753                 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
9754                         return false;
9755                 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
9756                         return false;
9757         } else {
9758                 /*
9759                  * Not in 64-bit mode: EFER.LMA is clear and the code
9760                  * segment cannot be 64-bit.
9761                  */
9762                 if (sregs->efer & EFER_LMA || sregs->cs.l)
9763                         return false;
9764         }
9765
9766         return kvm_is_valid_cr4(vcpu, sregs->cr4);
9767 }
9768
9769 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9770 {
9771         struct msr_data apic_base_msr;
9772         int mmu_reset_needed = 0;
9773         int pending_vec, max_bits, idx;
9774         struct desc_ptr dt;
9775         int ret = -EINVAL;
9776
9777         if (!kvm_is_valid_sregs(vcpu, sregs))
9778                 goto out;
9779
9780         apic_base_msr.data = sregs->apic_base;
9781         apic_base_msr.host_initiated = true;
9782         if (kvm_set_apic_base(vcpu, &apic_base_msr))
9783                 goto out;
9784
9785         if (vcpu->arch.guest_state_protected)
9786                 goto skip_protected_regs;
9787
9788         dt.size = sregs->idt.limit;
9789         dt.address = sregs->idt.base;
9790         static_call(kvm_x86_set_idt)(vcpu, &dt);
9791         dt.size = sregs->gdt.limit;
9792         dt.address = sregs->gdt.base;
9793         static_call(kvm_x86_set_gdt)(vcpu, &dt);
9794
9795         vcpu->arch.cr2 = sregs->cr2;
9796         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
9797         vcpu->arch.cr3 = sregs->cr3;
9798         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
9799
9800         kvm_set_cr8(vcpu, sregs->cr8);
9801
9802         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
9803         static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
9804
9805         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
9806         static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
9807         vcpu->arch.cr0 = sregs->cr0;
9808
9809         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
9810         static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
9811
9812         idx = srcu_read_lock(&vcpu->kvm->srcu);
9813         if (is_pae_paging(vcpu)) {
9814                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
9815                 mmu_reset_needed = 1;
9816         }
9817         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9818
9819         if (mmu_reset_needed)
9820                 kvm_mmu_reset_context(vcpu);
9821
9822         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9823         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9824         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9825         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9826         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9827         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9828
9829         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9830         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9831
9832         update_cr8_intercept(vcpu);
9833
9834         /* Older userspace won't unhalt the vcpu on reset. */
9835         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
9836             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
9837             !is_protmode(vcpu))
9838                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9839
9840 skip_protected_regs:
9841         max_bits = KVM_NR_INTERRUPTS;
9842         pending_vec = find_first_bit(
9843                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
9844         if (pending_vec < max_bits) {
9845                 kvm_queue_interrupt(vcpu, pending_vec, false);
9846                 pr_debug("Set back pending irq %d\n", pending_vec);
9847         }
9848
9849         kvm_make_request(KVM_REQ_EVENT, vcpu);
9850
9851         ret = 0;
9852 out:
9853         return ret;
9854 }
9855
9856 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
9857                                   struct kvm_sregs *sregs)
9858 {
9859         int ret;
9860
9861         vcpu_load(vcpu);
9862         ret = __set_sregs(vcpu, sregs);
9863         vcpu_put(vcpu);
9864         return ret;
9865 }
9866
9867 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
9868                                         struct kvm_guest_debug *dbg)
9869 {
9870         unsigned long rflags;
9871         int i, r;
9872
9873         if (vcpu->arch.guest_state_protected)
9874                 return -EINVAL;
9875
9876         vcpu_load(vcpu);
9877
9878         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
9879                 r = -EBUSY;
9880                 if (vcpu->arch.exception.pending)
9881                         goto out;
9882                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
9883                         kvm_queue_exception(vcpu, DB_VECTOR);
9884                 else
9885                         kvm_queue_exception(vcpu, BP_VECTOR);
9886         }
9887
9888         /*
9889          * Read rflags as long as potentially injected trace flags are still
9890          * filtered out.
9891          */
9892         rflags = kvm_get_rflags(vcpu);
9893
9894         vcpu->guest_debug = dbg->control;
9895         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
9896                 vcpu->guest_debug = 0;
9897
9898         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
9899                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
9900                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
9901                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
9902         } else {
9903                 for (i = 0; i < KVM_NR_DB_REGS; i++)
9904                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
9905         }
9906         kvm_update_dr7(vcpu);
9907
9908         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
9909                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
9910                         get_segment_base(vcpu, VCPU_SREG_CS);
9911
9912         /*
9913          * Trigger an rflags update that will inject or remove the trace
9914          * flags.
9915          */
9916         kvm_set_rflags(vcpu, rflags);
9917
9918         static_call(kvm_x86_update_exception_bitmap)(vcpu);
9919
9920         r = 0;
9921
9922 out:
9923         vcpu_put(vcpu);
9924         return r;
9925 }
9926
9927 /*
9928  * Translate a guest virtual address to a guest physical address.
9929  */
9930 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
9931                                     struct kvm_translation *tr)
9932 {
9933         unsigned long vaddr = tr->linear_address;
9934         gpa_t gpa;
9935         int idx;
9936
9937         vcpu_load(vcpu);
9938
9939         idx = srcu_read_lock(&vcpu->kvm->srcu);
9940         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
9941         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9942         tr->physical_address = gpa;
9943         tr->valid = gpa != UNMAPPED_GVA;
9944         tr->writeable = 1;
9945         tr->usermode = 0;
9946
9947         vcpu_put(vcpu);
9948         return 0;
9949 }
9950
9951 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
9952 {
9953         struct fxregs_state *fxsave;
9954
9955         if (!vcpu->arch.guest_fpu)
9956                 return 0;
9957
9958         vcpu_load(vcpu);
9959
9960         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
9961         memcpy(fpu->fpr, fxsave->st_space, 128);
9962         fpu->fcw = fxsave->cwd;
9963         fpu->fsw = fxsave->swd;
9964         fpu->ftwx = fxsave->twd;
9965         fpu->last_opcode = fxsave->fop;
9966         fpu->last_ip = fxsave->rip;
9967         fpu->last_dp = fxsave->rdp;
9968         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
9969
9970         vcpu_put(vcpu);
9971         return 0;
9972 }
9973
9974 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
9975 {
9976         struct fxregs_state *fxsave;
9977
9978         if (!vcpu->arch.guest_fpu)
9979                 return 0;
9980
9981         vcpu_load(vcpu);
9982
9983         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
9984
9985         memcpy(fxsave->st_space, fpu->fpr, 128);
9986         fxsave->cwd = fpu->fcw;
9987         fxsave->swd = fpu->fsw;
9988         fxsave->twd = fpu->ftwx;
9989         fxsave->fop = fpu->last_opcode;
9990         fxsave->rip = fpu->last_ip;
9991         fxsave->rdp = fpu->last_dp;
9992         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
9993
9994         vcpu_put(vcpu);
9995         return 0;
9996 }
9997
9998 static void store_regs(struct kvm_vcpu *vcpu)
9999 {
10000         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
10001
10002         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
10003                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
10004
10005         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
10006                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
10007
10008         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
10009                 kvm_vcpu_ioctl_x86_get_vcpu_events(
10010                                 vcpu, &vcpu->run->s.regs.events);
10011 }
10012
10013 static int sync_regs(struct kvm_vcpu *vcpu)
10014 {
10015         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
10016                 return -EINVAL;
10017
10018         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
10019                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
10020                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
10021         }
10022         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
10023                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
10024                         return -EINVAL;
10025                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
10026         }
10027         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
10028                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
10029                                 vcpu, &vcpu->run->s.regs.events))
10030                         return -EINVAL;
10031                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
10032         }
10033
10034         return 0;
10035 }
10036
10037 static void fx_init(struct kvm_vcpu *vcpu)
10038 {
10039         if (!vcpu->arch.guest_fpu)
10040                 return;
10041
10042         fpstate_init(&vcpu->arch.guest_fpu->state);
10043         if (boot_cpu_has(X86_FEATURE_XSAVES))
10044                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
10045                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
10046
10047         /*
10048          * Ensure guest xcr0 is valid for loading
10049          */
10050         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10051
10052         vcpu->arch.cr0 |= X86_CR0_ET;
10053 }
10054
10055 void kvm_free_guest_fpu(struct kvm_vcpu *vcpu)
10056 {
10057         if (vcpu->arch.guest_fpu) {
10058                 kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
10059                 vcpu->arch.guest_fpu = NULL;
10060         }
10061 }
10062 EXPORT_SYMBOL_GPL(kvm_free_guest_fpu);
10063
10064 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
10065 {
10066         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
10067                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
10068                              "guest TSC will not be reliable\n");
10069
10070         return 0;
10071 }
10072
10073 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
10074 {
10075         struct page *page;
10076         int r;
10077
10078         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
10079                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10080         else
10081                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
10082
10083         kvm_set_tsc_khz(vcpu, max_tsc_khz);
10084
10085         r = kvm_mmu_create(vcpu);
10086         if (r < 0)
10087                 return r;
10088
10089         if (irqchip_in_kernel(vcpu->kvm)) {
10090                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
10091                 if (r < 0)
10092                         goto fail_mmu_destroy;
10093                 if (kvm_apicv_activated(vcpu->kvm))
10094                         vcpu->arch.apicv_active = true;
10095         } else
10096                 static_branch_inc(&kvm_has_noapic_vcpu);
10097
10098         r = -ENOMEM;
10099
10100         page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
10101         if (!page)
10102                 goto fail_free_lapic;
10103         vcpu->arch.pio_data = page_address(page);
10104
10105         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
10106                                        GFP_KERNEL_ACCOUNT);
10107         if (!vcpu->arch.mce_banks)
10108                 goto fail_free_pio_data;
10109         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
10110
10111         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
10112                                 GFP_KERNEL_ACCOUNT))
10113                 goto fail_free_mce_banks;
10114
10115         if (!alloc_emulate_ctxt(vcpu))
10116                 goto free_wbinvd_dirty_mask;
10117
10118         vcpu->arch.user_fpu = kmem_cache_zalloc(x86_fpu_cache,
10119                                                 GFP_KERNEL_ACCOUNT);
10120         if (!vcpu->arch.user_fpu) {
10121                 pr_err("kvm: failed to allocate userspace's fpu\n");
10122                 goto free_emulate_ctxt;
10123         }
10124
10125         vcpu->arch.guest_fpu = kmem_cache_zalloc(x86_fpu_cache,
10126                                                  GFP_KERNEL_ACCOUNT);
10127         if (!vcpu->arch.guest_fpu) {
10128                 pr_err("kvm: failed to allocate vcpu's fpu\n");
10129                 goto free_user_fpu;
10130         }
10131         fx_init(vcpu);
10132
10133         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
10134         vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
10135
10136         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
10137
10138         kvm_async_pf_hash_reset(vcpu);
10139         kvm_pmu_init(vcpu);
10140
10141         vcpu->arch.pending_external_vector = -1;
10142         vcpu->arch.preempted_in_kernel = false;
10143
10144         r = static_call(kvm_x86_vcpu_create)(vcpu);
10145         if (r)
10146                 goto free_guest_fpu;
10147
10148         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
10149         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
10150         kvm_vcpu_mtrr_init(vcpu);
10151         vcpu_load(vcpu);
10152         kvm_vcpu_reset(vcpu, false);
10153         kvm_init_mmu(vcpu, false);
10154         vcpu_put(vcpu);
10155         return 0;
10156
10157 free_guest_fpu:
10158         kvm_free_guest_fpu(vcpu);
10159 free_user_fpu:
10160         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10161 free_emulate_ctxt:
10162         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10163 free_wbinvd_dirty_mask:
10164         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10165 fail_free_mce_banks:
10166         kfree(vcpu->arch.mce_banks);
10167 fail_free_pio_data:
10168         free_page((unsigned long)vcpu->arch.pio_data);
10169 fail_free_lapic:
10170         kvm_free_lapic(vcpu);
10171 fail_mmu_destroy:
10172         kvm_mmu_destroy(vcpu);
10173         return r;
10174 }
10175
10176 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
10177 {
10178         struct kvm *kvm = vcpu->kvm;
10179
10180         if (mutex_lock_killable(&vcpu->mutex))
10181                 return;
10182         vcpu_load(vcpu);
10183         kvm_synchronize_tsc(vcpu, 0);
10184         vcpu_put(vcpu);
10185
10186         /* poll control enabled by default */
10187         vcpu->arch.msr_kvm_poll_control = 1;
10188
10189         mutex_unlock(&vcpu->mutex);
10190
10191         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
10192                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
10193                                                 KVMCLOCK_SYNC_PERIOD);
10194 }
10195
10196 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
10197 {
10198         struct gfn_to_pfn_cache *cache = &vcpu->arch.st.cache;
10199         int idx;
10200
10201         kvm_release_pfn(cache->pfn, cache->dirty, cache);
10202
10203         kvmclock_reset(vcpu);
10204
10205         static_call(kvm_x86_vcpu_free)(vcpu);
10206
10207         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10208         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10209         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10210         kvm_free_guest_fpu(vcpu);
10211
10212         kvm_hv_vcpu_uninit(vcpu);
10213         kvm_pmu_destroy(vcpu);
10214         kfree(vcpu->arch.mce_banks);
10215         kvm_free_lapic(vcpu);
10216         idx = srcu_read_lock(&vcpu->kvm->srcu);
10217         kvm_mmu_destroy(vcpu);
10218         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10219         free_page((unsigned long)vcpu->arch.pio_data);
10220         kvfree(vcpu->arch.cpuid_entries);
10221         if (!lapic_in_kernel(vcpu))
10222                 static_branch_dec(&kvm_has_noapic_vcpu);
10223 }
10224
10225 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
10226 {
10227         kvm_lapic_reset(vcpu, init_event);
10228
10229         vcpu->arch.hflags = 0;
10230
10231         vcpu->arch.smi_pending = 0;
10232         vcpu->arch.smi_count = 0;
10233         atomic_set(&vcpu->arch.nmi_queued, 0);
10234         vcpu->arch.nmi_pending = 0;
10235         vcpu->arch.nmi_injected = false;
10236         kvm_clear_interrupt_queue(vcpu);
10237         kvm_clear_exception_queue(vcpu);
10238
10239         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
10240         kvm_update_dr0123(vcpu);
10241         vcpu->arch.dr6 = DR6_ACTIVE_LOW;
10242         vcpu->arch.dr7 = DR7_FIXED_1;
10243         kvm_update_dr7(vcpu);
10244
10245         vcpu->arch.cr2 = 0;
10246
10247         kvm_make_request(KVM_REQ_EVENT, vcpu);
10248         vcpu->arch.apf.msr_en_val = 0;
10249         vcpu->arch.apf.msr_int_val = 0;
10250         vcpu->arch.st.msr_val = 0;
10251
10252         kvmclock_reset(vcpu);
10253
10254         kvm_clear_async_pf_completion_queue(vcpu);
10255         kvm_async_pf_hash_reset(vcpu);
10256         vcpu->arch.apf.halted = false;
10257
10258         if (vcpu->arch.guest_fpu && kvm_mpx_supported()) {
10259                 void *mpx_state_buffer;
10260
10261                 /*
10262                  * To avoid have the INIT path from kvm_apic_has_events() that be
10263                  * called with loaded FPU and does not let userspace fix the state.
10264                  */
10265                 if (init_event)
10266                         kvm_put_guest_fpu(vcpu);
10267                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10268                                         XFEATURE_BNDREGS);
10269                 if (mpx_state_buffer)
10270                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
10271                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10272                                         XFEATURE_BNDCSR);
10273                 if (mpx_state_buffer)
10274                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
10275                 if (init_event)
10276                         kvm_load_guest_fpu(vcpu);
10277         }
10278
10279         if (!init_event) {
10280                 kvm_pmu_reset(vcpu);
10281                 vcpu->arch.smbase = 0x30000;
10282
10283                 vcpu->arch.msr_misc_features_enables = 0;
10284
10285                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10286         }
10287
10288         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
10289         vcpu->arch.regs_avail = ~0;
10290         vcpu->arch.regs_dirty = ~0;
10291
10292         vcpu->arch.ia32_xss = 0;
10293
10294         static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
10295 }
10296
10297 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
10298 {
10299         struct kvm_segment cs;
10300
10301         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10302         cs.selector = vector << 8;
10303         cs.base = vector << 12;
10304         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
10305         kvm_rip_write(vcpu, 0);
10306 }
10307 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
10308
10309 int kvm_arch_hardware_enable(void)
10310 {
10311         struct kvm *kvm;
10312         struct kvm_vcpu *vcpu;
10313         int i;
10314         int ret;
10315         u64 local_tsc;
10316         u64 max_tsc = 0;
10317         bool stable, backwards_tsc = false;
10318
10319         kvm_user_return_msr_cpu_online();
10320         ret = static_call(kvm_x86_hardware_enable)();
10321         if (ret != 0)
10322                 return ret;
10323
10324         local_tsc = rdtsc();
10325         stable = !kvm_check_tsc_unstable();
10326         list_for_each_entry(kvm, &vm_list, vm_list) {
10327                 kvm_for_each_vcpu(i, vcpu, kvm) {
10328                         if (!stable && vcpu->cpu == smp_processor_id())
10329                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10330                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
10331                                 backwards_tsc = true;
10332                                 if (vcpu->arch.last_host_tsc > max_tsc)
10333                                         max_tsc = vcpu->arch.last_host_tsc;
10334                         }
10335                 }
10336         }
10337
10338         /*
10339          * Sometimes, even reliable TSCs go backwards.  This happens on
10340          * platforms that reset TSC during suspend or hibernate actions, but
10341          * maintain synchronization.  We must compensate.  Fortunately, we can
10342          * detect that condition here, which happens early in CPU bringup,
10343          * before any KVM threads can be running.  Unfortunately, we can't
10344          * bring the TSCs fully up to date with real time, as we aren't yet far
10345          * enough into CPU bringup that we know how much real time has actually
10346          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
10347          * variables that haven't been updated yet.
10348          *
10349          * So we simply find the maximum observed TSC above, then record the
10350          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
10351          * the adjustment will be applied.  Note that we accumulate
10352          * adjustments, in case multiple suspend cycles happen before some VCPU
10353          * gets a chance to run again.  In the event that no KVM threads get a
10354          * chance to run, we will miss the entire elapsed period, as we'll have
10355          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
10356          * loose cycle time.  This isn't too big a deal, since the loss will be
10357          * uniform across all VCPUs (not to mention the scenario is extremely
10358          * unlikely). It is possible that a second hibernate recovery happens
10359          * much faster than a first, causing the observed TSC here to be
10360          * smaller; this would require additional padding adjustment, which is
10361          * why we set last_host_tsc to the local tsc observed here.
10362          *
10363          * N.B. - this code below runs only on platforms with reliable TSC,
10364          * as that is the only way backwards_tsc is set above.  Also note
10365          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
10366          * have the same delta_cyc adjustment applied if backwards_tsc
10367          * is detected.  Note further, this adjustment is only done once,
10368          * as we reset last_host_tsc on all VCPUs to stop this from being
10369          * called multiple times (one for each physical CPU bringup).
10370          *
10371          * Platforms with unreliable TSCs don't have to deal with this, they
10372          * will be compensated by the logic in vcpu_load, which sets the TSC to
10373          * catchup mode.  This will catchup all VCPUs to real time, but cannot
10374          * guarantee that they stay in perfect synchronization.
10375          */
10376         if (backwards_tsc) {
10377                 u64 delta_cyc = max_tsc - local_tsc;
10378                 list_for_each_entry(kvm, &vm_list, vm_list) {
10379                         kvm->arch.backwards_tsc_observed = true;
10380                         kvm_for_each_vcpu(i, vcpu, kvm) {
10381                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
10382                                 vcpu->arch.last_host_tsc = local_tsc;
10383                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
10384                         }
10385
10386                         /*
10387                          * We have to disable TSC offset matching.. if you were
10388                          * booting a VM while issuing an S4 host suspend....
10389                          * you may have some problem.  Solving this issue is
10390                          * left as an exercise to the reader.
10391                          */
10392                         kvm->arch.last_tsc_nsec = 0;
10393                         kvm->arch.last_tsc_write = 0;
10394                 }
10395
10396         }
10397         return 0;
10398 }
10399
10400 void kvm_arch_hardware_disable(void)
10401 {
10402         static_call(kvm_x86_hardware_disable)();
10403         drop_user_return_notifiers();
10404 }
10405
10406 int kvm_arch_hardware_setup(void *opaque)
10407 {
10408         struct kvm_x86_init_ops *ops = opaque;
10409         int r;
10410
10411         rdmsrl_safe(MSR_EFER, &host_efer);
10412
10413         if (boot_cpu_has(X86_FEATURE_XSAVES))
10414                 rdmsrl(MSR_IA32_XSS, host_xss);
10415
10416         r = ops->hardware_setup();
10417         if (r != 0)
10418                 return r;
10419
10420         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
10421         kvm_ops_static_call_update();
10422
10423         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
10424                 supported_xss = 0;
10425
10426 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
10427         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
10428 #undef __kvm_cpu_cap_has
10429
10430         if (kvm_has_tsc_control) {
10431                 /*
10432                  * Make sure the user can only configure tsc_khz values that
10433                  * fit into a signed integer.
10434                  * A min value is not calculated because it will always
10435                  * be 1 on all machines.
10436                  */
10437                 u64 max = min(0x7fffffffULL,
10438                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
10439                 kvm_max_guest_tsc_khz = max;
10440
10441                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
10442         }
10443
10444         kvm_init_msr_list();
10445         return 0;
10446 }
10447
10448 void kvm_arch_hardware_unsetup(void)
10449 {
10450         static_call(kvm_x86_hardware_unsetup)();
10451 }
10452
10453 int kvm_arch_check_processor_compat(void *opaque)
10454 {
10455         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
10456         struct kvm_x86_init_ops *ops = opaque;
10457
10458         WARN_ON(!irqs_disabled());
10459
10460         if (__cr4_reserved_bits(cpu_has, c) !=
10461             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
10462                 return -EIO;
10463
10464         return ops->check_processor_compatibility();
10465 }
10466
10467 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
10468 {
10469         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
10470 }
10471 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
10472
10473 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
10474 {
10475         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
10476 }
10477
10478 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
10479 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
10480
10481 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
10482 {
10483         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
10484
10485         vcpu->arch.l1tf_flush_l1d = true;
10486         if (pmu->version && unlikely(pmu->event_count)) {
10487                 pmu->need_cleanup = true;
10488                 kvm_make_request(KVM_REQ_PMU, vcpu);
10489         }
10490         static_call(kvm_x86_sched_in)(vcpu, cpu);
10491 }
10492
10493 void kvm_arch_free_vm(struct kvm *kvm)
10494 {
10495         kfree(to_kvm_hv(kvm)->hv_pa_pg);
10496         vfree(kvm);
10497 }
10498
10499
10500 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
10501 {
10502         if (type)
10503                 return -EINVAL;
10504
10505         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
10506         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
10507         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
10508         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
10509         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
10510         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
10511
10512         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
10513         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
10514         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
10515         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
10516                 &kvm->arch.irq_sources_bitmap);
10517
10518         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
10519         mutex_init(&kvm->arch.apic_map_lock);
10520         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
10521
10522         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
10523         pvclock_update_vm_gtod_copy(kvm);
10524
10525         kvm->arch.guest_can_read_msr_platform_info = true;
10526
10527         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
10528         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
10529
10530         kvm_hv_init_vm(kvm);
10531         kvm_page_track_init(kvm);
10532         kvm_mmu_init_vm(kvm);
10533
10534         return static_call(kvm_x86_vm_init)(kvm);
10535 }
10536
10537 int kvm_arch_post_init_vm(struct kvm *kvm)
10538 {
10539         return kvm_mmu_post_init_vm(kvm);
10540 }
10541
10542 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
10543 {
10544         vcpu_load(vcpu);
10545         kvm_mmu_unload(vcpu);
10546         vcpu_put(vcpu);
10547 }
10548
10549 static void kvm_free_vcpus(struct kvm *kvm)
10550 {
10551         unsigned int i;
10552         struct kvm_vcpu *vcpu;
10553
10554         /*
10555          * Unpin any mmu pages first.
10556          */
10557         kvm_for_each_vcpu(i, vcpu, kvm) {
10558                 kvm_clear_async_pf_completion_queue(vcpu);
10559                 kvm_unload_vcpu_mmu(vcpu);
10560         }
10561         kvm_for_each_vcpu(i, vcpu, kvm)
10562                 kvm_vcpu_destroy(vcpu);
10563
10564         mutex_lock(&kvm->lock);
10565         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
10566                 kvm->vcpus[i] = NULL;
10567
10568         atomic_set(&kvm->online_vcpus, 0);
10569         mutex_unlock(&kvm->lock);
10570 }
10571
10572 void kvm_arch_sync_events(struct kvm *kvm)
10573 {
10574         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
10575         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
10576         kvm_free_pit(kvm);
10577 }
10578
10579 #define  ERR_PTR_USR(e)  ((void __user *)ERR_PTR(e))
10580
10581 /**
10582  * __x86_set_memory_region: Setup KVM internal memory slot
10583  *
10584  * @kvm: the kvm pointer to the VM.
10585  * @id: the slot ID to setup.
10586  * @gpa: the GPA to install the slot (unused when @size == 0).
10587  * @size: the size of the slot. Set to zero to uninstall a slot.
10588  *
10589  * This function helps to setup a KVM internal memory slot.  Specify
10590  * @size > 0 to install a new slot, while @size == 0 to uninstall a
10591  * slot.  The return code can be one of the following:
10592  *
10593  *   HVA:           on success (uninstall will return a bogus HVA)
10594  *   -errno:        on error
10595  *
10596  * The caller should always use IS_ERR() to check the return value
10597  * before use.  Note, the KVM internal memory slots are guaranteed to
10598  * remain valid and unchanged until the VM is destroyed, i.e., the
10599  * GPA->HVA translation will not change.  However, the HVA is a user
10600  * address, i.e. its accessibility is not guaranteed, and must be
10601  * accessed via __copy_{to,from}_user().
10602  */
10603 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
10604                                       u32 size)
10605 {
10606         int i, r;
10607         unsigned long hva, old_npages;
10608         struct kvm_memslots *slots = kvm_memslots(kvm);
10609         struct kvm_memory_slot *slot;
10610
10611         /* Called with kvm->slots_lock held.  */
10612         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
10613                 return ERR_PTR_USR(-EINVAL);
10614
10615         slot = id_to_memslot(slots, id);
10616         if (size) {
10617                 if (slot && slot->npages)
10618                         return ERR_PTR_USR(-EEXIST);
10619
10620                 /*
10621                  * MAP_SHARED to prevent internal slot pages from being moved
10622                  * by fork()/COW.
10623                  */
10624                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
10625                               MAP_SHARED | MAP_ANONYMOUS, 0);
10626                 if (IS_ERR((void *)hva))
10627                         return (void __user *)hva;
10628         } else {
10629                 if (!slot || !slot->npages)
10630                         return NULL;
10631
10632                 old_npages = slot->npages;
10633                 hva = slot->userspace_addr;
10634         }
10635
10636         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
10637                 struct kvm_userspace_memory_region m;
10638
10639                 m.slot = id | (i << 16);
10640                 m.flags = 0;
10641                 m.guest_phys_addr = gpa;
10642                 m.userspace_addr = hva;
10643                 m.memory_size = size;
10644                 r = __kvm_set_memory_region(kvm, &m);
10645                 if (r < 0)
10646                         return ERR_PTR_USR(r);
10647         }
10648
10649         if (!size)
10650                 vm_munmap(hva, old_npages * PAGE_SIZE);
10651
10652         return (void __user *)hva;
10653 }
10654 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
10655
10656 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
10657 {
10658         kvm_mmu_pre_destroy_vm(kvm);
10659 }
10660
10661 void kvm_arch_destroy_vm(struct kvm *kvm)
10662 {
10663         if (current->mm == kvm->mm) {
10664                 /*
10665                  * Free memory regions allocated on behalf of userspace,
10666                  * unless the the memory map has changed due to process exit
10667                  * or fd copying.
10668                  */
10669                 mutex_lock(&kvm->slots_lock);
10670                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
10671                                         0, 0);
10672                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
10673                                         0, 0);
10674                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
10675                 mutex_unlock(&kvm->slots_lock);
10676         }
10677         static_call_cond(kvm_x86_vm_destroy)(kvm);
10678         kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
10679         kvm_pic_destroy(kvm);
10680         kvm_ioapic_destroy(kvm);
10681         kvm_free_vcpus(kvm);
10682         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
10683         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
10684         kvm_mmu_uninit_vm(kvm);
10685         kvm_page_track_cleanup(kvm);
10686         kvm_xen_destroy_vm(kvm);
10687         kvm_hv_destroy_vm(kvm);
10688 }
10689
10690 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
10691 {
10692         int i;
10693
10694         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10695                 kvfree(slot->arch.rmap[i]);
10696                 slot->arch.rmap[i] = NULL;
10697
10698                 if (i == 0)
10699                         continue;
10700
10701                 kvfree(slot->arch.lpage_info[i - 1]);
10702                 slot->arch.lpage_info[i - 1] = NULL;
10703         }
10704
10705         kvm_page_track_free_memslot(slot);
10706 }
10707
10708 static int kvm_alloc_memslot_metadata(struct kvm_memory_slot *slot,
10709                                       unsigned long npages)
10710 {
10711         int i;
10712
10713         /*
10714          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
10715          * old arrays will be freed by __kvm_set_memory_region() if installing
10716          * the new memslot is successful.
10717          */
10718         memset(&slot->arch, 0, sizeof(slot->arch));
10719
10720         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10721                 struct kvm_lpage_info *linfo;
10722                 unsigned long ugfn;
10723                 int lpages;
10724                 int level = i + 1;
10725
10726                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
10727                                       slot->base_gfn, level) + 1;
10728
10729                 slot->arch.rmap[i] =
10730                         kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
10731                                  GFP_KERNEL_ACCOUNT);
10732                 if (!slot->arch.rmap[i])
10733                         goto out_free;
10734                 if (i == 0)
10735                         continue;
10736
10737                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
10738                 if (!linfo)
10739                         goto out_free;
10740
10741                 slot->arch.lpage_info[i - 1] = linfo;
10742
10743                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
10744                         linfo[0].disallow_lpage = 1;
10745                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
10746                         linfo[lpages - 1].disallow_lpage = 1;
10747                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
10748                 /*
10749                  * If the gfn and userspace address are not aligned wrt each
10750                  * other, disable large page support for this slot.
10751                  */
10752                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
10753                         unsigned long j;
10754
10755                         for (j = 0; j < lpages; ++j)
10756                                 linfo[j].disallow_lpage = 1;
10757                 }
10758         }
10759
10760         if (kvm_page_track_create_memslot(slot, npages))
10761                 goto out_free;
10762
10763         return 0;
10764
10765 out_free:
10766         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10767                 kvfree(slot->arch.rmap[i]);
10768                 slot->arch.rmap[i] = NULL;
10769                 if (i == 0)
10770                         continue;
10771
10772                 kvfree(slot->arch.lpage_info[i - 1]);
10773                 slot->arch.lpage_info[i - 1] = NULL;
10774         }
10775         return -ENOMEM;
10776 }
10777
10778 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
10779 {
10780         struct kvm_vcpu *vcpu;
10781         int i;
10782
10783         /*
10784          * memslots->generation has been incremented.
10785          * mmio generation may have reached its maximum value.
10786          */
10787         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
10788
10789         /* Force re-initialization of steal_time cache */
10790         kvm_for_each_vcpu(i, vcpu, kvm)
10791                 kvm_vcpu_kick(vcpu);
10792 }
10793
10794 int kvm_arch_prepare_memory_region(struct kvm *kvm,
10795                                 struct kvm_memory_slot *memslot,
10796                                 const struct kvm_userspace_memory_region *mem,
10797                                 enum kvm_mr_change change)
10798 {
10799         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
10800                 return kvm_alloc_memslot_metadata(memslot,
10801                                                   mem->memory_size >> PAGE_SHIFT);
10802         return 0;
10803 }
10804
10805
10806 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
10807 {
10808         struct kvm_arch *ka = &kvm->arch;
10809
10810         if (!kvm_x86_ops.cpu_dirty_log_size)
10811                 return;
10812
10813         if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
10814             (!enable && --ka->cpu_dirty_logging_count == 0))
10815                 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
10816
10817         WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
10818 }
10819
10820 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
10821                                      struct kvm_memory_slot *old,
10822                                      struct kvm_memory_slot *new,
10823                                      enum kvm_mr_change change)
10824 {
10825         bool log_dirty_pages = new->flags & KVM_MEM_LOG_DIRTY_PAGES;
10826
10827         /*
10828          * Update CPU dirty logging if dirty logging is being toggled.  This
10829          * applies to all operations.
10830          */
10831         if ((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)
10832                 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
10833
10834         /*
10835          * Nothing more to do for RO slots (which can't be dirtied and can't be
10836          * made writable) or CREATE/MOVE/DELETE of a slot.
10837          *
10838          * For a memslot with dirty logging disabled:
10839          * CREATE:      No dirty mappings will already exist.
10840          * MOVE/DELETE: The old mappings will already have been cleaned up by
10841          *              kvm_arch_flush_shadow_memslot()
10842          *
10843          * For a memslot with dirty logging enabled:
10844          * CREATE:      No shadow pages exist, thus nothing to write-protect
10845          *              and no dirty bits to clear.
10846          * MOVE/DELETE: The old mappings will already have been cleaned up by
10847          *              kvm_arch_flush_shadow_memslot().
10848          */
10849         if ((change != KVM_MR_FLAGS_ONLY) || (new->flags & KVM_MEM_READONLY))
10850                 return;
10851
10852         /*
10853          * READONLY and non-flags changes were filtered out above, and the only
10854          * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
10855          * logging isn't being toggled on or off.
10856          */
10857         if (WARN_ON_ONCE(!((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)))
10858                 return;
10859
10860         if (!log_dirty_pages) {
10861                 /*
10862                  * Dirty logging tracks sptes in 4k granularity, meaning that
10863                  * large sptes have to be split.  If live migration succeeds,
10864                  * the guest in the source machine will be destroyed and large
10865                  * sptes will be created in the destination.  However, if the
10866                  * guest continues to run in the source machine (for example if
10867                  * live migration fails), small sptes will remain around and
10868                  * cause bad performance.
10869                  *
10870                  * Scan sptes if dirty logging has been stopped, dropping those
10871                  * which can be collapsed into a single large-page spte.  Later
10872                  * page faults will create the large-page sptes.
10873                  */
10874                 kvm_mmu_zap_collapsible_sptes(kvm, new);
10875         } else {
10876                 /* By default, write-protect everything to log writes. */
10877                 int level = PG_LEVEL_4K;
10878
10879                 if (kvm_x86_ops.cpu_dirty_log_size) {
10880                         /*
10881                          * Clear all dirty bits, unless pages are treated as
10882                          * dirty from the get-go.
10883                          */
10884                         if (!kvm_dirty_log_manual_protect_and_init_set(kvm))
10885                                 kvm_mmu_slot_leaf_clear_dirty(kvm, new);
10886
10887                         /*
10888                          * Write-protect large pages on write so that dirty
10889                          * logging happens at 4k granularity.  No need to
10890                          * write-protect small SPTEs since write accesses are
10891                          * logged by the CPU via dirty bits.
10892                          */
10893                         level = PG_LEVEL_2M;
10894                 } else if (kvm_dirty_log_manual_protect_and_init_set(kvm)) {
10895                         /*
10896                          * If we're with initial-all-set, we don't need
10897                          * to write protect any small page because
10898                          * they're reported as dirty already.  However
10899                          * we still need to write-protect huge pages
10900                          * so that the page split can happen lazily on
10901                          * the first write to the huge page.
10902                          */
10903                         level = PG_LEVEL_2M;
10904                 }
10905                 kvm_mmu_slot_remove_write_access(kvm, new, level);
10906         }
10907 }
10908
10909 void kvm_arch_commit_memory_region(struct kvm *kvm,
10910                                 const struct kvm_userspace_memory_region *mem,
10911                                 struct kvm_memory_slot *old,
10912                                 const struct kvm_memory_slot *new,
10913                                 enum kvm_mr_change change)
10914 {
10915         if (!kvm->arch.n_requested_mmu_pages)
10916                 kvm_mmu_change_mmu_pages(kvm,
10917                                 kvm_mmu_calculate_default_mmu_pages(kvm));
10918
10919         /*
10920          * FIXME: const-ify all uses of struct kvm_memory_slot.
10921          */
10922         kvm_mmu_slot_apply_flags(kvm, old, (struct kvm_memory_slot *) new, change);
10923
10924         /* Free the arrays associated with the old memslot. */
10925         if (change == KVM_MR_MOVE)
10926                 kvm_arch_free_memslot(kvm, old);
10927 }
10928
10929 void kvm_arch_flush_shadow_all(struct kvm *kvm)
10930 {
10931         kvm_mmu_zap_all(kvm);
10932 }
10933
10934 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
10935                                    struct kvm_memory_slot *slot)
10936 {
10937         kvm_page_track_flush_slot(kvm, slot);
10938 }
10939
10940 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
10941 {
10942         return (is_guest_mode(vcpu) &&
10943                         kvm_x86_ops.guest_apic_has_interrupt &&
10944                         static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
10945 }
10946
10947 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
10948 {
10949         if (!list_empty_careful(&vcpu->async_pf.done))
10950                 return true;
10951
10952         if (kvm_apic_has_events(vcpu))
10953                 return true;
10954
10955         if (vcpu->arch.pv.pv_unhalted)
10956                 return true;
10957
10958         if (vcpu->arch.exception.pending)
10959                 return true;
10960
10961         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
10962             (vcpu->arch.nmi_pending &&
10963              static_call(kvm_x86_nmi_allowed)(vcpu, false)))
10964                 return true;
10965
10966         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
10967             (vcpu->arch.smi_pending &&
10968              static_call(kvm_x86_smi_allowed)(vcpu, false)))
10969                 return true;
10970
10971         if (kvm_arch_interrupt_allowed(vcpu) &&
10972             (kvm_cpu_has_interrupt(vcpu) ||
10973             kvm_guest_apic_has_interrupt(vcpu)))
10974                 return true;
10975
10976         if (kvm_hv_has_stimer_pending(vcpu))
10977                 return true;
10978
10979         if (is_guest_mode(vcpu) &&
10980             kvm_x86_ops.nested_ops->hv_timer_pending &&
10981             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
10982                 return true;
10983
10984         return false;
10985 }
10986
10987 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
10988 {
10989         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
10990 }
10991
10992 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
10993 {
10994         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
10995                 return true;
10996
10997         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
10998                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
10999                  kvm_test_request(KVM_REQ_EVENT, vcpu))
11000                 return true;
11001
11002         if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
11003                 return true;
11004
11005         return false;
11006 }
11007
11008 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
11009 {
11010         return vcpu->arch.preempted_in_kernel;
11011 }
11012
11013 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
11014 {
11015         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
11016 }
11017
11018 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
11019 {
11020         return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
11021 }
11022
11023 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
11024 {
11025         /* Can't read the RIP when guest state is protected, just return 0 */
11026         if (vcpu->arch.guest_state_protected)
11027                 return 0;
11028
11029         if (is_64_bit_mode(vcpu))
11030                 return kvm_rip_read(vcpu);
11031         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
11032                      kvm_rip_read(vcpu));
11033 }
11034 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
11035
11036 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
11037 {
11038         return kvm_get_linear_rip(vcpu) == linear_rip;
11039 }
11040 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
11041
11042 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
11043 {
11044         unsigned long rflags;
11045
11046         rflags = static_call(kvm_x86_get_rflags)(vcpu);
11047         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
11048                 rflags &= ~X86_EFLAGS_TF;
11049         return rflags;
11050 }
11051 EXPORT_SYMBOL_GPL(kvm_get_rflags);
11052
11053 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11054 {
11055         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
11056             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
11057                 rflags |= X86_EFLAGS_TF;
11058         static_call(kvm_x86_set_rflags)(vcpu, rflags);
11059 }
11060
11061 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11062 {
11063         __kvm_set_rflags(vcpu, rflags);
11064         kvm_make_request(KVM_REQ_EVENT, vcpu);
11065 }
11066 EXPORT_SYMBOL_GPL(kvm_set_rflags);
11067
11068 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
11069 {
11070         int r;
11071
11072         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
11073               work->wakeup_all)
11074                 return;
11075
11076         r = kvm_mmu_reload(vcpu);
11077         if (unlikely(r))
11078                 return;
11079
11080         if (!vcpu->arch.mmu->direct_map &&
11081               work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
11082                 return;
11083
11084         kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
11085 }
11086
11087 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
11088 {
11089         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
11090
11091         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
11092 }
11093
11094 static inline u32 kvm_async_pf_next_probe(u32 key)
11095 {
11096         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
11097 }
11098
11099 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11100 {
11101         u32 key = kvm_async_pf_hash_fn(gfn);
11102
11103         while (vcpu->arch.apf.gfns[key] != ~0)
11104                 key = kvm_async_pf_next_probe(key);
11105
11106         vcpu->arch.apf.gfns[key] = gfn;
11107 }
11108
11109 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
11110 {
11111         int i;
11112         u32 key = kvm_async_pf_hash_fn(gfn);
11113
11114         for (i = 0; i < ASYNC_PF_PER_VCPU &&
11115                      (vcpu->arch.apf.gfns[key] != gfn &&
11116                       vcpu->arch.apf.gfns[key] != ~0); i++)
11117                 key = kvm_async_pf_next_probe(key);
11118
11119         return key;
11120 }
11121
11122 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11123 {
11124         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
11125 }
11126
11127 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11128 {
11129         u32 i, j, k;
11130
11131         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
11132
11133         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
11134                 return;
11135
11136         while (true) {
11137                 vcpu->arch.apf.gfns[i] = ~0;
11138                 do {
11139                         j = kvm_async_pf_next_probe(j);
11140                         if (vcpu->arch.apf.gfns[j] == ~0)
11141                                 return;
11142                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
11143                         /*
11144                          * k lies cyclically in ]i,j]
11145                          * |    i.k.j |
11146                          * |....j i.k.| or  |.k..j i...|
11147                          */
11148                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
11149                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
11150                 i = j;
11151         }
11152 }
11153
11154 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
11155 {
11156         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
11157
11158         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
11159                                       sizeof(reason));
11160 }
11161
11162 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
11163 {
11164         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11165
11166         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11167                                              &token, offset, sizeof(token));
11168 }
11169
11170 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
11171 {
11172         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11173         u32 val;
11174
11175         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11176                                          &val, offset, sizeof(val)))
11177                 return false;
11178
11179         return !val;
11180 }
11181
11182 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
11183 {
11184         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
11185                 return false;
11186
11187         if (!kvm_pv_async_pf_enabled(vcpu) ||
11188             (vcpu->arch.apf.send_user_only && static_call(kvm_x86_get_cpl)(vcpu) == 0))
11189                 return false;
11190
11191         return true;
11192 }
11193
11194 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
11195 {
11196         if (unlikely(!lapic_in_kernel(vcpu) ||
11197                      kvm_event_needs_reinjection(vcpu) ||
11198                      vcpu->arch.exception.pending))
11199                 return false;
11200
11201         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
11202                 return false;
11203
11204         /*
11205          * If interrupts are off we cannot even use an artificial
11206          * halt state.
11207          */
11208         return kvm_arch_interrupt_allowed(vcpu);
11209 }
11210
11211 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
11212                                      struct kvm_async_pf *work)
11213 {
11214         struct x86_exception fault;
11215
11216         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
11217         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
11218
11219         if (kvm_can_deliver_async_pf(vcpu) &&
11220             !apf_put_user_notpresent(vcpu)) {
11221                 fault.vector = PF_VECTOR;
11222                 fault.error_code_valid = true;
11223                 fault.error_code = 0;
11224                 fault.nested_page_fault = false;
11225                 fault.address = work->arch.token;
11226                 fault.async_page_fault = true;
11227                 kvm_inject_page_fault(vcpu, &fault);
11228                 return true;
11229         } else {
11230                 /*
11231                  * It is not possible to deliver a paravirtualized asynchronous
11232                  * page fault, but putting the guest in an artificial halt state
11233                  * can be beneficial nevertheless: if an interrupt arrives, we
11234                  * can deliver it timely and perhaps the guest will schedule
11235                  * another process.  When the instruction that triggered a page
11236                  * fault is retried, hopefully the page will be ready in the host.
11237                  */
11238                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
11239                 return false;
11240         }
11241 }
11242
11243 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
11244                                  struct kvm_async_pf *work)
11245 {
11246         struct kvm_lapic_irq irq = {
11247                 .delivery_mode = APIC_DM_FIXED,
11248                 .vector = vcpu->arch.apf.vec
11249         };
11250
11251         if (work->wakeup_all)
11252                 work->arch.token = ~0; /* broadcast wakeup */
11253         else
11254                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
11255         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
11256
11257         if ((work->wakeup_all || work->notpresent_injected) &&
11258             kvm_pv_async_pf_enabled(vcpu) &&
11259             !apf_put_user_ready(vcpu, work->arch.token)) {
11260                 vcpu->arch.apf.pageready_pending = true;
11261                 kvm_apic_set_irq(vcpu, &irq, NULL);
11262         }
11263
11264         vcpu->arch.apf.halted = false;
11265         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11266 }
11267
11268 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
11269 {
11270         kvm_make_request(KVM_REQ_APF_READY, vcpu);
11271         if (!vcpu->arch.apf.pageready_pending)
11272                 kvm_vcpu_kick(vcpu);
11273 }
11274
11275 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
11276 {
11277         if (!kvm_pv_async_pf_enabled(vcpu))
11278                 return true;
11279         else
11280                 return apf_pageready_slot_free(vcpu);
11281 }
11282
11283 void kvm_arch_start_assignment(struct kvm *kvm)
11284 {
11285         atomic_inc(&kvm->arch.assigned_device_count);
11286 }
11287 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
11288
11289 void kvm_arch_end_assignment(struct kvm *kvm)
11290 {
11291         atomic_dec(&kvm->arch.assigned_device_count);
11292 }
11293 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
11294
11295 bool kvm_arch_has_assigned_device(struct kvm *kvm)
11296 {
11297         return atomic_read(&kvm->arch.assigned_device_count);
11298 }
11299 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
11300
11301 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
11302 {
11303         atomic_inc(&kvm->arch.noncoherent_dma_count);
11304 }
11305 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
11306
11307 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
11308 {
11309         atomic_dec(&kvm->arch.noncoherent_dma_count);
11310 }
11311 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
11312
11313 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
11314 {
11315         return atomic_read(&kvm->arch.noncoherent_dma_count);
11316 }
11317 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
11318
11319 bool kvm_arch_has_irq_bypass(void)
11320 {
11321         return true;
11322 }
11323
11324 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
11325                                       struct irq_bypass_producer *prod)
11326 {
11327         struct kvm_kernel_irqfd *irqfd =
11328                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11329         int ret;
11330
11331         irqfd->producer = prod;
11332         kvm_arch_start_assignment(irqfd->kvm);
11333         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm,
11334                                          prod->irq, irqfd->gsi, 1);
11335
11336         if (ret)
11337                 kvm_arch_end_assignment(irqfd->kvm);
11338
11339         return ret;
11340 }
11341
11342 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
11343                                       struct irq_bypass_producer *prod)
11344 {
11345         int ret;
11346         struct kvm_kernel_irqfd *irqfd =
11347                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11348
11349         WARN_ON(irqfd->producer != prod);
11350         irqfd->producer = NULL;
11351
11352         /*
11353          * When producer of consumer is unregistered, we change back to
11354          * remapped mode, so we can re-use the current implementation
11355          * when the irq is masked/disabled or the consumer side (KVM
11356          * int this case doesn't want to receive the interrupts.
11357         */
11358         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
11359         if (ret)
11360                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
11361                        " fails: %d\n", irqfd->consumer.token, ret);
11362
11363         kvm_arch_end_assignment(irqfd->kvm);
11364 }
11365
11366 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
11367                                    uint32_t guest_irq, bool set)
11368 {
11369         return static_call(kvm_x86_update_pi_irte)(kvm, host_irq, guest_irq, set);
11370 }
11371
11372 bool kvm_vector_hashing_enabled(void)
11373 {
11374         return vector_hashing;
11375 }
11376
11377 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
11378 {
11379         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
11380 }
11381 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
11382
11383
11384 int kvm_spec_ctrl_test_value(u64 value)
11385 {
11386         /*
11387          * test that setting IA32_SPEC_CTRL to given value
11388          * is allowed by the host processor
11389          */
11390
11391         u64 saved_value;
11392         unsigned long flags;
11393         int ret = 0;
11394
11395         local_irq_save(flags);
11396
11397         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
11398                 ret = 1;
11399         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
11400                 ret = 1;
11401         else
11402                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
11403
11404         local_irq_restore(flags);
11405
11406         return ret;
11407 }
11408 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
11409
11410 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
11411 {
11412         struct x86_exception fault;
11413         u32 access = error_code &
11414                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
11415
11416         if (!(error_code & PFERR_PRESENT_MASK) ||
11417             vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, &fault) != UNMAPPED_GVA) {
11418                 /*
11419                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
11420                  * tables probably do not match the TLB.  Just proceed
11421                  * with the error code that the processor gave.
11422                  */
11423                 fault.vector = PF_VECTOR;
11424                 fault.error_code_valid = true;
11425                 fault.error_code = error_code;
11426                 fault.nested_page_fault = false;
11427                 fault.address = gva;
11428         }
11429         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
11430 }
11431 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
11432
11433 /*
11434  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
11435  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
11436  * indicates whether exit to userspace is needed.
11437  */
11438 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
11439                               struct x86_exception *e)
11440 {
11441         if (r == X86EMUL_PROPAGATE_FAULT) {
11442                 kvm_inject_emulated_page_fault(vcpu, e);
11443                 return 1;
11444         }
11445
11446         /*
11447          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
11448          * while handling a VMX instruction KVM could've handled the request
11449          * correctly by exiting to userspace and performing I/O but there
11450          * doesn't seem to be a real use-case behind such requests, just return
11451          * KVM_EXIT_INTERNAL_ERROR for now.
11452          */
11453         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
11454         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
11455         vcpu->run->internal.ndata = 0;
11456
11457         return 0;
11458 }
11459 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
11460
11461 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
11462 {
11463         bool pcid_enabled;
11464         struct x86_exception e;
11465         unsigned i;
11466         unsigned long roots_to_free = 0;
11467         struct {
11468                 u64 pcid;
11469                 u64 gla;
11470         } operand;
11471         int r;
11472
11473         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
11474         if (r != X86EMUL_CONTINUE)
11475                 return kvm_handle_memory_failure(vcpu, r, &e);
11476
11477         if (operand.pcid >> 12 != 0) {
11478                 kvm_inject_gp(vcpu, 0);
11479                 return 1;
11480         }
11481
11482         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
11483
11484         switch (type) {
11485         case INVPCID_TYPE_INDIV_ADDR:
11486                 if ((!pcid_enabled && (operand.pcid != 0)) ||
11487                     is_noncanonical_address(operand.gla, vcpu)) {
11488                         kvm_inject_gp(vcpu, 0);
11489                         return 1;
11490                 }
11491                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
11492                 return kvm_skip_emulated_instruction(vcpu);
11493
11494         case INVPCID_TYPE_SINGLE_CTXT:
11495                 if (!pcid_enabled && (operand.pcid != 0)) {
11496                         kvm_inject_gp(vcpu, 0);
11497                         return 1;
11498                 }
11499
11500                 if (kvm_get_active_pcid(vcpu) == operand.pcid) {
11501                         kvm_mmu_sync_roots(vcpu);
11502                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
11503                 }
11504
11505                 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
11506                         if (kvm_get_pcid(vcpu, vcpu->arch.mmu->prev_roots[i].pgd)
11507                             == operand.pcid)
11508                                 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
11509
11510                 kvm_mmu_free_roots(vcpu, vcpu->arch.mmu, roots_to_free);
11511                 /*
11512                  * If neither the current cr3 nor any of the prev_roots use the
11513                  * given PCID, then nothing needs to be done here because a
11514                  * resync will happen anyway before switching to any other CR3.
11515                  */
11516
11517                 return kvm_skip_emulated_instruction(vcpu);
11518
11519         case INVPCID_TYPE_ALL_NON_GLOBAL:
11520                 /*
11521                  * Currently, KVM doesn't mark global entries in the shadow
11522                  * page tables, so a non-global flush just degenerates to a
11523                  * global flush. If needed, we could optimize this later by
11524                  * keeping track of global entries in shadow page tables.
11525                  */
11526
11527                 fallthrough;
11528         case INVPCID_TYPE_ALL_INCL_GLOBAL:
11529                 kvm_mmu_unload(vcpu);
11530                 return kvm_skip_emulated_instruction(vcpu);
11531
11532         default:
11533                 BUG(); /* We have already checked above that type <= 3 */
11534         }
11535 }
11536 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
11537
11538 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
11539 {
11540         struct kvm_run *run = vcpu->run;
11541         struct kvm_mmio_fragment *frag;
11542         unsigned int len;
11543
11544         BUG_ON(!vcpu->mmio_needed);
11545
11546         /* Complete previous fragment */
11547         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
11548         len = min(8u, frag->len);
11549         if (!vcpu->mmio_is_write)
11550                 memcpy(frag->data, run->mmio.data, len);
11551
11552         if (frag->len <= 8) {
11553                 /* Switch to the next fragment. */
11554                 frag++;
11555                 vcpu->mmio_cur_fragment++;
11556         } else {
11557                 /* Go forward to the next mmio piece. */
11558                 frag->data += len;
11559                 frag->gpa += len;
11560                 frag->len -= len;
11561         }
11562
11563         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
11564                 vcpu->mmio_needed = 0;
11565
11566                 // VMG change, at this point, we're always done
11567                 // RIP has already been advanced
11568                 return 1;
11569         }
11570
11571         // More MMIO is needed
11572         run->mmio.phys_addr = frag->gpa;
11573         run->mmio.len = min(8u, frag->len);
11574         run->mmio.is_write = vcpu->mmio_is_write;
11575         if (run->mmio.is_write)
11576                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
11577         run->exit_reason = KVM_EXIT_MMIO;
11578
11579         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
11580
11581         return 0;
11582 }
11583
11584 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
11585                           void *data)
11586 {
11587         int handled;
11588         struct kvm_mmio_fragment *frag;
11589
11590         if (!data)
11591                 return -EINVAL;
11592
11593         handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
11594         if (handled == bytes)
11595                 return 1;
11596
11597         bytes -= handled;
11598         gpa += handled;
11599         data += handled;
11600
11601         /*TODO: Check if need to increment number of frags */
11602         frag = vcpu->mmio_fragments;
11603         vcpu->mmio_nr_fragments = 1;
11604         frag->len = bytes;
11605         frag->gpa = gpa;
11606         frag->data = data;
11607
11608         vcpu->mmio_needed = 1;
11609         vcpu->mmio_cur_fragment = 0;
11610
11611         vcpu->run->mmio.phys_addr = gpa;
11612         vcpu->run->mmio.len = min(8u, frag->len);
11613         vcpu->run->mmio.is_write = 1;
11614         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
11615         vcpu->run->exit_reason = KVM_EXIT_MMIO;
11616
11617         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
11618
11619         return 0;
11620 }
11621 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
11622
11623 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
11624                          void *data)
11625 {
11626         int handled;
11627         struct kvm_mmio_fragment *frag;
11628
11629         if (!data)
11630                 return -EINVAL;
11631
11632         handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
11633         if (handled == bytes)
11634                 return 1;
11635
11636         bytes -= handled;
11637         gpa += handled;
11638         data += handled;
11639
11640         /*TODO: Check if need to increment number of frags */
11641         frag = vcpu->mmio_fragments;
11642         vcpu->mmio_nr_fragments = 1;
11643         frag->len = bytes;
11644         frag->gpa = gpa;
11645         frag->data = data;
11646
11647         vcpu->mmio_needed = 1;
11648         vcpu->mmio_cur_fragment = 0;
11649
11650         vcpu->run->mmio.phys_addr = gpa;
11651         vcpu->run->mmio.len = min(8u, frag->len);
11652         vcpu->run->mmio.is_write = 0;
11653         vcpu->run->exit_reason = KVM_EXIT_MMIO;
11654
11655         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
11656
11657         return 0;
11658 }
11659 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
11660
11661 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
11662 {
11663         memcpy(vcpu->arch.guest_ins_data, vcpu->arch.pio_data,
11664                vcpu->arch.pio.count * vcpu->arch.pio.size);
11665         vcpu->arch.pio.count = 0;
11666
11667         return 1;
11668 }
11669
11670 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
11671                            unsigned int port, void *data,  unsigned int count)
11672 {
11673         int ret;
11674
11675         ret = emulator_pio_out_emulated(vcpu->arch.emulate_ctxt, size, port,
11676                                         data, count);
11677         if (ret)
11678                 return ret;
11679
11680         vcpu->arch.pio.count = 0;
11681
11682         return 0;
11683 }
11684
11685 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
11686                           unsigned int port, void *data, unsigned int count)
11687 {
11688         int ret;
11689
11690         ret = emulator_pio_in_emulated(vcpu->arch.emulate_ctxt, size, port,
11691                                        data, count);
11692         if (ret) {
11693                 vcpu->arch.pio.count = 0;
11694         } else {
11695                 vcpu->arch.guest_ins_data = data;
11696                 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
11697         }
11698
11699         return 0;
11700 }
11701
11702 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
11703                          unsigned int port, void *data,  unsigned int count,
11704                          int in)
11705 {
11706         return in ? kvm_sev_es_ins(vcpu, size, port, data, count)
11707                   : kvm_sev_es_outs(vcpu, size, port, data, count);
11708 }
11709 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
11710
11711 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
11712 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
11713 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
11714 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
11715 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
11716 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
11717 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
11718 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
11719 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
11720 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
11721 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
11722 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
11723 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
11724 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
11725 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
11726 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
11727 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
11728 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
11729 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
11730 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
11731 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
11732 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
11733 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);
11734 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
11735 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
11736 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
11737 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);