1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
5 * derived from drivers/kvm/kvm_main.c
7 * Copyright (C) 2006 Qumranet, Inc.
8 * Copyright (C) 2008 Qumranet, Inc.
9 * Copyright IBM Corporation, 2008
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Avi Kivity <avi@qumranet.com>
14 * Yaniv Kamay <yaniv@qumranet.com>
15 * Amit Shah <amit.shah@qumranet.com>
16 * Ben-Ami Yassour <benami@il.ibm.com>
18 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
20 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
27 #include "kvm_emulate.h"
36 #include <linux/clocksource.h>
37 #include <linux/interrupt.h>
38 #include <linux/kvm.h>
40 #include <linux/vmalloc.h>
41 #include <linux/export.h>
42 #include <linux/moduleparam.h>
43 #include <linux/mman.h>
44 #include <linux/highmem.h>
45 #include <linux/iommu.h>
46 #include <linux/cpufreq.h>
47 #include <linux/user-return-notifier.h>
48 #include <linux/srcu.h>
49 #include <linux/slab.h>
50 #include <linux/perf_event.h>
51 #include <linux/uaccess.h>
52 #include <linux/hash.h>
53 #include <linux/pci.h>
54 #include <linux/timekeeper_internal.h>
55 #include <linux/pvclock_gtod.h>
56 #include <linux/kvm_irqfd.h>
57 #include <linux/irqbypass.h>
58 #include <linux/sched/stat.h>
59 #include <linux/sched/isolation.h>
60 #include <linux/mem_encrypt.h>
61 #include <linux/entry-kvm.h>
62 #include <linux/suspend.h>
64 #include <trace/events/kvm.h>
66 #include <asm/debugreg.h>
71 #include <linux/kernel_stat.h>
72 #include <asm/fpu/api.h>
73 #include <asm/fpu/xcr.h>
74 #include <asm/fpu/xstate.h>
75 #include <asm/pvclock.h>
76 #include <asm/div64.h>
77 #include <asm/irq_remapping.h>
78 #include <asm/mshyperv.h>
79 #include <asm/hypervisor.h>
80 #include <asm/tlbflush.h>
81 #include <asm/intel_pt.h>
82 #include <asm/emulate_prefix.h>
84 #include <clocksource/hyperv_timer.h>
86 #define CREATE_TRACE_POINTS
89 #define MAX_IO_MSRS 256
90 #define KVM_MAX_MCE_BANKS 32
92 struct kvm_caps kvm_caps __read_mostly = {
93 .supported_mce_cap = MCG_CTL_P | MCG_SER_P,
95 EXPORT_SYMBOL_GPL(kvm_caps);
97 #define ERR_PTR_USR(e) ((void __user *)ERR_PTR(e))
99 #define emul_to_vcpu(ctxt) \
100 ((struct kvm_vcpu *)(ctxt)->vcpu)
103 * - enable syscall per default because its emulated by KVM
104 * - enable LME and LMA per default on 64 bit KVM
108 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
110 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
113 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
115 #define KVM_EXIT_HYPERCALL_VALID_MASK (1 << KVM_HC_MAP_GPA_RANGE)
117 #define KVM_CAP_PMU_VALID_MASK KVM_PMU_CAP_DISABLE
119 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
120 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
122 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
123 static void process_nmi(struct kvm_vcpu *vcpu);
124 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
125 static void store_regs(struct kvm_vcpu *vcpu);
126 static int sync_regs(struct kvm_vcpu *vcpu);
127 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu);
129 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
130 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
132 static DEFINE_MUTEX(vendor_module_lock);
133 struct kvm_x86_ops kvm_x86_ops __read_mostly;
135 #define KVM_X86_OP(func) \
136 DEFINE_STATIC_CALL_NULL(kvm_x86_##func, \
137 *(((struct kvm_x86_ops *)0)->func));
138 #define KVM_X86_OP_OPTIONAL KVM_X86_OP
139 #define KVM_X86_OP_OPTIONAL_RET0 KVM_X86_OP
140 #include <asm/kvm-x86-ops.h>
141 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
142 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
144 static bool __read_mostly ignore_msrs = 0;
145 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
147 bool __read_mostly report_ignored_msrs = true;
148 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
149 EXPORT_SYMBOL_GPL(report_ignored_msrs);
151 unsigned int min_timer_period_us = 200;
152 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
154 static bool __read_mostly kvmclock_periodic_sync = true;
155 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
157 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
158 static u32 __read_mostly tsc_tolerance_ppm = 250;
159 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
162 * lapic timer advance (tscdeadline mode only) in nanoseconds. '-1' enables
163 * adaptive tuning starting from default advancement of 1000ns. '0' disables
164 * advancement entirely. Any other value is used as-is and disables adaptive
165 * tuning, i.e. allows privileged userspace to set an exact advancement time.
167 static int __read_mostly lapic_timer_advance_ns = -1;
168 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
170 static bool __read_mostly vector_hashing = true;
171 module_param(vector_hashing, bool, S_IRUGO);
173 bool __read_mostly enable_vmware_backdoor = false;
174 module_param(enable_vmware_backdoor, bool, S_IRUGO);
175 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
178 * Flags to manipulate forced emulation behavior (any non-zero value will
179 * enable forced emulation).
181 #define KVM_FEP_CLEAR_RFLAGS_RF BIT(1)
182 static int __read_mostly force_emulation_prefix;
183 module_param(force_emulation_prefix, int, 0644);
185 int __read_mostly pi_inject_timer = -1;
186 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
188 /* Enable/disable PMU virtualization */
189 bool __read_mostly enable_pmu = true;
190 EXPORT_SYMBOL_GPL(enable_pmu);
191 module_param(enable_pmu, bool, 0444);
193 bool __read_mostly eager_page_split = true;
194 module_param(eager_page_split, bool, 0644);
196 /* Enable/disable SMT_RSB bug mitigation */
197 static bool __read_mostly mitigate_smt_rsb;
198 module_param(mitigate_smt_rsb, bool, 0444);
201 * Restoring the host value for MSRs that are only consumed when running in
202 * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
203 * returns to userspace, i.e. the kernel can run with the guest's value.
205 #define KVM_MAX_NR_USER_RETURN_MSRS 16
207 struct kvm_user_return_msrs {
208 struct user_return_notifier urn;
210 struct kvm_user_return_msr_values {
213 } values[KVM_MAX_NR_USER_RETURN_MSRS];
216 u32 __read_mostly kvm_nr_uret_msrs;
217 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs);
218 static u32 __read_mostly kvm_uret_msrs_list[KVM_MAX_NR_USER_RETURN_MSRS];
219 static struct kvm_user_return_msrs __percpu *user_return_msrs;
221 #define KVM_SUPPORTED_XCR0 (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
222 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
223 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
224 | XFEATURE_MASK_PKRU | XFEATURE_MASK_XTILE)
226 u64 __read_mostly host_efer;
227 EXPORT_SYMBOL_GPL(host_efer);
229 bool __read_mostly allow_smaller_maxphyaddr = 0;
230 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
232 bool __read_mostly enable_apicv = true;
233 EXPORT_SYMBOL_GPL(enable_apicv);
235 u64 __read_mostly host_xss;
236 EXPORT_SYMBOL_GPL(host_xss);
238 const struct _kvm_stats_desc kvm_vm_stats_desc[] = {
239 KVM_GENERIC_VM_STATS(),
240 STATS_DESC_COUNTER(VM, mmu_shadow_zapped),
241 STATS_DESC_COUNTER(VM, mmu_pte_write),
242 STATS_DESC_COUNTER(VM, mmu_pde_zapped),
243 STATS_DESC_COUNTER(VM, mmu_flooded),
244 STATS_DESC_COUNTER(VM, mmu_recycled),
245 STATS_DESC_COUNTER(VM, mmu_cache_miss),
246 STATS_DESC_ICOUNTER(VM, mmu_unsync),
247 STATS_DESC_ICOUNTER(VM, pages_4k),
248 STATS_DESC_ICOUNTER(VM, pages_2m),
249 STATS_DESC_ICOUNTER(VM, pages_1g),
250 STATS_DESC_ICOUNTER(VM, nx_lpage_splits),
251 STATS_DESC_PCOUNTER(VM, max_mmu_rmap_size),
252 STATS_DESC_PCOUNTER(VM, max_mmu_page_hash_collisions)
255 const struct kvm_stats_header kvm_vm_stats_header = {
256 .name_size = KVM_STATS_NAME_SIZE,
257 .num_desc = ARRAY_SIZE(kvm_vm_stats_desc),
258 .id_offset = sizeof(struct kvm_stats_header),
259 .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
260 .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
261 sizeof(kvm_vm_stats_desc),
264 const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
265 KVM_GENERIC_VCPU_STATS(),
266 STATS_DESC_COUNTER(VCPU, pf_taken),
267 STATS_DESC_COUNTER(VCPU, pf_fixed),
268 STATS_DESC_COUNTER(VCPU, pf_emulate),
269 STATS_DESC_COUNTER(VCPU, pf_spurious),
270 STATS_DESC_COUNTER(VCPU, pf_fast),
271 STATS_DESC_COUNTER(VCPU, pf_mmio_spte_created),
272 STATS_DESC_COUNTER(VCPU, pf_guest),
273 STATS_DESC_COUNTER(VCPU, tlb_flush),
274 STATS_DESC_COUNTER(VCPU, invlpg),
275 STATS_DESC_COUNTER(VCPU, exits),
276 STATS_DESC_COUNTER(VCPU, io_exits),
277 STATS_DESC_COUNTER(VCPU, mmio_exits),
278 STATS_DESC_COUNTER(VCPU, signal_exits),
279 STATS_DESC_COUNTER(VCPU, irq_window_exits),
280 STATS_DESC_COUNTER(VCPU, nmi_window_exits),
281 STATS_DESC_COUNTER(VCPU, l1d_flush),
282 STATS_DESC_COUNTER(VCPU, halt_exits),
283 STATS_DESC_COUNTER(VCPU, request_irq_exits),
284 STATS_DESC_COUNTER(VCPU, irq_exits),
285 STATS_DESC_COUNTER(VCPU, host_state_reload),
286 STATS_DESC_COUNTER(VCPU, fpu_reload),
287 STATS_DESC_COUNTER(VCPU, insn_emulation),
288 STATS_DESC_COUNTER(VCPU, insn_emulation_fail),
289 STATS_DESC_COUNTER(VCPU, hypercalls),
290 STATS_DESC_COUNTER(VCPU, irq_injections),
291 STATS_DESC_COUNTER(VCPU, nmi_injections),
292 STATS_DESC_COUNTER(VCPU, req_event),
293 STATS_DESC_COUNTER(VCPU, nested_run),
294 STATS_DESC_COUNTER(VCPU, directed_yield_attempted),
295 STATS_DESC_COUNTER(VCPU, directed_yield_successful),
296 STATS_DESC_COUNTER(VCPU, preemption_reported),
297 STATS_DESC_COUNTER(VCPU, preemption_other),
298 STATS_DESC_IBOOLEAN(VCPU, guest_mode),
299 STATS_DESC_COUNTER(VCPU, notify_window_exits),
302 const struct kvm_stats_header kvm_vcpu_stats_header = {
303 .name_size = KVM_STATS_NAME_SIZE,
304 .num_desc = ARRAY_SIZE(kvm_vcpu_stats_desc),
305 .id_offset = sizeof(struct kvm_stats_header),
306 .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
307 .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
308 sizeof(kvm_vcpu_stats_desc),
311 u64 __read_mostly host_xcr0;
313 static struct kmem_cache *x86_emulator_cache;
316 * When called, it means the previous get/set msr reached an invalid msr.
317 * Return true if we want to ignore/silent this failed msr access.
319 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
321 const char *op = write ? "wrmsr" : "rdmsr";
324 if (report_ignored_msrs)
325 kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
330 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
336 static struct kmem_cache *kvm_alloc_emulator_cache(void)
338 unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
339 unsigned int size = sizeof(struct x86_emulate_ctxt);
341 return kmem_cache_create_usercopy("x86_emulator", size,
342 __alignof__(struct x86_emulate_ctxt),
343 SLAB_ACCOUNT, useroffset,
344 size - useroffset, NULL);
347 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
349 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
352 for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
353 vcpu->arch.apf.gfns[i] = ~0;
356 static void kvm_on_user_return(struct user_return_notifier *urn)
359 struct kvm_user_return_msrs *msrs
360 = container_of(urn, struct kvm_user_return_msrs, urn);
361 struct kvm_user_return_msr_values *values;
365 * Disabling irqs at this point since the following code could be
366 * interrupted and executed through kvm_arch_hardware_disable()
368 local_irq_save(flags);
369 if (msrs->registered) {
370 msrs->registered = false;
371 user_return_notifier_unregister(urn);
373 local_irq_restore(flags);
374 for (slot = 0; slot < kvm_nr_uret_msrs; ++slot) {
375 values = &msrs->values[slot];
376 if (values->host != values->curr) {
377 wrmsrl(kvm_uret_msrs_list[slot], values->host);
378 values->curr = values->host;
383 static int kvm_probe_user_return_msr(u32 msr)
389 ret = rdmsrl_safe(msr, &val);
392 ret = wrmsrl_safe(msr, val);
398 int kvm_add_user_return_msr(u32 msr)
400 BUG_ON(kvm_nr_uret_msrs >= KVM_MAX_NR_USER_RETURN_MSRS);
402 if (kvm_probe_user_return_msr(msr))
405 kvm_uret_msrs_list[kvm_nr_uret_msrs] = msr;
406 return kvm_nr_uret_msrs++;
408 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr);
410 int kvm_find_user_return_msr(u32 msr)
414 for (i = 0; i < kvm_nr_uret_msrs; ++i) {
415 if (kvm_uret_msrs_list[i] == msr)
420 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr);
422 static void kvm_user_return_msr_cpu_online(void)
424 unsigned int cpu = smp_processor_id();
425 struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
429 for (i = 0; i < kvm_nr_uret_msrs; ++i) {
430 rdmsrl_safe(kvm_uret_msrs_list[i], &value);
431 msrs->values[i].host = value;
432 msrs->values[i].curr = value;
436 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
438 unsigned int cpu = smp_processor_id();
439 struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
442 value = (value & mask) | (msrs->values[slot].host & ~mask);
443 if (value == msrs->values[slot].curr)
445 err = wrmsrl_safe(kvm_uret_msrs_list[slot], value);
449 msrs->values[slot].curr = value;
450 if (!msrs->registered) {
451 msrs->urn.on_user_return = kvm_on_user_return;
452 user_return_notifier_register(&msrs->urn);
453 msrs->registered = true;
457 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
459 static void drop_user_return_notifiers(void)
461 unsigned int cpu = smp_processor_id();
462 struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
464 if (msrs->registered)
465 kvm_on_user_return(&msrs->urn);
468 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
470 return vcpu->arch.apic_base;
473 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
475 return kvm_apic_mode(kvm_get_apic_base(vcpu));
477 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
479 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
481 enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
482 enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
483 u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
484 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
486 if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
488 if (!msr_info->host_initiated) {
489 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
491 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
495 kvm_lapic_set_base(vcpu, msr_info->data);
496 kvm_recalculate_apic_map(vcpu->kvm);
501 * Handle a fault on a hardware virtualization (VMX or SVM) instruction.
503 * Hardware virtualization extension instructions may fault if a reboot turns
504 * off virtualization while processes are running. Usually after catching the
505 * fault we just panic; during reboot instead the instruction is ignored.
507 noinstr void kvm_spurious_fault(void)
509 /* Fault while not rebooting. We want the trace. */
510 BUG_ON(!kvm_rebooting);
512 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
514 #define EXCPT_BENIGN 0
515 #define EXCPT_CONTRIBUTORY 1
518 static int exception_class(int vector)
528 return EXCPT_CONTRIBUTORY;
535 #define EXCPT_FAULT 0
537 #define EXCPT_ABORT 2
538 #define EXCPT_INTERRUPT 3
541 static int exception_type(int vector)
545 if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
546 return EXCPT_INTERRUPT;
551 * #DBs can be trap-like or fault-like, the caller must check other CPU
552 * state, e.g. DR6, to determine whether a #DB is a trap or fault.
554 if (mask & (1 << DB_VECTOR))
557 if (mask & ((1 << BP_VECTOR) | (1 << OF_VECTOR)))
560 if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
563 /* Reserved exceptions will result in fault */
567 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu,
568 struct kvm_queued_exception *ex)
570 if (!ex->has_payload)
573 switch (ex->vector) {
576 * "Certain debug exceptions may clear bit 0-3. The
577 * remaining contents of the DR6 register are never
578 * cleared by the processor".
580 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
582 * In order to reflect the #DB exception payload in guest
583 * dr6, three components need to be considered: active low
584 * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
586 * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
587 * In the target guest dr6:
588 * FIXED_1 bits should always be set.
589 * Active low bits should be cleared if 1-setting in payload.
590 * Active high bits should be set if 1-setting in payload.
592 * Note, the payload is compatible with the pending debug
593 * exceptions/exit qualification under VMX, that active_low bits
594 * are active high in payload.
595 * So they need to be flipped for DR6.
597 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
598 vcpu->arch.dr6 |= ex->payload;
599 vcpu->arch.dr6 ^= ex->payload & DR6_ACTIVE_LOW;
602 * The #DB payload is defined as compatible with the 'pending
603 * debug exceptions' field under VMX, not DR6. While bit 12 is
604 * defined in the 'pending debug exceptions' field (enabled
605 * breakpoint), it is reserved and must be zero in DR6.
607 vcpu->arch.dr6 &= ~BIT(12);
610 vcpu->arch.cr2 = ex->payload;
614 ex->has_payload = false;
617 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
619 static void kvm_queue_exception_vmexit(struct kvm_vcpu *vcpu, unsigned int vector,
620 bool has_error_code, u32 error_code,
621 bool has_payload, unsigned long payload)
623 struct kvm_queued_exception *ex = &vcpu->arch.exception_vmexit;
626 ex->injected = false;
628 ex->has_error_code = has_error_code;
629 ex->error_code = error_code;
630 ex->has_payload = has_payload;
631 ex->payload = payload;
634 /* Forcibly leave the nested mode in cases like a vCPU reset */
635 static void kvm_leave_nested(struct kvm_vcpu *vcpu)
637 kvm_x86_ops.nested_ops->leave_nested(vcpu);
640 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
641 unsigned nr, bool has_error, u32 error_code,
642 bool has_payload, unsigned long payload, bool reinject)
647 kvm_make_request(KVM_REQ_EVENT, vcpu);
650 * If the exception is destined for L2 and isn't being reinjected,
651 * morph it to a VM-Exit if L1 wants to intercept the exception. A
652 * previously injected exception is not checked because it was checked
653 * when it was original queued, and re-checking is incorrect if _L1_
654 * injected the exception, in which case it's exempt from interception.
656 if (!reinject && is_guest_mode(vcpu) &&
657 kvm_x86_ops.nested_ops->is_exception_vmexit(vcpu, nr, error_code)) {
658 kvm_queue_exception_vmexit(vcpu, nr, has_error, error_code,
659 has_payload, payload);
663 if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
667 * On VM-Entry, an exception can be pending if and only
668 * if event injection was blocked by nested_run_pending.
669 * In that case, however, vcpu_enter_guest() requests an
670 * immediate exit, and the guest shouldn't proceed far
671 * enough to need reinjection.
673 WARN_ON_ONCE(kvm_is_exception_pending(vcpu));
674 vcpu->arch.exception.injected = true;
675 if (WARN_ON_ONCE(has_payload)) {
677 * A reinjected event has already
678 * delivered its payload.
684 vcpu->arch.exception.pending = true;
685 vcpu->arch.exception.injected = false;
687 vcpu->arch.exception.has_error_code = has_error;
688 vcpu->arch.exception.vector = nr;
689 vcpu->arch.exception.error_code = error_code;
690 vcpu->arch.exception.has_payload = has_payload;
691 vcpu->arch.exception.payload = payload;
692 if (!is_guest_mode(vcpu))
693 kvm_deliver_exception_payload(vcpu,
694 &vcpu->arch.exception);
698 /* to check exception */
699 prev_nr = vcpu->arch.exception.vector;
700 if (prev_nr == DF_VECTOR) {
701 /* triple fault -> shutdown */
702 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
705 class1 = exception_class(prev_nr);
706 class2 = exception_class(nr);
707 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY) ||
708 (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
710 * Synthesize #DF. Clear the previously injected or pending
711 * exception so as not to incorrectly trigger shutdown.
713 vcpu->arch.exception.injected = false;
714 vcpu->arch.exception.pending = false;
716 kvm_queue_exception_e(vcpu, DF_VECTOR, 0);
718 /* replace previous exception with a new one in a hope
719 that instruction re-execution will regenerate lost
725 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
727 kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
729 EXPORT_SYMBOL_GPL(kvm_queue_exception);
731 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
733 kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
735 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
737 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
738 unsigned long payload)
740 kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
742 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
744 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
745 u32 error_code, unsigned long payload)
747 kvm_multiple_exception(vcpu, nr, true, error_code,
748 true, payload, false);
751 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
754 kvm_inject_gp(vcpu, 0);
756 return kvm_skip_emulated_instruction(vcpu);
760 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
762 static int complete_emulated_insn_gp(struct kvm_vcpu *vcpu, int err)
765 kvm_inject_gp(vcpu, 0);
769 return kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE | EMULTYPE_SKIP |
770 EMULTYPE_COMPLETE_USER_EXIT);
773 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
775 ++vcpu->stat.pf_guest;
778 * Async #PF in L2 is always forwarded to L1 as a VM-Exit regardless of
779 * whether or not L1 wants to intercept "regular" #PF.
781 if (is_guest_mode(vcpu) && fault->async_page_fault)
782 kvm_queue_exception_vmexit(vcpu, PF_VECTOR,
783 true, fault->error_code,
784 true, fault->address);
786 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
790 void kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
791 struct x86_exception *fault)
793 struct kvm_mmu *fault_mmu;
794 WARN_ON_ONCE(fault->vector != PF_VECTOR);
796 fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
800 * Invalidate the TLB entry for the faulting address, if it exists,
801 * else the access will fault indefinitely (and to emulate hardware).
803 if ((fault->error_code & PFERR_PRESENT_MASK) &&
804 !(fault->error_code & PFERR_RSVD_MASK))
805 kvm_mmu_invalidate_addr(vcpu, fault_mmu, fault->address,
806 KVM_MMU_ROOT_CURRENT);
808 fault_mmu->inject_page_fault(vcpu, fault);
810 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
812 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
814 atomic_inc(&vcpu->arch.nmi_queued);
815 kvm_make_request(KVM_REQ_NMI, vcpu);
818 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
820 kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
822 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
824 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
826 kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
828 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
831 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
832 * a #GP and return false.
834 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
836 if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
838 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
842 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
844 if ((dr != 4 && dr != 5) || !kvm_is_cr4_bit_set(vcpu, X86_CR4_DE))
847 kvm_queue_exception(vcpu, UD_VECTOR);
850 EXPORT_SYMBOL_GPL(kvm_require_dr);
852 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
854 return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
858 * Load the pae pdptrs. Return 1 if they are all valid, 0 otherwise.
860 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
862 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
863 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
867 u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
870 * If the MMU is nested, CR3 holds an L2 GPA and needs to be translated
873 real_gpa = kvm_translate_gpa(vcpu, mmu, gfn_to_gpa(pdpt_gfn),
874 PFERR_USER_MASK | PFERR_WRITE_MASK, NULL);
875 if (real_gpa == INVALID_GPA)
878 /* Note the offset, PDPTRs are 32 byte aligned when using PAE paging. */
879 ret = kvm_vcpu_read_guest_page(vcpu, gpa_to_gfn(real_gpa), pdpte,
880 cr3 & GENMASK(11, 5), sizeof(pdpte));
884 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
885 if ((pdpte[i] & PT_PRESENT_MASK) &&
886 (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
892 * Marking VCPU_EXREG_PDPTR dirty doesn't work for !tdp_enabled.
893 * Shadow page roots need to be reconstructed instead.
895 if (!tdp_enabled && memcmp(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs)))
896 kvm_mmu_free_roots(vcpu->kvm, mmu, KVM_MMU_ROOT_CURRENT);
898 memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
899 kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
900 kvm_make_request(KVM_REQ_LOAD_MMU_PGD, vcpu);
901 vcpu->arch.pdptrs_from_userspace = false;
905 EXPORT_SYMBOL_GPL(load_pdptrs);
907 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
910 * CR0.WP is incorporated into the MMU role, but only for non-nested,
911 * indirect shadow MMUs. If paging is disabled, no updates are needed
912 * as there are no permission bits to emulate. If TDP is enabled, the
913 * MMU's metadata needs to be updated, e.g. so that emulating guest
914 * translations does the right thing, but there's no need to unload the
915 * root as CR0.WP doesn't affect SPTEs.
917 if ((cr0 ^ old_cr0) == X86_CR0_WP) {
918 if (!(cr0 & X86_CR0_PG))
927 if ((cr0 ^ old_cr0) & X86_CR0_PG) {
928 kvm_clear_async_pf_completion_queue(vcpu);
929 kvm_async_pf_hash_reset(vcpu);
932 * Clearing CR0.PG is defined to flush the TLB from the guest's
935 if (!(cr0 & X86_CR0_PG))
936 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
939 if ((cr0 ^ old_cr0) & KVM_MMU_CR0_ROLE_BITS)
940 kvm_mmu_reset_context(vcpu);
942 if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
943 kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
944 !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
945 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
947 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
949 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
951 unsigned long old_cr0 = kvm_read_cr0(vcpu);
956 if (cr0 & 0xffffffff00000000UL)
960 cr0 &= ~CR0_RESERVED_BITS;
962 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
965 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
969 if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
970 (cr0 & X86_CR0_PG)) {
975 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
980 if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
981 is_pae(vcpu) && ((cr0 ^ old_cr0) & X86_CR0_PDPTR_BITS) &&
982 !load_pdptrs(vcpu, kvm_read_cr3(vcpu)))
985 if (!(cr0 & X86_CR0_PG) &&
986 (is_64_bit_mode(vcpu) || kvm_is_cr4_bit_set(vcpu, X86_CR4_PCIDE)))
989 static_call(kvm_x86_set_cr0)(vcpu, cr0);
991 kvm_post_set_cr0(vcpu, old_cr0, cr0);
995 EXPORT_SYMBOL_GPL(kvm_set_cr0);
997 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
999 (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
1001 EXPORT_SYMBOL_GPL(kvm_lmsw);
1003 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
1005 if (vcpu->arch.guest_state_protected)
1008 if (kvm_is_cr4_bit_set(vcpu, X86_CR4_OSXSAVE)) {
1010 if (vcpu->arch.xcr0 != host_xcr0)
1011 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
1013 if (vcpu->arch.xsaves_enabled &&
1014 vcpu->arch.ia32_xss != host_xss)
1015 wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
1018 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
1019 if (static_cpu_has(X86_FEATURE_PKU) &&
1020 vcpu->arch.pkru != vcpu->arch.host_pkru &&
1021 ((vcpu->arch.xcr0 & XFEATURE_MASK_PKRU) ||
1022 kvm_is_cr4_bit_set(vcpu, X86_CR4_PKE)))
1023 write_pkru(vcpu->arch.pkru);
1024 #endif /* CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS */
1026 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
1028 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
1030 if (vcpu->arch.guest_state_protected)
1033 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
1034 if (static_cpu_has(X86_FEATURE_PKU) &&
1035 ((vcpu->arch.xcr0 & XFEATURE_MASK_PKRU) ||
1036 kvm_is_cr4_bit_set(vcpu, X86_CR4_PKE))) {
1037 vcpu->arch.pkru = rdpkru();
1038 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
1039 write_pkru(vcpu->arch.host_pkru);
1041 #endif /* CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS */
1043 if (kvm_is_cr4_bit_set(vcpu, X86_CR4_OSXSAVE)) {
1045 if (vcpu->arch.xcr0 != host_xcr0)
1046 xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
1048 if (vcpu->arch.xsaves_enabled &&
1049 vcpu->arch.ia32_xss != host_xss)
1050 wrmsrl(MSR_IA32_XSS, host_xss);
1054 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
1056 #ifdef CONFIG_X86_64
1057 static inline u64 kvm_guest_supported_xfd(struct kvm_vcpu *vcpu)
1059 return vcpu->arch.guest_supported_xcr0 & XFEATURE_MASK_USER_DYNAMIC;
1063 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
1066 u64 old_xcr0 = vcpu->arch.xcr0;
1069 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
1070 if (index != XCR_XFEATURE_ENABLED_MASK)
1072 if (!(xcr0 & XFEATURE_MASK_FP))
1074 if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
1078 * Do not allow the guest to set bits that we do not support
1079 * saving. However, xcr0 bit 0 is always set, even if the
1080 * emulated CPU does not support XSAVE (see kvm_vcpu_reset()).
1082 valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
1083 if (xcr0 & ~valid_bits)
1086 if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
1087 (!(xcr0 & XFEATURE_MASK_BNDCSR)))
1090 if (xcr0 & XFEATURE_MASK_AVX512) {
1091 if (!(xcr0 & XFEATURE_MASK_YMM))
1093 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
1097 if ((xcr0 & XFEATURE_MASK_XTILE) &&
1098 ((xcr0 & XFEATURE_MASK_XTILE) != XFEATURE_MASK_XTILE))
1101 vcpu->arch.xcr0 = xcr0;
1103 if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
1104 kvm_update_cpuid_runtime(vcpu);
1108 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
1110 /* Note, #UD due to CR4.OSXSAVE=0 has priority over the intercept. */
1111 if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
1112 __kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
1113 kvm_inject_gp(vcpu, 0);
1117 return kvm_skip_emulated_instruction(vcpu);
1119 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
1121 bool __kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1123 if (cr4 & cr4_reserved_bits)
1126 if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1131 EXPORT_SYMBOL_GPL(__kvm_is_valid_cr4);
1133 static bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1135 return __kvm_is_valid_cr4(vcpu, cr4) &&
1136 static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1139 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1141 if ((cr4 ^ old_cr4) & KVM_MMU_CR4_ROLE_BITS)
1142 kvm_mmu_reset_context(vcpu);
1145 * If CR4.PCIDE is changed 0 -> 1, there is no need to flush the TLB
1146 * according to the SDM; however, stale prev_roots could be reused
1147 * incorrectly in the future after a MOV to CR3 with NOFLUSH=1, so we
1148 * free them all. This is *not* a superset of KVM_REQ_TLB_FLUSH_GUEST
1149 * or KVM_REQ_TLB_FLUSH_CURRENT, because the hardware TLB is not flushed,
1153 (cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE))
1154 kvm_mmu_unload(vcpu);
1157 * The TLB has to be flushed for all PCIDs if any of the following
1158 * (architecturally required) changes happen:
1159 * - CR4.PCIDE is changed from 1 to 0
1160 * - CR4.PGE is toggled
1162 * This is a superset of KVM_REQ_TLB_FLUSH_CURRENT.
1164 if (((cr4 ^ old_cr4) & X86_CR4_PGE) ||
1165 (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1166 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
1169 * The TLB has to be flushed for the current PCID if any of the
1170 * following (architecturally required) changes happen:
1171 * - CR4.SMEP is changed from 0 to 1
1172 * - CR4.PAE is toggled
1174 else if (((cr4 ^ old_cr4) & X86_CR4_PAE) ||
1175 ((cr4 & X86_CR4_SMEP) && !(old_cr4 & X86_CR4_SMEP)))
1176 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1179 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1181 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1183 unsigned long old_cr4 = kvm_read_cr4(vcpu);
1185 if (!kvm_is_valid_cr4(vcpu, cr4))
1188 if (is_long_mode(vcpu)) {
1189 if (!(cr4 & X86_CR4_PAE))
1191 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1193 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1194 && ((cr4 ^ old_cr4) & X86_CR4_PDPTR_BITS)
1195 && !load_pdptrs(vcpu, kvm_read_cr3(vcpu)))
1198 if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1199 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1200 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1204 static_call(kvm_x86_set_cr4)(vcpu, cr4);
1206 kvm_post_set_cr4(vcpu, old_cr4, cr4);
1210 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1212 static void kvm_invalidate_pcid(struct kvm_vcpu *vcpu, unsigned long pcid)
1214 struct kvm_mmu *mmu = vcpu->arch.mmu;
1215 unsigned long roots_to_free = 0;
1219 * MOV CR3 and INVPCID are usually not intercepted when using TDP, but
1220 * this is reachable when running EPT=1 and unrestricted_guest=0, and
1221 * also via the emulator. KVM's TDP page tables are not in the scope of
1222 * the invalidation, but the guest's TLB entries need to be flushed as
1223 * the CPU may have cached entries in its TLB for the target PCID.
1225 if (unlikely(tdp_enabled)) {
1226 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
1231 * If neither the current CR3 nor any of the prev_roots use the given
1232 * PCID, then nothing needs to be done here because a resync will
1233 * happen anyway before switching to any other CR3.
1235 if (kvm_get_active_pcid(vcpu) == pcid) {
1236 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1237 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1241 * If PCID is disabled, there is no need to free prev_roots even if the
1242 * PCIDs for them are also 0, because MOV to CR3 always flushes the TLB
1245 if (!kvm_is_cr4_bit_set(vcpu, X86_CR4_PCIDE))
1248 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
1249 if (kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd) == pcid)
1250 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
1252 kvm_mmu_free_roots(vcpu->kvm, mmu, roots_to_free);
1255 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1257 bool skip_tlb_flush = false;
1258 unsigned long pcid = 0;
1259 #ifdef CONFIG_X86_64
1260 if (kvm_is_cr4_bit_set(vcpu, X86_CR4_PCIDE)) {
1261 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1262 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1263 pcid = cr3 & X86_CR3_PCID_MASK;
1267 /* PDPTRs are always reloaded for PAE paging. */
1268 if (cr3 == kvm_read_cr3(vcpu) && !is_pae_paging(vcpu))
1269 goto handle_tlb_flush;
1272 * Do not condition the GPA check on long mode, this helper is used to
1273 * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1274 * the current vCPU mode is accurate.
1276 if (kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1279 if (is_pae_paging(vcpu) && !load_pdptrs(vcpu, cr3))
1282 if (cr3 != kvm_read_cr3(vcpu))
1283 kvm_mmu_new_pgd(vcpu, cr3);
1285 vcpu->arch.cr3 = cr3;
1286 kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
1287 /* Do not call post_set_cr3, we do not get here for confidential guests. */
1291 * A load of CR3 that flushes the TLB flushes only the current PCID,
1292 * even if PCID is disabled, in which case PCID=0 is flushed. It's a
1293 * moot point in the end because _disabling_ PCID will flush all PCIDs,
1294 * and it's impossible to use a non-zero PCID when PCID is disabled,
1295 * i.e. only PCID=0 can be relevant.
1297 if (!skip_tlb_flush)
1298 kvm_invalidate_pcid(vcpu, pcid);
1302 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1304 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1306 if (cr8 & CR8_RESERVED_BITS)
1308 if (lapic_in_kernel(vcpu))
1309 kvm_lapic_set_tpr(vcpu, cr8);
1311 vcpu->arch.cr8 = cr8;
1314 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1316 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1318 if (lapic_in_kernel(vcpu))
1319 return kvm_lapic_get_cr8(vcpu);
1321 return vcpu->arch.cr8;
1323 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1325 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1329 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1330 for (i = 0; i < KVM_NR_DB_REGS; i++)
1331 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1335 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1339 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1340 dr7 = vcpu->arch.guest_debug_dr7;
1342 dr7 = vcpu->arch.dr7;
1343 static_call(kvm_x86_set_dr7)(vcpu, dr7);
1344 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1345 if (dr7 & DR7_BP_EN_MASK)
1346 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1348 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1350 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1352 u64 fixed = DR6_FIXED_1;
1354 if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1357 if (!guest_cpuid_has(vcpu, X86_FEATURE_BUS_LOCK_DETECT))
1358 fixed |= DR6_BUS_LOCK;
1362 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1364 size_t size = ARRAY_SIZE(vcpu->arch.db);
1368 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1369 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1370 vcpu->arch.eff_db[dr] = val;
1374 if (!kvm_dr6_valid(val))
1376 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1380 if (!kvm_dr7_valid(val))
1382 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1383 kvm_update_dr7(vcpu);
1389 EXPORT_SYMBOL_GPL(kvm_set_dr);
1391 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1393 size_t size = ARRAY_SIZE(vcpu->arch.db);
1397 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1401 *val = vcpu->arch.dr6;
1405 *val = vcpu->arch.dr7;
1409 EXPORT_SYMBOL_GPL(kvm_get_dr);
1411 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu)
1413 u32 ecx = kvm_rcx_read(vcpu);
1416 if (kvm_pmu_rdpmc(vcpu, ecx, &data)) {
1417 kvm_inject_gp(vcpu, 0);
1421 kvm_rax_write(vcpu, (u32)data);
1422 kvm_rdx_write(vcpu, data >> 32);
1423 return kvm_skip_emulated_instruction(vcpu);
1425 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);
1428 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1429 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1431 * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1432 * extract the supported MSRs from the related const lists.
1433 * msrs_to_save is selected from the msrs_to_save_all to reflect the
1434 * capabilities of the host cpu. This capabilities test skips MSRs that are
1435 * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1436 * may depend on host virtualization features rather than host cpu features.
1439 static const u32 msrs_to_save_base[] = {
1440 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1442 #ifdef CONFIG_X86_64
1443 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1445 MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1446 MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1448 MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1449 MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1450 MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1451 MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1452 MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1453 MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1454 MSR_IA32_UMWAIT_CONTROL,
1456 MSR_IA32_XFD, MSR_IA32_XFD_ERR,
1459 static const u32 msrs_to_save_pmu[] = {
1460 MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1461 MSR_ARCH_PERFMON_FIXED_CTR0 + 2,
1462 MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1463 MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1464 MSR_IA32_PEBS_ENABLE, MSR_IA32_DS_AREA, MSR_PEBS_DATA_CFG,
1466 /* This part of MSRs should match KVM_INTEL_PMC_MAX_GENERIC. */
1467 MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1468 MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1469 MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1470 MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1471 MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1472 MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1473 MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1474 MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1476 MSR_K7_EVNTSEL0, MSR_K7_EVNTSEL1, MSR_K7_EVNTSEL2, MSR_K7_EVNTSEL3,
1477 MSR_K7_PERFCTR0, MSR_K7_PERFCTR1, MSR_K7_PERFCTR2, MSR_K7_PERFCTR3,
1479 /* This part of MSRs should match KVM_AMD_PMC_MAX_GENERIC. */
1480 MSR_F15H_PERF_CTL0, MSR_F15H_PERF_CTL1, MSR_F15H_PERF_CTL2,
1481 MSR_F15H_PERF_CTL3, MSR_F15H_PERF_CTL4, MSR_F15H_PERF_CTL5,
1482 MSR_F15H_PERF_CTR0, MSR_F15H_PERF_CTR1, MSR_F15H_PERF_CTR2,
1483 MSR_F15H_PERF_CTR3, MSR_F15H_PERF_CTR4, MSR_F15H_PERF_CTR5,
1486 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_base) +
1487 ARRAY_SIZE(msrs_to_save_pmu)];
1488 static unsigned num_msrs_to_save;
1490 static const u32 emulated_msrs_all[] = {
1491 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1492 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1493 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1494 HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1495 HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1496 HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1497 HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1499 HV_X64_MSR_VP_INDEX,
1500 HV_X64_MSR_VP_RUNTIME,
1501 HV_X64_MSR_SCONTROL,
1502 HV_X64_MSR_STIMER0_CONFIG,
1503 HV_X64_MSR_VP_ASSIST_PAGE,
1504 HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1505 HV_X64_MSR_TSC_EMULATION_STATUS, HV_X64_MSR_TSC_INVARIANT_CONTROL,
1506 HV_X64_MSR_SYNDBG_OPTIONS,
1507 HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1508 HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1509 HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1511 MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1512 MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1514 MSR_IA32_TSC_ADJUST,
1515 MSR_IA32_TSC_DEADLINE,
1516 MSR_IA32_ARCH_CAPABILITIES,
1517 MSR_IA32_PERF_CAPABILITIES,
1518 MSR_IA32_MISC_ENABLE,
1519 MSR_IA32_MCG_STATUS,
1521 MSR_IA32_MCG_EXT_CTL,
1525 MSR_MISC_FEATURES_ENABLES,
1526 MSR_AMD64_VIRT_SPEC_CTRL,
1527 MSR_AMD64_TSC_RATIO,
1532 * The following list leaves out MSRs whose values are determined
1533 * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1534 * We always support the "true" VMX control MSRs, even if the host
1535 * processor does not, so I am putting these registers here rather
1536 * than in msrs_to_save_all.
1539 MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1540 MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1541 MSR_IA32_VMX_TRUE_EXIT_CTLS,
1542 MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1544 MSR_IA32_VMX_CR0_FIXED0,
1545 MSR_IA32_VMX_CR4_FIXED0,
1546 MSR_IA32_VMX_VMCS_ENUM,
1547 MSR_IA32_VMX_PROCBASED_CTLS2,
1548 MSR_IA32_VMX_EPT_VPID_CAP,
1549 MSR_IA32_VMX_VMFUNC,
1552 MSR_KVM_POLL_CONTROL,
1555 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1556 static unsigned num_emulated_msrs;
1559 * List of MSRs that control the existence of MSR-based features, i.e. MSRs
1560 * that are effectively CPUID leafs. VMX MSRs are also included in the set of
1561 * feature MSRs, but are handled separately to allow expedited lookups.
1563 static const u32 msr_based_features_all_except_vmx[] = {
1566 MSR_IA32_ARCH_CAPABILITIES,
1567 MSR_IA32_PERF_CAPABILITIES,
1570 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all_except_vmx) +
1571 (KVM_LAST_EMULATED_VMX_MSR - KVM_FIRST_EMULATED_VMX_MSR + 1)];
1572 static unsigned int num_msr_based_features;
1575 * All feature MSRs except uCode revID, which tracks the currently loaded uCode
1576 * patch, are immutable once the vCPU model is defined.
1578 static bool kvm_is_immutable_feature_msr(u32 msr)
1582 if (msr >= KVM_FIRST_EMULATED_VMX_MSR && msr <= KVM_LAST_EMULATED_VMX_MSR)
1585 for (i = 0; i < ARRAY_SIZE(msr_based_features_all_except_vmx); i++) {
1586 if (msr == msr_based_features_all_except_vmx[i])
1587 return msr != MSR_IA32_UCODE_REV;
1594 * Some IA32_ARCH_CAPABILITIES bits have dependencies on MSRs that KVM
1595 * does not yet virtualize. These include:
1596 * 10 - MISC_PACKAGE_CTRLS
1597 * 11 - ENERGY_FILTERING_CTL
1599 * 18 - FB_CLEAR_CTRL
1600 * 21 - XAPIC_DISABLE_STATUS
1601 * 23 - OVERCLOCKING_STATUS
1604 #define KVM_SUPPORTED_ARCH_CAP \
1605 (ARCH_CAP_RDCL_NO | ARCH_CAP_IBRS_ALL | ARCH_CAP_RSBA | \
1606 ARCH_CAP_SKIP_VMENTRY_L1DFLUSH | ARCH_CAP_SSB_NO | ARCH_CAP_MDS_NO | \
1607 ARCH_CAP_PSCHANGE_MC_NO | ARCH_CAP_TSX_CTRL_MSR | ARCH_CAP_TAA_NO | \
1608 ARCH_CAP_SBDR_SSDP_NO | ARCH_CAP_FBSDP_NO | ARCH_CAP_PSDP_NO | \
1609 ARCH_CAP_FB_CLEAR | ARCH_CAP_RRSBA | ARCH_CAP_PBRSB_NO)
1611 static u64 kvm_get_arch_capabilities(void)
1615 if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES)) {
1616 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1617 data &= KVM_SUPPORTED_ARCH_CAP;
1621 * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1622 * the nested hypervisor runs with NX huge pages. If it is not,
1623 * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1624 * L1 guests, so it need not worry about its own (L2) guests.
1626 data |= ARCH_CAP_PSCHANGE_MC_NO;
1629 * If we're doing cache flushes (either "always" or "cond")
1630 * we will do one whenever the guest does a vmlaunch/vmresume.
1631 * If an outer hypervisor is doing the cache flush for us
1632 * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1633 * capability to the guest too, and if EPT is disabled we're not
1634 * vulnerable. Overall, only VMENTER_L1D_FLUSH_NEVER will
1635 * require a nested hypervisor to do a flush of its own.
1637 if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1638 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1640 if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1641 data |= ARCH_CAP_RDCL_NO;
1642 if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1643 data |= ARCH_CAP_SSB_NO;
1644 if (!boot_cpu_has_bug(X86_BUG_MDS))
1645 data |= ARCH_CAP_MDS_NO;
1647 if (!boot_cpu_has(X86_FEATURE_RTM)) {
1649 * If RTM=0 because the kernel has disabled TSX, the host might
1650 * have TAA_NO or TSX_CTRL. Clear TAA_NO (the guest sees RTM=0
1651 * and therefore knows that there cannot be TAA) but keep
1652 * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1653 * and we want to allow migrating those guests to tsx=off hosts.
1655 data &= ~ARCH_CAP_TAA_NO;
1656 } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1657 data |= ARCH_CAP_TAA_NO;
1660 * Nothing to do here; we emulate TSX_CTRL if present on the
1661 * host so the guest can choose between disabling TSX or
1662 * using VERW to clear CPU buffers.
1669 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1671 switch (msr->index) {
1672 case MSR_IA32_ARCH_CAPABILITIES:
1673 msr->data = kvm_get_arch_capabilities();
1675 case MSR_IA32_PERF_CAPABILITIES:
1676 msr->data = kvm_caps.supported_perf_cap;
1678 case MSR_IA32_UCODE_REV:
1679 rdmsrl_safe(msr->index, &msr->data);
1682 return static_call(kvm_x86_get_msr_feature)(msr);
1687 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1689 struct kvm_msr_entry msr;
1693 r = kvm_get_msr_feature(&msr);
1695 if (r == KVM_MSR_RET_INVALID) {
1696 /* Unconditionally clear the output for simplicity */
1698 if (kvm_msr_ignored_check(index, 0, false))
1710 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1712 if (efer & EFER_AUTOIBRS && !guest_cpuid_has(vcpu, X86_FEATURE_AUTOIBRS))
1715 if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1718 if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1721 if (efer & (EFER_LME | EFER_LMA) &&
1722 !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1725 if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1731 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1733 if (efer & efer_reserved_bits)
1736 return __kvm_valid_efer(vcpu, efer);
1738 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1740 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1742 u64 old_efer = vcpu->arch.efer;
1743 u64 efer = msr_info->data;
1746 if (efer & efer_reserved_bits)
1749 if (!msr_info->host_initiated) {
1750 if (!__kvm_valid_efer(vcpu, efer))
1753 if (is_paging(vcpu) &&
1754 (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1759 efer |= vcpu->arch.efer & EFER_LMA;
1761 r = static_call(kvm_x86_set_efer)(vcpu, efer);
1767 if ((efer ^ old_efer) & KVM_MMU_EFER_ROLE_BITS)
1768 kvm_mmu_reset_context(vcpu);
1773 void kvm_enable_efer_bits(u64 mask)
1775 efer_reserved_bits &= ~mask;
1777 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1779 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1781 struct kvm_x86_msr_filter *msr_filter;
1782 struct msr_bitmap_range *ranges;
1783 struct kvm *kvm = vcpu->kvm;
1788 /* x2APIC MSRs do not support filtering. */
1789 if (index >= 0x800 && index <= 0x8ff)
1792 idx = srcu_read_lock(&kvm->srcu);
1794 msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1800 allowed = msr_filter->default_allow;
1801 ranges = msr_filter->ranges;
1803 for (i = 0; i < msr_filter->count; i++) {
1804 u32 start = ranges[i].base;
1805 u32 end = start + ranges[i].nmsrs;
1806 u32 flags = ranges[i].flags;
1807 unsigned long *bitmap = ranges[i].bitmap;
1809 if ((index >= start) && (index < end) && (flags & type)) {
1810 allowed = !!test_bit(index - start, bitmap);
1816 srcu_read_unlock(&kvm->srcu, idx);
1820 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1823 * Write @data into the MSR specified by @index. Select MSR specific fault
1824 * checks are bypassed if @host_initiated is %true.
1825 * Returns 0 on success, non-0 otherwise.
1826 * Assumes vcpu_load() was already called.
1828 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1829 bool host_initiated)
1831 struct msr_data msr;
1836 case MSR_KERNEL_GS_BASE:
1839 if (is_noncanonical_address(data, vcpu))
1842 case MSR_IA32_SYSENTER_EIP:
1843 case MSR_IA32_SYSENTER_ESP:
1845 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1846 * non-canonical address is written on Intel but not on
1847 * AMD (which ignores the top 32-bits, because it does
1848 * not implement 64-bit SYSENTER).
1850 * 64-bit code should hence be able to write a non-canonical
1851 * value on AMD. Making the address canonical ensures that
1852 * vmentry does not fail on Intel after writing a non-canonical
1853 * value, and that something deterministic happens if the guest
1854 * invokes 64-bit SYSENTER.
1856 data = __canonical_address(data, vcpu_virt_addr_bits(vcpu));
1859 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1862 if (!host_initiated &&
1863 !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1864 !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1868 * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1869 * incomplete and conflicting architectural behavior. Current
1870 * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1871 * reserved and always read as zeros. Enforce Intel's reserved
1872 * bits check if and only if the guest CPU is Intel, and clear
1873 * the bits in all other cases. This ensures cross-vendor
1874 * migration will provide consistent behavior for the guest.
1876 if (guest_cpuid_is_intel(vcpu) && (data >> 32) != 0)
1885 msr.host_initiated = host_initiated;
1887 return static_call(kvm_x86_set_msr)(vcpu, &msr);
1890 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1891 u32 index, u64 data, bool host_initiated)
1893 int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1895 if (ret == KVM_MSR_RET_INVALID)
1896 if (kvm_msr_ignored_check(index, data, true))
1903 * Read the MSR specified by @index into @data. Select MSR specific fault
1904 * checks are bypassed if @host_initiated is %true.
1905 * Returns 0 on success, non-0 otherwise.
1906 * Assumes vcpu_load() was already called.
1908 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1909 bool host_initiated)
1911 struct msr_data msr;
1916 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1919 if (!host_initiated &&
1920 !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1921 !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1927 msr.host_initiated = host_initiated;
1929 ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1935 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1936 u32 index, u64 *data, bool host_initiated)
1938 int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1940 if (ret == KVM_MSR_RET_INVALID) {
1941 /* Unconditionally clear *data for simplicity */
1943 if (kvm_msr_ignored_check(index, 0, false))
1950 static int kvm_get_msr_with_filter(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1952 if (!kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1953 return KVM_MSR_RET_FILTERED;
1954 return kvm_get_msr_ignored_check(vcpu, index, data, false);
1957 static int kvm_set_msr_with_filter(struct kvm_vcpu *vcpu, u32 index, u64 data)
1959 if (!kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1960 return KVM_MSR_RET_FILTERED;
1961 return kvm_set_msr_ignored_check(vcpu, index, data, false);
1964 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1966 return kvm_get_msr_ignored_check(vcpu, index, data, false);
1968 EXPORT_SYMBOL_GPL(kvm_get_msr);
1970 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1972 return kvm_set_msr_ignored_check(vcpu, index, data, false);
1974 EXPORT_SYMBOL_GPL(kvm_set_msr);
1976 static void complete_userspace_rdmsr(struct kvm_vcpu *vcpu)
1978 if (!vcpu->run->msr.error) {
1979 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1980 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1984 static int complete_emulated_msr_access(struct kvm_vcpu *vcpu)
1986 return complete_emulated_insn_gp(vcpu, vcpu->run->msr.error);
1989 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1991 complete_userspace_rdmsr(vcpu);
1992 return complete_emulated_msr_access(vcpu);
1995 static int complete_fast_msr_access(struct kvm_vcpu *vcpu)
1997 return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
2000 static int complete_fast_rdmsr(struct kvm_vcpu *vcpu)
2002 complete_userspace_rdmsr(vcpu);
2003 return complete_fast_msr_access(vcpu);
2006 static u64 kvm_msr_reason(int r)
2009 case KVM_MSR_RET_INVALID:
2010 return KVM_MSR_EXIT_REASON_UNKNOWN;
2011 case KVM_MSR_RET_FILTERED:
2012 return KVM_MSR_EXIT_REASON_FILTER;
2014 return KVM_MSR_EXIT_REASON_INVAL;
2018 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
2019 u32 exit_reason, u64 data,
2020 int (*completion)(struct kvm_vcpu *vcpu),
2023 u64 msr_reason = kvm_msr_reason(r);
2025 /* Check if the user wanted to know about this MSR fault */
2026 if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
2029 vcpu->run->exit_reason = exit_reason;
2030 vcpu->run->msr.error = 0;
2031 memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
2032 vcpu->run->msr.reason = msr_reason;
2033 vcpu->run->msr.index = index;
2034 vcpu->run->msr.data = data;
2035 vcpu->arch.complete_userspace_io = completion;
2040 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
2042 u32 ecx = kvm_rcx_read(vcpu);
2046 r = kvm_get_msr_with_filter(vcpu, ecx, &data);
2049 trace_kvm_msr_read(ecx, data);
2051 kvm_rax_write(vcpu, data & -1u);
2052 kvm_rdx_write(vcpu, (data >> 32) & -1u);
2054 /* MSR read failed? See if we should ask user space */
2055 if (kvm_msr_user_space(vcpu, ecx, KVM_EXIT_X86_RDMSR, 0,
2056 complete_fast_rdmsr, r))
2058 trace_kvm_msr_read_ex(ecx);
2061 return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
2063 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
2065 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
2067 u32 ecx = kvm_rcx_read(vcpu);
2068 u64 data = kvm_read_edx_eax(vcpu);
2071 r = kvm_set_msr_with_filter(vcpu, ecx, data);
2074 trace_kvm_msr_write(ecx, data);
2076 /* MSR write failed? See if we should ask user space */
2077 if (kvm_msr_user_space(vcpu, ecx, KVM_EXIT_X86_WRMSR, data,
2078 complete_fast_msr_access, r))
2080 /* Signal all other negative errors to userspace */
2083 trace_kvm_msr_write_ex(ecx, data);
2086 return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
2088 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
2090 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu)
2092 return kvm_skip_emulated_instruction(vcpu);
2095 int kvm_emulate_invd(struct kvm_vcpu *vcpu)
2097 /* Treat an INVD instruction as a NOP and just skip it. */
2098 return kvm_emulate_as_nop(vcpu);
2100 EXPORT_SYMBOL_GPL(kvm_emulate_invd);
2102 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu)
2104 kvm_queue_exception(vcpu, UD_VECTOR);
2107 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op);
2110 static int kvm_emulate_monitor_mwait(struct kvm_vcpu *vcpu, const char *insn)
2112 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MWAIT_NEVER_UD_FAULTS) &&
2113 !guest_cpuid_has(vcpu, X86_FEATURE_MWAIT))
2114 return kvm_handle_invalid_op(vcpu);
2116 pr_warn_once("%s instruction emulated as NOP!\n", insn);
2117 return kvm_emulate_as_nop(vcpu);
2119 int kvm_emulate_mwait(struct kvm_vcpu *vcpu)
2121 return kvm_emulate_monitor_mwait(vcpu, "MWAIT");
2123 EXPORT_SYMBOL_GPL(kvm_emulate_mwait);
2125 int kvm_emulate_monitor(struct kvm_vcpu *vcpu)
2127 return kvm_emulate_monitor_mwait(vcpu, "MONITOR");
2129 EXPORT_SYMBOL_GPL(kvm_emulate_monitor);
2131 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
2133 xfer_to_guest_mode_prepare();
2134 return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
2135 xfer_to_guest_mode_work_pending();
2139 * The fast path for frequent and performance sensitive wrmsr emulation,
2140 * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
2141 * the latency of virtual IPI by avoiding the expensive bits of transitioning
2142 * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
2143 * other cases which must be called after interrupts are enabled on the host.
2145 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
2147 if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
2150 if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
2151 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
2152 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
2153 ((u32)(data >> 32) != X2APIC_BROADCAST))
2154 return kvm_x2apic_icr_write(vcpu->arch.apic, data);
2159 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
2161 if (!kvm_can_use_hv_timer(vcpu))
2164 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2168 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
2170 u32 msr = kvm_rcx_read(vcpu);
2172 fastpath_t ret = EXIT_FASTPATH_NONE;
2175 case APIC_BASE_MSR + (APIC_ICR >> 4):
2176 data = kvm_read_edx_eax(vcpu);
2177 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
2178 kvm_skip_emulated_instruction(vcpu);
2179 ret = EXIT_FASTPATH_EXIT_HANDLED;
2182 case MSR_IA32_TSC_DEADLINE:
2183 data = kvm_read_edx_eax(vcpu);
2184 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
2185 kvm_skip_emulated_instruction(vcpu);
2186 ret = EXIT_FASTPATH_REENTER_GUEST;
2193 if (ret != EXIT_FASTPATH_NONE)
2194 trace_kvm_msr_write(msr, data);
2198 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
2201 * Adapt set_msr() to msr_io()'s calling convention
2203 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2205 return kvm_get_msr_ignored_check(vcpu, index, data, true);
2208 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2213 * Disallow writes to immutable feature MSRs after KVM_RUN. KVM does
2214 * not support modifying the guest vCPU model on the fly, e.g. changing
2215 * the nVMX capabilities while L2 is running is nonsensical. Ignore
2216 * writes of the same value, e.g. to allow userspace to blindly stuff
2217 * all MSRs when emulating RESET.
2219 if (kvm_vcpu_has_run(vcpu) && kvm_is_immutable_feature_msr(index)) {
2220 if (do_get_msr(vcpu, index, &val) || *data != val)
2226 return kvm_set_msr_ignored_check(vcpu, index, *data, true);
2229 #ifdef CONFIG_X86_64
2230 struct pvclock_clock {
2240 struct pvclock_gtod_data {
2243 struct pvclock_clock clock; /* extract of a clocksource struct */
2244 struct pvclock_clock raw_clock; /* extract of a clocksource struct */
2250 static struct pvclock_gtod_data pvclock_gtod_data;
2252 static void update_pvclock_gtod(struct timekeeper *tk)
2254 struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
2256 write_seqcount_begin(&vdata->seq);
2258 /* copy pvclock gtod data */
2259 vdata->clock.vclock_mode = tk->tkr_mono.clock->vdso_clock_mode;
2260 vdata->clock.cycle_last = tk->tkr_mono.cycle_last;
2261 vdata->clock.mask = tk->tkr_mono.mask;
2262 vdata->clock.mult = tk->tkr_mono.mult;
2263 vdata->clock.shift = tk->tkr_mono.shift;
2264 vdata->clock.base_cycles = tk->tkr_mono.xtime_nsec;
2265 vdata->clock.offset = tk->tkr_mono.base;
2267 vdata->raw_clock.vclock_mode = tk->tkr_raw.clock->vdso_clock_mode;
2268 vdata->raw_clock.cycle_last = tk->tkr_raw.cycle_last;
2269 vdata->raw_clock.mask = tk->tkr_raw.mask;
2270 vdata->raw_clock.mult = tk->tkr_raw.mult;
2271 vdata->raw_clock.shift = tk->tkr_raw.shift;
2272 vdata->raw_clock.base_cycles = tk->tkr_raw.xtime_nsec;
2273 vdata->raw_clock.offset = tk->tkr_raw.base;
2275 vdata->wall_time_sec = tk->xtime_sec;
2277 vdata->offs_boot = tk->offs_boot;
2279 write_seqcount_end(&vdata->seq);
2282 static s64 get_kvmclock_base_ns(void)
2284 /* Count up from boot time, but with the frequency of the raw clock. */
2285 return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
2288 static s64 get_kvmclock_base_ns(void)
2290 /* Master clock not used, so we can just use CLOCK_BOOTTIME. */
2291 return ktime_get_boottime_ns();
2295 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
2299 struct pvclock_wall_clock wc;
2306 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
2311 ++version; /* first time write, random junk */
2315 if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
2319 * The guest calculates current wall clock time by adding
2320 * system time (updated by kvm_guest_time_update below) to the
2321 * wall clock specified here. We do the reverse here.
2323 wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
2325 wc.nsec = do_div(wall_nsec, 1000000000);
2326 wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
2327 wc.version = version;
2329 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
2332 wc_sec_hi = wall_nsec >> 32;
2333 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
2334 &wc_sec_hi, sizeof(wc_sec_hi));
2338 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
2341 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
2342 bool old_msr, bool host_initiated)
2344 struct kvm_arch *ka = &vcpu->kvm->arch;
2346 if (vcpu->vcpu_id == 0 && !host_initiated) {
2347 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2348 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2350 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2353 vcpu->arch.time = system_time;
2354 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2356 /* we verify if the enable bit is set... */
2357 if (system_time & 1)
2358 kvm_gpc_activate(&vcpu->arch.pv_time, system_time & ~1ULL,
2359 sizeof(struct pvclock_vcpu_time_info));
2361 kvm_gpc_deactivate(&vcpu->arch.pv_time);
2366 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2368 do_shl32_div32(dividend, divisor);
2372 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2373 s8 *pshift, u32 *pmultiplier)
2381 scaled64 = scaled_hz;
2382 while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2387 tps32 = (uint32_t)tps64;
2388 while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2389 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2397 *pmultiplier = div_frac(scaled64, tps32);
2400 #ifdef CONFIG_X86_64
2401 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2404 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2405 static unsigned long max_tsc_khz;
2407 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2409 u64 v = (u64)khz * (1000000 + ppm);
2414 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier);
2416 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2420 /* Guest TSC same frequency as host TSC? */
2422 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_caps.default_tsc_scaling_ratio);
2426 /* TSC scaling supported? */
2427 if (!kvm_caps.has_tsc_control) {
2428 if (user_tsc_khz > tsc_khz) {
2429 vcpu->arch.tsc_catchup = 1;
2430 vcpu->arch.tsc_always_catchup = 1;
2433 pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2438 /* TSC scaling required - calculate ratio */
2439 ratio = mul_u64_u32_div(1ULL << kvm_caps.tsc_scaling_ratio_frac_bits,
2440 user_tsc_khz, tsc_khz);
2442 if (ratio == 0 || ratio >= kvm_caps.max_tsc_scaling_ratio) {
2443 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2448 kvm_vcpu_write_tsc_multiplier(vcpu, ratio);
2452 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2454 u32 thresh_lo, thresh_hi;
2455 int use_scaling = 0;
2457 /* tsc_khz can be zero if TSC calibration fails */
2458 if (user_tsc_khz == 0) {
2459 /* set tsc_scaling_ratio to a safe value */
2460 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_caps.default_tsc_scaling_ratio);
2464 /* Compute a scale to convert nanoseconds in TSC cycles */
2465 kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2466 &vcpu->arch.virtual_tsc_shift,
2467 &vcpu->arch.virtual_tsc_mult);
2468 vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2471 * Compute the variation in TSC rate which is acceptable
2472 * within the range of tolerance and decide if the
2473 * rate being applied is within that bounds of the hardware
2474 * rate. If so, no scaling or compensation need be done.
2476 thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2477 thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2478 if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2479 pr_debug("requested TSC rate %u falls outside tolerance [%u,%u]\n",
2480 user_tsc_khz, thresh_lo, thresh_hi);
2483 return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2486 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2488 u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2489 vcpu->arch.virtual_tsc_mult,
2490 vcpu->arch.virtual_tsc_shift);
2491 tsc += vcpu->arch.this_tsc_write;
2495 #ifdef CONFIG_X86_64
2496 static inline int gtod_is_based_on_tsc(int mode)
2498 return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2502 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2504 #ifdef CONFIG_X86_64
2506 struct kvm_arch *ka = &vcpu->kvm->arch;
2507 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2509 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2510 atomic_read(&vcpu->kvm->online_vcpus));
2513 * Once the masterclock is enabled, always perform request in
2514 * order to update it.
2516 * In order to enable masterclock, the host clocksource must be TSC
2517 * and the vcpus need to have matched TSCs. When that happens,
2518 * perform request to enable masterclock.
2520 if (ka->use_master_clock ||
2521 (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2522 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2524 trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2525 atomic_read(&vcpu->kvm->online_vcpus),
2526 ka->use_master_clock, gtod->clock.vclock_mode);
2531 * Multiply tsc by a fixed point number represented by ratio.
2533 * The most significant 64-N bits (mult) of ratio represent the
2534 * integral part of the fixed point number; the remaining N bits
2535 * (frac) represent the fractional part, ie. ratio represents a fixed
2536 * point number (mult + frac * 2^(-N)).
2538 * N equals to kvm_caps.tsc_scaling_ratio_frac_bits.
2540 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2542 return mul_u64_u64_shr(tsc, ratio, kvm_caps.tsc_scaling_ratio_frac_bits);
2545 u64 kvm_scale_tsc(u64 tsc, u64 ratio)
2549 if (ratio != kvm_caps.default_tsc_scaling_ratio)
2550 _tsc = __scale_tsc(ratio, tsc);
2555 static u64 kvm_compute_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2559 tsc = kvm_scale_tsc(rdtsc(), vcpu->arch.l1_tsc_scaling_ratio);
2561 return target_tsc - tsc;
2564 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2566 return vcpu->arch.l1_tsc_offset +
2567 kvm_scale_tsc(host_tsc, vcpu->arch.l1_tsc_scaling_ratio);
2569 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2571 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier)
2575 if (l2_multiplier == kvm_caps.default_tsc_scaling_ratio)
2576 nested_offset = l1_offset;
2578 nested_offset = mul_s64_u64_shr((s64) l1_offset, l2_multiplier,
2579 kvm_caps.tsc_scaling_ratio_frac_bits);
2581 nested_offset += l2_offset;
2582 return nested_offset;
2584 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset);
2586 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier)
2588 if (l2_multiplier != kvm_caps.default_tsc_scaling_ratio)
2589 return mul_u64_u64_shr(l1_multiplier, l2_multiplier,
2590 kvm_caps.tsc_scaling_ratio_frac_bits);
2592 return l1_multiplier;
2594 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier);
2596 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 l1_offset)
2598 trace_kvm_write_tsc_offset(vcpu->vcpu_id,
2599 vcpu->arch.l1_tsc_offset,
2602 vcpu->arch.l1_tsc_offset = l1_offset;
2605 * If we are here because L1 chose not to trap WRMSR to TSC then
2606 * according to the spec this should set L1's TSC (as opposed to
2607 * setting L1's offset for L2).
2609 if (is_guest_mode(vcpu))
2610 vcpu->arch.tsc_offset = kvm_calc_nested_tsc_offset(
2612 static_call(kvm_x86_get_l2_tsc_offset)(vcpu),
2613 static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2615 vcpu->arch.tsc_offset = l1_offset;
2617 static_call(kvm_x86_write_tsc_offset)(vcpu, vcpu->arch.tsc_offset);
2620 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier)
2622 vcpu->arch.l1_tsc_scaling_ratio = l1_multiplier;
2624 /* Userspace is changing the multiplier while L2 is active */
2625 if (is_guest_mode(vcpu))
2626 vcpu->arch.tsc_scaling_ratio = kvm_calc_nested_tsc_multiplier(
2628 static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2630 vcpu->arch.tsc_scaling_ratio = l1_multiplier;
2632 if (kvm_caps.has_tsc_control)
2633 static_call(kvm_x86_write_tsc_multiplier)(
2634 vcpu, vcpu->arch.tsc_scaling_ratio);
2637 static inline bool kvm_check_tsc_unstable(void)
2639 #ifdef CONFIG_X86_64
2641 * TSC is marked unstable when we're running on Hyper-V,
2642 * 'TSC page' clocksource is good.
2644 if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2647 return check_tsc_unstable();
2651 * Infers attempts to synchronize the guest's tsc from host writes. Sets the
2652 * offset for the vcpu and tracks the TSC matching generation that the vcpu
2655 static void __kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 offset, u64 tsc,
2656 u64 ns, bool matched)
2658 struct kvm *kvm = vcpu->kvm;
2660 lockdep_assert_held(&kvm->arch.tsc_write_lock);
2663 * We also track th most recent recorded KHZ, write and time to
2664 * allow the matching interval to be extended at each write.
2666 kvm->arch.last_tsc_nsec = ns;
2667 kvm->arch.last_tsc_write = tsc;
2668 kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2669 kvm->arch.last_tsc_offset = offset;
2671 vcpu->arch.last_guest_tsc = tsc;
2673 kvm_vcpu_write_tsc_offset(vcpu, offset);
2677 * We split periods of matched TSC writes into generations.
2678 * For each generation, we track the original measured
2679 * nanosecond time, offset, and write, so if TSCs are in
2680 * sync, we can match exact offset, and if not, we can match
2681 * exact software computation in compute_guest_tsc()
2683 * These values are tracked in kvm->arch.cur_xxx variables.
2685 kvm->arch.cur_tsc_generation++;
2686 kvm->arch.cur_tsc_nsec = ns;
2687 kvm->arch.cur_tsc_write = tsc;
2688 kvm->arch.cur_tsc_offset = offset;
2689 kvm->arch.nr_vcpus_matched_tsc = 0;
2690 } else if (vcpu->arch.this_tsc_generation != kvm->arch.cur_tsc_generation) {
2691 kvm->arch.nr_vcpus_matched_tsc++;
2694 /* Keep track of which generation this VCPU has synchronized to */
2695 vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2696 vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2697 vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2699 kvm_track_tsc_matching(vcpu);
2702 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2704 struct kvm *kvm = vcpu->kvm;
2705 u64 offset, ns, elapsed;
2706 unsigned long flags;
2707 bool matched = false;
2708 bool synchronizing = false;
2710 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2711 offset = kvm_compute_l1_tsc_offset(vcpu, data);
2712 ns = get_kvmclock_base_ns();
2713 elapsed = ns - kvm->arch.last_tsc_nsec;
2715 if (vcpu->arch.virtual_tsc_khz) {
2718 * detection of vcpu initialization -- need to sync
2719 * with other vCPUs. This particularly helps to keep
2720 * kvm_clock stable after CPU hotplug
2722 synchronizing = true;
2724 u64 tsc_exp = kvm->arch.last_tsc_write +
2725 nsec_to_cycles(vcpu, elapsed);
2726 u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2728 * Special case: TSC write with a small delta (1 second)
2729 * of virtual cycle time against real time is
2730 * interpreted as an attempt to synchronize the CPU.
2732 synchronizing = data < tsc_exp + tsc_hz &&
2733 data + tsc_hz > tsc_exp;
2738 * For a reliable TSC, we can match TSC offsets, and for an unstable
2739 * TSC, we add elapsed time in this computation. We could let the
2740 * compensation code attempt to catch up if we fall behind, but
2741 * it's better to try to match offsets from the beginning.
2743 if (synchronizing &&
2744 vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2745 if (!kvm_check_tsc_unstable()) {
2746 offset = kvm->arch.cur_tsc_offset;
2748 u64 delta = nsec_to_cycles(vcpu, elapsed);
2750 offset = kvm_compute_l1_tsc_offset(vcpu, data);
2755 __kvm_synchronize_tsc(vcpu, offset, data, ns, matched);
2756 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2759 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2762 u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2763 kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2766 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2768 if (vcpu->arch.l1_tsc_scaling_ratio != kvm_caps.default_tsc_scaling_ratio)
2769 WARN_ON(adjustment < 0);
2770 adjustment = kvm_scale_tsc((u64) adjustment,
2771 vcpu->arch.l1_tsc_scaling_ratio);
2772 adjust_tsc_offset_guest(vcpu, adjustment);
2775 #ifdef CONFIG_X86_64
2777 static u64 read_tsc(void)
2779 u64 ret = (u64)rdtsc_ordered();
2780 u64 last = pvclock_gtod_data.clock.cycle_last;
2782 if (likely(ret >= last))
2786 * GCC likes to generate cmov here, but this branch is extremely
2787 * predictable (it's just a function of time and the likely is
2788 * very likely) and there's a data dependence, so force GCC
2789 * to generate a branch instead. I don't barrier() because
2790 * we don't actually need a barrier, and if this function
2791 * ever gets inlined it will generate worse code.
2797 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2803 switch (clock->vclock_mode) {
2804 case VDSO_CLOCKMODE_HVCLOCK:
2805 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2807 if (tsc_pg_val != U64_MAX) {
2808 /* TSC page valid */
2809 *mode = VDSO_CLOCKMODE_HVCLOCK;
2810 v = (tsc_pg_val - clock->cycle_last) &
2813 /* TSC page invalid */
2814 *mode = VDSO_CLOCKMODE_NONE;
2817 case VDSO_CLOCKMODE_TSC:
2818 *mode = VDSO_CLOCKMODE_TSC;
2819 *tsc_timestamp = read_tsc();
2820 v = (*tsc_timestamp - clock->cycle_last) &
2824 *mode = VDSO_CLOCKMODE_NONE;
2827 if (*mode == VDSO_CLOCKMODE_NONE)
2828 *tsc_timestamp = v = 0;
2830 return v * clock->mult;
2833 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2835 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2841 seq = read_seqcount_begin(>od->seq);
2842 ns = gtod->raw_clock.base_cycles;
2843 ns += vgettsc(>od->raw_clock, tsc_timestamp, &mode);
2844 ns >>= gtod->raw_clock.shift;
2845 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2846 } while (unlikely(read_seqcount_retry(>od->seq, seq)));
2852 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2854 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2860 seq = read_seqcount_begin(>od->seq);
2861 ts->tv_sec = gtod->wall_time_sec;
2862 ns = gtod->clock.base_cycles;
2863 ns += vgettsc(>od->clock, tsc_timestamp, &mode);
2864 ns >>= gtod->clock.shift;
2865 } while (unlikely(read_seqcount_retry(>od->seq, seq)));
2867 ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2873 /* returns true if host is using TSC based clocksource */
2874 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2876 /* checked again under seqlock below */
2877 if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2880 return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2884 /* returns true if host is using TSC based clocksource */
2885 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2888 /* checked again under seqlock below */
2889 if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2892 return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2898 * Assuming a stable TSC across physical CPUS, and a stable TSC
2899 * across virtual CPUs, the following condition is possible.
2900 * Each numbered line represents an event visible to both
2901 * CPUs at the next numbered event.
2903 * "timespecX" represents host monotonic time. "tscX" represents
2906 * VCPU0 on CPU0 | VCPU1 on CPU1
2908 * 1. read timespec0,tsc0
2909 * 2. | timespec1 = timespec0 + N
2911 * 3. transition to guest | transition to guest
2912 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2913 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
2914 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2916 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2919 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2921 * - 0 < N - M => M < N
2923 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2924 * always the case (the difference between two distinct xtime instances
2925 * might be smaller then the difference between corresponding TSC reads,
2926 * when updating guest vcpus pvclock areas).
2928 * To avoid that problem, do not allow visibility of distinct
2929 * system_timestamp/tsc_timestamp values simultaneously: use a master
2930 * copy of host monotonic time values. Update that master copy
2933 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2937 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2939 #ifdef CONFIG_X86_64
2940 struct kvm_arch *ka = &kvm->arch;
2942 bool host_tsc_clocksource, vcpus_matched;
2944 lockdep_assert_held(&kvm->arch.tsc_write_lock);
2945 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2946 atomic_read(&kvm->online_vcpus));
2949 * If the host uses TSC clock, then passthrough TSC as stable
2952 host_tsc_clocksource = kvm_get_time_and_clockread(
2953 &ka->master_kernel_ns,
2954 &ka->master_cycle_now);
2956 ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2957 && !ka->backwards_tsc_observed
2958 && !ka->boot_vcpu_runs_old_kvmclock;
2960 if (ka->use_master_clock)
2961 atomic_set(&kvm_guest_has_master_clock, 1);
2963 vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2964 trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2969 static void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2971 kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2974 static void __kvm_start_pvclock_update(struct kvm *kvm)
2976 raw_spin_lock_irq(&kvm->arch.tsc_write_lock);
2977 write_seqcount_begin(&kvm->arch.pvclock_sc);
2980 static void kvm_start_pvclock_update(struct kvm *kvm)
2982 kvm_make_mclock_inprogress_request(kvm);
2984 /* no guest entries from this point */
2985 __kvm_start_pvclock_update(kvm);
2988 static void kvm_end_pvclock_update(struct kvm *kvm)
2990 struct kvm_arch *ka = &kvm->arch;
2991 struct kvm_vcpu *vcpu;
2994 write_seqcount_end(&ka->pvclock_sc);
2995 raw_spin_unlock_irq(&ka->tsc_write_lock);
2996 kvm_for_each_vcpu(i, vcpu, kvm)
2997 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2999 /* guest entries allowed */
3000 kvm_for_each_vcpu(i, vcpu, kvm)
3001 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
3004 static void kvm_update_masterclock(struct kvm *kvm)
3006 kvm_hv_request_tsc_page_update(kvm);
3007 kvm_start_pvclock_update(kvm);
3008 pvclock_update_vm_gtod_copy(kvm);
3009 kvm_end_pvclock_update(kvm);
3013 * Use the kernel's tsc_khz directly if the TSC is constant, otherwise use KVM's
3014 * per-CPU value (which may be zero if a CPU is going offline). Note, tsc_khz
3015 * can change during boot even if the TSC is constant, as it's possible for KVM
3016 * to be loaded before TSC calibration completes. Ideally, KVM would get a
3017 * notification when calibration completes, but practically speaking calibration
3018 * will complete before userspace is alive enough to create VMs.
3020 static unsigned long get_cpu_tsc_khz(void)
3022 if (static_cpu_has(X86_FEATURE_CONSTANT_TSC))
3025 return __this_cpu_read(cpu_tsc_khz);
3028 /* Called within read_seqcount_begin/retry for kvm->pvclock_sc. */
3029 static void __get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data)
3031 struct kvm_arch *ka = &kvm->arch;
3032 struct pvclock_vcpu_time_info hv_clock;
3034 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
3038 if (ka->use_master_clock &&
3039 (static_cpu_has(X86_FEATURE_CONSTANT_TSC) || __this_cpu_read(cpu_tsc_khz))) {
3040 #ifdef CONFIG_X86_64
3041 struct timespec64 ts;
3043 if (kvm_get_walltime_and_clockread(&ts, &data->host_tsc)) {
3044 data->realtime = ts.tv_nsec + NSEC_PER_SEC * ts.tv_sec;
3045 data->flags |= KVM_CLOCK_REALTIME | KVM_CLOCK_HOST_TSC;
3048 data->host_tsc = rdtsc();
3050 data->flags |= KVM_CLOCK_TSC_STABLE;
3051 hv_clock.tsc_timestamp = ka->master_cycle_now;
3052 hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
3053 kvm_get_time_scale(NSEC_PER_SEC, get_cpu_tsc_khz() * 1000LL,
3054 &hv_clock.tsc_shift,
3055 &hv_clock.tsc_to_system_mul);
3056 data->clock = __pvclock_read_cycles(&hv_clock, data->host_tsc);
3058 data->clock = get_kvmclock_base_ns() + ka->kvmclock_offset;
3064 static void get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data)
3066 struct kvm_arch *ka = &kvm->arch;
3070 seq = read_seqcount_begin(&ka->pvclock_sc);
3071 __get_kvmclock(kvm, data);
3072 } while (read_seqcount_retry(&ka->pvclock_sc, seq));
3075 u64 get_kvmclock_ns(struct kvm *kvm)
3077 struct kvm_clock_data data;
3079 get_kvmclock(kvm, &data);
3083 static void kvm_setup_guest_pvclock(struct kvm_vcpu *v,
3084 struct gfn_to_pfn_cache *gpc,
3085 unsigned int offset)
3087 struct kvm_vcpu_arch *vcpu = &v->arch;
3088 struct pvclock_vcpu_time_info *guest_hv_clock;
3089 unsigned long flags;
3091 read_lock_irqsave(&gpc->lock, flags);
3092 while (!kvm_gpc_check(gpc, offset + sizeof(*guest_hv_clock))) {
3093 read_unlock_irqrestore(&gpc->lock, flags);
3095 if (kvm_gpc_refresh(gpc, offset + sizeof(*guest_hv_clock)))
3098 read_lock_irqsave(&gpc->lock, flags);
3101 guest_hv_clock = (void *)(gpc->khva + offset);
3104 * This VCPU is paused, but it's legal for a guest to read another
3105 * VCPU's kvmclock, so we really have to follow the specification where
3106 * it says that version is odd if data is being modified, and even after
3110 guest_hv_clock->version = vcpu->hv_clock.version = (guest_hv_clock->version + 1) | 1;
3113 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
3114 vcpu->hv_clock.flags |= (guest_hv_clock->flags & PVCLOCK_GUEST_STOPPED);
3116 if (vcpu->pvclock_set_guest_stopped_request) {
3117 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
3118 vcpu->pvclock_set_guest_stopped_request = false;
3121 memcpy(guest_hv_clock, &vcpu->hv_clock, sizeof(*guest_hv_clock));
3124 guest_hv_clock->version = ++vcpu->hv_clock.version;
3126 mark_page_dirty_in_slot(v->kvm, gpc->memslot, gpc->gpa >> PAGE_SHIFT);
3127 read_unlock_irqrestore(&gpc->lock, flags);
3129 trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
3132 static int kvm_guest_time_update(struct kvm_vcpu *v)
3134 unsigned long flags, tgt_tsc_khz;
3136 struct kvm_vcpu_arch *vcpu = &v->arch;
3137 struct kvm_arch *ka = &v->kvm->arch;
3139 u64 tsc_timestamp, host_tsc;
3141 bool use_master_clock;
3147 * If the host uses TSC clock, then passthrough TSC as stable
3151 seq = read_seqcount_begin(&ka->pvclock_sc);
3152 use_master_clock = ka->use_master_clock;
3153 if (use_master_clock) {
3154 host_tsc = ka->master_cycle_now;
3155 kernel_ns = ka->master_kernel_ns;
3157 } while (read_seqcount_retry(&ka->pvclock_sc, seq));
3159 /* Keep irq disabled to prevent changes to the clock */
3160 local_irq_save(flags);
3161 tgt_tsc_khz = get_cpu_tsc_khz();
3162 if (unlikely(tgt_tsc_khz == 0)) {
3163 local_irq_restore(flags);
3164 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
3167 if (!use_master_clock) {
3169 kernel_ns = get_kvmclock_base_ns();
3172 tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
3175 * We may have to catch up the TSC to match elapsed wall clock
3176 * time for two reasons, even if kvmclock is used.
3177 * 1) CPU could have been running below the maximum TSC rate
3178 * 2) Broken TSC compensation resets the base at each VCPU
3179 * entry to avoid unknown leaps of TSC even when running
3180 * again on the same CPU. This may cause apparent elapsed
3181 * time to disappear, and the guest to stand still or run
3184 if (vcpu->tsc_catchup) {
3185 u64 tsc = compute_guest_tsc(v, kernel_ns);
3186 if (tsc > tsc_timestamp) {
3187 adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
3188 tsc_timestamp = tsc;
3192 local_irq_restore(flags);
3194 /* With all the info we got, fill in the values */
3196 if (kvm_caps.has_tsc_control)
3197 tgt_tsc_khz = kvm_scale_tsc(tgt_tsc_khz,
3198 v->arch.l1_tsc_scaling_ratio);
3200 if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
3201 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
3202 &vcpu->hv_clock.tsc_shift,
3203 &vcpu->hv_clock.tsc_to_system_mul);
3204 vcpu->hw_tsc_khz = tgt_tsc_khz;
3205 kvm_xen_update_tsc_info(v);
3208 vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
3209 vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
3210 vcpu->last_guest_tsc = tsc_timestamp;
3212 /* If the host uses TSC clocksource, then it is stable */
3214 if (use_master_clock)
3215 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
3217 vcpu->hv_clock.flags = pvclock_flags;
3219 if (vcpu->pv_time.active)
3220 kvm_setup_guest_pvclock(v, &vcpu->pv_time, 0);
3221 if (vcpu->xen.vcpu_info_cache.active)
3222 kvm_setup_guest_pvclock(v, &vcpu->xen.vcpu_info_cache,
3223 offsetof(struct compat_vcpu_info, time));
3224 if (vcpu->xen.vcpu_time_info_cache.active)
3225 kvm_setup_guest_pvclock(v, &vcpu->xen.vcpu_time_info_cache, 0);
3226 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
3231 * kvmclock updates which are isolated to a given vcpu, such as
3232 * vcpu->cpu migration, should not allow system_timestamp from
3233 * the rest of the vcpus to remain static. Otherwise ntp frequency
3234 * correction applies to one vcpu's system_timestamp but not
3237 * So in those cases, request a kvmclock update for all vcpus.
3238 * We need to rate-limit these requests though, as they can
3239 * considerably slow guests that have a large number of vcpus.
3240 * The time for a remote vcpu to update its kvmclock is bound
3241 * by the delay we use to rate-limit the updates.
3244 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
3246 static void kvmclock_update_fn(struct work_struct *work)
3249 struct delayed_work *dwork = to_delayed_work(work);
3250 struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3251 kvmclock_update_work);
3252 struct kvm *kvm = container_of(ka, struct kvm, arch);
3253 struct kvm_vcpu *vcpu;
3255 kvm_for_each_vcpu(i, vcpu, kvm) {
3256 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3257 kvm_vcpu_kick(vcpu);
3261 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
3263 struct kvm *kvm = v->kvm;
3265 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
3266 schedule_delayed_work(&kvm->arch.kvmclock_update_work,
3267 KVMCLOCK_UPDATE_DELAY);
3270 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
3272 static void kvmclock_sync_fn(struct work_struct *work)
3274 struct delayed_work *dwork = to_delayed_work(work);
3275 struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3276 kvmclock_sync_work);
3277 struct kvm *kvm = container_of(ka, struct kvm, arch);
3279 if (!kvmclock_periodic_sync)
3282 schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
3283 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
3284 KVMCLOCK_SYNC_PERIOD);
3287 /* These helpers are safe iff @msr is known to be an MCx bank MSR. */
3288 static bool is_mci_control_msr(u32 msr)
3290 return (msr & 3) == 0;
3292 static bool is_mci_status_msr(u32 msr)
3294 return (msr & 3) == 1;
3298 * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
3300 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
3302 /* McStatusWrEn enabled? */
3303 if (guest_cpuid_is_amd_or_hygon(vcpu))
3304 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
3309 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3311 u64 mcg_cap = vcpu->arch.mcg_cap;
3312 unsigned bank_num = mcg_cap & 0xff;
3313 u32 msr = msr_info->index;
3314 u64 data = msr_info->data;
3315 u32 offset, last_msr;
3318 case MSR_IA32_MCG_STATUS:
3319 vcpu->arch.mcg_status = data;
3321 case MSR_IA32_MCG_CTL:
3322 if (!(mcg_cap & MCG_CTL_P) &&
3323 (data || !msr_info->host_initiated))
3325 if (data != 0 && data != ~(u64)0)
3327 vcpu->arch.mcg_ctl = data;
3329 case MSR_IA32_MC0_CTL2 ... MSR_IA32_MCx_CTL2(KVM_MAX_MCE_BANKS) - 1:
3330 last_msr = MSR_IA32_MCx_CTL2(bank_num) - 1;
3334 if (!(mcg_cap & MCG_CMCI_P) && (data || !msr_info->host_initiated))
3336 /* An attempt to write a 1 to a reserved bit raises #GP */
3337 if (data & ~(MCI_CTL2_CMCI_EN | MCI_CTL2_CMCI_THRESHOLD_MASK))
3339 offset = array_index_nospec(msr - MSR_IA32_MC0_CTL2,
3340 last_msr + 1 - MSR_IA32_MC0_CTL2);
3341 vcpu->arch.mci_ctl2_banks[offset] = data;
3343 case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3344 last_msr = MSR_IA32_MCx_CTL(bank_num) - 1;
3349 * Only 0 or all 1s can be written to IA32_MCi_CTL, all other
3350 * values are architecturally undefined. But, some Linux
3351 * kernels clear bit 10 in bank 4 to workaround a BIOS/GART TLB
3352 * issue on AMD K8s, allow bit 10 to be clear when setting all
3353 * other bits in order to avoid an uncaught #GP in the guest.
3355 * UNIXWARE clears bit 0 of MC1_CTL to ignore correctable,
3356 * single-bit ECC data errors.
3358 if (is_mci_control_msr(msr) &&
3359 data != 0 && (data | (1 << 10) | 1) != ~(u64)0)
3363 * All CPUs allow writing 0 to MCi_STATUS MSRs to clear the MSR.
3364 * AMD-based CPUs allow non-zero values, but if and only if
3365 * HWCR[McStatusWrEn] is set.
3367 if (!msr_info->host_initiated && is_mci_status_msr(msr) &&
3368 data != 0 && !can_set_mci_status(vcpu))
3371 offset = array_index_nospec(msr - MSR_IA32_MC0_CTL,
3372 last_msr + 1 - MSR_IA32_MC0_CTL);
3373 vcpu->arch.mce_banks[offset] = data;
3381 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
3383 u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
3385 return (vcpu->arch.apf.msr_en_val & mask) == mask;
3388 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
3390 gpa_t gpa = data & ~0x3f;
3392 /* Bits 4:5 are reserved, Should be zero */
3396 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
3397 (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
3400 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
3401 (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
3404 if (!lapic_in_kernel(vcpu))
3405 return data ? 1 : 0;
3407 vcpu->arch.apf.msr_en_val = data;
3409 if (!kvm_pv_async_pf_enabled(vcpu)) {
3410 kvm_clear_async_pf_completion_queue(vcpu);
3411 kvm_async_pf_hash_reset(vcpu);
3415 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
3419 vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
3420 vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
3422 kvm_async_pf_wakeup_all(vcpu);
3427 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
3429 /* Bits 8-63 are reserved */
3433 if (!lapic_in_kernel(vcpu))
3436 vcpu->arch.apf.msr_int_val = data;
3438 vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
3443 static void kvmclock_reset(struct kvm_vcpu *vcpu)
3445 kvm_gpc_deactivate(&vcpu->arch.pv_time);
3446 vcpu->arch.time = 0;
3449 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
3451 ++vcpu->stat.tlb_flush;
3452 static_call(kvm_x86_flush_tlb_all)(vcpu);
3454 /* Flushing all ASIDs flushes the current ASID... */
3455 kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
3458 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
3460 ++vcpu->stat.tlb_flush;
3464 * A TLB flush on behalf of the guest is equivalent to
3465 * INVPCID(all), toggling CR4.PGE, etc., which requires
3466 * a forced sync of the shadow page tables. Ensure all the
3467 * roots are synced and the guest TLB in hardware is clean.
3469 kvm_mmu_sync_roots(vcpu);
3470 kvm_mmu_sync_prev_roots(vcpu);
3473 static_call(kvm_x86_flush_tlb_guest)(vcpu);
3476 * Flushing all "guest" TLB is always a superset of Hyper-V's fine
3479 kvm_hv_vcpu_purge_flush_tlb(vcpu);
3483 static inline void kvm_vcpu_flush_tlb_current(struct kvm_vcpu *vcpu)
3485 ++vcpu->stat.tlb_flush;
3486 static_call(kvm_x86_flush_tlb_current)(vcpu);
3490 * Service "local" TLB flush requests, which are specific to the current MMU
3491 * context. In addition to the generic event handling in vcpu_enter_guest(),
3492 * TLB flushes that are targeted at an MMU context also need to be serviced
3493 * prior before nested VM-Enter/VM-Exit.
3495 void kvm_service_local_tlb_flush_requests(struct kvm_vcpu *vcpu)
3497 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
3498 kvm_vcpu_flush_tlb_current(vcpu);
3500 if (kvm_check_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu))
3501 kvm_vcpu_flush_tlb_guest(vcpu);
3503 EXPORT_SYMBOL_GPL(kvm_service_local_tlb_flush_requests);
3505 static void record_steal_time(struct kvm_vcpu *vcpu)
3507 struct gfn_to_hva_cache *ghc = &vcpu->arch.st.cache;
3508 struct kvm_steal_time __user *st;
3509 struct kvm_memslots *slots;
3510 gpa_t gpa = vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS;
3514 if (kvm_xen_msr_enabled(vcpu->kvm)) {
3515 kvm_xen_runstate_set_running(vcpu);
3519 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3522 if (WARN_ON_ONCE(current->mm != vcpu->kvm->mm))
3525 slots = kvm_memslots(vcpu->kvm);
3527 if (unlikely(slots->generation != ghc->generation ||
3529 kvm_is_error_hva(ghc->hva) || !ghc->memslot)) {
3530 /* We rely on the fact that it fits in a single page. */
3531 BUILD_BUG_ON((sizeof(*st) - 1) & KVM_STEAL_VALID_BITS);
3533 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, ghc, gpa, sizeof(*st)) ||
3534 kvm_is_error_hva(ghc->hva) || !ghc->memslot)
3538 st = (struct kvm_steal_time __user *)ghc->hva;
3540 * Doing a TLB flush here, on the guest's behalf, can avoid
3543 if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
3544 u8 st_preempted = 0;
3547 if (!user_access_begin(st, sizeof(*st)))
3550 asm volatile("1: xchgb %0, %2\n"
3553 _ASM_EXTABLE_UA(1b, 2b)
3554 : "+q" (st_preempted),
3556 "+m" (st->preempted));
3562 vcpu->arch.st.preempted = 0;
3564 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
3565 st_preempted & KVM_VCPU_FLUSH_TLB);
3566 if (st_preempted & KVM_VCPU_FLUSH_TLB)
3567 kvm_vcpu_flush_tlb_guest(vcpu);
3569 if (!user_access_begin(st, sizeof(*st)))
3572 if (!user_access_begin(st, sizeof(*st)))
3575 unsafe_put_user(0, &st->preempted, out);
3576 vcpu->arch.st.preempted = 0;
3579 unsafe_get_user(version, &st->version, out);
3581 version += 1; /* first time write, random junk */
3584 unsafe_put_user(version, &st->version, out);
3588 unsafe_get_user(steal, &st->steal, out);
3589 steal += current->sched_info.run_delay -
3590 vcpu->arch.st.last_steal;
3591 vcpu->arch.st.last_steal = current->sched_info.run_delay;
3592 unsafe_put_user(steal, &st->steal, out);
3595 unsafe_put_user(version, &st->version, out);
3600 mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
3603 static bool kvm_is_msr_to_save(u32 msr_index)
3607 for (i = 0; i < num_msrs_to_save; i++) {
3608 if (msrs_to_save[i] == msr_index)
3615 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3617 u32 msr = msr_info->index;
3618 u64 data = msr_info->data;
3620 if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3621 return kvm_xen_write_hypercall_page(vcpu, data);
3624 case MSR_AMD64_NB_CFG:
3625 case MSR_IA32_UCODE_WRITE:
3626 case MSR_VM_HSAVE_PA:
3627 case MSR_AMD64_PATCH_LOADER:
3628 case MSR_AMD64_BU_CFG2:
3629 case MSR_AMD64_DC_CFG:
3630 case MSR_F15H_EX_CFG:
3633 case MSR_IA32_UCODE_REV:
3634 if (msr_info->host_initiated)
3635 vcpu->arch.microcode_version = data;
3637 case MSR_IA32_ARCH_CAPABILITIES:
3638 if (!msr_info->host_initiated)
3640 vcpu->arch.arch_capabilities = data;
3642 case MSR_IA32_PERF_CAPABILITIES:
3643 if (!msr_info->host_initiated)
3645 if (data & ~kvm_caps.supported_perf_cap)
3649 * Note, this is not just a performance optimization! KVM
3650 * disallows changing feature MSRs after the vCPU has run; PMU
3651 * refresh will bug the VM if called after the vCPU has run.
3653 if (vcpu->arch.perf_capabilities == data)
3656 vcpu->arch.perf_capabilities = data;
3657 kvm_pmu_refresh(vcpu);
3659 case MSR_IA32_PRED_CMD:
3660 if (!msr_info->host_initiated && !guest_has_pred_cmd_msr(vcpu))
3663 if (!boot_cpu_has(X86_FEATURE_IBPB) || (data & ~PRED_CMD_IBPB))
3668 wrmsrl(MSR_IA32_PRED_CMD, PRED_CMD_IBPB);
3670 case MSR_IA32_FLUSH_CMD:
3671 if (!msr_info->host_initiated &&
3672 !guest_cpuid_has(vcpu, X86_FEATURE_FLUSH_L1D))
3675 if (!boot_cpu_has(X86_FEATURE_FLUSH_L1D) || (data & ~L1D_FLUSH))
3680 wrmsrl(MSR_IA32_FLUSH_CMD, L1D_FLUSH);
3683 return set_efer(vcpu, msr_info);
3685 data &= ~(u64)0x40; /* ignore flush filter disable */
3686 data &= ~(u64)0x100; /* ignore ignne emulation enable */
3687 data &= ~(u64)0x8; /* ignore TLB cache disable */
3689 /* Handle McStatusWrEn */
3690 if (data == BIT_ULL(18)) {
3691 vcpu->arch.msr_hwcr = data;
3692 } else if (data != 0) {
3693 kvm_pr_unimpl_wrmsr(vcpu, msr, data);
3697 case MSR_FAM10H_MMIO_CONF_BASE:
3699 kvm_pr_unimpl_wrmsr(vcpu, msr, data);
3703 case 0x200 ... MSR_IA32_MC0_CTL2 - 1:
3704 case MSR_IA32_MCx_CTL2(KVM_MAX_MCE_BANKS) ... 0x2ff:
3705 return kvm_mtrr_set_msr(vcpu, msr, data);
3706 case MSR_IA32_APICBASE:
3707 return kvm_set_apic_base(vcpu, msr_info);
3708 case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3709 return kvm_x2apic_msr_write(vcpu, msr, data);
3710 case MSR_IA32_TSC_DEADLINE:
3711 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3713 case MSR_IA32_TSC_ADJUST:
3714 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3715 if (!msr_info->host_initiated) {
3716 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3717 adjust_tsc_offset_guest(vcpu, adj);
3718 /* Before back to guest, tsc_timestamp must be adjusted
3719 * as well, otherwise guest's percpu pvclock time could jump.
3721 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3723 vcpu->arch.ia32_tsc_adjust_msr = data;
3726 case MSR_IA32_MISC_ENABLE: {
3727 u64 old_val = vcpu->arch.ia32_misc_enable_msr;
3729 if (!msr_info->host_initiated) {
3731 if ((old_val ^ data) & MSR_IA32_MISC_ENABLE_PMU_RO_MASK)
3734 /* R bits, i.e. writes are ignored, but don't fault. */
3735 data = data & ~MSR_IA32_MISC_ENABLE_EMON;
3736 data |= old_val & MSR_IA32_MISC_ENABLE_EMON;
3739 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3740 ((old_val ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3741 if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3743 vcpu->arch.ia32_misc_enable_msr = data;
3744 kvm_update_cpuid_runtime(vcpu);
3746 vcpu->arch.ia32_misc_enable_msr = data;
3750 case MSR_IA32_SMBASE:
3751 if (!IS_ENABLED(CONFIG_KVM_SMM) || !msr_info->host_initiated)
3753 vcpu->arch.smbase = data;
3755 case MSR_IA32_POWER_CTL:
3756 vcpu->arch.msr_ia32_power_ctl = data;
3759 if (msr_info->host_initiated) {
3760 kvm_synchronize_tsc(vcpu, data);
3762 u64 adj = kvm_compute_l1_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3763 adjust_tsc_offset_guest(vcpu, adj);
3764 vcpu->arch.ia32_tsc_adjust_msr += adj;
3768 if (!msr_info->host_initiated &&
3769 !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3772 * KVM supports exposing PT to the guest, but does not support
3773 * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3774 * XSAVES/XRSTORS to save/restore PT MSRs.
3776 if (data & ~kvm_caps.supported_xss)
3778 vcpu->arch.ia32_xss = data;
3779 kvm_update_cpuid_runtime(vcpu);
3782 if (!msr_info->host_initiated)
3784 vcpu->arch.smi_count = data;
3786 case MSR_KVM_WALL_CLOCK_NEW:
3787 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3790 vcpu->kvm->arch.wall_clock = data;
3791 kvm_write_wall_clock(vcpu->kvm, data, 0);
3793 case MSR_KVM_WALL_CLOCK:
3794 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3797 vcpu->kvm->arch.wall_clock = data;
3798 kvm_write_wall_clock(vcpu->kvm, data, 0);
3800 case MSR_KVM_SYSTEM_TIME_NEW:
3801 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3804 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3806 case MSR_KVM_SYSTEM_TIME:
3807 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3810 kvm_write_system_time(vcpu, data, true, msr_info->host_initiated);
3812 case MSR_KVM_ASYNC_PF_EN:
3813 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3816 if (kvm_pv_enable_async_pf(vcpu, data))
3819 case MSR_KVM_ASYNC_PF_INT:
3820 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3823 if (kvm_pv_enable_async_pf_int(vcpu, data))
3826 case MSR_KVM_ASYNC_PF_ACK:
3827 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3830 vcpu->arch.apf.pageready_pending = false;
3831 kvm_check_async_pf_completion(vcpu);
3834 case MSR_KVM_STEAL_TIME:
3835 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3838 if (unlikely(!sched_info_on()))
3841 if (data & KVM_STEAL_RESERVED_MASK)
3844 vcpu->arch.st.msr_val = data;
3846 if (!(data & KVM_MSR_ENABLED))
3849 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3852 case MSR_KVM_PV_EOI_EN:
3853 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3856 if (kvm_lapic_set_pv_eoi(vcpu, data, sizeof(u8)))
3860 case MSR_KVM_POLL_CONTROL:
3861 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3864 /* only enable bit supported */
3865 if (data & (-1ULL << 1))
3868 vcpu->arch.msr_kvm_poll_control = data;
3871 case MSR_IA32_MCG_CTL:
3872 case MSR_IA32_MCG_STATUS:
3873 case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3874 case MSR_IA32_MC0_CTL2 ... MSR_IA32_MCx_CTL2(KVM_MAX_MCE_BANKS) - 1:
3875 return set_msr_mce(vcpu, msr_info);
3877 case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3878 case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3879 case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3880 case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3881 if (kvm_pmu_is_valid_msr(vcpu, msr))
3882 return kvm_pmu_set_msr(vcpu, msr_info);
3885 kvm_pr_unimpl_wrmsr(vcpu, msr, data);
3887 case MSR_K7_CLK_CTL:
3889 * Ignore all writes to this no longer documented MSR.
3890 * Writes are only relevant for old K7 processors,
3891 * all pre-dating SVM, but a recommended workaround from
3892 * AMD for these chips. It is possible to specify the
3893 * affected processor models on the command line, hence
3894 * the need to ignore the workaround.
3897 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3898 case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3899 case HV_X64_MSR_SYNDBG_OPTIONS:
3900 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3901 case HV_X64_MSR_CRASH_CTL:
3902 case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3903 case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3904 case HV_X64_MSR_TSC_EMULATION_CONTROL:
3905 case HV_X64_MSR_TSC_EMULATION_STATUS:
3906 case HV_X64_MSR_TSC_INVARIANT_CONTROL:
3907 return kvm_hv_set_msr_common(vcpu, msr, data,
3908 msr_info->host_initiated);
3909 case MSR_IA32_BBL_CR_CTL3:
3910 /* Drop writes to this legacy MSR -- see rdmsr
3911 * counterpart for further detail.
3913 kvm_pr_unimpl_wrmsr(vcpu, msr, data);
3915 case MSR_AMD64_OSVW_ID_LENGTH:
3916 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3918 vcpu->arch.osvw.length = data;
3920 case MSR_AMD64_OSVW_STATUS:
3921 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3923 vcpu->arch.osvw.status = data;
3925 case MSR_PLATFORM_INFO:
3926 if (!msr_info->host_initiated ||
3927 (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3928 cpuid_fault_enabled(vcpu)))
3930 vcpu->arch.msr_platform_info = data;
3932 case MSR_MISC_FEATURES_ENABLES:
3933 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3934 (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3935 !supports_cpuid_fault(vcpu)))
3937 vcpu->arch.msr_misc_features_enables = data;
3939 #ifdef CONFIG_X86_64
3941 if (!msr_info->host_initiated &&
3942 !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
3945 if (data & ~kvm_guest_supported_xfd(vcpu))
3948 fpu_update_guest_xfd(&vcpu->arch.guest_fpu, data);
3950 case MSR_IA32_XFD_ERR:
3951 if (!msr_info->host_initiated &&
3952 !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
3955 if (data & ~kvm_guest_supported_xfd(vcpu))
3958 vcpu->arch.guest_fpu.xfd_err = data;
3962 if (kvm_pmu_is_valid_msr(vcpu, msr))
3963 return kvm_pmu_set_msr(vcpu, msr_info);
3966 * Userspace is allowed to write '0' to MSRs that KVM reports
3967 * as to-be-saved, even if an MSRs isn't fully supported.
3969 if (msr_info->host_initiated && !data &&
3970 kvm_is_msr_to_save(msr))
3973 return KVM_MSR_RET_INVALID;
3977 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3979 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3982 u64 mcg_cap = vcpu->arch.mcg_cap;
3983 unsigned bank_num = mcg_cap & 0xff;
3984 u32 offset, last_msr;
3987 case MSR_IA32_P5_MC_ADDR:
3988 case MSR_IA32_P5_MC_TYPE:
3991 case MSR_IA32_MCG_CAP:
3992 data = vcpu->arch.mcg_cap;
3994 case MSR_IA32_MCG_CTL:
3995 if (!(mcg_cap & MCG_CTL_P) && !host)
3997 data = vcpu->arch.mcg_ctl;
3999 case MSR_IA32_MCG_STATUS:
4000 data = vcpu->arch.mcg_status;
4002 case MSR_IA32_MC0_CTL2 ... MSR_IA32_MCx_CTL2(KVM_MAX_MCE_BANKS) - 1:
4003 last_msr = MSR_IA32_MCx_CTL2(bank_num) - 1;
4007 if (!(mcg_cap & MCG_CMCI_P) && !host)
4009 offset = array_index_nospec(msr - MSR_IA32_MC0_CTL2,
4010 last_msr + 1 - MSR_IA32_MC0_CTL2);
4011 data = vcpu->arch.mci_ctl2_banks[offset];
4013 case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
4014 last_msr = MSR_IA32_MCx_CTL(bank_num) - 1;
4018 offset = array_index_nospec(msr - MSR_IA32_MC0_CTL,
4019 last_msr + 1 - MSR_IA32_MC0_CTL);
4020 data = vcpu->arch.mce_banks[offset];
4029 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
4031 switch (msr_info->index) {
4032 case MSR_IA32_PLATFORM_ID:
4033 case MSR_IA32_EBL_CR_POWERON:
4034 case MSR_IA32_LASTBRANCHFROMIP:
4035 case MSR_IA32_LASTBRANCHTOIP:
4036 case MSR_IA32_LASTINTFROMIP:
4037 case MSR_IA32_LASTINTTOIP:
4038 case MSR_AMD64_SYSCFG:
4039 case MSR_K8_TSEG_ADDR:
4040 case MSR_K8_TSEG_MASK:
4041 case MSR_VM_HSAVE_PA:
4042 case MSR_K8_INT_PENDING_MSG:
4043 case MSR_AMD64_NB_CFG:
4044 case MSR_FAM10H_MMIO_CONF_BASE:
4045 case MSR_AMD64_BU_CFG2:
4046 case MSR_IA32_PERF_CTL:
4047 case MSR_AMD64_DC_CFG:
4048 case MSR_F15H_EX_CFG:
4050 * Intel Sandy Bridge CPUs must support the RAPL (running average power
4051 * limit) MSRs. Just return 0, as we do not want to expose the host
4052 * data here. Do not conditionalize this on CPUID, as KVM does not do
4053 * so for existing CPU-specific MSRs.
4055 case MSR_RAPL_POWER_UNIT:
4056 case MSR_PP0_ENERGY_STATUS: /* Power plane 0 (core) */
4057 case MSR_PP1_ENERGY_STATUS: /* Power plane 1 (graphics uncore) */
4058 case MSR_PKG_ENERGY_STATUS: /* Total package */
4059 case MSR_DRAM_ENERGY_STATUS: /* DRAM controller */
4062 case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
4063 case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
4064 case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
4065 case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
4066 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
4067 return kvm_pmu_get_msr(vcpu, msr_info);
4070 case MSR_IA32_UCODE_REV:
4071 msr_info->data = vcpu->arch.microcode_version;
4073 case MSR_IA32_ARCH_CAPABILITIES:
4074 if (!msr_info->host_initiated &&
4075 !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
4077 msr_info->data = vcpu->arch.arch_capabilities;
4079 case MSR_IA32_PERF_CAPABILITIES:
4080 if (!msr_info->host_initiated &&
4081 !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
4083 msr_info->data = vcpu->arch.perf_capabilities;
4085 case MSR_IA32_POWER_CTL:
4086 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
4088 case MSR_IA32_TSC: {
4090 * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
4091 * even when not intercepted. AMD manual doesn't explicitly
4092 * state this but appears to behave the same.
4094 * On userspace reads and writes, however, we unconditionally
4095 * return L1's TSC value to ensure backwards-compatible
4096 * behavior for migration.
4100 if (msr_info->host_initiated) {
4101 offset = vcpu->arch.l1_tsc_offset;
4102 ratio = vcpu->arch.l1_tsc_scaling_ratio;
4104 offset = vcpu->arch.tsc_offset;
4105 ratio = vcpu->arch.tsc_scaling_ratio;
4108 msr_info->data = kvm_scale_tsc(rdtsc(), ratio) + offset;
4112 case 0x200 ... MSR_IA32_MC0_CTL2 - 1:
4113 case MSR_IA32_MCx_CTL2(KVM_MAX_MCE_BANKS) ... 0x2ff:
4114 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
4115 case 0xcd: /* fsb frequency */
4119 * MSR_EBC_FREQUENCY_ID
4120 * Conservative value valid for even the basic CPU models.
4121 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
4122 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
4123 * and 266MHz for model 3, or 4. Set Core Clock
4124 * Frequency to System Bus Frequency Ratio to 1 (bits
4125 * 31:24) even though these are only valid for CPU
4126 * models > 2, however guests may end up dividing or
4127 * multiplying by zero otherwise.
4129 case MSR_EBC_FREQUENCY_ID:
4130 msr_info->data = 1 << 24;
4132 case MSR_IA32_APICBASE:
4133 msr_info->data = kvm_get_apic_base(vcpu);
4135 case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
4136 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
4137 case MSR_IA32_TSC_DEADLINE:
4138 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
4140 case MSR_IA32_TSC_ADJUST:
4141 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
4143 case MSR_IA32_MISC_ENABLE:
4144 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
4146 case MSR_IA32_SMBASE:
4147 if (!IS_ENABLED(CONFIG_KVM_SMM) || !msr_info->host_initiated)
4149 msr_info->data = vcpu->arch.smbase;
4152 msr_info->data = vcpu->arch.smi_count;
4154 case MSR_IA32_PERF_STATUS:
4155 /* TSC increment by tick */
4156 msr_info->data = 1000ULL;
4157 /* CPU multiplier */
4158 msr_info->data |= (((uint64_t)4ULL) << 40);
4161 msr_info->data = vcpu->arch.efer;
4163 case MSR_KVM_WALL_CLOCK:
4164 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
4167 msr_info->data = vcpu->kvm->arch.wall_clock;
4169 case MSR_KVM_WALL_CLOCK_NEW:
4170 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
4173 msr_info->data = vcpu->kvm->arch.wall_clock;
4175 case MSR_KVM_SYSTEM_TIME:
4176 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
4179 msr_info->data = vcpu->arch.time;
4181 case MSR_KVM_SYSTEM_TIME_NEW:
4182 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
4185 msr_info->data = vcpu->arch.time;
4187 case MSR_KVM_ASYNC_PF_EN:
4188 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
4191 msr_info->data = vcpu->arch.apf.msr_en_val;
4193 case MSR_KVM_ASYNC_PF_INT:
4194 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
4197 msr_info->data = vcpu->arch.apf.msr_int_val;
4199 case MSR_KVM_ASYNC_PF_ACK:
4200 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
4205 case MSR_KVM_STEAL_TIME:
4206 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
4209 msr_info->data = vcpu->arch.st.msr_val;
4211 case MSR_KVM_PV_EOI_EN:
4212 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
4215 msr_info->data = vcpu->arch.pv_eoi.msr_val;
4217 case MSR_KVM_POLL_CONTROL:
4218 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
4221 msr_info->data = vcpu->arch.msr_kvm_poll_control;
4223 case MSR_IA32_P5_MC_ADDR:
4224 case MSR_IA32_P5_MC_TYPE:
4225 case MSR_IA32_MCG_CAP:
4226 case MSR_IA32_MCG_CTL:
4227 case MSR_IA32_MCG_STATUS:
4228 case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
4229 case MSR_IA32_MC0_CTL2 ... MSR_IA32_MCx_CTL2(KVM_MAX_MCE_BANKS) - 1:
4230 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
4231 msr_info->host_initiated);
4233 if (!msr_info->host_initiated &&
4234 !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
4236 msr_info->data = vcpu->arch.ia32_xss;
4238 case MSR_K7_CLK_CTL:
4240 * Provide expected ramp-up count for K7. All other
4241 * are set to zero, indicating minimum divisors for
4244 * This prevents guest kernels on AMD host with CPU
4245 * type 6, model 8 and higher from exploding due to
4246 * the rdmsr failing.
4248 msr_info->data = 0x20000000;
4250 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
4251 case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
4252 case HV_X64_MSR_SYNDBG_OPTIONS:
4253 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
4254 case HV_X64_MSR_CRASH_CTL:
4255 case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
4256 case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
4257 case HV_X64_MSR_TSC_EMULATION_CONTROL:
4258 case HV_X64_MSR_TSC_EMULATION_STATUS:
4259 case HV_X64_MSR_TSC_INVARIANT_CONTROL:
4260 return kvm_hv_get_msr_common(vcpu,
4261 msr_info->index, &msr_info->data,
4262 msr_info->host_initiated);
4263 case MSR_IA32_BBL_CR_CTL3:
4264 /* This legacy MSR exists but isn't fully documented in current
4265 * silicon. It is however accessed by winxp in very narrow
4266 * scenarios where it sets bit #19, itself documented as
4267 * a "reserved" bit. Best effort attempt to source coherent
4268 * read data here should the balance of the register be
4269 * interpreted by the guest:
4271 * L2 cache control register 3: 64GB range, 256KB size,
4272 * enabled, latency 0x1, configured
4274 msr_info->data = 0xbe702111;
4276 case MSR_AMD64_OSVW_ID_LENGTH:
4277 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
4279 msr_info->data = vcpu->arch.osvw.length;
4281 case MSR_AMD64_OSVW_STATUS:
4282 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
4284 msr_info->data = vcpu->arch.osvw.status;
4286 case MSR_PLATFORM_INFO:
4287 if (!msr_info->host_initiated &&
4288 !vcpu->kvm->arch.guest_can_read_msr_platform_info)
4290 msr_info->data = vcpu->arch.msr_platform_info;
4292 case MSR_MISC_FEATURES_ENABLES:
4293 msr_info->data = vcpu->arch.msr_misc_features_enables;
4296 msr_info->data = vcpu->arch.msr_hwcr;
4298 #ifdef CONFIG_X86_64
4300 if (!msr_info->host_initiated &&
4301 !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
4304 msr_info->data = vcpu->arch.guest_fpu.fpstate->xfd;
4306 case MSR_IA32_XFD_ERR:
4307 if (!msr_info->host_initiated &&
4308 !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
4311 msr_info->data = vcpu->arch.guest_fpu.xfd_err;
4315 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
4316 return kvm_pmu_get_msr(vcpu, msr_info);
4319 * Userspace is allowed to read MSRs that KVM reports as
4320 * to-be-saved, even if an MSR isn't fully supported.
4322 if (msr_info->host_initiated &&
4323 kvm_is_msr_to_save(msr_info->index)) {
4328 return KVM_MSR_RET_INVALID;
4332 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
4335 * Read or write a bunch of msrs. All parameters are kernel addresses.
4337 * @return number of msrs set successfully.
4339 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
4340 struct kvm_msr_entry *entries,
4341 int (*do_msr)(struct kvm_vcpu *vcpu,
4342 unsigned index, u64 *data))
4346 for (i = 0; i < msrs->nmsrs; ++i)
4347 if (do_msr(vcpu, entries[i].index, &entries[i].data))
4354 * Read or write a bunch of msrs. Parameters are user addresses.
4356 * @return number of msrs set successfully.
4358 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
4359 int (*do_msr)(struct kvm_vcpu *vcpu,
4360 unsigned index, u64 *data),
4363 struct kvm_msrs msrs;
4364 struct kvm_msr_entry *entries;
4369 if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
4373 if (msrs.nmsrs >= MAX_IO_MSRS)
4376 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
4377 entries = memdup_user(user_msrs->entries, size);
4378 if (IS_ERR(entries)) {
4379 r = PTR_ERR(entries);
4383 r = __msr_io(vcpu, &msrs, entries, do_msr);
4385 if (writeback && copy_to_user(user_msrs->entries, entries, size))
4393 static inline bool kvm_can_mwait_in_guest(void)
4395 return boot_cpu_has(X86_FEATURE_MWAIT) &&
4396 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
4397 boot_cpu_has(X86_FEATURE_ARAT);
4400 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
4401 struct kvm_cpuid2 __user *cpuid_arg)
4403 struct kvm_cpuid2 cpuid;
4407 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4410 r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4415 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4421 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
4426 case KVM_CAP_IRQCHIP:
4428 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
4429 case KVM_CAP_SET_TSS_ADDR:
4430 case KVM_CAP_EXT_CPUID:
4431 case KVM_CAP_EXT_EMUL_CPUID:
4432 case KVM_CAP_CLOCKSOURCE:
4434 case KVM_CAP_NOP_IO_DELAY:
4435 case KVM_CAP_MP_STATE:
4436 case KVM_CAP_SYNC_MMU:
4437 case KVM_CAP_USER_NMI:
4438 case KVM_CAP_REINJECT_CONTROL:
4439 case KVM_CAP_IRQ_INJECT_STATUS:
4440 case KVM_CAP_IOEVENTFD:
4441 case KVM_CAP_IOEVENTFD_NO_LENGTH:
4443 case KVM_CAP_PIT_STATE2:
4444 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
4445 case KVM_CAP_VCPU_EVENTS:
4446 case KVM_CAP_HYPERV:
4447 case KVM_CAP_HYPERV_VAPIC:
4448 case KVM_CAP_HYPERV_SPIN:
4449 case KVM_CAP_HYPERV_SYNIC:
4450 case KVM_CAP_HYPERV_SYNIC2:
4451 case KVM_CAP_HYPERV_VP_INDEX:
4452 case KVM_CAP_HYPERV_EVENTFD:
4453 case KVM_CAP_HYPERV_TLBFLUSH:
4454 case KVM_CAP_HYPERV_SEND_IPI:
4455 case KVM_CAP_HYPERV_CPUID:
4456 case KVM_CAP_HYPERV_ENFORCE_CPUID:
4457 case KVM_CAP_SYS_HYPERV_CPUID:
4458 case KVM_CAP_PCI_SEGMENT:
4459 case KVM_CAP_DEBUGREGS:
4460 case KVM_CAP_X86_ROBUST_SINGLESTEP:
4462 case KVM_CAP_ASYNC_PF:
4463 case KVM_CAP_ASYNC_PF_INT:
4464 case KVM_CAP_GET_TSC_KHZ:
4465 case KVM_CAP_KVMCLOCK_CTRL:
4466 case KVM_CAP_READONLY_MEM:
4467 case KVM_CAP_HYPERV_TIME:
4468 case KVM_CAP_IOAPIC_POLARITY_IGNORED:
4469 case KVM_CAP_TSC_DEADLINE_TIMER:
4470 case KVM_CAP_DISABLE_QUIRKS:
4471 case KVM_CAP_SET_BOOT_CPU_ID:
4472 case KVM_CAP_SPLIT_IRQCHIP:
4473 case KVM_CAP_IMMEDIATE_EXIT:
4474 case KVM_CAP_PMU_EVENT_FILTER:
4475 case KVM_CAP_PMU_EVENT_MASKED_EVENTS:
4476 case KVM_CAP_GET_MSR_FEATURES:
4477 case KVM_CAP_MSR_PLATFORM_INFO:
4478 case KVM_CAP_EXCEPTION_PAYLOAD:
4479 case KVM_CAP_X86_TRIPLE_FAULT_EVENT:
4480 case KVM_CAP_SET_GUEST_DEBUG:
4481 case KVM_CAP_LAST_CPU:
4482 case KVM_CAP_X86_USER_SPACE_MSR:
4483 case KVM_CAP_X86_MSR_FILTER:
4484 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4485 #ifdef CONFIG_X86_SGX_KVM
4486 case KVM_CAP_SGX_ATTRIBUTE:
4488 case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
4489 case KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM:
4490 case KVM_CAP_SREGS2:
4491 case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
4492 case KVM_CAP_VCPU_ATTRIBUTES:
4493 case KVM_CAP_SYS_ATTRIBUTES:
4495 case KVM_CAP_ENABLE_CAP:
4496 case KVM_CAP_VM_DISABLE_NX_HUGE_PAGES:
4499 case KVM_CAP_EXIT_HYPERCALL:
4500 r = KVM_EXIT_HYPERCALL_VALID_MASK;
4502 case KVM_CAP_SET_GUEST_DEBUG2:
4503 return KVM_GUESTDBG_VALID_MASK;
4504 #ifdef CONFIG_KVM_XEN
4505 case KVM_CAP_XEN_HVM:
4506 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
4507 KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
4508 KVM_XEN_HVM_CONFIG_SHARED_INFO |
4509 KVM_XEN_HVM_CONFIG_EVTCHN_2LEVEL |
4510 KVM_XEN_HVM_CONFIG_EVTCHN_SEND;
4511 if (sched_info_on())
4512 r |= KVM_XEN_HVM_CONFIG_RUNSTATE |
4513 KVM_XEN_HVM_CONFIG_RUNSTATE_UPDATE_FLAG;
4516 case KVM_CAP_SYNC_REGS:
4517 r = KVM_SYNC_X86_VALID_FIELDS;
4519 case KVM_CAP_ADJUST_CLOCK:
4520 r = KVM_CLOCK_VALID_FLAGS;
4522 case KVM_CAP_X86_DISABLE_EXITS:
4523 r = KVM_X86_DISABLE_EXITS_PAUSE;
4525 if (!mitigate_smt_rsb) {
4526 r |= KVM_X86_DISABLE_EXITS_HLT |
4527 KVM_X86_DISABLE_EXITS_CSTATE;
4529 if (kvm_can_mwait_in_guest())
4530 r |= KVM_X86_DISABLE_EXITS_MWAIT;
4533 case KVM_CAP_X86_SMM:
4534 if (!IS_ENABLED(CONFIG_KVM_SMM))
4537 /* SMBASE is usually relocated above 1M on modern chipsets,
4538 * and SMM handlers might indeed rely on 4G segment limits,
4539 * so do not report SMM to be available if real mode is
4540 * emulated via vm86 mode. Still, do not go to great lengths
4541 * to avoid userspace's usage of the feature, because it is a
4542 * fringe case that is not enabled except via specific settings
4543 * of the module parameters.
4545 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
4547 case KVM_CAP_NR_VCPUS:
4548 r = min_t(unsigned int, num_online_cpus(), KVM_MAX_VCPUS);
4550 case KVM_CAP_MAX_VCPUS:
4553 case KVM_CAP_MAX_VCPU_ID:
4554 r = KVM_MAX_VCPU_IDS;
4556 case KVM_CAP_PV_MMU: /* obsolete */
4560 r = KVM_MAX_MCE_BANKS;
4563 r = boot_cpu_has(X86_FEATURE_XSAVE);
4565 case KVM_CAP_TSC_CONTROL:
4566 case KVM_CAP_VM_TSC_CONTROL:
4567 r = kvm_caps.has_tsc_control;
4569 case KVM_CAP_X2APIC_API:
4570 r = KVM_X2APIC_API_VALID_FLAGS;
4572 case KVM_CAP_NESTED_STATE:
4573 r = kvm_x86_ops.nested_ops->get_state ?
4574 kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
4576 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4577 r = kvm_x86_ops.enable_l2_tlb_flush != NULL;
4579 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4580 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
4582 case KVM_CAP_SMALLER_MAXPHYADDR:
4583 r = (int) allow_smaller_maxphyaddr;
4585 case KVM_CAP_STEAL_TIME:
4586 r = sched_info_on();
4588 case KVM_CAP_X86_BUS_LOCK_EXIT:
4589 if (kvm_caps.has_bus_lock_exit)
4590 r = KVM_BUS_LOCK_DETECTION_OFF |
4591 KVM_BUS_LOCK_DETECTION_EXIT;
4595 case KVM_CAP_XSAVE2: {
4596 u64 guest_perm = xstate_get_guest_group_perm();
4598 r = xstate_required_size(kvm_caps.supported_xcr0 & guest_perm, false);
4599 if (r < sizeof(struct kvm_xsave))
4600 r = sizeof(struct kvm_xsave);
4603 case KVM_CAP_PMU_CAPABILITY:
4604 r = enable_pmu ? KVM_CAP_PMU_VALID_MASK : 0;
4606 case KVM_CAP_DISABLE_QUIRKS2:
4607 r = KVM_X86_VALID_QUIRKS;
4609 case KVM_CAP_X86_NOTIFY_VMEXIT:
4610 r = kvm_caps.has_notify_vmexit;
4618 static inline void __user *kvm_get_attr_addr(struct kvm_device_attr *attr)
4620 void __user *uaddr = (void __user*)(unsigned long)attr->addr;
4622 if ((u64)(unsigned long)uaddr != attr->addr)
4623 return ERR_PTR_USR(-EFAULT);
4627 static int kvm_x86_dev_get_attr(struct kvm_device_attr *attr)
4629 u64 __user *uaddr = kvm_get_attr_addr(attr);
4635 return PTR_ERR(uaddr);
4637 switch (attr->attr) {
4638 case KVM_X86_XCOMP_GUEST_SUPP:
4639 if (put_user(kvm_caps.supported_xcr0, uaddr))
4648 static int kvm_x86_dev_has_attr(struct kvm_device_attr *attr)
4653 switch (attr->attr) {
4654 case KVM_X86_XCOMP_GUEST_SUPP:
4661 long kvm_arch_dev_ioctl(struct file *filp,
4662 unsigned int ioctl, unsigned long arg)
4664 void __user *argp = (void __user *)arg;
4668 case KVM_GET_MSR_INDEX_LIST: {
4669 struct kvm_msr_list __user *user_msr_list = argp;
4670 struct kvm_msr_list msr_list;
4674 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4677 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
4678 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4681 if (n < msr_list.nmsrs)
4684 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
4685 num_msrs_to_save * sizeof(u32)))
4687 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
4689 num_emulated_msrs * sizeof(u32)))
4694 case KVM_GET_SUPPORTED_CPUID:
4695 case KVM_GET_EMULATED_CPUID: {
4696 struct kvm_cpuid2 __user *cpuid_arg = argp;
4697 struct kvm_cpuid2 cpuid;
4700 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4703 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
4709 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4714 case KVM_X86_GET_MCE_CAP_SUPPORTED:
4716 if (copy_to_user(argp, &kvm_caps.supported_mce_cap,
4717 sizeof(kvm_caps.supported_mce_cap)))
4721 case KVM_GET_MSR_FEATURE_INDEX_LIST: {
4722 struct kvm_msr_list __user *user_msr_list = argp;
4723 struct kvm_msr_list msr_list;
4727 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4730 msr_list.nmsrs = num_msr_based_features;
4731 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4734 if (n < msr_list.nmsrs)
4737 if (copy_to_user(user_msr_list->indices, &msr_based_features,
4738 num_msr_based_features * sizeof(u32)))
4744 r = msr_io(NULL, argp, do_get_msr_feature, 1);
4746 case KVM_GET_SUPPORTED_HV_CPUID:
4747 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
4749 case KVM_GET_DEVICE_ATTR: {
4750 struct kvm_device_attr attr;
4752 if (copy_from_user(&attr, (void __user *)arg, sizeof(attr)))
4754 r = kvm_x86_dev_get_attr(&attr);
4757 case KVM_HAS_DEVICE_ATTR: {
4758 struct kvm_device_attr attr;
4760 if (copy_from_user(&attr, (void __user *)arg, sizeof(attr)))
4762 r = kvm_x86_dev_has_attr(&attr);
4773 static void wbinvd_ipi(void *garbage)
4778 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
4780 return kvm_arch_has_noncoherent_dma(vcpu->kvm);
4783 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
4785 /* Address WBINVD may be executed by guest */
4786 if (need_emulate_wbinvd(vcpu)) {
4787 if (static_call(kvm_x86_has_wbinvd_exit)())
4788 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4789 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
4790 smp_call_function_single(vcpu->cpu,
4791 wbinvd_ipi, NULL, 1);
4794 static_call(kvm_x86_vcpu_load)(vcpu, cpu);
4796 /* Save host pkru register if supported */
4797 vcpu->arch.host_pkru = read_pkru();
4799 /* Apply any externally detected TSC adjustments (due to suspend) */
4800 if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
4801 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
4802 vcpu->arch.tsc_offset_adjustment = 0;
4803 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4806 if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
4807 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
4808 rdtsc() - vcpu->arch.last_host_tsc;
4810 mark_tsc_unstable("KVM discovered backwards TSC");
4812 if (kvm_check_tsc_unstable()) {
4813 u64 offset = kvm_compute_l1_tsc_offset(vcpu,
4814 vcpu->arch.last_guest_tsc);
4815 kvm_vcpu_write_tsc_offset(vcpu, offset);
4816 vcpu->arch.tsc_catchup = 1;
4819 if (kvm_lapic_hv_timer_in_use(vcpu))
4820 kvm_lapic_restart_hv_timer(vcpu);
4823 * On a host with synchronized TSC, there is no need to update
4824 * kvmclock on vcpu->cpu migration
4826 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4827 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4828 if (vcpu->cpu != cpu)
4829 kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4833 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4836 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4838 struct gfn_to_hva_cache *ghc = &vcpu->arch.st.cache;
4839 struct kvm_steal_time __user *st;
4840 struct kvm_memslots *slots;
4841 static const u8 preempted = KVM_VCPU_PREEMPTED;
4842 gpa_t gpa = vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS;
4845 * The vCPU can be marked preempted if and only if the VM-Exit was on
4846 * an instruction boundary and will not trigger guest emulation of any
4847 * kind (see vcpu_run). Vendor specific code controls (conservatively)
4848 * when this is true, for example allowing the vCPU to be marked
4849 * preempted if and only if the VM-Exit was due to a host interrupt.
4851 if (!vcpu->arch.at_instruction_boundary) {
4852 vcpu->stat.preemption_other++;
4856 vcpu->stat.preemption_reported++;
4857 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4860 if (vcpu->arch.st.preempted)
4863 /* This happens on process exit */
4864 if (unlikely(current->mm != vcpu->kvm->mm))
4867 slots = kvm_memslots(vcpu->kvm);
4869 if (unlikely(slots->generation != ghc->generation ||
4871 kvm_is_error_hva(ghc->hva) || !ghc->memslot))
4874 st = (struct kvm_steal_time __user *)ghc->hva;
4875 BUILD_BUG_ON(sizeof(st->preempted) != sizeof(preempted));
4877 if (!copy_to_user_nofault(&st->preempted, &preempted, sizeof(preempted)))
4878 vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4880 mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
4883 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4887 if (vcpu->preempted) {
4888 if (!vcpu->arch.guest_state_protected)
4889 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4892 * Take the srcu lock as memslots will be accessed to check the gfn
4893 * cache generation against the memslots generation.
4895 idx = srcu_read_lock(&vcpu->kvm->srcu);
4896 if (kvm_xen_msr_enabled(vcpu->kvm))
4897 kvm_xen_runstate_set_preempted(vcpu);
4899 kvm_steal_time_set_preempted(vcpu);
4900 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4903 static_call(kvm_x86_vcpu_put)(vcpu);
4904 vcpu->arch.last_host_tsc = rdtsc();
4907 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4908 struct kvm_lapic_state *s)
4910 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
4912 return kvm_apic_get_state(vcpu, s);
4915 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4916 struct kvm_lapic_state *s)
4920 r = kvm_apic_set_state(vcpu, s);
4923 update_cr8_intercept(vcpu);
4928 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4931 * We can accept userspace's request for interrupt injection
4932 * as long as we have a place to store the interrupt number.
4933 * The actual injection will happen when the CPU is able to
4934 * deliver the interrupt.
4936 if (kvm_cpu_has_extint(vcpu))
4939 /* Acknowledging ExtINT does not happen if LINT0 is masked. */
4940 return (!lapic_in_kernel(vcpu) ||
4941 kvm_apic_accept_pic_intr(vcpu));
4944 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4947 * Do not cause an interrupt window exit if an exception
4948 * is pending or an event needs reinjection; userspace
4949 * might want to inject the interrupt manually using KVM_SET_REGS
4950 * or KVM_SET_SREGS. For that to work, we must be at an
4951 * instruction boundary and with no events half-injected.
4953 return (kvm_arch_interrupt_allowed(vcpu) &&
4954 kvm_cpu_accept_dm_intr(vcpu) &&
4955 !kvm_event_needs_reinjection(vcpu) &&
4956 !kvm_is_exception_pending(vcpu));
4959 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4960 struct kvm_interrupt *irq)
4962 if (irq->irq >= KVM_NR_INTERRUPTS)
4965 if (!irqchip_in_kernel(vcpu->kvm)) {
4966 kvm_queue_interrupt(vcpu, irq->irq, false);
4967 kvm_make_request(KVM_REQ_EVENT, vcpu);
4972 * With in-kernel LAPIC, we only use this to inject EXTINT, so
4973 * fail for in-kernel 8259.
4975 if (pic_in_kernel(vcpu->kvm))
4978 if (vcpu->arch.pending_external_vector != -1)
4981 vcpu->arch.pending_external_vector = irq->irq;
4982 kvm_make_request(KVM_REQ_EVENT, vcpu);
4986 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4988 kvm_inject_nmi(vcpu);
4993 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4994 struct kvm_tpr_access_ctl *tac)
4998 vcpu->arch.tpr_access_reporting = !!tac->enabled;
5002 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
5006 unsigned bank_num = mcg_cap & 0xff, bank;
5009 if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
5011 if (mcg_cap & ~(kvm_caps.supported_mce_cap | 0xff | 0xff0000))
5014 vcpu->arch.mcg_cap = mcg_cap;
5015 /* Init IA32_MCG_CTL to all 1s */
5016 if (mcg_cap & MCG_CTL_P)
5017 vcpu->arch.mcg_ctl = ~(u64)0;
5018 /* Init IA32_MCi_CTL to all 1s, IA32_MCi_CTL2 to all 0s */
5019 for (bank = 0; bank < bank_num; bank++) {
5020 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
5021 if (mcg_cap & MCG_CMCI_P)
5022 vcpu->arch.mci_ctl2_banks[bank] = 0;
5025 kvm_apic_after_set_mcg_cap(vcpu);
5027 static_call(kvm_x86_setup_mce)(vcpu);
5033 * Validate this is an UCNA (uncorrectable no action) error by checking the
5034 * MCG_STATUS and MCi_STATUS registers:
5035 * - none of the bits for Machine Check Exceptions are set
5036 * - both the VAL (valid) and UC (uncorrectable) bits are set
5037 * MCI_STATUS_PCC - Processor Context Corrupted
5038 * MCI_STATUS_S - Signaled as a Machine Check Exception
5039 * MCI_STATUS_AR - Software recoverable Action Required
5041 static bool is_ucna(struct kvm_x86_mce *mce)
5043 return !mce->mcg_status &&
5044 !(mce->status & (MCI_STATUS_PCC | MCI_STATUS_S | MCI_STATUS_AR)) &&
5045 (mce->status & MCI_STATUS_VAL) &&
5046 (mce->status & MCI_STATUS_UC);
5049 static int kvm_vcpu_x86_set_ucna(struct kvm_vcpu *vcpu, struct kvm_x86_mce *mce, u64* banks)
5051 u64 mcg_cap = vcpu->arch.mcg_cap;
5053 banks[1] = mce->status;
5054 banks[2] = mce->addr;
5055 banks[3] = mce->misc;
5056 vcpu->arch.mcg_status = mce->mcg_status;
5058 if (!(mcg_cap & MCG_CMCI_P) ||
5059 !(vcpu->arch.mci_ctl2_banks[mce->bank] & MCI_CTL2_CMCI_EN))
5062 if (lapic_in_kernel(vcpu))
5063 kvm_apic_local_deliver(vcpu->arch.apic, APIC_LVTCMCI);
5068 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
5069 struct kvm_x86_mce *mce)
5071 u64 mcg_cap = vcpu->arch.mcg_cap;
5072 unsigned bank_num = mcg_cap & 0xff;
5073 u64 *banks = vcpu->arch.mce_banks;
5075 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
5078 banks += array_index_nospec(4 * mce->bank, 4 * bank_num);
5081 return kvm_vcpu_x86_set_ucna(vcpu, mce, banks);
5084 * if IA32_MCG_CTL is not all 1s, the uncorrected error
5085 * reporting is disabled
5087 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
5088 vcpu->arch.mcg_ctl != ~(u64)0)
5091 * if IA32_MCi_CTL is not all 1s, the uncorrected error
5092 * reporting is disabled for the bank
5094 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
5096 if (mce->status & MCI_STATUS_UC) {
5097 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
5098 !kvm_is_cr4_bit_set(vcpu, X86_CR4_MCE)) {
5099 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
5102 if (banks[1] & MCI_STATUS_VAL)
5103 mce->status |= MCI_STATUS_OVER;
5104 banks[2] = mce->addr;
5105 banks[3] = mce->misc;
5106 vcpu->arch.mcg_status = mce->mcg_status;
5107 banks[1] = mce->status;
5108 kvm_queue_exception(vcpu, MC_VECTOR);
5109 } else if (!(banks[1] & MCI_STATUS_VAL)
5110 || !(banks[1] & MCI_STATUS_UC)) {
5111 if (banks[1] & MCI_STATUS_VAL)
5112 mce->status |= MCI_STATUS_OVER;
5113 banks[2] = mce->addr;
5114 banks[3] = mce->misc;
5115 banks[1] = mce->status;
5117 banks[1] |= MCI_STATUS_OVER;
5121 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
5122 struct kvm_vcpu_events *events)
5124 struct kvm_queued_exception *ex;
5128 #ifdef CONFIG_KVM_SMM
5129 if (kvm_check_request(KVM_REQ_SMI, vcpu))
5134 * KVM's ABI only allows for one exception to be migrated. Luckily,
5135 * the only time there can be two queued exceptions is if there's a
5136 * non-exiting _injected_ exception, and a pending exiting exception.
5137 * In that case, ignore the VM-Exiting exception as it's an extension
5138 * of the injected exception.
5140 if (vcpu->arch.exception_vmexit.pending &&
5141 !vcpu->arch.exception.pending &&
5142 !vcpu->arch.exception.injected)
5143 ex = &vcpu->arch.exception_vmexit;
5145 ex = &vcpu->arch.exception;
5148 * In guest mode, payload delivery should be deferred if the exception
5149 * will be intercepted by L1, e.g. KVM should not modifying CR2 if L1
5150 * intercepts #PF, ditto for DR6 and #DBs. If the per-VM capability,
5151 * KVM_CAP_EXCEPTION_PAYLOAD, is not set, userspace may or may not
5152 * propagate the payload and so it cannot be safely deferred. Deliver
5153 * the payload if the capability hasn't been requested.
5155 if (!vcpu->kvm->arch.exception_payload_enabled &&
5156 ex->pending && ex->has_payload)
5157 kvm_deliver_exception_payload(vcpu, ex);
5159 memset(events, 0, sizeof(*events));
5162 * The API doesn't provide the instruction length for software
5163 * exceptions, so don't report them. As long as the guest RIP
5164 * isn't advanced, we should expect to encounter the exception
5167 if (!kvm_exception_is_soft(ex->vector)) {
5168 events->exception.injected = ex->injected;
5169 events->exception.pending = ex->pending;
5171 * For ABI compatibility, deliberately conflate
5172 * pending and injected exceptions when
5173 * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
5175 if (!vcpu->kvm->arch.exception_payload_enabled)
5176 events->exception.injected |= ex->pending;
5178 events->exception.nr = ex->vector;
5179 events->exception.has_error_code = ex->has_error_code;
5180 events->exception.error_code = ex->error_code;
5181 events->exception_has_payload = ex->has_payload;
5182 events->exception_payload = ex->payload;
5184 events->interrupt.injected =
5185 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
5186 events->interrupt.nr = vcpu->arch.interrupt.nr;
5187 events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
5189 events->nmi.injected = vcpu->arch.nmi_injected;
5190 events->nmi.pending = vcpu->arch.nmi_pending != 0;
5191 events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
5193 /* events->sipi_vector is never valid when reporting to user space */
5195 #ifdef CONFIG_KVM_SMM
5196 events->smi.smm = is_smm(vcpu);
5197 events->smi.pending = vcpu->arch.smi_pending;
5198 events->smi.smm_inside_nmi =
5199 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
5201 events->smi.latched_init = kvm_lapic_latched_init(vcpu);
5203 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
5204 | KVM_VCPUEVENT_VALID_SHADOW
5205 | KVM_VCPUEVENT_VALID_SMM);
5206 if (vcpu->kvm->arch.exception_payload_enabled)
5207 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
5208 if (vcpu->kvm->arch.triple_fault_event) {
5209 events->triple_fault.pending = kvm_test_request(KVM_REQ_TRIPLE_FAULT, vcpu);
5210 events->flags |= KVM_VCPUEVENT_VALID_TRIPLE_FAULT;
5214 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
5215 struct kvm_vcpu_events *events)
5217 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
5218 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
5219 | KVM_VCPUEVENT_VALID_SHADOW
5220 | KVM_VCPUEVENT_VALID_SMM
5221 | KVM_VCPUEVENT_VALID_PAYLOAD
5222 | KVM_VCPUEVENT_VALID_TRIPLE_FAULT))
5225 if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
5226 if (!vcpu->kvm->arch.exception_payload_enabled)
5228 if (events->exception.pending)
5229 events->exception.injected = 0;
5231 events->exception_has_payload = 0;
5233 events->exception.pending = 0;
5234 events->exception_has_payload = 0;
5237 if ((events->exception.injected || events->exception.pending) &&
5238 (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
5241 /* INITs are latched while in SMM */
5242 if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
5243 (events->smi.smm || events->smi.pending) &&
5244 vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
5250 * Flag that userspace is stuffing an exception, the next KVM_RUN will
5251 * morph the exception to a VM-Exit if appropriate. Do this only for
5252 * pending exceptions, already-injected exceptions are not subject to
5253 * intercpetion. Note, userspace that conflates pending and injected
5254 * is hosed, and will incorrectly convert an injected exception into a
5255 * pending exception, which in turn may cause a spurious VM-Exit.
5257 vcpu->arch.exception_from_userspace = events->exception.pending;
5259 vcpu->arch.exception_vmexit.pending = false;
5261 vcpu->arch.exception.injected = events->exception.injected;
5262 vcpu->arch.exception.pending = events->exception.pending;
5263 vcpu->arch.exception.vector = events->exception.nr;
5264 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
5265 vcpu->arch.exception.error_code = events->exception.error_code;
5266 vcpu->arch.exception.has_payload = events->exception_has_payload;
5267 vcpu->arch.exception.payload = events->exception_payload;
5269 vcpu->arch.interrupt.injected = events->interrupt.injected;
5270 vcpu->arch.interrupt.nr = events->interrupt.nr;
5271 vcpu->arch.interrupt.soft = events->interrupt.soft;
5272 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
5273 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
5274 events->interrupt.shadow);
5276 vcpu->arch.nmi_injected = events->nmi.injected;
5277 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
5278 vcpu->arch.nmi_pending = events->nmi.pending;
5279 static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
5281 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
5282 lapic_in_kernel(vcpu))
5283 vcpu->arch.apic->sipi_vector = events->sipi_vector;
5285 if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
5286 #ifdef CONFIG_KVM_SMM
5287 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
5288 kvm_leave_nested(vcpu);
5289 kvm_smm_changed(vcpu, events->smi.smm);
5292 vcpu->arch.smi_pending = events->smi.pending;
5294 if (events->smi.smm) {
5295 if (events->smi.smm_inside_nmi)
5296 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
5298 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
5302 if (events->smi.smm || events->smi.pending ||
5303 events->smi.smm_inside_nmi)
5307 if (lapic_in_kernel(vcpu)) {
5308 if (events->smi.latched_init)
5309 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
5311 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
5315 if (events->flags & KVM_VCPUEVENT_VALID_TRIPLE_FAULT) {
5316 if (!vcpu->kvm->arch.triple_fault_event)
5318 if (events->triple_fault.pending)
5319 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
5321 kvm_clear_request(KVM_REQ_TRIPLE_FAULT, vcpu);
5324 kvm_make_request(KVM_REQ_EVENT, vcpu);
5329 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
5330 struct kvm_debugregs *dbgregs)
5334 memset(dbgregs, 0, sizeof(*dbgregs));
5335 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
5336 kvm_get_dr(vcpu, 6, &val);
5338 dbgregs->dr7 = vcpu->arch.dr7;
5341 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
5342 struct kvm_debugregs *dbgregs)
5347 if (!kvm_dr6_valid(dbgregs->dr6))
5349 if (!kvm_dr7_valid(dbgregs->dr7))
5352 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
5353 kvm_update_dr0123(vcpu);
5354 vcpu->arch.dr6 = dbgregs->dr6;
5355 vcpu->arch.dr7 = dbgregs->dr7;
5356 kvm_update_dr7(vcpu);
5361 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
5362 struct kvm_xsave *guest_xsave)
5364 if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
5367 fpu_copy_guest_fpstate_to_uabi(&vcpu->arch.guest_fpu,
5368 guest_xsave->region,
5369 sizeof(guest_xsave->region),
5373 static void kvm_vcpu_ioctl_x86_get_xsave2(struct kvm_vcpu *vcpu,
5374 u8 *state, unsigned int size)
5376 if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
5379 fpu_copy_guest_fpstate_to_uabi(&vcpu->arch.guest_fpu,
5380 state, size, vcpu->arch.pkru);
5383 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
5384 struct kvm_xsave *guest_xsave)
5386 if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
5389 return fpu_copy_uabi_to_guest_fpstate(&vcpu->arch.guest_fpu,
5390 guest_xsave->region,
5391 kvm_caps.supported_xcr0,
5395 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
5396 struct kvm_xcrs *guest_xcrs)
5398 if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
5399 guest_xcrs->nr_xcrs = 0;
5403 guest_xcrs->nr_xcrs = 1;
5404 guest_xcrs->flags = 0;
5405 guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
5406 guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
5409 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
5410 struct kvm_xcrs *guest_xcrs)
5414 if (!boot_cpu_has(X86_FEATURE_XSAVE))
5417 if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
5420 for (i = 0; i < guest_xcrs->nr_xcrs; i++)
5421 /* Only support XCR0 currently */
5422 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
5423 r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
5424 guest_xcrs->xcrs[i].value);
5433 * kvm_set_guest_paused() indicates to the guest kernel that it has been
5434 * stopped by the hypervisor. This function will be called from the host only.
5435 * EINVAL is returned when the host attempts to set the flag for a guest that
5436 * does not support pv clocks.
5438 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
5440 if (!vcpu->arch.pv_time.active)
5442 vcpu->arch.pvclock_set_guest_stopped_request = true;
5443 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5447 static int kvm_arch_tsc_has_attr(struct kvm_vcpu *vcpu,
5448 struct kvm_device_attr *attr)
5452 switch (attr->attr) {
5453 case KVM_VCPU_TSC_OFFSET:
5463 static int kvm_arch_tsc_get_attr(struct kvm_vcpu *vcpu,
5464 struct kvm_device_attr *attr)
5466 u64 __user *uaddr = kvm_get_attr_addr(attr);
5470 return PTR_ERR(uaddr);
5472 switch (attr->attr) {
5473 case KVM_VCPU_TSC_OFFSET:
5475 if (put_user(vcpu->arch.l1_tsc_offset, uaddr))
5486 static int kvm_arch_tsc_set_attr(struct kvm_vcpu *vcpu,
5487 struct kvm_device_attr *attr)
5489 u64 __user *uaddr = kvm_get_attr_addr(attr);
5490 struct kvm *kvm = vcpu->kvm;
5494 return PTR_ERR(uaddr);
5496 switch (attr->attr) {
5497 case KVM_VCPU_TSC_OFFSET: {
5498 u64 offset, tsc, ns;
5499 unsigned long flags;
5503 if (get_user(offset, uaddr))
5506 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
5508 matched = (vcpu->arch.virtual_tsc_khz &&
5509 kvm->arch.last_tsc_khz == vcpu->arch.virtual_tsc_khz &&
5510 kvm->arch.last_tsc_offset == offset);
5512 tsc = kvm_scale_tsc(rdtsc(), vcpu->arch.l1_tsc_scaling_ratio) + offset;
5513 ns = get_kvmclock_base_ns();
5515 __kvm_synchronize_tsc(vcpu, offset, tsc, ns, matched);
5516 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
5528 static int kvm_vcpu_ioctl_device_attr(struct kvm_vcpu *vcpu,
5532 struct kvm_device_attr attr;
5535 if (copy_from_user(&attr, argp, sizeof(attr)))
5538 if (attr.group != KVM_VCPU_TSC_CTRL)
5542 case KVM_HAS_DEVICE_ATTR:
5543 r = kvm_arch_tsc_has_attr(vcpu, &attr);
5545 case KVM_GET_DEVICE_ATTR:
5546 r = kvm_arch_tsc_get_attr(vcpu, &attr);
5548 case KVM_SET_DEVICE_ATTR:
5549 r = kvm_arch_tsc_set_attr(vcpu, &attr);
5556 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
5557 struct kvm_enable_cap *cap)
5560 uint16_t vmcs_version;
5561 void __user *user_ptr;
5567 case KVM_CAP_HYPERV_SYNIC2:
5572 case KVM_CAP_HYPERV_SYNIC:
5573 if (!irqchip_in_kernel(vcpu->kvm))
5575 return kvm_hv_activate_synic(vcpu, cap->cap ==
5576 KVM_CAP_HYPERV_SYNIC2);
5577 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
5578 if (!kvm_x86_ops.nested_ops->enable_evmcs)
5580 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
5582 user_ptr = (void __user *)(uintptr_t)cap->args[0];
5583 if (copy_to_user(user_ptr, &vmcs_version,
5584 sizeof(vmcs_version)))
5588 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
5589 if (!kvm_x86_ops.enable_l2_tlb_flush)
5592 return static_call(kvm_x86_enable_l2_tlb_flush)(vcpu);
5594 case KVM_CAP_HYPERV_ENFORCE_CPUID:
5595 return kvm_hv_set_enforce_cpuid(vcpu, cap->args[0]);
5597 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
5598 vcpu->arch.pv_cpuid.enforce = cap->args[0];
5599 if (vcpu->arch.pv_cpuid.enforce)
5600 kvm_update_pv_runtime(vcpu);
5608 long kvm_arch_vcpu_ioctl(struct file *filp,
5609 unsigned int ioctl, unsigned long arg)
5611 struct kvm_vcpu *vcpu = filp->private_data;
5612 void __user *argp = (void __user *)arg;
5615 struct kvm_sregs2 *sregs2;
5616 struct kvm_lapic_state *lapic;
5617 struct kvm_xsave *xsave;
5618 struct kvm_xcrs *xcrs;
5626 case KVM_GET_LAPIC: {
5628 if (!lapic_in_kernel(vcpu))
5630 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
5631 GFP_KERNEL_ACCOUNT);
5636 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
5640 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
5645 case KVM_SET_LAPIC: {
5647 if (!lapic_in_kernel(vcpu))
5649 u.lapic = memdup_user(argp, sizeof(*u.lapic));
5650 if (IS_ERR(u.lapic)) {
5651 r = PTR_ERR(u.lapic);
5655 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
5658 case KVM_INTERRUPT: {
5659 struct kvm_interrupt irq;
5662 if (copy_from_user(&irq, argp, sizeof(irq)))
5664 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
5668 r = kvm_vcpu_ioctl_nmi(vcpu);
5672 r = kvm_inject_smi(vcpu);
5675 case KVM_SET_CPUID: {
5676 struct kvm_cpuid __user *cpuid_arg = argp;
5677 struct kvm_cpuid cpuid;
5680 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5682 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
5685 case KVM_SET_CPUID2: {
5686 struct kvm_cpuid2 __user *cpuid_arg = argp;
5687 struct kvm_cpuid2 cpuid;
5690 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5692 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
5693 cpuid_arg->entries);
5696 case KVM_GET_CPUID2: {
5697 struct kvm_cpuid2 __user *cpuid_arg = argp;
5698 struct kvm_cpuid2 cpuid;
5701 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5703 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
5704 cpuid_arg->entries);
5708 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
5713 case KVM_GET_MSRS: {
5714 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5715 r = msr_io(vcpu, argp, do_get_msr, 1);
5716 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5719 case KVM_SET_MSRS: {
5720 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5721 r = msr_io(vcpu, argp, do_set_msr, 0);
5722 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5725 case KVM_TPR_ACCESS_REPORTING: {
5726 struct kvm_tpr_access_ctl tac;
5729 if (copy_from_user(&tac, argp, sizeof(tac)))
5731 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
5735 if (copy_to_user(argp, &tac, sizeof(tac)))
5740 case KVM_SET_VAPIC_ADDR: {
5741 struct kvm_vapic_addr va;
5745 if (!lapic_in_kernel(vcpu))
5748 if (copy_from_user(&va, argp, sizeof(va)))
5750 idx = srcu_read_lock(&vcpu->kvm->srcu);
5751 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
5752 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5755 case KVM_X86_SETUP_MCE: {
5759 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
5761 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
5764 case KVM_X86_SET_MCE: {
5765 struct kvm_x86_mce mce;
5768 if (copy_from_user(&mce, argp, sizeof(mce)))
5770 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
5773 case KVM_GET_VCPU_EVENTS: {
5774 struct kvm_vcpu_events events;
5776 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
5779 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
5784 case KVM_SET_VCPU_EVENTS: {
5785 struct kvm_vcpu_events events;
5788 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
5791 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
5794 case KVM_GET_DEBUGREGS: {
5795 struct kvm_debugregs dbgregs;
5797 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
5800 if (copy_to_user(argp, &dbgregs,
5801 sizeof(struct kvm_debugregs)))
5806 case KVM_SET_DEBUGREGS: {
5807 struct kvm_debugregs dbgregs;
5810 if (copy_from_user(&dbgregs, argp,
5811 sizeof(struct kvm_debugregs)))
5814 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
5817 case KVM_GET_XSAVE: {
5819 if (vcpu->arch.guest_fpu.uabi_size > sizeof(struct kvm_xsave))
5822 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
5827 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
5830 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
5835 case KVM_SET_XSAVE: {
5836 int size = vcpu->arch.guest_fpu.uabi_size;
5838 u.xsave = memdup_user(argp, size);
5839 if (IS_ERR(u.xsave)) {
5840 r = PTR_ERR(u.xsave);
5844 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
5848 case KVM_GET_XSAVE2: {
5849 int size = vcpu->arch.guest_fpu.uabi_size;
5851 u.xsave = kzalloc(size, GFP_KERNEL_ACCOUNT);
5856 kvm_vcpu_ioctl_x86_get_xsave2(vcpu, u.buffer, size);
5859 if (copy_to_user(argp, u.xsave, size))
5866 case KVM_GET_XCRS: {
5867 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
5872 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
5875 if (copy_to_user(argp, u.xcrs,
5876 sizeof(struct kvm_xcrs)))
5881 case KVM_SET_XCRS: {
5882 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
5883 if (IS_ERR(u.xcrs)) {
5884 r = PTR_ERR(u.xcrs);
5888 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
5891 case KVM_SET_TSC_KHZ: {
5895 user_tsc_khz = (u32)arg;
5897 if (kvm_caps.has_tsc_control &&
5898 user_tsc_khz >= kvm_caps.max_guest_tsc_khz)
5901 if (user_tsc_khz == 0)
5902 user_tsc_khz = tsc_khz;
5904 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
5909 case KVM_GET_TSC_KHZ: {
5910 r = vcpu->arch.virtual_tsc_khz;
5913 case KVM_KVMCLOCK_CTRL: {
5914 r = kvm_set_guest_paused(vcpu);
5917 case KVM_ENABLE_CAP: {
5918 struct kvm_enable_cap cap;
5921 if (copy_from_user(&cap, argp, sizeof(cap)))
5923 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
5926 case KVM_GET_NESTED_STATE: {
5927 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5931 if (!kvm_x86_ops.nested_ops->get_state)
5934 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
5936 if (get_user(user_data_size, &user_kvm_nested_state->size))
5939 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
5944 if (r > user_data_size) {
5945 if (put_user(r, &user_kvm_nested_state->size))
5955 case KVM_SET_NESTED_STATE: {
5956 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5957 struct kvm_nested_state kvm_state;
5961 if (!kvm_x86_ops.nested_ops->set_state)
5965 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5969 if (kvm_state.size < sizeof(kvm_state))
5972 if (kvm_state.flags &
5973 ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5974 | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5975 | KVM_STATE_NESTED_GIF_SET))
5978 /* nested_run_pending implies guest_mode. */
5979 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5980 && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5983 idx = srcu_read_lock(&vcpu->kvm->srcu);
5984 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5985 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5988 case KVM_GET_SUPPORTED_HV_CPUID:
5989 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5991 #ifdef CONFIG_KVM_XEN
5992 case KVM_XEN_VCPU_GET_ATTR: {
5993 struct kvm_xen_vcpu_attr xva;
5996 if (copy_from_user(&xva, argp, sizeof(xva)))
5998 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5999 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
6003 case KVM_XEN_VCPU_SET_ATTR: {
6004 struct kvm_xen_vcpu_attr xva;
6007 if (copy_from_user(&xva, argp, sizeof(xva)))
6009 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
6013 case KVM_GET_SREGS2: {
6014 u.sregs2 = kzalloc(sizeof(struct kvm_sregs2), GFP_KERNEL);
6018 __get_sregs2(vcpu, u.sregs2);
6020 if (copy_to_user(argp, u.sregs2, sizeof(struct kvm_sregs2)))
6025 case KVM_SET_SREGS2: {
6026 u.sregs2 = memdup_user(argp, sizeof(struct kvm_sregs2));
6027 if (IS_ERR(u.sregs2)) {
6028 r = PTR_ERR(u.sregs2);
6032 r = __set_sregs2(vcpu, u.sregs2);
6035 case KVM_HAS_DEVICE_ATTR:
6036 case KVM_GET_DEVICE_ATTR:
6037 case KVM_SET_DEVICE_ATTR:
6038 r = kvm_vcpu_ioctl_device_attr(vcpu, ioctl, argp);
6050 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
6052 return VM_FAULT_SIGBUS;
6055 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
6059 if (addr > (unsigned int)(-3 * PAGE_SIZE))
6061 ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
6065 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
6068 return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
6071 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
6072 unsigned long kvm_nr_mmu_pages)
6074 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
6077 mutex_lock(&kvm->slots_lock);
6079 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
6080 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
6082 mutex_unlock(&kvm->slots_lock);
6086 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
6088 struct kvm_pic *pic = kvm->arch.vpic;
6092 switch (chip->chip_id) {
6093 case KVM_IRQCHIP_PIC_MASTER:
6094 memcpy(&chip->chip.pic, &pic->pics[0],
6095 sizeof(struct kvm_pic_state));
6097 case KVM_IRQCHIP_PIC_SLAVE:
6098 memcpy(&chip->chip.pic, &pic->pics[1],
6099 sizeof(struct kvm_pic_state));
6101 case KVM_IRQCHIP_IOAPIC:
6102 kvm_get_ioapic(kvm, &chip->chip.ioapic);
6111 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
6113 struct kvm_pic *pic = kvm->arch.vpic;
6117 switch (chip->chip_id) {
6118 case KVM_IRQCHIP_PIC_MASTER:
6119 spin_lock(&pic->lock);
6120 memcpy(&pic->pics[0], &chip->chip.pic,
6121 sizeof(struct kvm_pic_state));
6122 spin_unlock(&pic->lock);
6124 case KVM_IRQCHIP_PIC_SLAVE:
6125 spin_lock(&pic->lock);
6126 memcpy(&pic->pics[1], &chip->chip.pic,
6127 sizeof(struct kvm_pic_state));
6128 spin_unlock(&pic->lock);
6130 case KVM_IRQCHIP_IOAPIC:
6131 kvm_set_ioapic(kvm, &chip->chip.ioapic);
6137 kvm_pic_update_irq(pic);
6141 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
6143 struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
6145 BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
6147 mutex_lock(&kps->lock);
6148 memcpy(ps, &kps->channels, sizeof(*ps));
6149 mutex_unlock(&kps->lock);
6153 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
6156 struct kvm_pit *pit = kvm->arch.vpit;
6158 mutex_lock(&pit->pit_state.lock);
6159 memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
6160 for (i = 0; i < 3; i++)
6161 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
6162 mutex_unlock(&pit->pit_state.lock);
6166 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
6168 mutex_lock(&kvm->arch.vpit->pit_state.lock);
6169 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
6170 sizeof(ps->channels));
6171 ps->flags = kvm->arch.vpit->pit_state.flags;
6172 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
6173 memset(&ps->reserved, 0, sizeof(ps->reserved));
6177 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
6181 u32 prev_legacy, cur_legacy;
6182 struct kvm_pit *pit = kvm->arch.vpit;
6184 mutex_lock(&pit->pit_state.lock);
6185 prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
6186 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
6187 if (!prev_legacy && cur_legacy)
6189 memcpy(&pit->pit_state.channels, &ps->channels,
6190 sizeof(pit->pit_state.channels));
6191 pit->pit_state.flags = ps->flags;
6192 for (i = 0; i < 3; i++)
6193 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
6195 mutex_unlock(&pit->pit_state.lock);
6199 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
6200 struct kvm_reinject_control *control)
6202 struct kvm_pit *pit = kvm->arch.vpit;
6204 /* pit->pit_state.lock was overloaded to prevent userspace from getting
6205 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
6206 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
6208 mutex_lock(&pit->pit_state.lock);
6209 kvm_pit_set_reinject(pit, control->pit_reinject);
6210 mutex_unlock(&pit->pit_state.lock);
6215 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
6219 * Flush all CPUs' dirty log buffers to the dirty_bitmap. Called
6220 * before reporting dirty_bitmap to userspace. KVM flushes the buffers
6221 * on all VM-Exits, thus we only need to kick running vCPUs to force a
6224 struct kvm_vcpu *vcpu;
6227 kvm_for_each_vcpu(i, vcpu, kvm)
6228 kvm_vcpu_kick(vcpu);
6231 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
6234 if (!irqchip_in_kernel(kvm))
6237 irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
6238 irq_event->irq, irq_event->level,
6243 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
6244 struct kvm_enable_cap *cap)
6252 case KVM_CAP_DISABLE_QUIRKS2:
6254 if (cap->args[0] & ~KVM_X86_VALID_QUIRKS)
6257 case KVM_CAP_DISABLE_QUIRKS:
6258 kvm->arch.disabled_quirks = cap->args[0];
6261 case KVM_CAP_SPLIT_IRQCHIP: {
6262 mutex_lock(&kvm->lock);
6264 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
6265 goto split_irqchip_unlock;
6267 if (irqchip_in_kernel(kvm))
6268 goto split_irqchip_unlock;
6269 if (kvm->created_vcpus)
6270 goto split_irqchip_unlock;
6271 r = kvm_setup_empty_irq_routing(kvm);
6273 goto split_irqchip_unlock;
6274 /* Pairs with irqchip_in_kernel. */
6276 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
6277 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
6278 kvm_clear_apicv_inhibit(kvm, APICV_INHIBIT_REASON_ABSENT);
6280 split_irqchip_unlock:
6281 mutex_unlock(&kvm->lock);
6284 case KVM_CAP_X2APIC_API:
6286 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
6289 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
6290 kvm->arch.x2apic_format = true;
6291 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
6292 kvm->arch.x2apic_broadcast_quirk_disabled = true;
6296 case KVM_CAP_X86_DISABLE_EXITS:
6298 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
6301 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
6302 kvm->arch.pause_in_guest = true;
6304 #define SMT_RSB_MSG "This processor is affected by the Cross-Thread Return Predictions vulnerability. " \
6305 "KVM_CAP_X86_DISABLE_EXITS should only be used with SMT disabled or trusted guests."
6307 if (!mitigate_smt_rsb) {
6308 if (boot_cpu_has_bug(X86_BUG_SMT_RSB) && cpu_smt_possible() &&
6309 (cap->args[0] & ~KVM_X86_DISABLE_EXITS_PAUSE))
6310 pr_warn_once(SMT_RSB_MSG);
6312 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
6313 kvm_can_mwait_in_guest())
6314 kvm->arch.mwait_in_guest = true;
6315 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
6316 kvm->arch.hlt_in_guest = true;
6317 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
6318 kvm->arch.cstate_in_guest = true;
6323 case KVM_CAP_MSR_PLATFORM_INFO:
6324 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
6327 case KVM_CAP_EXCEPTION_PAYLOAD:
6328 kvm->arch.exception_payload_enabled = cap->args[0];
6331 case KVM_CAP_X86_TRIPLE_FAULT_EVENT:
6332 kvm->arch.triple_fault_event = cap->args[0];
6335 case KVM_CAP_X86_USER_SPACE_MSR:
6337 if (cap->args[0] & ~KVM_MSR_EXIT_REASON_VALID_MASK)
6339 kvm->arch.user_space_msr_mask = cap->args[0];
6342 case KVM_CAP_X86_BUS_LOCK_EXIT:
6344 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
6347 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
6348 (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
6351 if (kvm_caps.has_bus_lock_exit &&
6352 cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
6353 kvm->arch.bus_lock_detection_enabled = true;
6356 #ifdef CONFIG_X86_SGX_KVM
6357 case KVM_CAP_SGX_ATTRIBUTE: {
6358 unsigned long allowed_attributes = 0;
6360 r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
6364 /* KVM only supports the PROVISIONKEY privileged attribute. */
6365 if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
6366 !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
6367 kvm->arch.sgx_provisioning_allowed = true;
6373 case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
6375 if (!kvm_x86_ops.vm_copy_enc_context_from)
6378 r = static_call(kvm_x86_vm_copy_enc_context_from)(kvm, cap->args[0]);
6380 case KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM:
6382 if (!kvm_x86_ops.vm_move_enc_context_from)
6385 r = static_call(kvm_x86_vm_move_enc_context_from)(kvm, cap->args[0]);
6387 case KVM_CAP_EXIT_HYPERCALL:
6388 if (cap->args[0] & ~KVM_EXIT_HYPERCALL_VALID_MASK) {
6392 kvm->arch.hypercall_exit_enabled = cap->args[0];
6395 case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
6397 if (cap->args[0] & ~1)
6399 kvm->arch.exit_on_emulation_error = cap->args[0];
6402 case KVM_CAP_PMU_CAPABILITY:
6404 if (!enable_pmu || (cap->args[0] & ~KVM_CAP_PMU_VALID_MASK))
6407 mutex_lock(&kvm->lock);
6408 if (!kvm->created_vcpus) {
6409 kvm->arch.enable_pmu = !(cap->args[0] & KVM_PMU_CAP_DISABLE);
6412 mutex_unlock(&kvm->lock);
6414 case KVM_CAP_MAX_VCPU_ID:
6416 if (cap->args[0] > KVM_MAX_VCPU_IDS)
6419 mutex_lock(&kvm->lock);
6420 if (kvm->arch.max_vcpu_ids == cap->args[0]) {
6422 } else if (!kvm->arch.max_vcpu_ids) {
6423 kvm->arch.max_vcpu_ids = cap->args[0];
6426 mutex_unlock(&kvm->lock);
6428 case KVM_CAP_X86_NOTIFY_VMEXIT:
6430 if ((u32)cap->args[0] & ~KVM_X86_NOTIFY_VMEXIT_VALID_BITS)
6432 if (!kvm_caps.has_notify_vmexit)
6434 if (!((u32)cap->args[0] & KVM_X86_NOTIFY_VMEXIT_ENABLED))
6436 mutex_lock(&kvm->lock);
6437 if (!kvm->created_vcpus) {
6438 kvm->arch.notify_window = cap->args[0] >> 32;
6439 kvm->arch.notify_vmexit_flags = (u32)cap->args[0];
6442 mutex_unlock(&kvm->lock);
6444 case KVM_CAP_VM_DISABLE_NX_HUGE_PAGES:
6448 * Since the risk of disabling NX hugepages is a guest crashing
6449 * the system, ensure the userspace process has permission to
6450 * reboot the system.
6452 * Note that unlike the reboot() syscall, the process must have
6453 * this capability in the root namespace because exposing
6454 * /dev/kvm into a container does not limit the scope of the
6455 * iTLB multihit bug to that container. In other words,
6456 * this must use capable(), not ns_capable().
6458 if (!capable(CAP_SYS_BOOT)) {
6466 mutex_lock(&kvm->lock);
6467 if (!kvm->created_vcpus) {
6468 kvm->arch.disable_nx_huge_pages = true;
6471 mutex_unlock(&kvm->lock);
6480 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
6482 struct kvm_x86_msr_filter *msr_filter;
6484 msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
6488 msr_filter->default_allow = default_allow;
6492 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
6499 for (i = 0; i < msr_filter->count; i++)
6500 kfree(msr_filter->ranges[i].bitmap);
6505 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
6506 struct kvm_msr_filter_range *user_range)
6508 unsigned long *bitmap = NULL;
6511 if (!user_range->nmsrs)
6514 if (user_range->flags & ~KVM_MSR_FILTER_RANGE_VALID_MASK)
6517 if (!user_range->flags)
6520 bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
6521 if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
6524 bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
6526 return PTR_ERR(bitmap);
6528 msr_filter->ranges[msr_filter->count] = (struct msr_bitmap_range) {
6529 .flags = user_range->flags,
6530 .base = user_range->base,
6531 .nmsrs = user_range->nmsrs,
6535 msr_filter->count++;
6539 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm,
6540 struct kvm_msr_filter *filter)
6542 struct kvm_x86_msr_filter *new_filter, *old_filter;
6548 if (filter->flags & ~KVM_MSR_FILTER_VALID_MASK)
6551 for (i = 0; i < ARRAY_SIZE(filter->ranges); i++)
6552 empty &= !filter->ranges[i].nmsrs;
6554 default_allow = !(filter->flags & KVM_MSR_FILTER_DEFAULT_DENY);
6555 if (empty && !default_allow)
6558 new_filter = kvm_alloc_msr_filter(default_allow);
6562 for (i = 0; i < ARRAY_SIZE(filter->ranges); i++) {
6563 r = kvm_add_msr_filter(new_filter, &filter->ranges[i]);
6565 kvm_free_msr_filter(new_filter);
6570 mutex_lock(&kvm->lock);
6571 old_filter = rcu_replace_pointer(kvm->arch.msr_filter, new_filter,
6572 mutex_is_locked(&kvm->lock));
6573 mutex_unlock(&kvm->lock);
6574 synchronize_srcu(&kvm->srcu);
6576 kvm_free_msr_filter(old_filter);
6578 kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
6583 #ifdef CONFIG_KVM_COMPAT
6584 /* for KVM_X86_SET_MSR_FILTER */
6585 struct kvm_msr_filter_range_compat {
6592 struct kvm_msr_filter_compat {
6594 struct kvm_msr_filter_range_compat ranges[KVM_MSR_FILTER_MAX_RANGES];
6597 #define KVM_X86_SET_MSR_FILTER_COMPAT _IOW(KVMIO, 0xc6, struct kvm_msr_filter_compat)
6599 long kvm_arch_vm_compat_ioctl(struct file *filp, unsigned int ioctl,
6602 void __user *argp = (void __user *)arg;
6603 struct kvm *kvm = filp->private_data;
6607 case KVM_X86_SET_MSR_FILTER_COMPAT: {
6608 struct kvm_msr_filter __user *user_msr_filter = argp;
6609 struct kvm_msr_filter_compat filter_compat;
6610 struct kvm_msr_filter filter;
6613 if (copy_from_user(&filter_compat, user_msr_filter,
6614 sizeof(filter_compat)))
6617 filter.flags = filter_compat.flags;
6618 for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
6619 struct kvm_msr_filter_range_compat *cr;
6621 cr = &filter_compat.ranges[i];
6622 filter.ranges[i] = (struct kvm_msr_filter_range) {
6626 .bitmap = (__u8 *)(ulong)cr->bitmap,
6630 r = kvm_vm_ioctl_set_msr_filter(kvm, &filter);
6639 #ifdef CONFIG_HAVE_KVM_PM_NOTIFIER
6640 static int kvm_arch_suspend_notifier(struct kvm *kvm)
6642 struct kvm_vcpu *vcpu;
6646 mutex_lock(&kvm->lock);
6647 kvm_for_each_vcpu(i, vcpu, kvm) {
6648 if (!vcpu->arch.pv_time.active)
6651 ret = kvm_set_guest_paused(vcpu);
6653 kvm_err("Failed to pause guest VCPU%d: %d\n",
6654 vcpu->vcpu_id, ret);
6658 mutex_unlock(&kvm->lock);
6660 return ret ? NOTIFY_BAD : NOTIFY_DONE;
6663 int kvm_arch_pm_notifier(struct kvm *kvm, unsigned long state)
6666 case PM_HIBERNATION_PREPARE:
6667 case PM_SUSPEND_PREPARE:
6668 return kvm_arch_suspend_notifier(kvm);
6673 #endif /* CONFIG_HAVE_KVM_PM_NOTIFIER */
6675 static int kvm_vm_ioctl_get_clock(struct kvm *kvm, void __user *argp)
6677 struct kvm_clock_data data = { 0 };
6679 get_kvmclock(kvm, &data);
6680 if (copy_to_user(argp, &data, sizeof(data)))
6686 static int kvm_vm_ioctl_set_clock(struct kvm *kvm, void __user *argp)
6688 struct kvm_arch *ka = &kvm->arch;
6689 struct kvm_clock_data data;
6692 if (copy_from_user(&data, argp, sizeof(data)))
6696 * Only KVM_CLOCK_REALTIME is used, but allow passing the
6697 * result of KVM_GET_CLOCK back to KVM_SET_CLOCK.
6699 if (data.flags & ~KVM_CLOCK_VALID_FLAGS)
6702 kvm_hv_request_tsc_page_update(kvm);
6703 kvm_start_pvclock_update(kvm);
6704 pvclock_update_vm_gtod_copy(kvm);
6707 * This pairs with kvm_guest_time_update(): when masterclock is
6708 * in use, we use master_kernel_ns + kvmclock_offset to set
6709 * unsigned 'system_time' so if we use get_kvmclock_ns() (which
6710 * is slightly ahead) here we risk going negative on unsigned
6711 * 'system_time' when 'data.clock' is very small.
6713 if (data.flags & KVM_CLOCK_REALTIME) {
6714 u64 now_real_ns = ktime_get_real_ns();
6717 * Avoid stepping the kvmclock backwards.
6719 if (now_real_ns > data.realtime)
6720 data.clock += now_real_ns - data.realtime;
6723 if (ka->use_master_clock)
6724 now_raw_ns = ka->master_kernel_ns;
6726 now_raw_ns = get_kvmclock_base_ns();
6727 ka->kvmclock_offset = data.clock - now_raw_ns;
6728 kvm_end_pvclock_update(kvm);
6732 int kvm_arch_vm_ioctl(struct file *filp, unsigned int ioctl, unsigned long arg)
6734 struct kvm *kvm = filp->private_data;
6735 void __user *argp = (void __user *)arg;
6738 * This union makes it completely explicit to gcc-3.x
6739 * that these two variables' stack usage should be
6740 * combined, not added together.
6743 struct kvm_pit_state ps;
6744 struct kvm_pit_state2 ps2;
6745 struct kvm_pit_config pit_config;
6749 case KVM_SET_TSS_ADDR:
6750 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
6752 case KVM_SET_IDENTITY_MAP_ADDR: {
6755 mutex_lock(&kvm->lock);
6757 if (kvm->created_vcpus)
6758 goto set_identity_unlock;
6760 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
6761 goto set_identity_unlock;
6762 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
6763 set_identity_unlock:
6764 mutex_unlock(&kvm->lock);
6767 case KVM_SET_NR_MMU_PAGES:
6768 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
6770 case KVM_CREATE_IRQCHIP: {
6771 mutex_lock(&kvm->lock);
6774 if (irqchip_in_kernel(kvm))
6775 goto create_irqchip_unlock;
6778 if (kvm->created_vcpus)
6779 goto create_irqchip_unlock;
6781 r = kvm_pic_init(kvm);
6783 goto create_irqchip_unlock;
6785 r = kvm_ioapic_init(kvm);
6787 kvm_pic_destroy(kvm);
6788 goto create_irqchip_unlock;
6791 r = kvm_setup_default_irq_routing(kvm);
6793 kvm_ioapic_destroy(kvm);
6794 kvm_pic_destroy(kvm);
6795 goto create_irqchip_unlock;
6797 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
6799 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
6800 kvm_clear_apicv_inhibit(kvm, APICV_INHIBIT_REASON_ABSENT);
6801 create_irqchip_unlock:
6802 mutex_unlock(&kvm->lock);
6805 case KVM_CREATE_PIT:
6806 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
6808 case KVM_CREATE_PIT2:
6810 if (copy_from_user(&u.pit_config, argp,
6811 sizeof(struct kvm_pit_config)))
6814 mutex_lock(&kvm->lock);
6817 goto create_pit_unlock;
6819 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
6823 mutex_unlock(&kvm->lock);
6825 case KVM_GET_IRQCHIP: {
6826 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6827 struct kvm_irqchip *chip;
6829 chip = memdup_user(argp, sizeof(*chip));
6836 if (!irqchip_kernel(kvm))
6837 goto get_irqchip_out;
6838 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
6840 goto get_irqchip_out;
6842 if (copy_to_user(argp, chip, sizeof(*chip)))
6843 goto get_irqchip_out;
6849 case KVM_SET_IRQCHIP: {
6850 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6851 struct kvm_irqchip *chip;
6853 chip = memdup_user(argp, sizeof(*chip));
6860 if (!irqchip_kernel(kvm))
6861 goto set_irqchip_out;
6862 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
6869 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
6872 if (!kvm->arch.vpit)
6874 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
6878 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
6885 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
6887 mutex_lock(&kvm->lock);
6889 if (!kvm->arch.vpit)
6891 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
6893 mutex_unlock(&kvm->lock);
6896 case KVM_GET_PIT2: {
6898 if (!kvm->arch.vpit)
6900 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
6904 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
6909 case KVM_SET_PIT2: {
6911 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
6913 mutex_lock(&kvm->lock);
6915 if (!kvm->arch.vpit)
6917 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
6919 mutex_unlock(&kvm->lock);
6922 case KVM_REINJECT_CONTROL: {
6923 struct kvm_reinject_control control;
6925 if (copy_from_user(&control, argp, sizeof(control)))
6928 if (!kvm->arch.vpit)
6930 r = kvm_vm_ioctl_reinject(kvm, &control);
6933 case KVM_SET_BOOT_CPU_ID:
6935 mutex_lock(&kvm->lock);
6936 if (kvm->created_vcpus)
6939 kvm->arch.bsp_vcpu_id = arg;
6940 mutex_unlock(&kvm->lock);
6942 #ifdef CONFIG_KVM_XEN
6943 case KVM_XEN_HVM_CONFIG: {
6944 struct kvm_xen_hvm_config xhc;
6946 if (copy_from_user(&xhc, argp, sizeof(xhc)))
6948 r = kvm_xen_hvm_config(kvm, &xhc);
6951 case KVM_XEN_HVM_GET_ATTR: {
6952 struct kvm_xen_hvm_attr xha;
6955 if (copy_from_user(&xha, argp, sizeof(xha)))
6957 r = kvm_xen_hvm_get_attr(kvm, &xha);
6958 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
6962 case KVM_XEN_HVM_SET_ATTR: {
6963 struct kvm_xen_hvm_attr xha;
6966 if (copy_from_user(&xha, argp, sizeof(xha)))
6968 r = kvm_xen_hvm_set_attr(kvm, &xha);
6971 case KVM_XEN_HVM_EVTCHN_SEND: {
6972 struct kvm_irq_routing_xen_evtchn uxe;
6975 if (copy_from_user(&uxe, argp, sizeof(uxe)))
6977 r = kvm_xen_hvm_evtchn_send(kvm, &uxe);
6982 r = kvm_vm_ioctl_set_clock(kvm, argp);
6985 r = kvm_vm_ioctl_get_clock(kvm, argp);
6987 case KVM_SET_TSC_KHZ: {
6991 user_tsc_khz = (u32)arg;
6993 if (kvm_caps.has_tsc_control &&
6994 user_tsc_khz >= kvm_caps.max_guest_tsc_khz)
6997 if (user_tsc_khz == 0)
6998 user_tsc_khz = tsc_khz;
7000 WRITE_ONCE(kvm->arch.default_tsc_khz, user_tsc_khz);
7005 case KVM_GET_TSC_KHZ: {
7006 r = READ_ONCE(kvm->arch.default_tsc_khz);
7009 case KVM_MEMORY_ENCRYPT_OP: {
7011 if (!kvm_x86_ops.mem_enc_ioctl)
7014 r = static_call(kvm_x86_mem_enc_ioctl)(kvm, argp);
7017 case KVM_MEMORY_ENCRYPT_REG_REGION: {
7018 struct kvm_enc_region region;
7021 if (copy_from_user(®ion, argp, sizeof(region)))
7025 if (!kvm_x86_ops.mem_enc_register_region)
7028 r = static_call(kvm_x86_mem_enc_register_region)(kvm, ®ion);
7031 case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
7032 struct kvm_enc_region region;
7035 if (copy_from_user(®ion, argp, sizeof(region)))
7039 if (!kvm_x86_ops.mem_enc_unregister_region)
7042 r = static_call(kvm_x86_mem_enc_unregister_region)(kvm, ®ion);
7045 case KVM_HYPERV_EVENTFD: {
7046 struct kvm_hyperv_eventfd hvevfd;
7049 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
7051 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
7054 case KVM_SET_PMU_EVENT_FILTER:
7055 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
7057 case KVM_X86_SET_MSR_FILTER: {
7058 struct kvm_msr_filter __user *user_msr_filter = argp;
7059 struct kvm_msr_filter filter;
7061 if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
7064 r = kvm_vm_ioctl_set_msr_filter(kvm, &filter);
7074 static void kvm_probe_feature_msr(u32 msr_index)
7076 struct kvm_msr_entry msr = {
7080 if (kvm_get_msr_feature(&msr))
7083 msr_based_features[num_msr_based_features++] = msr_index;
7086 static void kvm_probe_msr_to_save(u32 msr_index)
7090 if (rdmsr_safe(msr_index, &dummy[0], &dummy[1]))
7094 * Even MSRs that are valid in the host may not be exposed to guests in
7097 switch (msr_index) {
7098 case MSR_IA32_BNDCFGS:
7099 if (!kvm_mpx_supported())
7103 if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP) &&
7104 !kvm_cpu_cap_has(X86_FEATURE_RDPID))
7107 case MSR_IA32_UMWAIT_CONTROL:
7108 if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
7111 case MSR_IA32_RTIT_CTL:
7112 case MSR_IA32_RTIT_STATUS:
7113 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
7116 case MSR_IA32_RTIT_CR3_MATCH:
7117 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
7118 !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
7121 case MSR_IA32_RTIT_OUTPUT_BASE:
7122 case MSR_IA32_RTIT_OUTPUT_MASK:
7123 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
7124 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
7125 !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
7128 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
7129 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
7130 (msr_index - MSR_IA32_RTIT_ADDR0_A >=
7131 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2))
7134 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR_MAX:
7135 if (msr_index - MSR_ARCH_PERFMON_PERFCTR0 >=
7136 kvm_pmu_cap.num_counters_gp)
7139 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL_MAX:
7140 if (msr_index - MSR_ARCH_PERFMON_EVENTSEL0 >=
7141 kvm_pmu_cap.num_counters_gp)
7144 case MSR_ARCH_PERFMON_FIXED_CTR0 ... MSR_ARCH_PERFMON_FIXED_CTR_MAX:
7145 if (msr_index - MSR_ARCH_PERFMON_FIXED_CTR0 >=
7146 kvm_pmu_cap.num_counters_fixed)
7150 case MSR_IA32_XFD_ERR:
7151 if (!kvm_cpu_cap_has(X86_FEATURE_XFD))
7158 msrs_to_save[num_msrs_to_save++] = msr_index;
7161 static void kvm_init_msr_lists(void)
7165 BUILD_BUG_ON_MSG(KVM_PMC_MAX_FIXED != 3,
7166 "Please update the fixed PMCs in msrs_to_save_pmu[]");
7168 num_msrs_to_save = 0;
7169 num_emulated_msrs = 0;
7170 num_msr_based_features = 0;
7172 for (i = 0; i < ARRAY_SIZE(msrs_to_save_base); i++)
7173 kvm_probe_msr_to_save(msrs_to_save_base[i]);
7176 for (i = 0; i < ARRAY_SIZE(msrs_to_save_pmu); i++)
7177 kvm_probe_msr_to_save(msrs_to_save_pmu[i]);
7180 for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
7181 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
7184 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
7187 for (i = KVM_FIRST_EMULATED_VMX_MSR; i <= KVM_LAST_EMULATED_VMX_MSR; i++)
7188 kvm_probe_feature_msr(i);
7190 for (i = 0; i < ARRAY_SIZE(msr_based_features_all_except_vmx); i++)
7191 kvm_probe_feature_msr(msr_based_features_all_except_vmx[i]);
7194 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
7202 if (!(lapic_in_kernel(vcpu) &&
7203 !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
7204 && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
7215 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
7222 if (!(lapic_in_kernel(vcpu) &&
7223 !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
7225 && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
7227 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
7237 void kvm_set_segment(struct kvm_vcpu *vcpu,
7238 struct kvm_segment *var, int seg)
7240 static_call(kvm_x86_set_segment)(vcpu, var, seg);
7243 void kvm_get_segment(struct kvm_vcpu *vcpu,
7244 struct kvm_segment *var, int seg)
7246 static_call(kvm_x86_get_segment)(vcpu, var, seg);
7249 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u64 access,
7250 struct x86_exception *exception)
7252 struct kvm_mmu *mmu = vcpu->arch.mmu;
7255 BUG_ON(!mmu_is_nested(vcpu));
7257 /* NPT walks are always user-walks */
7258 access |= PFERR_USER_MASK;
7259 t_gpa = mmu->gva_to_gpa(vcpu, mmu, gpa, access, exception);
7264 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
7265 struct x86_exception *exception)
7267 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
7269 u64 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
7270 return mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
7272 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
7274 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
7275 struct x86_exception *exception)
7277 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
7279 u64 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
7280 access |= PFERR_WRITE_MASK;
7281 return mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
7283 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
7285 /* uses this to access any guest's mapped memory without checking CPL */
7286 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
7287 struct x86_exception *exception)
7289 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
7291 return mmu->gva_to_gpa(vcpu, mmu, gva, 0, exception);
7294 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
7295 struct kvm_vcpu *vcpu, u64 access,
7296 struct x86_exception *exception)
7298 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
7300 int r = X86EMUL_CONTINUE;
7303 gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access, exception);
7304 unsigned offset = addr & (PAGE_SIZE-1);
7305 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
7308 if (gpa == INVALID_GPA)
7309 return X86EMUL_PROPAGATE_FAULT;
7310 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
7313 r = X86EMUL_IO_NEEDED;
7325 /* used for instruction fetching */
7326 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
7327 gva_t addr, void *val, unsigned int bytes,
7328 struct x86_exception *exception)
7330 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7331 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
7332 u64 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
7336 /* Inline kvm_read_guest_virt_helper for speed. */
7337 gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access|PFERR_FETCH_MASK,
7339 if (unlikely(gpa == INVALID_GPA))
7340 return X86EMUL_PROPAGATE_FAULT;
7342 offset = addr & (PAGE_SIZE-1);
7343 if (WARN_ON(offset + bytes > PAGE_SIZE))
7344 bytes = (unsigned)PAGE_SIZE - offset;
7345 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
7347 if (unlikely(ret < 0))
7348 return X86EMUL_IO_NEEDED;
7350 return X86EMUL_CONTINUE;
7353 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
7354 gva_t addr, void *val, unsigned int bytes,
7355 struct x86_exception *exception)
7357 u64 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
7360 * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
7361 * is returned, but our callers are not ready for that and they blindly
7362 * call kvm_inject_page_fault. Ensure that they at least do not leak
7363 * uninitialized kernel stack memory into cr2 and error code.
7365 memset(exception, 0, sizeof(*exception));
7366 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
7369 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
7371 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
7372 gva_t addr, void *val, unsigned int bytes,
7373 struct x86_exception *exception, bool system)
7375 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7379 access |= PFERR_IMPLICIT_ACCESS;
7380 else if (static_call(kvm_x86_get_cpl)(vcpu) == 3)
7381 access |= PFERR_USER_MASK;
7383 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
7386 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
7387 struct kvm_vcpu *vcpu, u64 access,
7388 struct x86_exception *exception)
7390 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
7392 int r = X86EMUL_CONTINUE;
7395 gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access, exception);
7396 unsigned offset = addr & (PAGE_SIZE-1);
7397 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
7400 if (gpa == INVALID_GPA)
7401 return X86EMUL_PROPAGATE_FAULT;
7402 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
7404 r = X86EMUL_IO_NEEDED;
7416 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
7417 unsigned int bytes, struct x86_exception *exception,
7420 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7421 u64 access = PFERR_WRITE_MASK;
7424 access |= PFERR_IMPLICIT_ACCESS;
7425 else if (static_call(kvm_x86_get_cpl)(vcpu) == 3)
7426 access |= PFERR_USER_MASK;
7428 return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
7432 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
7433 unsigned int bytes, struct x86_exception *exception)
7435 /* kvm_write_guest_virt_system can pull in tons of pages. */
7436 vcpu->arch.l1tf_flush_l1d = true;
7438 return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
7439 PFERR_WRITE_MASK, exception);
7441 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
7443 static int kvm_can_emulate_insn(struct kvm_vcpu *vcpu, int emul_type,
7444 void *insn, int insn_len)
7446 return static_call(kvm_x86_can_emulate_instruction)(vcpu, emul_type,
7450 int handle_ud(struct kvm_vcpu *vcpu)
7452 static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
7453 int fep_flags = READ_ONCE(force_emulation_prefix);
7454 int emul_type = EMULTYPE_TRAP_UD;
7455 char sig[5]; /* ud2; .ascii "kvm" */
7456 struct x86_exception e;
7458 if (unlikely(!kvm_can_emulate_insn(vcpu, emul_type, NULL, 0)))
7462 kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
7463 sig, sizeof(sig), &e) == 0 &&
7464 memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
7465 if (fep_flags & KVM_FEP_CLEAR_RFLAGS_RF)
7466 kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) & ~X86_EFLAGS_RF);
7467 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
7468 emul_type = EMULTYPE_TRAP_UD_FORCED;
7471 return kvm_emulate_instruction(vcpu, emul_type);
7473 EXPORT_SYMBOL_GPL(handle_ud);
7475 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
7476 gpa_t gpa, bool write)
7478 /* For APIC access vmexit */
7479 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
7482 if (vcpu_match_mmio_gpa(vcpu, gpa)) {
7483 trace_vcpu_match_mmio(gva, gpa, write, true);
7490 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
7491 gpa_t *gpa, struct x86_exception *exception,
7494 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
7495 u64 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
7496 | (write ? PFERR_WRITE_MASK : 0);
7499 * currently PKRU is only applied to ept enabled guest so
7500 * there is no pkey in EPT page table for L1 guest or EPT
7501 * shadow page table for L2 guest.
7503 if (vcpu_match_mmio_gva(vcpu, gva) && (!is_paging(vcpu) ||
7504 !permission_fault(vcpu, vcpu->arch.walk_mmu,
7505 vcpu->arch.mmio_access, 0, access))) {
7506 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
7507 (gva & (PAGE_SIZE - 1));
7508 trace_vcpu_match_mmio(gva, *gpa, write, false);
7512 *gpa = mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
7514 if (*gpa == INVALID_GPA)
7517 return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
7520 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
7521 const void *val, int bytes)
7525 ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
7528 kvm_page_track_write(vcpu, gpa, val, bytes);
7532 struct read_write_emulator_ops {
7533 int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
7535 int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
7536 void *val, int bytes);
7537 int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
7538 int bytes, void *val);
7539 int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
7540 void *val, int bytes);
7544 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
7546 if (vcpu->mmio_read_completed) {
7547 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
7548 vcpu->mmio_fragments[0].gpa, val);
7549 vcpu->mmio_read_completed = 0;
7556 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
7557 void *val, int bytes)
7559 return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
7562 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
7563 void *val, int bytes)
7565 return emulator_write_phys(vcpu, gpa, val, bytes);
7568 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
7570 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
7571 return vcpu_mmio_write(vcpu, gpa, bytes, val);
7574 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
7575 void *val, int bytes)
7577 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
7578 return X86EMUL_IO_NEEDED;
7581 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
7582 void *val, int bytes)
7584 struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
7586 memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
7587 return X86EMUL_CONTINUE;
7590 static const struct read_write_emulator_ops read_emultor = {
7591 .read_write_prepare = read_prepare,
7592 .read_write_emulate = read_emulate,
7593 .read_write_mmio = vcpu_mmio_read,
7594 .read_write_exit_mmio = read_exit_mmio,
7597 static const struct read_write_emulator_ops write_emultor = {
7598 .read_write_emulate = write_emulate,
7599 .read_write_mmio = write_mmio,
7600 .read_write_exit_mmio = write_exit_mmio,
7604 static int emulator_read_write_onepage(unsigned long addr, void *val,
7606 struct x86_exception *exception,
7607 struct kvm_vcpu *vcpu,
7608 const struct read_write_emulator_ops *ops)
7612 bool write = ops->write;
7613 struct kvm_mmio_fragment *frag;
7614 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7617 * If the exit was due to a NPF we may already have a GPA.
7618 * If the GPA is present, use it to avoid the GVA to GPA table walk.
7619 * Note, this cannot be used on string operations since string
7620 * operation using rep will only have the initial GPA from the NPF
7623 if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
7624 (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
7625 gpa = ctxt->gpa_val;
7626 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
7628 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
7630 return X86EMUL_PROPAGATE_FAULT;
7633 if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
7634 return X86EMUL_CONTINUE;
7637 * Is this MMIO handled locally?
7639 handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
7640 if (handled == bytes)
7641 return X86EMUL_CONTINUE;
7647 WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
7648 frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
7652 return X86EMUL_CONTINUE;
7655 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
7657 void *val, unsigned int bytes,
7658 struct x86_exception *exception,
7659 const struct read_write_emulator_ops *ops)
7661 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7665 if (ops->read_write_prepare &&
7666 ops->read_write_prepare(vcpu, val, bytes))
7667 return X86EMUL_CONTINUE;
7669 vcpu->mmio_nr_fragments = 0;
7671 /* Crossing a page boundary? */
7672 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
7675 now = -addr & ~PAGE_MASK;
7676 rc = emulator_read_write_onepage(addr, val, now, exception,
7679 if (rc != X86EMUL_CONTINUE)
7682 if (ctxt->mode != X86EMUL_MODE_PROT64)
7688 rc = emulator_read_write_onepage(addr, val, bytes, exception,
7690 if (rc != X86EMUL_CONTINUE)
7693 if (!vcpu->mmio_nr_fragments)
7696 gpa = vcpu->mmio_fragments[0].gpa;
7698 vcpu->mmio_needed = 1;
7699 vcpu->mmio_cur_fragment = 0;
7701 vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
7702 vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
7703 vcpu->run->exit_reason = KVM_EXIT_MMIO;
7704 vcpu->run->mmio.phys_addr = gpa;
7706 return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
7709 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
7713 struct x86_exception *exception)
7715 return emulator_read_write(ctxt, addr, val, bytes,
7716 exception, &read_emultor);
7719 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
7723 struct x86_exception *exception)
7725 return emulator_read_write(ctxt, addr, (void *)val, bytes,
7726 exception, &write_emultor);
7729 #define emulator_try_cmpxchg_user(t, ptr, old, new) \
7730 (__try_cmpxchg_user((t __user *)(ptr), (t *)(old), *(t *)(new), efault ## t))
7732 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
7737 struct x86_exception *exception)
7739 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7745 /* guests cmpxchg8b have to be emulated atomically */
7746 if (bytes > 8 || (bytes & (bytes - 1)))
7749 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
7751 if (gpa == INVALID_GPA ||
7752 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
7756 * Emulate the atomic as a straight write to avoid #AC if SLD is
7757 * enabled in the host and the access splits a cache line.
7759 if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
7760 page_line_mask = ~(cache_line_size() - 1);
7762 page_line_mask = PAGE_MASK;
7764 if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
7767 hva = kvm_vcpu_gfn_to_hva(vcpu, gpa_to_gfn(gpa));
7768 if (kvm_is_error_hva(hva))
7771 hva += offset_in_page(gpa);
7775 r = emulator_try_cmpxchg_user(u8, hva, old, new);
7778 r = emulator_try_cmpxchg_user(u16, hva, old, new);
7781 r = emulator_try_cmpxchg_user(u32, hva, old, new);
7784 r = emulator_try_cmpxchg_user(u64, hva, old, new);
7791 return X86EMUL_UNHANDLEABLE;
7793 return X86EMUL_CMPXCHG_FAILED;
7795 kvm_page_track_write(vcpu, gpa, new, bytes);
7797 return X86EMUL_CONTINUE;
7800 pr_warn_once("emulating exchange as write\n");
7802 return emulator_write_emulated(ctxt, addr, new, bytes, exception);
7805 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
7806 unsigned short port, void *data,
7807 unsigned int count, bool in)
7812 WARN_ON_ONCE(vcpu->arch.pio.count);
7813 for (i = 0; i < count; i++) {
7815 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, port, size, data);
7817 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS, port, size, data);
7824 * Userspace must have unregistered the device while PIO
7825 * was running. Drop writes / read as 0.
7828 memset(data, 0, size * (count - i));
7837 vcpu->arch.pio.port = port;
7838 vcpu->arch.pio.in = in;
7839 vcpu->arch.pio.count = count;
7840 vcpu->arch.pio.size = size;
7843 memset(vcpu->arch.pio_data, 0, size * count);
7845 memcpy(vcpu->arch.pio_data, data, size * count);
7847 vcpu->run->exit_reason = KVM_EXIT_IO;
7848 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
7849 vcpu->run->io.size = size;
7850 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
7851 vcpu->run->io.count = count;
7852 vcpu->run->io.port = port;
7856 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
7857 unsigned short port, void *val, unsigned int count)
7859 int r = emulator_pio_in_out(vcpu, size, port, val, count, true);
7861 trace_kvm_pio(KVM_PIO_IN, port, size, count, val);
7866 static void complete_emulator_pio_in(struct kvm_vcpu *vcpu, void *val)
7868 int size = vcpu->arch.pio.size;
7869 unsigned int count = vcpu->arch.pio.count;
7870 memcpy(val, vcpu->arch.pio_data, size * count);
7871 trace_kvm_pio(KVM_PIO_IN, vcpu->arch.pio.port, size, count, vcpu->arch.pio_data);
7872 vcpu->arch.pio.count = 0;
7875 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
7876 int size, unsigned short port, void *val,
7879 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7880 if (vcpu->arch.pio.count) {
7882 * Complete a previous iteration that required userspace I/O.
7883 * Note, @count isn't guaranteed to match pio.count as userspace
7884 * can modify ECX before rerunning the vCPU. Ignore any such
7885 * shenanigans as KVM doesn't support modifying the rep count,
7886 * and the emulator ensures @count doesn't overflow the buffer.
7888 complete_emulator_pio_in(vcpu, val);
7892 return emulator_pio_in(vcpu, size, port, val, count);
7895 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
7896 unsigned short port, const void *val,
7899 trace_kvm_pio(KVM_PIO_OUT, port, size, count, val);
7900 return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
7903 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
7904 int size, unsigned short port,
7905 const void *val, unsigned int count)
7907 return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
7910 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
7912 return static_call(kvm_x86_get_segment_base)(vcpu, seg);
7915 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
7917 kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
7920 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
7922 if (!need_emulate_wbinvd(vcpu))
7923 return X86EMUL_CONTINUE;
7925 if (static_call(kvm_x86_has_wbinvd_exit)()) {
7926 int cpu = get_cpu();
7928 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
7929 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
7930 wbinvd_ipi, NULL, 1);
7932 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
7935 return X86EMUL_CONTINUE;
7938 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
7940 kvm_emulate_wbinvd_noskip(vcpu);
7941 return kvm_skip_emulated_instruction(vcpu);
7943 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
7947 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
7949 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
7952 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
7953 unsigned long *dest)
7955 kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
7958 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
7959 unsigned long value)
7962 return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
7965 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
7967 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
7970 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
7972 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7973 unsigned long value;
7977 value = kvm_read_cr0(vcpu);
7980 value = vcpu->arch.cr2;
7983 value = kvm_read_cr3(vcpu);
7986 value = kvm_read_cr4(vcpu);
7989 value = kvm_get_cr8(vcpu);
7992 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7999 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
8001 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8006 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
8009 vcpu->arch.cr2 = val;
8012 res = kvm_set_cr3(vcpu, val);
8015 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
8018 res = kvm_set_cr8(vcpu, val);
8021 kvm_err("%s: unexpected cr %u\n", __func__, cr);
8028 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
8030 return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
8033 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
8035 static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
8038 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
8040 static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
8043 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
8045 static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
8048 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
8050 static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
8053 static unsigned long emulator_get_cached_segment_base(
8054 struct x86_emulate_ctxt *ctxt, int seg)
8056 return get_segment_base(emul_to_vcpu(ctxt), seg);
8059 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
8060 struct desc_struct *desc, u32 *base3,
8063 struct kvm_segment var;
8065 kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
8066 *selector = var.selector;
8069 memset(desc, 0, sizeof(*desc));
8077 set_desc_limit(desc, var.limit);
8078 set_desc_base(desc, (unsigned long)var.base);
8079 #ifdef CONFIG_X86_64
8081 *base3 = var.base >> 32;
8083 desc->type = var.type;
8085 desc->dpl = var.dpl;
8086 desc->p = var.present;
8087 desc->avl = var.avl;
8095 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
8096 struct desc_struct *desc, u32 base3,
8099 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8100 struct kvm_segment var;
8102 var.selector = selector;
8103 var.base = get_desc_base(desc);
8104 #ifdef CONFIG_X86_64
8105 var.base |= ((u64)base3) << 32;
8107 var.limit = get_desc_limit(desc);
8109 var.limit = (var.limit << 12) | 0xfff;
8110 var.type = desc->type;
8111 var.dpl = desc->dpl;
8116 var.avl = desc->avl;
8117 var.present = desc->p;
8118 var.unusable = !var.present;
8121 kvm_set_segment(vcpu, &var, seg);
8125 static int emulator_get_msr_with_filter(struct x86_emulate_ctxt *ctxt,
8126 u32 msr_index, u64 *pdata)
8128 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8131 r = kvm_get_msr_with_filter(vcpu, msr_index, pdata);
8133 return X86EMUL_UNHANDLEABLE;
8136 if (kvm_msr_user_space(vcpu, msr_index, KVM_EXIT_X86_RDMSR, 0,
8137 complete_emulated_rdmsr, r))
8138 return X86EMUL_IO_NEEDED;
8140 trace_kvm_msr_read_ex(msr_index);
8141 return X86EMUL_PROPAGATE_FAULT;
8144 trace_kvm_msr_read(msr_index, *pdata);
8145 return X86EMUL_CONTINUE;
8148 static int emulator_set_msr_with_filter(struct x86_emulate_ctxt *ctxt,
8149 u32 msr_index, u64 data)
8151 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8154 r = kvm_set_msr_with_filter(vcpu, msr_index, data);
8156 return X86EMUL_UNHANDLEABLE;
8159 if (kvm_msr_user_space(vcpu, msr_index, KVM_EXIT_X86_WRMSR, data,
8160 complete_emulated_msr_access, r))
8161 return X86EMUL_IO_NEEDED;
8163 trace_kvm_msr_write_ex(msr_index, data);
8164 return X86EMUL_PROPAGATE_FAULT;
8167 trace_kvm_msr_write(msr_index, data);
8168 return X86EMUL_CONTINUE;
8171 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
8172 u32 msr_index, u64 *pdata)
8174 return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
8177 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
8180 if (kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc))
8185 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
8186 u32 pmc, u64 *pdata)
8188 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
8191 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
8193 emul_to_vcpu(ctxt)->arch.halt_request = 1;
8196 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
8197 struct x86_instruction_info *info,
8198 enum x86_intercept_stage stage)
8200 return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
8204 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
8205 u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
8208 return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
8211 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
8213 return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
8216 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
8218 return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
8221 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
8223 return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
8226 static bool emulator_guest_has_rdpid(struct x86_emulate_ctxt *ctxt)
8228 return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_RDPID);
8231 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
8233 return kvm_register_read_raw(emul_to_vcpu(ctxt), reg);
8236 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
8238 kvm_register_write_raw(emul_to_vcpu(ctxt), reg, val);
8241 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
8243 static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
8246 static bool emulator_is_smm(struct x86_emulate_ctxt *ctxt)
8248 return is_smm(emul_to_vcpu(ctxt));
8251 static bool emulator_is_guest_mode(struct x86_emulate_ctxt *ctxt)
8253 return is_guest_mode(emul_to_vcpu(ctxt));
8256 #ifndef CONFIG_KVM_SMM
8257 static int emulator_leave_smm(struct x86_emulate_ctxt *ctxt)
8260 return X86EMUL_UNHANDLEABLE;
8264 static void emulator_triple_fault(struct x86_emulate_ctxt *ctxt)
8266 kvm_make_request(KVM_REQ_TRIPLE_FAULT, emul_to_vcpu(ctxt));
8269 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
8271 return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
8274 static void emulator_vm_bugged(struct x86_emulate_ctxt *ctxt)
8276 struct kvm *kvm = emul_to_vcpu(ctxt)->kvm;
8278 if (!kvm->vm_bugged)
8282 static const struct x86_emulate_ops emulate_ops = {
8283 .vm_bugged = emulator_vm_bugged,
8284 .read_gpr = emulator_read_gpr,
8285 .write_gpr = emulator_write_gpr,
8286 .read_std = emulator_read_std,
8287 .write_std = emulator_write_std,
8288 .fetch = kvm_fetch_guest_virt,
8289 .read_emulated = emulator_read_emulated,
8290 .write_emulated = emulator_write_emulated,
8291 .cmpxchg_emulated = emulator_cmpxchg_emulated,
8292 .invlpg = emulator_invlpg,
8293 .pio_in_emulated = emulator_pio_in_emulated,
8294 .pio_out_emulated = emulator_pio_out_emulated,
8295 .get_segment = emulator_get_segment,
8296 .set_segment = emulator_set_segment,
8297 .get_cached_segment_base = emulator_get_cached_segment_base,
8298 .get_gdt = emulator_get_gdt,
8299 .get_idt = emulator_get_idt,
8300 .set_gdt = emulator_set_gdt,
8301 .set_idt = emulator_set_idt,
8302 .get_cr = emulator_get_cr,
8303 .set_cr = emulator_set_cr,
8304 .cpl = emulator_get_cpl,
8305 .get_dr = emulator_get_dr,
8306 .set_dr = emulator_set_dr,
8307 .set_msr_with_filter = emulator_set_msr_with_filter,
8308 .get_msr_with_filter = emulator_get_msr_with_filter,
8309 .get_msr = emulator_get_msr,
8310 .check_pmc = emulator_check_pmc,
8311 .read_pmc = emulator_read_pmc,
8312 .halt = emulator_halt,
8313 .wbinvd = emulator_wbinvd,
8314 .fix_hypercall = emulator_fix_hypercall,
8315 .intercept = emulator_intercept,
8316 .get_cpuid = emulator_get_cpuid,
8317 .guest_has_long_mode = emulator_guest_has_long_mode,
8318 .guest_has_movbe = emulator_guest_has_movbe,
8319 .guest_has_fxsr = emulator_guest_has_fxsr,
8320 .guest_has_rdpid = emulator_guest_has_rdpid,
8321 .set_nmi_mask = emulator_set_nmi_mask,
8322 .is_smm = emulator_is_smm,
8323 .is_guest_mode = emulator_is_guest_mode,
8324 .leave_smm = emulator_leave_smm,
8325 .triple_fault = emulator_triple_fault,
8326 .set_xcr = emulator_set_xcr,
8329 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
8331 u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
8333 * an sti; sti; sequence only disable interrupts for the first
8334 * instruction. So, if the last instruction, be it emulated or
8335 * not, left the system with the INT_STI flag enabled, it
8336 * means that the last instruction is an sti. We should not
8337 * leave the flag on in this case. The same goes for mov ss
8339 if (int_shadow & mask)
8341 if (unlikely(int_shadow || mask)) {
8342 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
8344 kvm_make_request(KVM_REQ_EVENT, vcpu);
8348 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
8350 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8352 if (ctxt->exception.vector == PF_VECTOR)
8353 kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
8354 else if (ctxt->exception.error_code_valid)
8355 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
8356 ctxt->exception.error_code);
8358 kvm_queue_exception(vcpu, ctxt->exception.vector);
8361 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
8363 struct x86_emulate_ctxt *ctxt;
8365 ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
8367 pr_err("failed to allocate vcpu's emulator\n");
8372 ctxt->ops = &emulate_ops;
8373 vcpu->arch.emulate_ctxt = ctxt;
8378 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
8380 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8383 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
8385 ctxt->gpa_available = false;
8386 ctxt->eflags = kvm_get_rflags(vcpu);
8387 ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
8389 ctxt->eip = kvm_rip_read(vcpu);
8390 ctxt->mode = (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
8391 (ctxt->eflags & X86_EFLAGS_VM) ? X86EMUL_MODE_VM86 :
8392 (cs_l && is_long_mode(vcpu)) ? X86EMUL_MODE_PROT64 :
8393 cs_db ? X86EMUL_MODE_PROT32 :
8394 X86EMUL_MODE_PROT16;
8395 ctxt->interruptibility = 0;
8396 ctxt->have_exception = false;
8397 ctxt->exception.vector = -1;
8398 ctxt->perm_ok = false;
8400 init_decode_cache(ctxt);
8401 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
8404 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
8406 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8409 init_emulate_ctxt(vcpu);
8413 ctxt->_eip = ctxt->eip + inc_eip;
8414 ret = emulate_int_real(ctxt, irq);
8416 if (ret != X86EMUL_CONTINUE) {
8417 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
8419 ctxt->eip = ctxt->_eip;
8420 kvm_rip_write(vcpu, ctxt->eip);
8421 kvm_set_rflags(vcpu, ctxt->eflags);
8424 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
8426 static void prepare_emulation_failure_exit(struct kvm_vcpu *vcpu, u64 *data,
8427 u8 ndata, u8 *insn_bytes, u8 insn_size)
8429 struct kvm_run *run = vcpu->run;
8434 * Zero the whole array used to retrieve the exit info, as casting to
8435 * u32 for select entries will leave some chunks uninitialized.
8437 memset(&info, 0, sizeof(info));
8439 static_call(kvm_x86_get_exit_info)(vcpu, (u32 *)&info[0], &info[1],
8440 &info[2], (u32 *)&info[3],
8443 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
8444 run->emulation_failure.suberror = KVM_INTERNAL_ERROR_EMULATION;
8447 * There's currently space for 13 entries, but 5 are used for the exit
8448 * reason and info. Restrict to 4 to reduce the maintenance burden
8449 * when expanding kvm_run.emulation_failure in the future.
8451 if (WARN_ON_ONCE(ndata > 4))
8454 /* Always include the flags as a 'data' entry. */
8456 run->emulation_failure.flags = 0;
8459 BUILD_BUG_ON((sizeof(run->emulation_failure.insn_size) +
8460 sizeof(run->emulation_failure.insn_bytes) != 16));
8462 run->emulation_failure.flags |=
8463 KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES;
8464 run->emulation_failure.insn_size = insn_size;
8465 memset(run->emulation_failure.insn_bytes, 0x90,
8466 sizeof(run->emulation_failure.insn_bytes));
8467 memcpy(run->emulation_failure.insn_bytes, insn_bytes, insn_size);
8470 memcpy(&run->internal.data[info_start], info, sizeof(info));
8471 memcpy(&run->internal.data[info_start + ARRAY_SIZE(info)], data,
8472 ndata * sizeof(data[0]));
8474 run->emulation_failure.ndata = info_start + ARRAY_SIZE(info) + ndata;
8477 static void prepare_emulation_ctxt_failure_exit(struct kvm_vcpu *vcpu)
8479 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8481 prepare_emulation_failure_exit(vcpu, NULL, 0, ctxt->fetch.data,
8482 ctxt->fetch.end - ctxt->fetch.data);
8485 void __kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu, u64 *data,
8488 prepare_emulation_failure_exit(vcpu, data, ndata, NULL, 0);
8490 EXPORT_SYMBOL_GPL(__kvm_prepare_emulation_failure_exit);
8492 void kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu)
8494 __kvm_prepare_emulation_failure_exit(vcpu, NULL, 0);
8496 EXPORT_SYMBOL_GPL(kvm_prepare_emulation_failure_exit);
8498 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
8500 struct kvm *kvm = vcpu->kvm;
8502 ++vcpu->stat.insn_emulation_fail;
8503 trace_kvm_emulate_insn_failed(vcpu);
8505 if (emulation_type & EMULTYPE_VMWARE_GP) {
8506 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
8510 if (kvm->arch.exit_on_emulation_error ||
8511 (emulation_type & EMULTYPE_SKIP)) {
8512 prepare_emulation_ctxt_failure_exit(vcpu);
8516 kvm_queue_exception(vcpu, UD_VECTOR);
8518 if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
8519 prepare_emulation_ctxt_failure_exit(vcpu);
8526 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
8529 gpa_t gpa = cr2_or_gpa;
8532 if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
8535 if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
8536 WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
8539 if (!vcpu->arch.mmu->root_role.direct) {
8541 * Write permission should be allowed since only
8542 * write access need to be emulated.
8544 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
8547 * If the mapping is invalid in guest, let cpu retry
8548 * it to generate fault.
8550 if (gpa == INVALID_GPA)
8555 * Do not retry the unhandleable instruction if it faults on the
8556 * readonly host memory, otherwise it will goto a infinite loop:
8557 * retry instruction -> write #PF -> emulation fail -> retry
8558 * instruction -> ...
8560 pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
8563 * If the instruction failed on the error pfn, it can not be fixed,
8564 * report the error to userspace.
8566 if (is_error_noslot_pfn(pfn))
8569 kvm_release_pfn_clean(pfn);
8571 /* The instructions are well-emulated on direct mmu. */
8572 if (vcpu->arch.mmu->root_role.direct) {
8573 unsigned int indirect_shadow_pages;
8575 write_lock(&vcpu->kvm->mmu_lock);
8576 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
8577 write_unlock(&vcpu->kvm->mmu_lock);
8579 if (indirect_shadow_pages)
8580 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
8586 * if emulation was due to access to shadowed page table
8587 * and it failed try to unshadow page and re-enter the
8588 * guest to let CPU execute the instruction.
8590 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
8593 * If the access faults on its page table, it can not
8594 * be fixed by unprotecting shadow page and it should
8595 * be reported to userspace.
8597 return !(emulation_type & EMULTYPE_WRITE_PF_TO_SP);
8600 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
8601 gpa_t cr2_or_gpa, int emulation_type)
8603 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8604 unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
8606 last_retry_eip = vcpu->arch.last_retry_eip;
8607 last_retry_addr = vcpu->arch.last_retry_addr;
8610 * If the emulation is caused by #PF and it is non-page_table
8611 * writing instruction, it means the VM-EXIT is caused by shadow
8612 * page protected, we can zap the shadow page and retry this
8613 * instruction directly.
8615 * Note: if the guest uses a non-page-table modifying instruction
8616 * on the PDE that points to the instruction, then we will unmap
8617 * the instruction and go to an infinite loop. So, we cache the
8618 * last retried eip and the last fault address, if we meet the eip
8619 * and the address again, we can break out of the potential infinite
8622 vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
8624 if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
8627 if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
8628 WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
8631 if (x86_page_table_writing_insn(ctxt))
8634 if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
8637 vcpu->arch.last_retry_eip = ctxt->eip;
8638 vcpu->arch.last_retry_addr = cr2_or_gpa;
8640 if (!vcpu->arch.mmu->root_role.direct)
8641 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
8643 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
8648 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
8649 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
8651 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
8660 for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
8661 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
8666 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
8668 struct kvm_run *kvm_run = vcpu->run;
8670 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
8671 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
8672 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
8673 kvm_run->debug.arch.exception = DB_VECTOR;
8674 kvm_run->exit_reason = KVM_EXIT_DEBUG;
8677 kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
8681 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
8683 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
8686 r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
8690 kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_INSTRUCTIONS);
8693 * rflags is the old, "raw" value of the flags. The new value has
8694 * not been saved yet.
8696 * This is correct even for TF set by the guest, because "the
8697 * processor will not generate this exception after the instruction
8698 * that sets the TF flag".
8700 if (unlikely(rflags & X86_EFLAGS_TF))
8701 r = kvm_vcpu_do_singlestep(vcpu);
8704 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
8706 static bool kvm_is_code_breakpoint_inhibited(struct kvm_vcpu *vcpu)
8710 if (kvm_get_rflags(vcpu) & X86_EFLAGS_RF)
8714 * Intel CPUs inhibit code #DBs when MOV/POP SS blocking is active,
8715 * but AMD CPUs do not. MOV/POP SS blocking is rare, check that first
8716 * to avoid the relatively expensive CPUID lookup.
8718 shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
8719 return (shadow & KVM_X86_SHADOW_INT_MOV_SS) &&
8720 guest_cpuid_is_intel(vcpu);
8723 static bool kvm_vcpu_check_code_breakpoint(struct kvm_vcpu *vcpu,
8724 int emulation_type, int *r)
8726 WARN_ON_ONCE(emulation_type & EMULTYPE_NO_DECODE);
8729 * Do not check for code breakpoints if hardware has already done the
8730 * checks, as inferred from the emulation type. On NO_DECODE and SKIP,
8731 * the instruction has passed all exception checks, and all intercepted
8732 * exceptions that trigger emulation have lower priority than code
8733 * breakpoints, i.e. the fact that the intercepted exception occurred
8734 * means any code breakpoints have already been serviced.
8736 * Note, KVM needs to check for code #DBs on EMULTYPE_TRAP_UD_FORCED as
8737 * hardware has checked the RIP of the magic prefix, but not the RIP of
8738 * the instruction being emulated. The intent of forced emulation is
8739 * to behave as if KVM intercepted the instruction without an exception
8740 * and without a prefix.
8742 if (emulation_type & (EMULTYPE_NO_DECODE | EMULTYPE_SKIP |
8743 EMULTYPE_TRAP_UD | EMULTYPE_VMWARE_GP | EMULTYPE_PF))
8746 if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
8747 (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
8748 struct kvm_run *kvm_run = vcpu->run;
8749 unsigned long eip = kvm_get_linear_rip(vcpu);
8750 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
8751 vcpu->arch.guest_debug_dr7,
8755 kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
8756 kvm_run->debug.arch.pc = eip;
8757 kvm_run->debug.arch.exception = DB_VECTOR;
8758 kvm_run->exit_reason = KVM_EXIT_DEBUG;
8764 if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
8765 !kvm_is_code_breakpoint_inhibited(vcpu)) {
8766 unsigned long eip = kvm_get_linear_rip(vcpu);
8767 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
8772 kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
8781 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
8783 switch (ctxt->opcode_len) {
8790 case 0xe6: /* OUT */
8794 case 0x6c: /* INS */
8796 case 0x6e: /* OUTS */
8803 case 0x33: /* RDPMC */
8813 * Decode an instruction for emulation. The caller is responsible for handling
8814 * code breakpoints. Note, manually detecting code breakpoints is unnecessary
8815 * (and wrong) when emulating on an intercepted fault-like exception[*], as
8816 * code breakpoints have higher priority and thus have already been done by
8819 * [*] Except #MC, which is higher priority, but KVM should never emulate in
8820 * response to a machine check.
8822 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
8823 void *insn, int insn_len)
8825 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8828 init_emulate_ctxt(vcpu);
8830 r = x86_decode_insn(ctxt, insn, insn_len, emulation_type);
8832 trace_kvm_emulate_insn_start(vcpu);
8833 ++vcpu->stat.insn_emulation;
8837 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
8839 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
8840 int emulation_type, void *insn, int insn_len)
8843 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8844 bool writeback = true;
8846 if (unlikely(!kvm_can_emulate_insn(vcpu, emulation_type, insn, insn_len)))
8849 vcpu->arch.l1tf_flush_l1d = true;
8851 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
8852 kvm_clear_exception_queue(vcpu);
8855 * Return immediately if RIP hits a code breakpoint, such #DBs
8856 * are fault-like and are higher priority than any faults on
8857 * the code fetch itself.
8859 if (kvm_vcpu_check_code_breakpoint(vcpu, emulation_type, &r))
8862 r = x86_decode_emulated_instruction(vcpu, emulation_type,
8864 if (r != EMULATION_OK) {
8865 if ((emulation_type & EMULTYPE_TRAP_UD) ||
8866 (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
8867 kvm_queue_exception(vcpu, UD_VECTOR);
8870 if (reexecute_instruction(vcpu, cr2_or_gpa,
8874 if (ctxt->have_exception &&
8875 !(emulation_type & EMULTYPE_SKIP)) {
8877 * #UD should result in just EMULATION_FAILED, and trap-like
8878 * exception should not be encountered during decode.
8880 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
8881 exception_type(ctxt->exception.vector) == EXCPT_TRAP);
8882 inject_emulated_exception(vcpu);
8885 return handle_emulation_failure(vcpu, emulation_type);
8889 if ((emulation_type & EMULTYPE_VMWARE_GP) &&
8890 !is_vmware_backdoor_opcode(ctxt)) {
8891 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
8896 * EMULTYPE_SKIP without EMULTYPE_COMPLETE_USER_EXIT is intended for
8897 * use *only* by vendor callbacks for kvm_skip_emulated_instruction().
8898 * The caller is responsible for updating interruptibility state and
8899 * injecting single-step #DBs.
8901 if (emulation_type & EMULTYPE_SKIP) {
8902 if (ctxt->mode != X86EMUL_MODE_PROT64)
8903 ctxt->eip = (u32)ctxt->_eip;
8905 ctxt->eip = ctxt->_eip;
8907 if (emulation_type & EMULTYPE_COMPLETE_USER_EXIT) {
8912 kvm_rip_write(vcpu, ctxt->eip);
8913 if (ctxt->eflags & X86_EFLAGS_RF)
8914 kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
8918 if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
8921 /* this is needed for vmware backdoor interface to work since it
8922 changes registers values during IO operation */
8923 if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
8924 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
8925 emulator_invalidate_register_cache(ctxt);
8929 if (emulation_type & EMULTYPE_PF) {
8930 /* Save the faulting GPA (cr2) in the address field */
8931 ctxt->exception.address = cr2_or_gpa;
8933 /* With shadow page tables, cr2 contains a GVA or nGPA. */
8934 if (vcpu->arch.mmu->root_role.direct) {
8935 ctxt->gpa_available = true;
8936 ctxt->gpa_val = cr2_or_gpa;
8939 /* Sanitize the address out of an abundance of paranoia. */
8940 ctxt->exception.address = 0;
8943 r = x86_emulate_insn(ctxt);
8945 if (r == EMULATION_INTERCEPTED)
8948 if (r == EMULATION_FAILED) {
8949 if (reexecute_instruction(vcpu, cr2_or_gpa, emulation_type))
8952 return handle_emulation_failure(vcpu, emulation_type);
8955 if (ctxt->have_exception) {
8957 inject_emulated_exception(vcpu);
8958 } else if (vcpu->arch.pio.count) {
8959 if (!vcpu->arch.pio.in) {
8960 /* FIXME: return into emulator if single-stepping. */
8961 vcpu->arch.pio.count = 0;
8964 vcpu->arch.complete_userspace_io = complete_emulated_pio;
8967 } else if (vcpu->mmio_needed) {
8968 ++vcpu->stat.mmio_exits;
8970 if (!vcpu->mmio_is_write)
8973 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
8974 } else if (vcpu->arch.complete_userspace_io) {
8977 } else if (r == EMULATION_RESTART)
8984 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
8985 toggle_interruptibility(vcpu, ctxt->interruptibility);
8986 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8989 * Note, EXCPT_DB is assumed to be fault-like as the emulator
8990 * only supports code breakpoints and general detect #DB, both
8991 * of which are fault-like.
8993 if (!ctxt->have_exception ||
8994 exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
8995 kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_INSTRUCTIONS);
8996 if (ctxt->is_branch)
8997 kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_BRANCH_INSTRUCTIONS);
8998 kvm_rip_write(vcpu, ctxt->eip);
8999 if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
9000 r = kvm_vcpu_do_singlestep(vcpu);
9001 static_call_cond(kvm_x86_update_emulated_instruction)(vcpu);
9002 __kvm_set_rflags(vcpu, ctxt->eflags);
9006 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
9007 * do nothing, and it will be requested again as soon as
9008 * the shadow expires. But we still need to check here,
9009 * because POPF has no interrupt shadow.
9011 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
9012 kvm_make_request(KVM_REQ_EVENT, vcpu);
9014 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
9019 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
9021 return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
9023 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
9025 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
9026 void *insn, int insn_len)
9028 return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
9030 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
9032 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
9034 vcpu->arch.pio.count = 0;
9038 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
9040 vcpu->arch.pio.count = 0;
9042 if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
9045 return kvm_skip_emulated_instruction(vcpu);
9048 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
9049 unsigned short port)
9051 unsigned long val = kvm_rax_read(vcpu);
9052 int ret = emulator_pio_out(vcpu, size, port, &val, 1);
9058 * Workaround userspace that relies on old KVM behavior of %rip being
9059 * incremented prior to exiting to userspace to handle "OUT 0x7e".
9062 kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
9063 vcpu->arch.complete_userspace_io =
9064 complete_fast_pio_out_port_0x7e;
9065 kvm_skip_emulated_instruction(vcpu);
9067 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
9068 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
9073 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
9077 /* We should only ever be called with arch.pio.count equal to 1 */
9078 BUG_ON(vcpu->arch.pio.count != 1);
9080 if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
9081 vcpu->arch.pio.count = 0;
9085 /* For size less than 4 we merge, else we zero extend */
9086 val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
9088 complete_emulator_pio_in(vcpu, &val);
9089 kvm_rax_write(vcpu, val);
9091 return kvm_skip_emulated_instruction(vcpu);
9094 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
9095 unsigned short port)
9100 /* For size less than 4 we merge, else we zero extend */
9101 val = (size < 4) ? kvm_rax_read(vcpu) : 0;
9103 ret = emulator_pio_in(vcpu, size, port, &val, 1);
9105 kvm_rax_write(vcpu, val);
9109 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
9110 vcpu->arch.complete_userspace_io = complete_fast_pio_in;
9115 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
9120 ret = kvm_fast_pio_in(vcpu, size, port);
9122 ret = kvm_fast_pio_out(vcpu, size, port);
9123 return ret && kvm_skip_emulated_instruction(vcpu);
9125 EXPORT_SYMBOL_GPL(kvm_fast_pio);
9127 static int kvmclock_cpu_down_prep(unsigned int cpu)
9129 __this_cpu_write(cpu_tsc_khz, 0);
9133 static void tsc_khz_changed(void *data)
9135 struct cpufreq_freqs *freq = data;
9136 unsigned long khz = 0;
9138 WARN_ON_ONCE(boot_cpu_has(X86_FEATURE_CONSTANT_TSC));
9143 khz = cpufreq_quick_get(raw_smp_processor_id());
9146 __this_cpu_write(cpu_tsc_khz, khz);
9149 #ifdef CONFIG_X86_64
9150 static void kvm_hyperv_tsc_notifier(void)
9155 mutex_lock(&kvm_lock);
9156 list_for_each_entry(kvm, &vm_list, vm_list)
9157 kvm_make_mclock_inprogress_request(kvm);
9159 /* no guest entries from this point */
9160 hyperv_stop_tsc_emulation();
9162 /* TSC frequency always matches when on Hyper-V */
9163 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
9164 for_each_present_cpu(cpu)
9165 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
9167 kvm_caps.max_guest_tsc_khz = tsc_khz;
9169 list_for_each_entry(kvm, &vm_list, vm_list) {
9170 __kvm_start_pvclock_update(kvm);
9171 pvclock_update_vm_gtod_copy(kvm);
9172 kvm_end_pvclock_update(kvm);
9175 mutex_unlock(&kvm_lock);
9179 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
9182 struct kvm_vcpu *vcpu;
9187 * We allow guests to temporarily run on slowing clocks,
9188 * provided we notify them after, or to run on accelerating
9189 * clocks, provided we notify them before. Thus time never
9192 * However, we have a problem. We can't atomically update
9193 * the frequency of a given CPU from this function; it is
9194 * merely a notifier, which can be called from any CPU.
9195 * Changing the TSC frequency at arbitrary points in time
9196 * requires a recomputation of local variables related to
9197 * the TSC for each VCPU. We must flag these local variables
9198 * to be updated and be sure the update takes place with the
9199 * new frequency before any guests proceed.
9201 * Unfortunately, the combination of hotplug CPU and frequency
9202 * change creates an intractable locking scenario; the order
9203 * of when these callouts happen is undefined with respect to
9204 * CPU hotplug, and they can race with each other. As such,
9205 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
9206 * undefined; you can actually have a CPU frequency change take
9207 * place in between the computation of X and the setting of the
9208 * variable. To protect against this problem, all updates of
9209 * the per_cpu tsc_khz variable are done in an interrupt
9210 * protected IPI, and all callers wishing to update the value
9211 * must wait for a synchronous IPI to complete (which is trivial
9212 * if the caller is on the CPU already). This establishes the
9213 * necessary total order on variable updates.
9215 * Note that because a guest time update may take place
9216 * anytime after the setting of the VCPU's request bit, the
9217 * correct TSC value must be set before the request. However,
9218 * to ensure the update actually makes it to any guest which
9219 * starts running in hardware virtualization between the set
9220 * and the acquisition of the spinlock, we must also ping the
9221 * CPU after setting the request bit.
9225 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
9227 mutex_lock(&kvm_lock);
9228 list_for_each_entry(kvm, &vm_list, vm_list) {
9229 kvm_for_each_vcpu(i, vcpu, kvm) {
9230 if (vcpu->cpu != cpu)
9232 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9233 if (vcpu->cpu != raw_smp_processor_id())
9237 mutex_unlock(&kvm_lock);
9239 if (freq->old < freq->new && send_ipi) {
9241 * We upscale the frequency. Must make the guest
9242 * doesn't see old kvmclock values while running with
9243 * the new frequency, otherwise we risk the guest sees
9244 * time go backwards.
9246 * In case we update the frequency for another cpu
9247 * (which might be in guest context) send an interrupt
9248 * to kick the cpu out of guest context. Next time
9249 * guest context is entered kvmclock will be updated,
9250 * so the guest will not see stale values.
9252 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
9256 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
9259 struct cpufreq_freqs *freq = data;
9262 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
9264 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
9267 for_each_cpu(cpu, freq->policy->cpus)
9268 __kvmclock_cpufreq_notifier(freq, cpu);
9273 static struct notifier_block kvmclock_cpufreq_notifier_block = {
9274 .notifier_call = kvmclock_cpufreq_notifier
9277 static int kvmclock_cpu_online(unsigned int cpu)
9279 tsc_khz_changed(NULL);
9283 static void kvm_timer_init(void)
9285 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
9286 max_tsc_khz = tsc_khz;
9288 if (IS_ENABLED(CONFIG_CPU_FREQ)) {
9289 struct cpufreq_policy *policy;
9293 policy = cpufreq_cpu_get(cpu);
9295 if (policy->cpuinfo.max_freq)
9296 max_tsc_khz = policy->cpuinfo.max_freq;
9297 cpufreq_cpu_put(policy);
9301 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
9302 CPUFREQ_TRANSITION_NOTIFIER);
9304 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
9305 kvmclock_cpu_online, kvmclock_cpu_down_prep);
9309 #ifdef CONFIG_X86_64
9310 static void pvclock_gtod_update_fn(struct work_struct *work)
9313 struct kvm_vcpu *vcpu;
9316 mutex_lock(&kvm_lock);
9317 list_for_each_entry(kvm, &vm_list, vm_list)
9318 kvm_for_each_vcpu(i, vcpu, kvm)
9319 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
9320 atomic_set(&kvm_guest_has_master_clock, 0);
9321 mutex_unlock(&kvm_lock);
9324 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
9327 * Indirection to move queue_work() out of the tk_core.seq write held
9328 * region to prevent possible deadlocks against time accessors which
9329 * are invoked with work related locks held.
9331 static void pvclock_irq_work_fn(struct irq_work *w)
9333 queue_work(system_long_wq, &pvclock_gtod_work);
9336 static DEFINE_IRQ_WORK(pvclock_irq_work, pvclock_irq_work_fn);
9339 * Notification about pvclock gtod data update.
9341 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
9344 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
9345 struct timekeeper *tk = priv;
9347 update_pvclock_gtod(tk);
9350 * Disable master clock if host does not trust, or does not use,
9351 * TSC based clocksource. Delegate queue_work() to irq_work as
9352 * this is invoked with tk_core.seq write held.
9354 if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
9355 atomic_read(&kvm_guest_has_master_clock) != 0)
9356 irq_work_queue(&pvclock_irq_work);
9360 static struct notifier_block pvclock_gtod_notifier = {
9361 .notifier_call = pvclock_gtod_notify,
9365 static inline void kvm_ops_update(struct kvm_x86_init_ops *ops)
9367 memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
9369 #define __KVM_X86_OP(func) \
9370 static_call_update(kvm_x86_##func, kvm_x86_ops.func);
9371 #define KVM_X86_OP(func) \
9372 WARN_ON(!kvm_x86_ops.func); __KVM_X86_OP(func)
9373 #define KVM_X86_OP_OPTIONAL __KVM_X86_OP
9374 #define KVM_X86_OP_OPTIONAL_RET0(func) \
9375 static_call_update(kvm_x86_##func, (void *)kvm_x86_ops.func ? : \
9376 (void *)__static_call_return0);
9377 #include <asm/kvm-x86-ops.h>
9380 kvm_pmu_ops_update(ops->pmu_ops);
9383 static int kvm_x86_check_processor_compatibility(void)
9385 int cpu = smp_processor_id();
9386 struct cpuinfo_x86 *c = &cpu_data(cpu);
9389 * Compatibility checks are done when loading KVM and when enabling
9390 * hardware, e.g. during CPU hotplug, to ensure all online CPUs are
9391 * compatible, i.e. KVM should never perform a compatibility check on
9394 WARN_ON(!cpu_online(cpu));
9396 if (__cr4_reserved_bits(cpu_has, c) !=
9397 __cr4_reserved_bits(cpu_has, &boot_cpu_data))
9400 return static_call(kvm_x86_check_processor_compatibility)();
9403 static void kvm_x86_check_cpu_compat(void *ret)
9405 *(int *)ret = kvm_x86_check_processor_compatibility();
9408 static int __kvm_x86_vendor_init(struct kvm_x86_init_ops *ops)
9413 if (kvm_x86_ops.hardware_enable) {
9414 pr_err("already loaded vendor module '%s'\n", kvm_x86_ops.name);
9419 * KVM explicitly assumes that the guest has an FPU and
9420 * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
9421 * vCPU's FPU state as a fxregs_state struct.
9423 if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
9424 pr_err("inadequate fpu\n");
9428 if (IS_ENABLED(CONFIG_PREEMPT_RT) && !boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
9429 pr_err("RT requires X86_FEATURE_CONSTANT_TSC\n");
9434 * KVM assumes that PAT entry '0' encodes WB memtype and simply zeroes
9435 * the PAT bits in SPTEs. Bail if PAT[0] is programmed to something
9436 * other than WB. Note, EPT doesn't utilize the PAT, but don't bother
9437 * with an exception. PAT[0] is set to WB on RESET and also by the
9438 * kernel, i.e. failure indicates a kernel bug or broken firmware.
9440 if (rdmsrl_safe(MSR_IA32_CR_PAT, &host_pat) ||
9441 (host_pat & GENMASK(2, 0)) != 6) {
9442 pr_err("host PAT[0] is not WB\n");
9446 x86_emulator_cache = kvm_alloc_emulator_cache();
9447 if (!x86_emulator_cache) {
9448 pr_err("failed to allocate cache for x86 emulator\n");
9452 user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
9453 if (!user_return_msrs) {
9454 pr_err("failed to allocate percpu kvm_user_return_msrs\n");
9456 goto out_free_x86_emulator_cache;
9458 kvm_nr_uret_msrs = 0;
9460 r = kvm_mmu_vendor_module_init();
9462 goto out_free_percpu;
9464 if (boot_cpu_has(X86_FEATURE_XSAVE)) {
9465 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
9466 kvm_caps.supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
9469 rdmsrl_safe(MSR_EFER, &host_efer);
9471 if (boot_cpu_has(X86_FEATURE_XSAVES))
9472 rdmsrl(MSR_IA32_XSS, host_xss);
9474 kvm_init_pmu_capability(ops->pmu_ops);
9476 r = ops->hardware_setup();
9480 kvm_ops_update(ops);
9482 for_each_online_cpu(cpu) {
9483 smp_call_function_single(cpu, kvm_x86_check_cpu_compat, &r, 1);
9485 goto out_unwind_ops;
9489 * Point of no return! DO NOT add error paths below this point unless
9490 * absolutely necessary, as most operations from this point forward
9491 * require unwinding.
9495 if (pi_inject_timer == -1)
9496 pi_inject_timer = housekeeping_enabled(HK_TYPE_TIMER);
9497 #ifdef CONFIG_X86_64
9498 pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
9500 if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
9501 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
9504 kvm_register_perf_callbacks(ops->handle_intel_pt_intr);
9506 if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
9507 kvm_caps.supported_xss = 0;
9509 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
9510 cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
9511 #undef __kvm_cpu_cap_has
9513 if (kvm_caps.has_tsc_control) {
9515 * Make sure the user can only configure tsc_khz values that
9516 * fit into a signed integer.
9517 * A min value is not calculated because it will always
9518 * be 1 on all machines.
9520 u64 max = min(0x7fffffffULL,
9521 __scale_tsc(kvm_caps.max_tsc_scaling_ratio, tsc_khz));
9522 kvm_caps.max_guest_tsc_khz = max;
9524 kvm_caps.default_tsc_scaling_ratio = 1ULL << kvm_caps.tsc_scaling_ratio_frac_bits;
9525 kvm_init_msr_lists();
9529 kvm_x86_ops.hardware_enable = NULL;
9530 static_call(kvm_x86_hardware_unsetup)();
9532 kvm_mmu_vendor_module_exit();
9534 free_percpu(user_return_msrs);
9535 out_free_x86_emulator_cache:
9536 kmem_cache_destroy(x86_emulator_cache);
9540 int kvm_x86_vendor_init(struct kvm_x86_init_ops *ops)
9544 mutex_lock(&vendor_module_lock);
9545 r = __kvm_x86_vendor_init(ops);
9546 mutex_unlock(&vendor_module_lock);
9550 EXPORT_SYMBOL_GPL(kvm_x86_vendor_init);
9552 void kvm_x86_vendor_exit(void)
9554 kvm_unregister_perf_callbacks();
9556 #ifdef CONFIG_X86_64
9557 if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
9558 clear_hv_tscchange_cb();
9562 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
9563 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
9564 CPUFREQ_TRANSITION_NOTIFIER);
9565 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
9567 #ifdef CONFIG_X86_64
9568 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
9569 irq_work_sync(&pvclock_irq_work);
9570 cancel_work_sync(&pvclock_gtod_work);
9572 static_call(kvm_x86_hardware_unsetup)();
9573 kvm_mmu_vendor_module_exit();
9574 free_percpu(user_return_msrs);
9575 kmem_cache_destroy(x86_emulator_cache);
9576 #ifdef CONFIG_KVM_XEN
9577 static_key_deferred_flush(&kvm_xen_enabled);
9578 WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
9580 mutex_lock(&vendor_module_lock);
9581 kvm_x86_ops.hardware_enable = NULL;
9582 mutex_unlock(&vendor_module_lock);
9584 EXPORT_SYMBOL_GPL(kvm_x86_vendor_exit);
9586 static int __kvm_emulate_halt(struct kvm_vcpu *vcpu, int state, int reason)
9589 * The vCPU has halted, e.g. executed HLT. Update the run state if the
9590 * local APIC is in-kernel, the run loop will detect the non-runnable
9591 * state and halt the vCPU. Exit to userspace if the local APIC is
9592 * managed by userspace, in which case userspace is responsible for
9593 * handling wake events.
9595 ++vcpu->stat.halt_exits;
9596 if (lapic_in_kernel(vcpu)) {
9597 vcpu->arch.mp_state = state;
9600 vcpu->run->exit_reason = reason;
9605 int kvm_emulate_halt_noskip(struct kvm_vcpu *vcpu)
9607 return __kvm_emulate_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
9609 EXPORT_SYMBOL_GPL(kvm_emulate_halt_noskip);
9611 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
9613 int ret = kvm_skip_emulated_instruction(vcpu);
9615 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
9616 * KVM_EXIT_DEBUG here.
9618 return kvm_emulate_halt_noskip(vcpu) && ret;
9620 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
9622 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
9624 int ret = kvm_skip_emulated_instruction(vcpu);
9626 return __kvm_emulate_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD,
9627 KVM_EXIT_AP_RESET_HOLD) && ret;
9629 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
9631 #ifdef CONFIG_X86_64
9632 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
9633 unsigned long clock_type)
9635 struct kvm_clock_pairing clock_pairing;
9636 struct timespec64 ts;
9640 if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
9641 return -KVM_EOPNOTSUPP;
9644 * When tsc is in permanent catchup mode guests won't be able to use
9645 * pvclock_read_retry loop to get consistent view of pvclock
9647 if (vcpu->arch.tsc_always_catchup)
9648 return -KVM_EOPNOTSUPP;
9650 if (!kvm_get_walltime_and_clockread(&ts, &cycle))
9651 return -KVM_EOPNOTSUPP;
9653 clock_pairing.sec = ts.tv_sec;
9654 clock_pairing.nsec = ts.tv_nsec;
9655 clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
9656 clock_pairing.flags = 0;
9657 memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
9660 if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
9661 sizeof(struct kvm_clock_pairing)))
9669 * kvm_pv_kick_cpu_op: Kick a vcpu.
9671 * @apicid - apicid of vcpu to be kicked.
9673 static void kvm_pv_kick_cpu_op(struct kvm *kvm, int apicid)
9676 * All other fields are unused for APIC_DM_REMRD, but may be consumed by
9677 * common code, e.g. for tracing. Defer initialization to the compiler.
9679 struct kvm_lapic_irq lapic_irq = {
9680 .delivery_mode = APIC_DM_REMRD,
9681 .dest_mode = APIC_DEST_PHYSICAL,
9682 .shorthand = APIC_DEST_NOSHORT,
9686 kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
9689 bool kvm_apicv_activated(struct kvm *kvm)
9691 return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
9693 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
9695 bool kvm_vcpu_apicv_activated(struct kvm_vcpu *vcpu)
9697 ulong vm_reasons = READ_ONCE(vcpu->kvm->arch.apicv_inhibit_reasons);
9698 ulong vcpu_reasons = static_call(kvm_x86_vcpu_get_apicv_inhibit_reasons)(vcpu);
9700 return (vm_reasons | vcpu_reasons) == 0;
9702 EXPORT_SYMBOL_GPL(kvm_vcpu_apicv_activated);
9704 static void set_or_clear_apicv_inhibit(unsigned long *inhibits,
9705 enum kvm_apicv_inhibit reason, bool set)
9708 __set_bit(reason, inhibits);
9710 __clear_bit(reason, inhibits);
9712 trace_kvm_apicv_inhibit_changed(reason, set, *inhibits);
9715 static void kvm_apicv_init(struct kvm *kvm)
9717 unsigned long *inhibits = &kvm->arch.apicv_inhibit_reasons;
9719 init_rwsem(&kvm->arch.apicv_update_lock);
9721 set_or_clear_apicv_inhibit(inhibits, APICV_INHIBIT_REASON_ABSENT, true);
9724 set_or_clear_apicv_inhibit(inhibits,
9725 APICV_INHIBIT_REASON_DISABLE, true);
9728 static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id)
9730 struct kvm_vcpu *target = NULL;
9731 struct kvm_apic_map *map;
9733 vcpu->stat.directed_yield_attempted++;
9735 if (single_task_running())
9739 map = rcu_dereference(vcpu->kvm->arch.apic_map);
9741 if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
9742 target = map->phys_map[dest_id]->vcpu;
9746 if (!target || !READ_ONCE(target->ready))
9749 /* Ignore requests to yield to self */
9753 if (kvm_vcpu_yield_to(target) <= 0)
9756 vcpu->stat.directed_yield_successful++;
9762 static int complete_hypercall_exit(struct kvm_vcpu *vcpu)
9764 u64 ret = vcpu->run->hypercall.ret;
9766 if (!is_64_bit_mode(vcpu))
9768 kvm_rax_write(vcpu, ret);
9769 ++vcpu->stat.hypercalls;
9770 return kvm_skip_emulated_instruction(vcpu);
9773 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
9775 unsigned long nr, a0, a1, a2, a3, ret;
9778 if (kvm_xen_hypercall_enabled(vcpu->kvm))
9779 return kvm_xen_hypercall(vcpu);
9781 if (kvm_hv_hypercall_enabled(vcpu))
9782 return kvm_hv_hypercall(vcpu);
9784 nr = kvm_rax_read(vcpu);
9785 a0 = kvm_rbx_read(vcpu);
9786 a1 = kvm_rcx_read(vcpu);
9787 a2 = kvm_rdx_read(vcpu);
9788 a3 = kvm_rsi_read(vcpu);
9790 trace_kvm_hypercall(nr, a0, a1, a2, a3);
9792 op_64_bit = is_64_bit_hypercall(vcpu);
9801 if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
9809 case KVM_HC_VAPIC_POLL_IRQ:
9812 case KVM_HC_KICK_CPU:
9813 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
9816 kvm_pv_kick_cpu_op(vcpu->kvm, a1);
9817 kvm_sched_yield(vcpu, a1);
9820 #ifdef CONFIG_X86_64
9821 case KVM_HC_CLOCK_PAIRING:
9822 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
9825 case KVM_HC_SEND_IPI:
9826 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
9829 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
9831 case KVM_HC_SCHED_YIELD:
9832 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
9835 kvm_sched_yield(vcpu, a0);
9838 case KVM_HC_MAP_GPA_RANGE: {
9839 u64 gpa = a0, npages = a1, attrs = a2;
9842 if (!(vcpu->kvm->arch.hypercall_exit_enabled & (1 << KVM_HC_MAP_GPA_RANGE)))
9845 if (!PAGE_ALIGNED(gpa) || !npages ||
9846 gpa_to_gfn(gpa) + npages <= gpa_to_gfn(gpa)) {
9851 vcpu->run->exit_reason = KVM_EXIT_HYPERCALL;
9852 vcpu->run->hypercall.nr = KVM_HC_MAP_GPA_RANGE;
9853 vcpu->run->hypercall.args[0] = gpa;
9854 vcpu->run->hypercall.args[1] = npages;
9855 vcpu->run->hypercall.args[2] = attrs;
9856 vcpu->run->hypercall.flags = 0;
9858 vcpu->run->hypercall.flags |= KVM_EXIT_HYPERCALL_LONG_MODE;
9860 WARN_ON_ONCE(vcpu->run->hypercall.flags & KVM_EXIT_HYPERCALL_MBZ);
9861 vcpu->arch.complete_userspace_io = complete_hypercall_exit;
9871 kvm_rax_write(vcpu, ret);
9873 ++vcpu->stat.hypercalls;
9874 return kvm_skip_emulated_instruction(vcpu);
9876 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
9878 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
9880 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
9881 char instruction[3];
9882 unsigned long rip = kvm_rip_read(vcpu);
9885 * If the quirk is disabled, synthesize a #UD and let the guest pick up
9888 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_FIX_HYPERCALL_INSN)) {
9889 ctxt->exception.error_code_valid = false;
9890 ctxt->exception.vector = UD_VECTOR;
9891 ctxt->have_exception = true;
9892 return X86EMUL_PROPAGATE_FAULT;
9895 static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
9897 return emulator_write_emulated(ctxt, rip, instruction, 3,
9901 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
9903 return vcpu->run->request_interrupt_window &&
9904 likely(!pic_in_kernel(vcpu->kvm));
9907 /* Called within kvm->srcu read side. */
9908 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
9910 struct kvm_run *kvm_run = vcpu->run;
9912 kvm_run->if_flag = static_call(kvm_x86_get_if_flag)(vcpu);
9913 kvm_run->cr8 = kvm_get_cr8(vcpu);
9914 kvm_run->apic_base = kvm_get_apic_base(vcpu);
9916 kvm_run->ready_for_interrupt_injection =
9917 pic_in_kernel(vcpu->kvm) ||
9918 kvm_vcpu_ready_for_interrupt_injection(vcpu);
9921 kvm_run->flags |= KVM_RUN_X86_SMM;
9924 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
9928 if (!kvm_x86_ops.update_cr8_intercept)
9931 if (!lapic_in_kernel(vcpu))
9934 if (vcpu->arch.apic->apicv_active)
9937 if (!vcpu->arch.apic->vapic_addr)
9938 max_irr = kvm_lapic_find_highest_irr(vcpu);
9945 tpr = kvm_lapic_get_cr8(vcpu);
9947 static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
9951 int kvm_check_nested_events(struct kvm_vcpu *vcpu)
9953 if (kvm_test_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9954 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9958 return kvm_x86_ops.nested_ops->check_events(vcpu);
9961 static void kvm_inject_exception(struct kvm_vcpu *vcpu)
9963 trace_kvm_inj_exception(vcpu->arch.exception.vector,
9964 vcpu->arch.exception.has_error_code,
9965 vcpu->arch.exception.error_code,
9966 vcpu->arch.exception.injected);
9968 if (vcpu->arch.exception.error_code && !is_protmode(vcpu))
9969 vcpu->arch.exception.error_code = false;
9970 static_call(kvm_x86_inject_exception)(vcpu);
9974 * Check for any event (interrupt or exception) that is ready to be injected,
9975 * and if there is at least one event, inject the event with the highest
9976 * priority. This handles both "pending" events, i.e. events that have never
9977 * been injected into the guest, and "injected" events, i.e. events that were
9978 * injected as part of a previous VM-Enter, but weren't successfully delivered
9979 * and need to be re-injected.
9981 * Note, this is not guaranteed to be invoked on a guest instruction boundary,
9982 * i.e. doesn't guarantee that there's an event window in the guest. KVM must
9983 * be able to inject exceptions in the "middle" of an instruction, and so must
9984 * also be able to re-inject NMIs and IRQs in the middle of an instruction.
9985 * I.e. for exceptions and re-injected events, NOT invoking this on instruction
9986 * boundaries is necessary and correct.
9988 * For simplicity, KVM uses a single path to inject all events (except events
9989 * that are injected directly from L1 to L2) and doesn't explicitly track
9990 * instruction boundaries for asynchronous events. However, because VM-Exits
9991 * that can occur during instruction execution typically result in KVM skipping
9992 * the instruction or injecting an exception, e.g. instruction and exception
9993 * intercepts, and because pending exceptions have higher priority than pending
9994 * interrupts, KVM still honors instruction boundaries in most scenarios.
9996 * But, if a VM-Exit occurs during instruction execution, and KVM does NOT skip
9997 * the instruction or inject an exception, then KVM can incorrecty inject a new
9998 * asynchrounous event if the event became pending after the CPU fetched the
9999 * instruction (in the guest). E.g. if a page fault (#PF, #NPF, EPT violation)
10000 * occurs and is resolved by KVM, a coincident NMI, SMI, IRQ, etc... can be
10001 * injected on the restarted instruction instead of being deferred until the
10002 * instruction completes.
10004 * In practice, this virtualization hole is unlikely to be observed by the
10005 * guest, and even less likely to cause functional problems. To detect the
10006 * hole, the guest would have to trigger an event on a side effect of an early
10007 * phase of instruction execution, e.g. on the instruction fetch from memory.
10008 * And for it to be a functional problem, the guest would need to depend on the
10009 * ordering between that side effect, the instruction completing, _and_ the
10010 * delivery of the asynchronous event.
10012 static int kvm_check_and_inject_events(struct kvm_vcpu *vcpu,
10013 bool *req_immediate_exit)
10019 * Process nested events first, as nested VM-Exit supercedes event
10020 * re-injection. If there's an event queued for re-injection, it will
10021 * be saved into the appropriate vmc{b,s}12 fields on nested VM-Exit.
10023 if (is_guest_mode(vcpu))
10024 r = kvm_check_nested_events(vcpu);
10029 * Re-inject exceptions and events *especially* if immediate entry+exit
10030 * to/from L2 is needed, as any event that has already been injected
10031 * into L2 needs to complete its lifecycle before injecting a new event.
10033 * Don't re-inject an NMI or interrupt if there is a pending exception.
10034 * This collision arises if an exception occurred while vectoring the
10035 * injected event, KVM intercepted said exception, and KVM ultimately
10036 * determined the fault belongs to the guest and queues the exception
10037 * for injection back into the guest.
10039 * "Injected" interrupts can also collide with pending exceptions if
10040 * userspace ignores the "ready for injection" flag and blindly queues
10041 * an interrupt. In that case, prioritizing the exception is correct,
10042 * as the exception "occurred" before the exit to userspace. Trap-like
10043 * exceptions, e.g. most #DBs, have higher priority than interrupts.
10044 * And while fault-like exceptions, e.g. #GP and #PF, are the lowest
10045 * priority, they're only generated (pended) during instruction
10046 * execution, and interrupts are recognized at instruction boundaries.
10047 * Thus a pending fault-like exception means the fault occurred on the
10048 * *previous* instruction and must be serviced prior to recognizing any
10049 * new events in order to fully complete the previous instruction.
10051 if (vcpu->arch.exception.injected)
10052 kvm_inject_exception(vcpu);
10053 else if (kvm_is_exception_pending(vcpu))
10055 else if (vcpu->arch.nmi_injected)
10056 static_call(kvm_x86_inject_nmi)(vcpu);
10057 else if (vcpu->arch.interrupt.injected)
10058 static_call(kvm_x86_inject_irq)(vcpu, true);
10061 * Exceptions that morph to VM-Exits are handled above, and pending
10062 * exceptions on top of injected exceptions that do not VM-Exit should
10063 * either morph to #DF or, sadly, override the injected exception.
10065 WARN_ON_ONCE(vcpu->arch.exception.injected &&
10066 vcpu->arch.exception.pending);
10069 * Bail if immediate entry+exit to/from the guest is needed to complete
10070 * nested VM-Enter or event re-injection so that a different pending
10071 * event can be serviced (or if KVM needs to exit to userspace).
10073 * Otherwise, continue processing events even if VM-Exit occurred. The
10074 * VM-Exit will have cleared exceptions that were meant for L2, but
10075 * there may now be events that can be injected into L1.
10081 * A pending exception VM-Exit should either result in nested VM-Exit
10082 * or force an immediate re-entry and exit to/from L2, and exception
10083 * VM-Exits cannot be injected (flag should _never_ be set).
10085 WARN_ON_ONCE(vcpu->arch.exception_vmexit.injected ||
10086 vcpu->arch.exception_vmexit.pending);
10089 * New events, other than exceptions, cannot be injected if KVM needs
10090 * to re-inject a previous event. See above comments on re-injecting
10091 * for why pending exceptions get priority.
10093 can_inject = !kvm_event_needs_reinjection(vcpu);
10095 if (vcpu->arch.exception.pending) {
10097 * Fault-class exceptions, except #DBs, set RF=1 in the RFLAGS
10098 * value pushed on the stack. Trap-like exception and all #DBs
10099 * leave RF as-is (KVM follows Intel's behavior in this regard;
10100 * AMD states that code breakpoint #DBs excplitly clear RF=0).
10102 * Note, most versions of Intel's SDM and AMD's APM incorrectly
10103 * describe the behavior of General Detect #DBs, which are
10104 * fault-like. They do _not_ set RF, a la code breakpoints.
10106 if (exception_type(vcpu->arch.exception.vector) == EXCPT_FAULT)
10107 __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
10110 if (vcpu->arch.exception.vector == DB_VECTOR) {
10111 kvm_deliver_exception_payload(vcpu, &vcpu->arch.exception);
10112 if (vcpu->arch.dr7 & DR7_GD) {
10113 vcpu->arch.dr7 &= ~DR7_GD;
10114 kvm_update_dr7(vcpu);
10118 kvm_inject_exception(vcpu);
10120 vcpu->arch.exception.pending = false;
10121 vcpu->arch.exception.injected = true;
10123 can_inject = false;
10126 /* Don't inject interrupts if the user asked to avoid doing so */
10127 if (vcpu->guest_debug & KVM_GUESTDBG_BLOCKIRQ)
10131 * Finally, inject interrupt events. If an event cannot be injected
10132 * due to architectural conditions (e.g. IF=0) a window-open exit
10133 * will re-request KVM_REQ_EVENT. Sometimes however an event is pending
10134 * and can architecturally be injected, but we cannot do it right now:
10135 * an interrupt could have arrived just now and we have to inject it
10136 * as a vmexit, or there could already an event in the queue, which is
10137 * indicated by can_inject. In that case we request an immediate exit
10138 * in order to make progress and get back here for another iteration.
10139 * The kvm_x86_ops hooks communicate this by returning -EBUSY.
10141 #ifdef CONFIG_KVM_SMM
10142 if (vcpu->arch.smi_pending) {
10143 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
10147 vcpu->arch.smi_pending = false;
10148 ++vcpu->arch.smi_count;
10150 can_inject = false;
10152 static_call(kvm_x86_enable_smi_window)(vcpu);
10156 if (vcpu->arch.nmi_pending) {
10157 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
10161 --vcpu->arch.nmi_pending;
10162 vcpu->arch.nmi_injected = true;
10163 static_call(kvm_x86_inject_nmi)(vcpu);
10164 can_inject = false;
10165 WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
10167 if (vcpu->arch.nmi_pending)
10168 static_call(kvm_x86_enable_nmi_window)(vcpu);
10171 if (kvm_cpu_has_injectable_intr(vcpu)) {
10172 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
10176 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
10177 static_call(kvm_x86_inject_irq)(vcpu, false);
10178 WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
10180 if (kvm_cpu_has_injectable_intr(vcpu))
10181 static_call(kvm_x86_enable_irq_window)(vcpu);
10184 if (is_guest_mode(vcpu) &&
10185 kvm_x86_ops.nested_ops->has_events &&
10186 kvm_x86_ops.nested_ops->has_events(vcpu))
10187 *req_immediate_exit = true;
10190 * KVM must never queue a new exception while injecting an event; KVM
10191 * is done emulating and should only propagate the to-be-injected event
10192 * to the VMCS/VMCB. Queueing a new exception can put the vCPU into an
10193 * infinite loop as KVM will bail from VM-Enter to inject the pending
10194 * exception and start the cycle all over.
10196 * Exempt triple faults as they have special handling and won't put the
10197 * vCPU into an infinite loop. Triple fault can be queued when running
10198 * VMX without unrestricted guest, as that requires KVM to emulate Real
10199 * Mode events (see kvm_inject_realmode_interrupt()).
10201 WARN_ON_ONCE(vcpu->arch.exception.pending ||
10202 vcpu->arch.exception_vmexit.pending);
10207 *req_immediate_exit = true;
10213 static void process_nmi(struct kvm_vcpu *vcpu)
10215 unsigned limit = 2;
10218 * x86 is limited to one NMI running, and one NMI pending after it.
10219 * If an NMI is already in progress, limit further NMIs to just one.
10220 * Otherwise, allow two (and we'll inject the first one immediately).
10222 if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
10225 vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
10226 vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
10227 kvm_make_request(KVM_REQ_EVENT, vcpu);
10230 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
10231 unsigned long *vcpu_bitmap)
10233 kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC, vcpu_bitmap);
10236 void kvm_make_scan_ioapic_request(struct kvm *kvm)
10238 kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
10241 void __kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
10243 struct kvm_lapic *apic = vcpu->arch.apic;
10246 if (!lapic_in_kernel(vcpu))
10249 down_read(&vcpu->kvm->arch.apicv_update_lock);
10252 /* Do not activate APICV when APIC is disabled */
10253 activate = kvm_vcpu_apicv_activated(vcpu) &&
10254 (kvm_get_apic_mode(vcpu) != LAPIC_MODE_DISABLED);
10256 if (apic->apicv_active == activate)
10259 apic->apicv_active = activate;
10260 kvm_apic_update_apicv(vcpu);
10261 static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
10264 * When APICv gets disabled, we may still have injected interrupts
10265 * pending. At the same time, KVM_REQ_EVENT may not be set as APICv was
10266 * still active when the interrupt got accepted. Make sure
10267 * kvm_check_and_inject_events() is called to check for that.
10269 if (!apic->apicv_active)
10270 kvm_make_request(KVM_REQ_EVENT, vcpu);
10274 up_read(&vcpu->kvm->arch.apicv_update_lock);
10276 EXPORT_SYMBOL_GPL(__kvm_vcpu_update_apicv);
10278 static void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
10280 if (!lapic_in_kernel(vcpu))
10284 * Due to sharing page tables across vCPUs, the xAPIC memslot must be
10285 * deleted if any vCPU has xAPIC virtualization and x2APIC enabled, but
10286 * and hardware doesn't support x2APIC virtualization. E.g. some AMD
10287 * CPUs support AVIC but not x2APIC. KVM still allows enabling AVIC in
10288 * this case so that KVM can the AVIC doorbell to inject interrupts to
10289 * running vCPUs, but KVM must not create SPTEs for the APIC base as
10290 * the vCPU would incorrectly be able to access the vAPIC page via MMIO
10291 * despite being in x2APIC mode. For simplicity, inhibiting the APIC
10292 * access page is sticky.
10294 if (apic_x2apic_mode(vcpu->arch.apic) &&
10295 kvm_x86_ops.allow_apicv_in_x2apic_without_x2apic_virtualization)
10296 kvm_inhibit_apic_access_page(vcpu);
10298 __kvm_vcpu_update_apicv(vcpu);
10301 void __kvm_set_or_clear_apicv_inhibit(struct kvm *kvm,
10302 enum kvm_apicv_inhibit reason, bool set)
10304 unsigned long old, new;
10306 lockdep_assert_held_write(&kvm->arch.apicv_update_lock);
10308 if (!(kvm_x86_ops.required_apicv_inhibits & BIT(reason)))
10311 old = new = kvm->arch.apicv_inhibit_reasons;
10313 set_or_clear_apicv_inhibit(&new, reason, set);
10315 if (!!old != !!new) {
10317 * Kick all vCPUs before setting apicv_inhibit_reasons to avoid
10318 * false positives in the sanity check WARN in svm_vcpu_run().
10319 * This task will wait for all vCPUs to ack the kick IRQ before
10320 * updating apicv_inhibit_reasons, and all other vCPUs will
10321 * block on acquiring apicv_update_lock so that vCPUs can't
10322 * redo svm_vcpu_run() without seeing the new inhibit state.
10324 * Note, holding apicv_update_lock and taking it in the read
10325 * side (handling the request) also prevents other vCPUs from
10326 * servicing the request with a stale apicv_inhibit_reasons.
10328 kvm_make_all_cpus_request(kvm, KVM_REQ_APICV_UPDATE);
10329 kvm->arch.apicv_inhibit_reasons = new;
10331 unsigned long gfn = gpa_to_gfn(APIC_DEFAULT_PHYS_BASE);
10332 int idx = srcu_read_lock(&kvm->srcu);
10334 kvm_zap_gfn_range(kvm, gfn, gfn+1);
10335 srcu_read_unlock(&kvm->srcu, idx);
10338 kvm->arch.apicv_inhibit_reasons = new;
10342 void kvm_set_or_clear_apicv_inhibit(struct kvm *kvm,
10343 enum kvm_apicv_inhibit reason, bool set)
10348 down_write(&kvm->arch.apicv_update_lock);
10349 __kvm_set_or_clear_apicv_inhibit(kvm, reason, set);
10350 up_write(&kvm->arch.apicv_update_lock);
10352 EXPORT_SYMBOL_GPL(kvm_set_or_clear_apicv_inhibit);
10354 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
10356 if (!kvm_apic_present(vcpu))
10359 bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
10361 if (irqchip_split(vcpu->kvm))
10362 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
10364 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
10365 if (ioapic_in_kernel(vcpu->kvm))
10366 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
10369 if (is_guest_mode(vcpu))
10370 vcpu->arch.load_eoi_exitmap_pending = true;
10372 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
10375 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
10377 u64 eoi_exit_bitmap[4];
10379 if (!kvm_apic_hw_enabled(vcpu->arch.apic))
10382 if (to_hv_vcpu(vcpu)) {
10383 bitmap_or((ulong *)eoi_exit_bitmap,
10384 vcpu->arch.ioapic_handled_vectors,
10385 to_hv_synic(vcpu)->vec_bitmap, 256);
10386 static_call_cond(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
10390 static_call_cond(kvm_x86_load_eoi_exitmap)(
10391 vcpu, (u64 *)vcpu->arch.ioapic_handled_vectors);
10394 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
10395 unsigned long start, unsigned long end)
10397 unsigned long apic_address;
10400 * The physical address of apic access page is stored in the VMCS.
10401 * Update it when it becomes invalid.
10403 apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
10404 if (start <= apic_address && apic_address < end)
10405 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
10408 void kvm_arch_guest_memory_reclaimed(struct kvm *kvm)
10410 static_call_cond(kvm_x86_guest_memory_reclaimed)(kvm);
10413 static void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
10415 if (!lapic_in_kernel(vcpu))
10418 static_call_cond(kvm_x86_set_apic_access_page_addr)(vcpu);
10421 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
10423 smp_send_reschedule(vcpu->cpu);
10425 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
10428 * Called within kvm->srcu read side.
10429 * Returns 1 to let vcpu_run() continue the guest execution loop without
10430 * exiting to the userspace. Otherwise, the value will be returned to the
10433 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
10437 dm_request_for_irq_injection(vcpu) &&
10438 kvm_cpu_accept_dm_intr(vcpu);
10439 fastpath_t exit_fastpath;
10441 bool req_immediate_exit = false;
10443 if (kvm_request_pending(vcpu)) {
10444 if (kvm_check_request(KVM_REQ_VM_DEAD, vcpu)) {
10449 if (kvm_dirty_ring_check_request(vcpu)) {
10454 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
10455 if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
10460 if (kvm_check_request(KVM_REQ_MMU_FREE_OBSOLETE_ROOTS, vcpu))
10461 kvm_mmu_free_obsolete_roots(vcpu);
10462 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
10463 __kvm_migrate_timers(vcpu);
10464 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
10465 kvm_update_masterclock(vcpu->kvm);
10466 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
10467 kvm_gen_kvmclock_update(vcpu);
10468 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
10469 r = kvm_guest_time_update(vcpu);
10473 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
10474 kvm_mmu_sync_roots(vcpu);
10475 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
10476 kvm_mmu_load_pgd(vcpu);
10479 * Note, the order matters here, as flushing "all" TLB entries
10480 * also flushes the "current" TLB entries, i.e. servicing the
10481 * flush "all" will clear any request to flush "current".
10483 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
10484 kvm_vcpu_flush_tlb_all(vcpu);
10486 kvm_service_local_tlb_flush_requests(vcpu);
10489 * Fall back to a "full" guest flush if Hyper-V's precise
10490 * flushing fails. Note, Hyper-V's flushing is per-vCPU, but
10491 * the flushes are considered "remote" and not "local" because
10492 * the requests can be initiated from other vCPUs.
10494 if (kvm_check_request(KVM_REQ_HV_TLB_FLUSH, vcpu) &&
10495 kvm_hv_vcpu_flush_tlb(vcpu))
10496 kvm_vcpu_flush_tlb_guest(vcpu);
10498 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
10499 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
10503 if (kvm_test_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
10504 if (is_guest_mode(vcpu))
10505 kvm_x86_ops.nested_ops->triple_fault(vcpu);
10507 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
10508 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
10509 vcpu->mmio_needed = 0;
10514 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
10515 /* Page is swapped out. Do synthetic halt */
10516 vcpu->arch.apf.halted = true;
10520 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
10521 record_steal_time(vcpu);
10522 #ifdef CONFIG_KVM_SMM
10523 if (kvm_check_request(KVM_REQ_SMI, vcpu))
10526 if (kvm_check_request(KVM_REQ_NMI, vcpu))
10528 if (kvm_check_request(KVM_REQ_PMU, vcpu))
10529 kvm_pmu_handle_event(vcpu);
10530 if (kvm_check_request(KVM_REQ_PMI, vcpu))
10531 kvm_pmu_deliver_pmi(vcpu);
10532 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
10533 BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
10534 if (test_bit(vcpu->arch.pending_ioapic_eoi,
10535 vcpu->arch.ioapic_handled_vectors)) {
10536 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
10537 vcpu->run->eoi.vector =
10538 vcpu->arch.pending_ioapic_eoi;
10543 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
10544 vcpu_scan_ioapic(vcpu);
10545 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
10546 vcpu_load_eoi_exitmap(vcpu);
10547 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
10548 kvm_vcpu_reload_apic_access_page(vcpu);
10549 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
10550 vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
10551 vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
10552 vcpu->run->system_event.ndata = 0;
10556 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
10557 vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
10558 vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
10559 vcpu->run->system_event.ndata = 0;
10563 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
10564 struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
10566 vcpu->run->exit_reason = KVM_EXIT_HYPERV;
10567 vcpu->run->hyperv = hv_vcpu->exit;
10573 * KVM_REQ_HV_STIMER has to be processed after
10574 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
10575 * depend on the guest clock being up-to-date
10577 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
10578 kvm_hv_process_stimers(vcpu);
10579 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
10580 kvm_vcpu_update_apicv(vcpu);
10581 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
10582 kvm_check_async_pf_completion(vcpu);
10583 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
10584 static_call(kvm_x86_msr_filter_changed)(vcpu);
10586 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
10587 static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
10590 if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
10591 kvm_xen_has_interrupt(vcpu)) {
10592 ++vcpu->stat.req_event;
10593 r = kvm_apic_accept_events(vcpu);
10598 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
10603 r = kvm_check_and_inject_events(vcpu, &req_immediate_exit);
10609 static_call(kvm_x86_enable_irq_window)(vcpu);
10611 if (kvm_lapic_enabled(vcpu)) {
10612 update_cr8_intercept(vcpu);
10613 kvm_lapic_sync_to_vapic(vcpu);
10617 r = kvm_mmu_reload(vcpu);
10619 goto cancel_injection;
10624 static_call(kvm_x86_prepare_switch_to_guest)(vcpu);
10627 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
10628 * IPI are then delayed after guest entry, which ensures that they
10629 * result in virtual interrupt delivery.
10631 local_irq_disable();
10633 /* Store vcpu->apicv_active before vcpu->mode. */
10634 smp_store_release(&vcpu->mode, IN_GUEST_MODE);
10636 kvm_vcpu_srcu_read_unlock(vcpu);
10639 * 1) We should set ->mode before checking ->requests. Please see
10640 * the comment in kvm_vcpu_exiting_guest_mode().
10642 * 2) For APICv, we should set ->mode before checking PID.ON. This
10643 * pairs with the memory barrier implicit in pi_test_and_set_on
10644 * (see vmx_deliver_posted_interrupt).
10646 * 3) This also orders the write to mode from any reads to the page
10647 * tables done while the VCPU is running. Please see the comment
10648 * in kvm_flush_remote_tlbs.
10650 smp_mb__after_srcu_read_unlock();
10653 * Process pending posted interrupts to handle the case where the
10654 * notification IRQ arrived in the host, or was never sent (because the
10655 * target vCPU wasn't running). Do this regardless of the vCPU's APICv
10656 * status, KVM doesn't update assigned devices when APICv is inhibited,
10657 * i.e. they can post interrupts even if APICv is temporarily disabled.
10659 if (kvm_lapic_enabled(vcpu))
10660 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
10662 if (kvm_vcpu_exit_request(vcpu)) {
10663 vcpu->mode = OUTSIDE_GUEST_MODE;
10665 local_irq_enable();
10667 kvm_vcpu_srcu_read_lock(vcpu);
10669 goto cancel_injection;
10672 if (req_immediate_exit) {
10673 kvm_make_request(KVM_REQ_EVENT, vcpu);
10674 static_call(kvm_x86_request_immediate_exit)(vcpu);
10677 fpregs_assert_state_consistent();
10678 if (test_thread_flag(TIF_NEED_FPU_LOAD))
10679 switch_fpu_return();
10681 if (vcpu->arch.guest_fpu.xfd_err)
10682 wrmsrl(MSR_IA32_XFD_ERR, vcpu->arch.guest_fpu.xfd_err);
10684 if (unlikely(vcpu->arch.switch_db_regs)) {
10685 set_debugreg(0, 7);
10686 set_debugreg(vcpu->arch.eff_db[0], 0);
10687 set_debugreg(vcpu->arch.eff_db[1], 1);
10688 set_debugreg(vcpu->arch.eff_db[2], 2);
10689 set_debugreg(vcpu->arch.eff_db[3], 3);
10690 } else if (unlikely(hw_breakpoint_active())) {
10691 set_debugreg(0, 7);
10694 guest_timing_enter_irqoff();
10698 * Assert that vCPU vs. VM APICv state is consistent. An APICv
10699 * update must kick and wait for all vCPUs before toggling the
10700 * per-VM state, and responsing vCPUs must wait for the update
10701 * to complete before servicing KVM_REQ_APICV_UPDATE.
10703 WARN_ON_ONCE((kvm_vcpu_apicv_activated(vcpu) != kvm_vcpu_apicv_active(vcpu)) &&
10704 (kvm_get_apic_mode(vcpu) != LAPIC_MODE_DISABLED));
10706 exit_fastpath = static_call(kvm_x86_vcpu_run)(vcpu);
10707 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
10710 if (kvm_lapic_enabled(vcpu))
10711 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
10713 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
10714 exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
10720 * Do this here before restoring debug registers on the host. And
10721 * since we do this before handling the vmexit, a DR access vmexit
10722 * can (a) read the correct value of the debug registers, (b) set
10723 * KVM_DEBUGREG_WONT_EXIT again.
10725 if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
10726 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
10727 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
10728 kvm_update_dr0123(vcpu);
10729 kvm_update_dr7(vcpu);
10733 * If the guest has used debug registers, at least dr7
10734 * will be disabled while returning to the host.
10735 * If we don't have active breakpoints in the host, we don't
10736 * care about the messed up debug address registers. But if
10737 * we have some of them active, restore the old state.
10739 if (hw_breakpoint_active())
10740 hw_breakpoint_restore();
10742 vcpu->arch.last_vmentry_cpu = vcpu->cpu;
10743 vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
10745 vcpu->mode = OUTSIDE_GUEST_MODE;
10749 * Sync xfd before calling handle_exit_irqoff() which may
10750 * rely on the fact that guest_fpu::xfd is up-to-date (e.g.
10751 * in #NM irqoff handler).
10753 if (vcpu->arch.xfd_no_write_intercept)
10754 fpu_sync_guest_vmexit_xfd_state();
10756 static_call(kvm_x86_handle_exit_irqoff)(vcpu);
10758 if (vcpu->arch.guest_fpu.xfd_err)
10759 wrmsrl(MSR_IA32_XFD_ERR, 0);
10762 * Consume any pending interrupts, including the possible source of
10763 * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
10764 * An instruction is required after local_irq_enable() to fully unblock
10765 * interrupts on processors that implement an interrupt shadow, the
10766 * stat.exits increment will do nicely.
10768 kvm_before_interrupt(vcpu, KVM_HANDLING_IRQ);
10769 local_irq_enable();
10770 ++vcpu->stat.exits;
10771 local_irq_disable();
10772 kvm_after_interrupt(vcpu);
10775 * Wait until after servicing IRQs to account guest time so that any
10776 * ticks that occurred while running the guest are properly accounted
10777 * to the guest. Waiting until IRQs are enabled degrades the accuracy
10778 * of accounting via context tracking, but the loss of accuracy is
10779 * acceptable for all known use cases.
10781 guest_timing_exit_irqoff();
10783 local_irq_enable();
10786 kvm_vcpu_srcu_read_lock(vcpu);
10789 * Profile KVM exit RIPs:
10791 if (unlikely(prof_on == KVM_PROFILING)) {
10792 unsigned long rip = kvm_rip_read(vcpu);
10793 profile_hit(KVM_PROFILING, (void *)rip);
10796 if (unlikely(vcpu->arch.tsc_always_catchup))
10797 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10799 if (vcpu->arch.apic_attention)
10800 kvm_lapic_sync_from_vapic(vcpu);
10802 r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
10806 if (req_immediate_exit)
10807 kvm_make_request(KVM_REQ_EVENT, vcpu);
10808 static_call(kvm_x86_cancel_injection)(vcpu);
10809 if (unlikely(vcpu->arch.apic_attention))
10810 kvm_lapic_sync_from_vapic(vcpu);
10815 /* Called within kvm->srcu read side. */
10816 static inline int vcpu_block(struct kvm_vcpu *vcpu)
10820 if (!kvm_arch_vcpu_runnable(vcpu)) {
10822 * Switch to the software timer before halt-polling/blocking as
10823 * the guest's timer may be a break event for the vCPU, and the
10824 * hypervisor timer runs only when the CPU is in guest mode.
10825 * Switch before halt-polling so that KVM recognizes an expired
10826 * timer before blocking.
10828 hv_timer = kvm_lapic_hv_timer_in_use(vcpu);
10830 kvm_lapic_switch_to_sw_timer(vcpu);
10832 kvm_vcpu_srcu_read_unlock(vcpu);
10833 if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED)
10834 kvm_vcpu_halt(vcpu);
10836 kvm_vcpu_block(vcpu);
10837 kvm_vcpu_srcu_read_lock(vcpu);
10840 kvm_lapic_switch_to_hv_timer(vcpu);
10843 * If the vCPU is not runnable, a signal or another host event
10844 * of some kind is pending; service it without changing the
10845 * vCPU's activity state.
10847 if (!kvm_arch_vcpu_runnable(vcpu))
10852 * Evaluate nested events before exiting the halted state. This allows
10853 * the halt state to be recorded properly in the VMCS12's activity
10854 * state field (AMD does not have a similar field and a VM-Exit always
10855 * causes a spurious wakeup from HLT).
10857 if (is_guest_mode(vcpu)) {
10858 if (kvm_check_nested_events(vcpu) < 0)
10862 if (kvm_apic_accept_events(vcpu) < 0)
10864 switch(vcpu->arch.mp_state) {
10865 case KVM_MP_STATE_HALTED:
10866 case KVM_MP_STATE_AP_RESET_HOLD:
10867 vcpu->arch.pv.pv_unhalted = false;
10868 vcpu->arch.mp_state =
10869 KVM_MP_STATE_RUNNABLE;
10871 case KVM_MP_STATE_RUNNABLE:
10872 vcpu->arch.apf.halted = false;
10874 case KVM_MP_STATE_INIT_RECEIVED:
10883 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
10885 return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
10886 !vcpu->arch.apf.halted);
10889 /* Called within kvm->srcu read side. */
10890 static int vcpu_run(struct kvm_vcpu *vcpu)
10894 vcpu->arch.l1tf_flush_l1d = true;
10898 * If another guest vCPU requests a PV TLB flush in the middle
10899 * of instruction emulation, the rest of the emulation could
10900 * use a stale page translation. Assume that any code after
10901 * this point can start executing an instruction.
10903 vcpu->arch.at_instruction_boundary = false;
10904 if (kvm_vcpu_running(vcpu)) {
10905 r = vcpu_enter_guest(vcpu);
10907 r = vcpu_block(vcpu);
10913 kvm_clear_request(KVM_REQ_UNBLOCK, vcpu);
10914 if (kvm_xen_has_pending_events(vcpu))
10915 kvm_xen_inject_pending_events(vcpu);
10917 if (kvm_cpu_has_pending_timer(vcpu))
10918 kvm_inject_pending_timer_irqs(vcpu);
10920 if (dm_request_for_irq_injection(vcpu) &&
10921 kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
10923 vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
10924 ++vcpu->stat.request_irq_exits;
10928 if (__xfer_to_guest_mode_work_pending()) {
10929 kvm_vcpu_srcu_read_unlock(vcpu);
10930 r = xfer_to_guest_mode_handle_work(vcpu);
10931 kvm_vcpu_srcu_read_lock(vcpu);
10940 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
10942 return kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
10945 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
10947 BUG_ON(!vcpu->arch.pio.count);
10949 return complete_emulated_io(vcpu);
10953 * Implements the following, as a state machine:
10956 * for each fragment
10957 * for each mmio piece in the fragment
10964 * for each fragment
10965 * for each mmio piece in the fragment
10970 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
10972 struct kvm_run *run = vcpu->run;
10973 struct kvm_mmio_fragment *frag;
10976 BUG_ON(!vcpu->mmio_needed);
10978 /* Complete previous fragment */
10979 frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
10980 len = min(8u, frag->len);
10981 if (!vcpu->mmio_is_write)
10982 memcpy(frag->data, run->mmio.data, len);
10984 if (frag->len <= 8) {
10985 /* Switch to the next fragment. */
10987 vcpu->mmio_cur_fragment++;
10989 /* Go forward to the next mmio piece. */
10995 if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
10996 vcpu->mmio_needed = 0;
10998 /* FIXME: return into emulator if single-stepping. */
10999 if (vcpu->mmio_is_write)
11001 vcpu->mmio_read_completed = 1;
11002 return complete_emulated_io(vcpu);
11005 run->exit_reason = KVM_EXIT_MMIO;
11006 run->mmio.phys_addr = frag->gpa;
11007 if (vcpu->mmio_is_write)
11008 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
11009 run->mmio.len = min(8u, frag->len);
11010 run->mmio.is_write = vcpu->mmio_is_write;
11011 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
11015 /* Swap (qemu) user FPU context for the guest FPU context. */
11016 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
11018 /* Exclude PKRU, it's restored separately immediately after VM-Exit. */
11019 fpu_swap_kvm_fpstate(&vcpu->arch.guest_fpu, true);
11023 /* When vcpu_run ends, restore user space FPU context. */
11024 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
11026 fpu_swap_kvm_fpstate(&vcpu->arch.guest_fpu, false);
11027 ++vcpu->stat.fpu_reload;
11031 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
11033 struct kvm_queued_exception *ex = &vcpu->arch.exception;
11034 struct kvm_run *kvm_run = vcpu->run;
11038 kvm_sigset_activate(vcpu);
11039 kvm_run->flags = 0;
11040 kvm_load_guest_fpu(vcpu);
11042 kvm_vcpu_srcu_read_lock(vcpu);
11043 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
11044 if (kvm_run->immediate_exit) {
11049 * It should be impossible for the hypervisor timer to be in
11050 * use before KVM has ever run the vCPU.
11052 WARN_ON_ONCE(kvm_lapic_hv_timer_in_use(vcpu));
11054 kvm_vcpu_srcu_read_unlock(vcpu);
11055 kvm_vcpu_block(vcpu);
11056 kvm_vcpu_srcu_read_lock(vcpu);
11058 if (kvm_apic_accept_events(vcpu) < 0) {
11063 if (signal_pending(current)) {
11065 kvm_run->exit_reason = KVM_EXIT_INTR;
11066 ++vcpu->stat.signal_exits;
11071 if ((kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) ||
11072 (kvm_run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)) {
11077 if (kvm_run->kvm_dirty_regs) {
11078 r = sync_regs(vcpu);
11083 /* re-sync apic's tpr */
11084 if (!lapic_in_kernel(vcpu)) {
11085 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
11092 * If userspace set a pending exception and L2 is active, convert it to
11093 * a pending VM-Exit if L1 wants to intercept the exception.
11095 if (vcpu->arch.exception_from_userspace && is_guest_mode(vcpu) &&
11096 kvm_x86_ops.nested_ops->is_exception_vmexit(vcpu, ex->vector,
11098 kvm_queue_exception_vmexit(vcpu, ex->vector,
11099 ex->has_error_code, ex->error_code,
11100 ex->has_payload, ex->payload);
11101 ex->injected = false;
11102 ex->pending = false;
11104 vcpu->arch.exception_from_userspace = false;
11106 if (unlikely(vcpu->arch.complete_userspace_io)) {
11107 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
11108 vcpu->arch.complete_userspace_io = NULL;
11113 WARN_ON_ONCE(vcpu->arch.pio.count);
11114 WARN_ON_ONCE(vcpu->mmio_needed);
11117 if (kvm_run->immediate_exit) {
11122 r = static_call(kvm_x86_vcpu_pre_run)(vcpu);
11126 r = vcpu_run(vcpu);
11129 kvm_put_guest_fpu(vcpu);
11130 if (kvm_run->kvm_valid_regs)
11132 post_kvm_run_save(vcpu);
11133 kvm_vcpu_srcu_read_unlock(vcpu);
11135 kvm_sigset_deactivate(vcpu);
11140 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
11142 if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
11144 * We are here if userspace calls get_regs() in the middle of
11145 * instruction emulation. Registers state needs to be copied
11146 * back from emulation context to vcpu. Userspace shouldn't do
11147 * that usually, but some bad designed PV devices (vmware
11148 * backdoor interface) need this to work
11150 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
11151 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
11153 regs->rax = kvm_rax_read(vcpu);
11154 regs->rbx = kvm_rbx_read(vcpu);
11155 regs->rcx = kvm_rcx_read(vcpu);
11156 regs->rdx = kvm_rdx_read(vcpu);
11157 regs->rsi = kvm_rsi_read(vcpu);
11158 regs->rdi = kvm_rdi_read(vcpu);
11159 regs->rsp = kvm_rsp_read(vcpu);
11160 regs->rbp = kvm_rbp_read(vcpu);
11161 #ifdef CONFIG_X86_64
11162 regs->r8 = kvm_r8_read(vcpu);
11163 regs->r9 = kvm_r9_read(vcpu);
11164 regs->r10 = kvm_r10_read(vcpu);
11165 regs->r11 = kvm_r11_read(vcpu);
11166 regs->r12 = kvm_r12_read(vcpu);
11167 regs->r13 = kvm_r13_read(vcpu);
11168 regs->r14 = kvm_r14_read(vcpu);
11169 regs->r15 = kvm_r15_read(vcpu);
11172 regs->rip = kvm_rip_read(vcpu);
11173 regs->rflags = kvm_get_rflags(vcpu);
11176 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
11179 __get_regs(vcpu, regs);
11184 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
11186 vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
11187 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
11189 kvm_rax_write(vcpu, regs->rax);
11190 kvm_rbx_write(vcpu, regs->rbx);
11191 kvm_rcx_write(vcpu, regs->rcx);
11192 kvm_rdx_write(vcpu, regs->rdx);
11193 kvm_rsi_write(vcpu, regs->rsi);
11194 kvm_rdi_write(vcpu, regs->rdi);
11195 kvm_rsp_write(vcpu, regs->rsp);
11196 kvm_rbp_write(vcpu, regs->rbp);
11197 #ifdef CONFIG_X86_64
11198 kvm_r8_write(vcpu, regs->r8);
11199 kvm_r9_write(vcpu, regs->r9);
11200 kvm_r10_write(vcpu, regs->r10);
11201 kvm_r11_write(vcpu, regs->r11);
11202 kvm_r12_write(vcpu, regs->r12);
11203 kvm_r13_write(vcpu, regs->r13);
11204 kvm_r14_write(vcpu, regs->r14);
11205 kvm_r15_write(vcpu, regs->r15);
11208 kvm_rip_write(vcpu, regs->rip);
11209 kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
11211 vcpu->arch.exception.pending = false;
11212 vcpu->arch.exception_vmexit.pending = false;
11214 kvm_make_request(KVM_REQ_EVENT, vcpu);
11217 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
11220 __set_regs(vcpu, regs);
11225 static void __get_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
11227 struct desc_ptr dt;
11229 if (vcpu->arch.guest_state_protected)
11230 goto skip_protected_regs;
11232 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
11233 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
11234 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
11235 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
11236 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
11237 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
11239 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
11240 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
11242 static_call(kvm_x86_get_idt)(vcpu, &dt);
11243 sregs->idt.limit = dt.size;
11244 sregs->idt.base = dt.address;
11245 static_call(kvm_x86_get_gdt)(vcpu, &dt);
11246 sregs->gdt.limit = dt.size;
11247 sregs->gdt.base = dt.address;
11249 sregs->cr2 = vcpu->arch.cr2;
11250 sregs->cr3 = kvm_read_cr3(vcpu);
11252 skip_protected_regs:
11253 sregs->cr0 = kvm_read_cr0(vcpu);
11254 sregs->cr4 = kvm_read_cr4(vcpu);
11255 sregs->cr8 = kvm_get_cr8(vcpu);
11256 sregs->efer = vcpu->arch.efer;
11257 sregs->apic_base = kvm_get_apic_base(vcpu);
11260 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
11262 __get_sregs_common(vcpu, sregs);
11264 if (vcpu->arch.guest_state_protected)
11267 if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
11268 set_bit(vcpu->arch.interrupt.nr,
11269 (unsigned long *)sregs->interrupt_bitmap);
11272 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
11276 __get_sregs_common(vcpu, (struct kvm_sregs *)sregs2);
11278 if (vcpu->arch.guest_state_protected)
11281 if (is_pae_paging(vcpu)) {
11282 for (i = 0 ; i < 4 ; i++)
11283 sregs2->pdptrs[i] = kvm_pdptr_read(vcpu, i);
11284 sregs2->flags |= KVM_SREGS2_FLAGS_PDPTRS_VALID;
11288 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
11289 struct kvm_sregs *sregs)
11292 __get_sregs(vcpu, sregs);
11297 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
11298 struct kvm_mp_state *mp_state)
11303 if (kvm_mpx_supported())
11304 kvm_load_guest_fpu(vcpu);
11306 r = kvm_apic_accept_events(vcpu);
11311 if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
11312 vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
11313 vcpu->arch.pv.pv_unhalted)
11314 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
11316 mp_state->mp_state = vcpu->arch.mp_state;
11319 if (kvm_mpx_supported())
11320 kvm_put_guest_fpu(vcpu);
11325 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
11326 struct kvm_mp_state *mp_state)
11332 switch (mp_state->mp_state) {
11333 case KVM_MP_STATE_UNINITIALIZED:
11334 case KVM_MP_STATE_HALTED:
11335 case KVM_MP_STATE_AP_RESET_HOLD:
11336 case KVM_MP_STATE_INIT_RECEIVED:
11337 case KVM_MP_STATE_SIPI_RECEIVED:
11338 if (!lapic_in_kernel(vcpu))
11342 case KVM_MP_STATE_RUNNABLE:
11350 * Pending INITs are reported using KVM_SET_VCPU_EVENTS, disallow
11351 * forcing the guest into INIT/SIPI if those events are supposed to be
11352 * blocked. KVM prioritizes SMI over INIT, so reject INIT/SIPI state
11353 * if an SMI is pending as well.
11355 if ((!kvm_apic_init_sipi_allowed(vcpu) || vcpu->arch.smi_pending) &&
11356 (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
11357 mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
11360 if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
11361 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
11362 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
11364 vcpu->arch.mp_state = mp_state->mp_state;
11365 kvm_make_request(KVM_REQ_EVENT, vcpu);
11373 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
11374 int reason, bool has_error_code, u32 error_code)
11376 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
11379 init_emulate_ctxt(vcpu);
11381 ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
11382 has_error_code, error_code);
11384 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
11385 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
11386 vcpu->run->internal.ndata = 0;
11390 kvm_rip_write(vcpu, ctxt->eip);
11391 kvm_set_rflags(vcpu, ctxt->eflags);
11394 EXPORT_SYMBOL_GPL(kvm_task_switch);
11396 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
11398 if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
11400 * When EFER.LME and CR0.PG are set, the processor is in
11401 * 64-bit mode (though maybe in a 32-bit code segment).
11402 * CR4.PAE and EFER.LMA must be set.
11404 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
11406 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
11410 * Not in 64-bit mode: EFER.LMA is clear and the code
11411 * segment cannot be 64-bit.
11413 if (sregs->efer & EFER_LMA || sregs->cs.l)
11417 return kvm_is_valid_cr4(vcpu, sregs->cr4);
11420 static int __set_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs,
11421 int *mmu_reset_needed, bool update_pdptrs)
11423 struct msr_data apic_base_msr;
11425 struct desc_ptr dt;
11427 if (!kvm_is_valid_sregs(vcpu, sregs))
11430 apic_base_msr.data = sregs->apic_base;
11431 apic_base_msr.host_initiated = true;
11432 if (kvm_set_apic_base(vcpu, &apic_base_msr))
11435 if (vcpu->arch.guest_state_protected)
11438 dt.size = sregs->idt.limit;
11439 dt.address = sregs->idt.base;
11440 static_call(kvm_x86_set_idt)(vcpu, &dt);
11441 dt.size = sregs->gdt.limit;
11442 dt.address = sregs->gdt.base;
11443 static_call(kvm_x86_set_gdt)(vcpu, &dt);
11445 vcpu->arch.cr2 = sregs->cr2;
11446 *mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
11447 vcpu->arch.cr3 = sregs->cr3;
11448 kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
11449 static_call_cond(kvm_x86_post_set_cr3)(vcpu, sregs->cr3);
11451 kvm_set_cr8(vcpu, sregs->cr8);
11453 *mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
11454 static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
11456 *mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
11457 static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
11458 vcpu->arch.cr0 = sregs->cr0;
11460 *mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
11461 static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
11463 if (update_pdptrs) {
11464 idx = srcu_read_lock(&vcpu->kvm->srcu);
11465 if (is_pae_paging(vcpu)) {
11466 load_pdptrs(vcpu, kvm_read_cr3(vcpu));
11467 *mmu_reset_needed = 1;
11469 srcu_read_unlock(&vcpu->kvm->srcu, idx);
11472 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
11473 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
11474 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
11475 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
11476 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
11477 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
11479 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
11480 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
11482 update_cr8_intercept(vcpu);
11484 /* Older userspace won't unhalt the vcpu on reset. */
11485 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
11486 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
11487 !is_protmode(vcpu))
11488 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11493 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
11495 int pending_vec, max_bits;
11496 int mmu_reset_needed = 0;
11497 int ret = __set_sregs_common(vcpu, sregs, &mmu_reset_needed, true);
11502 if (mmu_reset_needed)
11503 kvm_mmu_reset_context(vcpu);
11505 max_bits = KVM_NR_INTERRUPTS;
11506 pending_vec = find_first_bit(
11507 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
11509 if (pending_vec < max_bits) {
11510 kvm_queue_interrupt(vcpu, pending_vec, false);
11511 pr_debug("Set back pending irq %d\n", pending_vec);
11512 kvm_make_request(KVM_REQ_EVENT, vcpu);
11517 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
11519 int mmu_reset_needed = 0;
11520 bool valid_pdptrs = sregs2->flags & KVM_SREGS2_FLAGS_PDPTRS_VALID;
11521 bool pae = (sregs2->cr0 & X86_CR0_PG) && (sregs2->cr4 & X86_CR4_PAE) &&
11522 !(sregs2->efer & EFER_LMA);
11525 if (sregs2->flags & ~KVM_SREGS2_FLAGS_PDPTRS_VALID)
11528 if (valid_pdptrs && (!pae || vcpu->arch.guest_state_protected))
11531 ret = __set_sregs_common(vcpu, (struct kvm_sregs *)sregs2,
11532 &mmu_reset_needed, !valid_pdptrs);
11536 if (valid_pdptrs) {
11537 for (i = 0; i < 4 ; i++)
11538 kvm_pdptr_write(vcpu, i, sregs2->pdptrs[i]);
11540 kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
11541 mmu_reset_needed = 1;
11542 vcpu->arch.pdptrs_from_userspace = true;
11544 if (mmu_reset_needed)
11545 kvm_mmu_reset_context(vcpu);
11549 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
11550 struct kvm_sregs *sregs)
11555 ret = __set_sregs(vcpu, sregs);
11560 static void kvm_arch_vcpu_guestdbg_update_apicv_inhibit(struct kvm *kvm)
11563 struct kvm_vcpu *vcpu;
11569 down_write(&kvm->arch.apicv_update_lock);
11571 kvm_for_each_vcpu(i, vcpu, kvm) {
11572 if (vcpu->guest_debug & KVM_GUESTDBG_BLOCKIRQ) {
11577 __kvm_set_or_clear_apicv_inhibit(kvm, APICV_INHIBIT_REASON_BLOCKIRQ, set);
11578 up_write(&kvm->arch.apicv_update_lock);
11581 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
11582 struct kvm_guest_debug *dbg)
11584 unsigned long rflags;
11587 if (vcpu->arch.guest_state_protected)
11592 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
11594 if (kvm_is_exception_pending(vcpu))
11596 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
11597 kvm_queue_exception(vcpu, DB_VECTOR);
11599 kvm_queue_exception(vcpu, BP_VECTOR);
11603 * Read rflags as long as potentially injected trace flags are still
11606 rflags = kvm_get_rflags(vcpu);
11608 vcpu->guest_debug = dbg->control;
11609 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
11610 vcpu->guest_debug = 0;
11612 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
11613 for (i = 0; i < KVM_NR_DB_REGS; ++i)
11614 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
11615 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
11617 for (i = 0; i < KVM_NR_DB_REGS; i++)
11618 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
11620 kvm_update_dr7(vcpu);
11622 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
11623 vcpu->arch.singlestep_rip = kvm_get_linear_rip(vcpu);
11626 * Trigger an rflags update that will inject or remove the trace
11629 kvm_set_rflags(vcpu, rflags);
11631 static_call(kvm_x86_update_exception_bitmap)(vcpu);
11633 kvm_arch_vcpu_guestdbg_update_apicv_inhibit(vcpu->kvm);
11643 * Translate a guest virtual address to a guest physical address.
11645 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
11646 struct kvm_translation *tr)
11648 unsigned long vaddr = tr->linear_address;
11654 idx = srcu_read_lock(&vcpu->kvm->srcu);
11655 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
11656 srcu_read_unlock(&vcpu->kvm->srcu, idx);
11657 tr->physical_address = gpa;
11658 tr->valid = gpa != INVALID_GPA;
11666 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
11668 struct fxregs_state *fxsave;
11670 if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
11675 fxsave = &vcpu->arch.guest_fpu.fpstate->regs.fxsave;
11676 memcpy(fpu->fpr, fxsave->st_space, 128);
11677 fpu->fcw = fxsave->cwd;
11678 fpu->fsw = fxsave->swd;
11679 fpu->ftwx = fxsave->twd;
11680 fpu->last_opcode = fxsave->fop;
11681 fpu->last_ip = fxsave->rip;
11682 fpu->last_dp = fxsave->rdp;
11683 memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
11689 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
11691 struct fxregs_state *fxsave;
11693 if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
11698 fxsave = &vcpu->arch.guest_fpu.fpstate->regs.fxsave;
11700 memcpy(fxsave->st_space, fpu->fpr, 128);
11701 fxsave->cwd = fpu->fcw;
11702 fxsave->swd = fpu->fsw;
11703 fxsave->twd = fpu->ftwx;
11704 fxsave->fop = fpu->last_opcode;
11705 fxsave->rip = fpu->last_ip;
11706 fxsave->rdp = fpu->last_dp;
11707 memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
11713 static void store_regs(struct kvm_vcpu *vcpu)
11715 BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
11717 if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
11718 __get_regs(vcpu, &vcpu->run->s.regs.regs);
11720 if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
11721 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
11723 if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
11724 kvm_vcpu_ioctl_x86_get_vcpu_events(
11725 vcpu, &vcpu->run->s.regs.events);
11728 static int sync_regs(struct kvm_vcpu *vcpu)
11730 if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
11731 __set_regs(vcpu, &vcpu->run->s.regs.regs);
11732 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
11734 if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
11735 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
11737 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
11739 if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
11740 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
11741 vcpu, &vcpu->run->s.regs.events))
11743 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
11749 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
11751 if (kvm_check_tsc_unstable() && kvm->created_vcpus)
11752 pr_warn_once("SMP vm created on host with unstable TSC; "
11753 "guest TSC will not be reliable\n");
11755 if (!kvm->arch.max_vcpu_ids)
11756 kvm->arch.max_vcpu_ids = KVM_MAX_VCPU_IDS;
11758 if (id >= kvm->arch.max_vcpu_ids)
11761 return static_call(kvm_x86_vcpu_precreate)(kvm);
11764 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
11769 vcpu->arch.last_vmentry_cpu = -1;
11770 vcpu->arch.regs_avail = ~0;
11771 vcpu->arch.regs_dirty = ~0;
11773 kvm_gpc_init(&vcpu->arch.pv_time, vcpu->kvm, vcpu, KVM_HOST_USES_PFN);
11775 if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
11776 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11778 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
11780 r = kvm_mmu_create(vcpu);
11784 if (irqchip_in_kernel(vcpu->kvm)) {
11785 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
11787 goto fail_mmu_destroy;
11790 * Defer evaluating inhibits until the vCPU is first run, as
11791 * this vCPU will not get notified of any changes until this
11792 * vCPU is visible to other vCPUs (marked online and added to
11793 * the set of vCPUs). Opportunistically mark APICv active as
11794 * VMX in particularly is highly unlikely to have inhibits.
11795 * Ignore the current per-VM APICv state so that vCPU creation
11796 * is guaranteed to run with a deterministic value, the request
11797 * will ensure the vCPU gets the correct state before VM-Entry.
11799 if (enable_apicv) {
11800 vcpu->arch.apic->apicv_active = true;
11801 kvm_make_request(KVM_REQ_APICV_UPDATE, vcpu);
11804 static_branch_inc(&kvm_has_noapic_vcpu);
11808 page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
11810 goto fail_free_lapic;
11811 vcpu->arch.pio_data = page_address(page);
11813 vcpu->arch.mce_banks = kcalloc(KVM_MAX_MCE_BANKS * 4, sizeof(u64),
11814 GFP_KERNEL_ACCOUNT);
11815 vcpu->arch.mci_ctl2_banks = kcalloc(KVM_MAX_MCE_BANKS, sizeof(u64),
11816 GFP_KERNEL_ACCOUNT);
11817 if (!vcpu->arch.mce_banks || !vcpu->arch.mci_ctl2_banks)
11818 goto fail_free_mce_banks;
11819 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
11821 if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
11822 GFP_KERNEL_ACCOUNT))
11823 goto fail_free_mce_banks;
11825 if (!alloc_emulate_ctxt(vcpu))
11826 goto free_wbinvd_dirty_mask;
11828 if (!fpu_alloc_guest_fpstate(&vcpu->arch.guest_fpu)) {
11829 pr_err("failed to allocate vcpu's fpu\n");
11830 goto free_emulate_ctxt;
11833 vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
11834 vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
11836 vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
11838 kvm_async_pf_hash_reset(vcpu);
11840 vcpu->arch.perf_capabilities = kvm_caps.supported_perf_cap;
11841 kvm_pmu_init(vcpu);
11843 vcpu->arch.pending_external_vector = -1;
11844 vcpu->arch.preempted_in_kernel = false;
11846 #if IS_ENABLED(CONFIG_HYPERV)
11847 vcpu->arch.hv_root_tdp = INVALID_PAGE;
11850 r = static_call(kvm_x86_vcpu_create)(vcpu);
11852 goto free_guest_fpu;
11854 vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
11855 vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
11856 kvm_xen_init_vcpu(vcpu);
11857 kvm_vcpu_mtrr_init(vcpu);
11859 kvm_set_tsc_khz(vcpu, vcpu->kvm->arch.default_tsc_khz);
11860 kvm_vcpu_reset(vcpu, false);
11861 kvm_init_mmu(vcpu);
11866 fpu_free_guest_fpstate(&vcpu->arch.guest_fpu);
11868 kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
11869 free_wbinvd_dirty_mask:
11870 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
11871 fail_free_mce_banks:
11872 kfree(vcpu->arch.mce_banks);
11873 kfree(vcpu->arch.mci_ctl2_banks);
11874 free_page((unsigned long)vcpu->arch.pio_data);
11876 kvm_free_lapic(vcpu);
11878 kvm_mmu_destroy(vcpu);
11882 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
11884 struct kvm *kvm = vcpu->kvm;
11886 if (mutex_lock_killable(&vcpu->mutex))
11889 kvm_synchronize_tsc(vcpu, 0);
11892 /* poll control enabled by default */
11893 vcpu->arch.msr_kvm_poll_control = 1;
11895 mutex_unlock(&vcpu->mutex);
11897 if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
11898 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
11899 KVMCLOCK_SYNC_PERIOD);
11902 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
11906 kvmclock_reset(vcpu);
11908 static_call(kvm_x86_vcpu_free)(vcpu);
11910 kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
11911 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
11912 fpu_free_guest_fpstate(&vcpu->arch.guest_fpu);
11914 kvm_xen_destroy_vcpu(vcpu);
11915 kvm_hv_vcpu_uninit(vcpu);
11916 kvm_pmu_destroy(vcpu);
11917 kfree(vcpu->arch.mce_banks);
11918 kfree(vcpu->arch.mci_ctl2_banks);
11919 kvm_free_lapic(vcpu);
11920 idx = srcu_read_lock(&vcpu->kvm->srcu);
11921 kvm_mmu_destroy(vcpu);
11922 srcu_read_unlock(&vcpu->kvm->srcu, idx);
11923 free_page((unsigned long)vcpu->arch.pio_data);
11924 kvfree(vcpu->arch.cpuid_entries);
11925 if (!lapic_in_kernel(vcpu))
11926 static_branch_dec(&kvm_has_noapic_vcpu);
11929 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
11931 struct kvm_cpuid_entry2 *cpuid_0x1;
11932 unsigned long old_cr0 = kvm_read_cr0(vcpu);
11933 unsigned long new_cr0;
11936 * Several of the "set" flows, e.g. ->set_cr0(), read other registers
11937 * to handle side effects. RESET emulation hits those flows and relies
11938 * on emulated/virtualized registers, including those that are loaded
11939 * into hardware, to be zeroed at vCPU creation. Use CRs as a sentinel
11940 * to detect improper or missing initialization.
11942 WARN_ON_ONCE(!init_event &&
11943 (old_cr0 || kvm_read_cr3(vcpu) || kvm_read_cr4(vcpu)));
11946 * SVM doesn't unconditionally VM-Exit on INIT and SHUTDOWN, thus it's
11947 * possible to INIT the vCPU while L2 is active. Force the vCPU back
11948 * into L1 as EFER.SVME is cleared on INIT (along with all other EFER
11949 * bits), i.e. virtualization is disabled.
11951 if (is_guest_mode(vcpu))
11952 kvm_leave_nested(vcpu);
11954 kvm_lapic_reset(vcpu, init_event);
11956 WARN_ON_ONCE(is_guest_mode(vcpu) || is_smm(vcpu));
11957 vcpu->arch.hflags = 0;
11959 vcpu->arch.smi_pending = 0;
11960 vcpu->arch.smi_count = 0;
11961 atomic_set(&vcpu->arch.nmi_queued, 0);
11962 vcpu->arch.nmi_pending = 0;
11963 vcpu->arch.nmi_injected = false;
11964 kvm_clear_interrupt_queue(vcpu);
11965 kvm_clear_exception_queue(vcpu);
11967 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
11968 kvm_update_dr0123(vcpu);
11969 vcpu->arch.dr6 = DR6_ACTIVE_LOW;
11970 vcpu->arch.dr7 = DR7_FIXED_1;
11971 kvm_update_dr7(vcpu);
11973 vcpu->arch.cr2 = 0;
11975 kvm_make_request(KVM_REQ_EVENT, vcpu);
11976 vcpu->arch.apf.msr_en_val = 0;
11977 vcpu->arch.apf.msr_int_val = 0;
11978 vcpu->arch.st.msr_val = 0;
11980 kvmclock_reset(vcpu);
11982 kvm_clear_async_pf_completion_queue(vcpu);
11983 kvm_async_pf_hash_reset(vcpu);
11984 vcpu->arch.apf.halted = false;
11986 if (vcpu->arch.guest_fpu.fpstate && kvm_mpx_supported()) {
11987 struct fpstate *fpstate = vcpu->arch.guest_fpu.fpstate;
11990 * All paths that lead to INIT are required to load the guest's
11991 * FPU state (because most paths are buried in KVM_RUN).
11994 kvm_put_guest_fpu(vcpu);
11996 fpstate_clear_xstate_component(fpstate, XFEATURE_BNDREGS);
11997 fpstate_clear_xstate_component(fpstate, XFEATURE_BNDCSR);
12000 kvm_load_guest_fpu(vcpu);
12004 kvm_pmu_reset(vcpu);
12005 vcpu->arch.smbase = 0x30000;
12007 vcpu->arch.msr_misc_features_enables = 0;
12008 vcpu->arch.ia32_misc_enable_msr = MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL |
12009 MSR_IA32_MISC_ENABLE_BTS_UNAVAIL;
12011 __kvm_set_xcr(vcpu, 0, XFEATURE_MASK_FP);
12012 __kvm_set_msr(vcpu, MSR_IA32_XSS, 0, true);
12015 /* All GPRs except RDX (handled below) are zeroed on RESET/INIT. */
12016 memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
12017 kvm_register_mark_dirty(vcpu, VCPU_REGS_RSP);
12020 * Fall back to KVM's default Family/Model/Stepping of 0x600 (P6/Athlon)
12021 * if no CPUID match is found. Note, it's impossible to get a match at
12022 * RESET since KVM emulates RESET before exposing the vCPU to userspace,
12023 * i.e. it's impossible for kvm_find_cpuid_entry() to find a valid entry
12024 * on RESET. But, go through the motions in case that's ever remedied.
12026 cpuid_0x1 = kvm_find_cpuid_entry(vcpu, 1);
12027 kvm_rdx_write(vcpu, cpuid_0x1 ? cpuid_0x1->eax : 0x600);
12029 static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
12031 kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
12032 kvm_rip_write(vcpu, 0xfff0);
12034 vcpu->arch.cr3 = 0;
12035 kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
12038 * CR0.CD/NW are set on RESET, preserved on INIT. Note, some versions
12039 * of Intel's SDM list CD/NW as being set on INIT, but they contradict
12040 * (or qualify) that with a footnote stating that CD/NW are preserved.
12042 new_cr0 = X86_CR0_ET;
12044 new_cr0 |= (old_cr0 & (X86_CR0_NW | X86_CR0_CD));
12046 new_cr0 |= X86_CR0_NW | X86_CR0_CD;
12048 static_call(kvm_x86_set_cr0)(vcpu, new_cr0);
12049 static_call(kvm_x86_set_cr4)(vcpu, 0);
12050 static_call(kvm_x86_set_efer)(vcpu, 0);
12051 static_call(kvm_x86_update_exception_bitmap)(vcpu);
12054 * On the standard CR0/CR4/EFER modification paths, there are several
12055 * complex conditions determining whether the MMU has to be reset and/or
12056 * which PCIDs have to be flushed. However, CR0.WP and the paging-related
12057 * bits in CR4 and EFER are irrelevant if CR0.PG was '0'; and a reset+flush
12058 * is needed anyway if CR0.PG was '1' (which can only happen for INIT, as
12059 * CR0 will be '0' prior to RESET). So we only need to check CR0.PG here.
12061 if (old_cr0 & X86_CR0_PG) {
12062 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
12063 kvm_mmu_reset_context(vcpu);
12067 * Intel's SDM states that all TLB entries are flushed on INIT. AMD's
12068 * APM states the TLBs are untouched by INIT, but it also states that
12069 * the TLBs are flushed on "External initialization of the processor."
12070 * Flush the guest TLB regardless of vendor, there is no meaningful
12071 * benefit in relying on the guest to flush the TLB immediately after
12072 * INIT. A spurious TLB flush is benign and likely negligible from a
12073 * performance perspective.
12076 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
12078 EXPORT_SYMBOL_GPL(kvm_vcpu_reset);
12080 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
12082 struct kvm_segment cs;
12084 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
12085 cs.selector = vector << 8;
12086 cs.base = vector << 12;
12087 kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
12088 kvm_rip_write(vcpu, 0);
12090 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
12092 int kvm_arch_hardware_enable(void)
12095 struct kvm_vcpu *vcpu;
12100 bool stable, backwards_tsc = false;
12102 kvm_user_return_msr_cpu_online();
12104 ret = kvm_x86_check_processor_compatibility();
12108 ret = static_call(kvm_x86_hardware_enable)();
12112 local_tsc = rdtsc();
12113 stable = !kvm_check_tsc_unstable();
12114 list_for_each_entry(kvm, &vm_list, vm_list) {
12115 kvm_for_each_vcpu(i, vcpu, kvm) {
12116 if (!stable && vcpu->cpu == smp_processor_id())
12117 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
12118 if (stable && vcpu->arch.last_host_tsc > local_tsc) {
12119 backwards_tsc = true;
12120 if (vcpu->arch.last_host_tsc > max_tsc)
12121 max_tsc = vcpu->arch.last_host_tsc;
12127 * Sometimes, even reliable TSCs go backwards. This happens on
12128 * platforms that reset TSC during suspend or hibernate actions, but
12129 * maintain synchronization. We must compensate. Fortunately, we can
12130 * detect that condition here, which happens early in CPU bringup,
12131 * before any KVM threads can be running. Unfortunately, we can't
12132 * bring the TSCs fully up to date with real time, as we aren't yet far
12133 * enough into CPU bringup that we know how much real time has actually
12134 * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
12135 * variables that haven't been updated yet.
12137 * So we simply find the maximum observed TSC above, then record the
12138 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
12139 * the adjustment will be applied. Note that we accumulate
12140 * adjustments, in case multiple suspend cycles happen before some VCPU
12141 * gets a chance to run again. In the event that no KVM threads get a
12142 * chance to run, we will miss the entire elapsed period, as we'll have
12143 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
12144 * loose cycle time. This isn't too big a deal, since the loss will be
12145 * uniform across all VCPUs (not to mention the scenario is extremely
12146 * unlikely). It is possible that a second hibernate recovery happens
12147 * much faster than a first, causing the observed TSC here to be
12148 * smaller; this would require additional padding adjustment, which is
12149 * why we set last_host_tsc to the local tsc observed here.
12151 * N.B. - this code below runs only on platforms with reliable TSC,
12152 * as that is the only way backwards_tsc is set above. Also note
12153 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
12154 * have the same delta_cyc adjustment applied if backwards_tsc
12155 * is detected. Note further, this adjustment is only done once,
12156 * as we reset last_host_tsc on all VCPUs to stop this from being
12157 * called multiple times (one for each physical CPU bringup).
12159 * Platforms with unreliable TSCs don't have to deal with this, they
12160 * will be compensated by the logic in vcpu_load, which sets the TSC to
12161 * catchup mode. This will catchup all VCPUs to real time, but cannot
12162 * guarantee that they stay in perfect synchronization.
12164 if (backwards_tsc) {
12165 u64 delta_cyc = max_tsc - local_tsc;
12166 list_for_each_entry(kvm, &vm_list, vm_list) {
12167 kvm->arch.backwards_tsc_observed = true;
12168 kvm_for_each_vcpu(i, vcpu, kvm) {
12169 vcpu->arch.tsc_offset_adjustment += delta_cyc;
12170 vcpu->arch.last_host_tsc = local_tsc;
12171 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
12175 * We have to disable TSC offset matching.. if you were
12176 * booting a VM while issuing an S4 host suspend....
12177 * you may have some problem. Solving this issue is
12178 * left as an exercise to the reader.
12180 kvm->arch.last_tsc_nsec = 0;
12181 kvm->arch.last_tsc_write = 0;
12188 void kvm_arch_hardware_disable(void)
12190 static_call(kvm_x86_hardware_disable)();
12191 drop_user_return_notifiers();
12194 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
12196 return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
12199 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
12201 return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
12204 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
12205 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
12207 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
12209 struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
12211 vcpu->arch.l1tf_flush_l1d = true;
12212 if (pmu->version && unlikely(pmu->event_count)) {
12213 pmu->need_cleanup = true;
12214 kvm_make_request(KVM_REQ_PMU, vcpu);
12216 static_call(kvm_x86_sched_in)(vcpu, cpu);
12219 void kvm_arch_free_vm(struct kvm *kvm)
12221 kfree(to_kvm_hv(kvm)->hv_pa_pg);
12222 __kvm_arch_free_vm(kvm);
12226 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
12229 unsigned long flags;
12234 ret = kvm_page_track_init(kvm);
12238 ret = kvm_mmu_init_vm(kvm);
12240 goto out_page_track;
12242 ret = static_call(kvm_x86_vm_init)(kvm);
12244 goto out_uninit_mmu;
12246 INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
12247 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
12248 atomic_set(&kvm->arch.noncoherent_dma_count, 0);
12250 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
12251 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
12252 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
12253 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
12254 &kvm->arch.irq_sources_bitmap);
12256 raw_spin_lock_init(&kvm->arch.tsc_write_lock);
12257 mutex_init(&kvm->arch.apic_map_lock);
12258 seqcount_raw_spinlock_init(&kvm->arch.pvclock_sc, &kvm->arch.tsc_write_lock);
12259 kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
12261 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
12262 pvclock_update_vm_gtod_copy(kvm);
12263 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
12265 kvm->arch.default_tsc_khz = max_tsc_khz ? : tsc_khz;
12266 kvm->arch.guest_can_read_msr_platform_info = true;
12267 kvm->arch.enable_pmu = enable_pmu;
12269 #if IS_ENABLED(CONFIG_HYPERV)
12270 spin_lock_init(&kvm->arch.hv_root_tdp_lock);
12271 kvm->arch.hv_root_tdp = INVALID_PAGE;
12274 INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
12275 INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
12277 kvm_apicv_init(kvm);
12278 kvm_hv_init_vm(kvm);
12279 kvm_xen_init_vm(kvm);
12284 kvm_mmu_uninit_vm(kvm);
12286 kvm_page_track_cleanup(kvm);
12291 int kvm_arch_post_init_vm(struct kvm *kvm)
12293 return kvm_mmu_post_init_vm(kvm);
12296 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
12299 kvm_mmu_unload(vcpu);
12303 static void kvm_unload_vcpu_mmus(struct kvm *kvm)
12306 struct kvm_vcpu *vcpu;
12308 kvm_for_each_vcpu(i, vcpu, kvm) {
12309 kvm_clear_async_pf_completion_queue(vcpu);
12310 kvm_unload_vcpu_mmu(vcpu);
12314 void kvm_arch_sync_events(struct kvm *kvm)
12316 cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
12317 cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
12322 * __x86_set_memory_region: Setup KVM internal memory slot
12324 * @kvm: the kvm pointer to the VM.
12325 * @id: the slot ID to setup.
12326 * @gpa: the GPA to install the slot (unused when @size == 0).
12327 * @size: the size of the slot. Set to zero to uninstall a slot.
12329 * This function helps to setup a KVM internal memory slot. Specify
12330 * @size > 0 to install a new slot, while @size == 0 to uninstall a
12331 * slot. The return code can be one of the following:
12333 * HVA: on success (uninstall will return a bogus HVA)
12336 * The caller should always use IS_ERR() to check the return value
12337 * before use. Note, the KVM internal memory slots are guaranteed to
12338 * remain valid and unchanged until the VM is destroyed, i.e., the
12339 * GPA->HVA translation will not change. However, the HVA is a user
12340 * address, i.e. its accessibility is not guaranteed, and must be
12341 * accessed via __copy_{to,from}_user().
12343 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
12347 unsigned long hva, old_npages;
12348 struct kvm_memslots *slots = kvm_memslots(kvm);
12349 struct kvm_memory_slot *slot;
12351 /* Called with kvm->slots_lock held. */
12352 if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
12353 return ERR_PTR_USR(-EINVAL);
12355 slot = id_to_memslot(slots, id);
12357 if (slot && slot->npages)
12358 return ERR_PTR_USR(-EEXIST);
12361 * MAP_SHARED to prevent internal slot pages from being moved
12364 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
12365 MAP_SHARED | MAP_ANONYMOUS, 0);
12366 if (IS_ERR_VALUE(hva))
12367 return (void __user *)hva;
12369 if (!slot || !slot->npages)
12372 old_npages = slot->npages;
12373 hva = slot->userspace_addr;
12376 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
12377 struct kvm_userspace_memory_region m;
12379 m.slot = id | (i << 16);
12381 m.guest_phys_addr = gpa;
12382 m.userspace_addr = hva;
12383 m.memory_size = size;
12384 r = __kvm_set_memory_region(kvm, &m);
12386 return ERR_PTR_USR(r);
12390 vm_munmap(hva, old_npages * PAGE_SIZE);
12392 return (void __user *)hva;
12394 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
12396 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
12398 kvm_mmu_pre_destroy_vm(kvm);
12401 void kvm_arch_destroy_vm(struct kvm *kvm)
12403 if (current->mm == kvm->mm) {
12405 * Free memory regions allocated on behalf of userspace,
12406 * unless the memory map has changed due to process exit
12409 mutex_lock(&kvm->slots_lock);
12410 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
12412 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
12414 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
12415 mutex_unlock(&kvm->slots_lock);
12417 kvm_unload_vcpu_mmus(kvm);
12418 static_call_cond(kvm_x86_vm_destroy)(kvm);
12419 kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
12420 kvm_pic_destroy(kvm);
12421 kvm_ioapic_destroy(kvm);
12422 kvm_destroy_vcpus(kvm);
12423 kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
12424 kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
12425 kvm_mmu_uninit_vm(kvm);
12426 kvm_page_track_cleanup(kvm);
12427 kvm_xen_destroy_vm(kvm);
12428 kvm_hv_destroy_vm(kvm);
12431 static void memslot_rmap_free(struct kvm_memory_slot *slot)
12435 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
12436 kvfree(slot->arch.rmap[i]);
12437 slot->arch.rmap[i] = NULL;
12441 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
12445 memslot_rmap_free(slot);
12447 for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
12448 kvfree(slot->arch.lpage_info[i - 1]);
12449 slot->arch.lpage_info[i - 1] = NULL;
12452 kvm_page_track_free_memslot(slot);
12455 int memslot_rmap_alloc(struct kvm_memory_slot *slot, unsigned long npages)
12457 const int sz = sizeof(*slot->arch.rmap[0]);
12460 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
12462 int lpages = __kvm_mmu_slot_lpages(slot, npages, level);
12464 if (slot->arch.rmap[i])
12467 slot->arch.rmap[i] = __vcalloc(lpages, sz, GFP_KERNEL_ACCOUNT);
12468 if (!slot->arch.rmap[i]) {
12469 memslot_rmap_free(slot);
12477 static int kvm_alloc_memslot_metadata(struct kvm *kvm,
12478 struct kvm_memory_slot *slot)
12480 unsigned long npages = slot->npages;
12484 * Clear out the previous array pointers for the KVM_MR_MOVE case. The
12485 * old arrays will be freed by __kvm_set_memory_region() if installing
12486 * the new memslot is successful.
12488 memset(&slot->arch, 0, sizeof(slot->arch));
12490 if (kvm_memslots_have_rmaps(kvm)) {
12491 r = memslot_rmap_alloc(slot, npages);
12496 for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
12497 struct kvm_lpage_info *linfo;
12498 unsigned long ugfn;
12502 lpages = __kvm_mmu_slot_lpages(slot, npages, level);
12504 linfo = __vcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
12508 slot->arch.lpage_info[i - 1] = linfo;
12510 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
12511 linfo[0].disallow_lpage = 1;
12512 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
12513 linfo[lpages - 1].disallow_lpage = 1;
12514 ugfn = slot->userspace_addr >> PAGE_SHIFT;
12516 * If the gfn and userspace address are not aligned wrt each
12517 * other, disable large page support for this slot.
12519 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
12522 for (j = 0; j < lpages; ++j)
12523 linfo[j].disallow_lpage = 1;
12527 if (kvm_page_track_create_memslot(kvm, slot, npages))
12533 memslot_rmap_free(slot);
12535 for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
12536 kvfree(slot->arch.lpage_info[i - 1]);
12537 slot->arch.lpage_info[i - 1] = NULL;
12542 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
12544 struct kvm_vcpu *vcpu;
12548 * memslots->generation has been incremented.
12549 * mmio generation may have reached its maximum value.
12551 kvm_mmu_invalidate_mmio_sptes(kvm, gen);
12553 /* Force re-initialization of steal_time cache */
12554 kvm_for_each_vcpu(i, vcpu, kvm)
12555 kvm_vcpu_kick(vcpu);
12558 int kvm_arch_prepare_memory_region(struct kvm *kvm,
12559 const struct kvm_memory_slot *old,
12560 struct kvm_memory_slot *new,
12561 enum kvm_mr_change change)
12563 if (change == KVM_MR_CREATE || change == KVM_MR_MOVE) {
12564 if ((new->base_gfn + new->npages - 1) > kvm_mmu_max_gfn())
12567 return kvm_alloc_memslot_metadata(kvm, new);
12570 if (change == KVM_MR_FLAGS_ONLY)
12571 memcpy(&new->arch, &old->arch, sizeof(old->arch));
12572 else if (WARN_ON_ONCE(change != KVM_MR_DELETE))
12579 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
12583 if (!kvm_x86_ops.cpu_dirty_log_size)
12586 nr_slots = atomic_read(&kvm->nr_memslots_dirty_logging);
12587 if ((enable && nr_slots == 1) || !nr_slots)
12588 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
12591 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
12592 struct kvm_memory_slot *old,
12593 const struct kvm_memory_slot *new,
12594 enum kvm_mr_change change)
12596 u32 old_flags = old ? old->flags : 0;
12597 u32 new_flags = new ? new->flags : 0;
12598 bool log_dirty_pages = new_flags & KVM_MEM_LOG_DIRTY_PAGES;
12601 * Update CPU dirty logging if dirty logging is being toggled. This
12602 * applies to all operations.
12604 if ((old_flags ^ new_flags) & KVM_MEM_LOG_DIRTY_PAGES)
12605 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
12608 * Nothing more to do for RO slots (which can't be dirtied and can't be
12609 * made writable) or CREATE/MOVE/DELETE of a slot.
12611 * For a memslot with dirty logging disabled:
12612 * CREATE: No dirty mappings will already exist.
12613 * MOVE/DELETE: The old mappings will already have been cleaned up by
12614 * kvm_arch_flush_shadow_memslot()
12616 * For a memslot with dirty logging enabled:
12617 * CREATE: No shadow pages exist, thus nothing to write-protect
12618 * and no dirty bits to clear.
12619 * MOVE/DELETE: The old mappings will already have been cleaned up by
12620 * kvm_arch_flush_shadow_memslot().
12622 if ((change != KVM_MR_FLAGS_ONLY) || (new_flags & KVM_MEM_READONLY))
12626 * READONLY and non-flags changes were filtered out above, and the only
12627 * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
12628 * logging isn't being toggled on or off.
12630 if (WARN_ON_ONCE(!((old_flags ^ new_flags) & KVM_MEM_LOG_DIRTY_PAGES)))
12633 if (!log_dirty_pages) {
12635 * Dirty logging tracks sptes in 4k granularity, meaning that
12636 * large sptes have to be split. If live migration succeeds,
12637 * the guest in the source machine will be destroyed and large
12638 * sptes will be created in the destination. However, if the
12639 * guest continues to run in the source machine (for example if
12640 * live migration fails), small sptes will remain around and
12641 * cause bad performance.
12643 * Scan sptes if dirty logging has been stopped, dropping those
12644 * which can be collapsed into a single large-page spte. Later
12645 * page faults will create the large-page sptes.
12647 kvm_mmu_zap_collapsible_sptes(kvm, new);
12650 * Initially-all-set does not require write protecting any page,
12651 * because they're all assumed to be dirty.
12653 if (kvm_dirty_log_manual_protect_and_init_set(kvm))
12656 if (READ_ONCE(eager_page_split))
12657 kvm_mmu_slot_try_split_huge_pages(kvm, new, PG_LEVEL_4K);
12659 if (kvm_x86_ops.cpu_dirty_log_size) {
12660 kvm_mmu_slot_leaf_clear_dirty(kvm, new);
12661 kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_2M);
12663 kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_4K);
12667 * Unconditionally flush the TLBs after enabling dirty logging.
12668 * A flush is almost always going to be necessary (see below),
12669 * and unconditionally flushing allows the helpers to omit
12670 * the subtly complex checks when removing write access.
12672 * Do the flush outside of mmu_lock to reduce the amount of
12673 * time mmu_lock is held. Flushing after dropping mmu_lock is
12674 * safe as KVM only needs to guarantee the slot is fully
12675 * write-protected before returning to userspace, i.e. before
12676 * userspace can consume the dirty status.
12678 * Flushing outside of mmu_lock requires KVM to be careful when
12679 * making decisions based on writable status of an SPTE, e.g. a
12680 * !writable SPTE doesn't guarantee a CPU can't perform writes.
12682 * Specifically, KVM also write-protects guest page tables to
12683 * monitor changes when using shadow paging, and must guarantee
12684 * no CPUs can write to those page before mmu_lock is dropped.
12685 * Because CPUs may have stale TLB entries at this point, a
12686 * !writable SPTE doesn't guarantee CPUs can't perform writes.
12688 * KVM also allows making SPTES writable outside of mmu_lock,
12689 * e.g. to allow dirty logging without taking mmu_lock.
12691 * To handle these scenarios, KVM uses a separate software-only
12692 * bit (MMU-writable) to track if a SPTE is !writable due to
12693 * a guest page table being write-protected (KVM clears the
12694 * MMU-writable flag when write-protecting for shadow paging).
12696 * The use of MMU-writable is also the primary motivation for
12697 * the unconditional flush. Because KVM must guarantee that a
12698 * CPU doesn't contain stale, writable TLB entries for a
12699 * !MMU-writable SPTE, KVM must flush if it encounters any
12700 * MMU-writable SPTE regardless of whether the actual hardware
12701 * writable bit was set. I.e. KVM is almost guaranteed to need
12702 * to flush, while unconditionally flushing allows the "remove
12703 * write access" helpers to ignore MMU-writable entirely.
12705 * See is_writable_pte() for more details (the case involving
12706 * access-tracked SPTEs is particularly relevant).
12708 kvm_arch_flush_remote_tlbs_memslot(kvm, new);
12712 void kvm_arch_commit_memory_region(struct kvm *kvm,
12713 struct kvm_memory_slot *old,
12714 const struct kvm_memory_slot *new,
12715 enum kvm_mr_change change)
12717 if (!kvm->arch.n_requested_mmu_pages &&
12718 (change == KVM_MR_CREATE || change == KVM_MR_DELETE)) {
12719 unsigned long nr_mmu_pages;
12721 nr_mmu_pages = kvm->nr_memslot_pages / KVM_MEMSLOT_PAGES_TO_MMU_PAGES_RATIO;
12722 nr_mmu_pages = max(nr_mmu_pages, KVM_MIN_ALLOC_MMU_PAGES);
12723 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
12726 kvm_mmu_slot_apply_flags(kvm, old, new, change);
12728 /* Free the arrays associated with the old memslot. */
12729 if (change == KVM_MR_MOVE)
12730 kvm_arch_free_memslot(kvm, old);
12733 void kvm_arch_flush_shadow_all(struct kvm *kvm)
12735 kvm_mmu_zap_all(kvm);
12738 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
12739 struct kvm_memory_slot *slot)
12741 kvm_page_track_flush_slot(kvm, slot);
12744 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
12746 return (is_guest_mode(vcpu) &&
12747 static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
12750 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
12752 if (!list_empty_careful(&vcpu->async_pf.done))
12755 if (kvm_apic_has_pending_init_or_sipi(vcpu) &&
12756 kvm_apic_init_sipi_allowed(vcpu))
12759 if (vcpu->arch.pv.pv_unhalted)
12762 if (kvm_is_exception_pending(vcpu))
12765 if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
12766 (vcpu->arch.nmi_pending &&
12767 static_call(kvm_x86_nmi_allowed)(vcpu, false)))
12770 #ifdef CONFIG_KVM_SMM
12771 if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
12772 (vcpu->arch.smi_pending &&
12773 static_call(kvm_x86_smi_allowed)(vcpu, false)))
12777 if (kvm_arch_interrupt_allowed(vcpu) &&
12778 (kvm_cpu_has_interrupt(vcpu) ||
12779 kvm_guest_apic_has_interrupt(vcpu)))
12782 if (kvm_hv_has_stimer_pending(vcpu))
12785 if (is_guest_mode(vcpu) &&
12786 kvm_x86_ops.nested_ops->has_events &&
12787 kvm_x86_ops.nested_ops->has_events(vcpu))
12790 if (kvm_xen_has_pending_events(vcpu))
12796 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
12798 return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
12801 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu *vcpu)
12803 if (kvm_vcpu_apicv_active(vcpu) &&
12804 static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
12810 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
12812 if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
12815 if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
12816 #ifdef CONFIG_KVM_SMM
12817 kvm_test_request(KVM_REQ_SMI, vcpu) ||
12819 kvm_test_request(KVM_REQ_EVENT, vcpu))
12822 return kvm_arch_dy_has_pending_interrupt(vcpu);
12825 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
12827 if (vcpu->arch.guest_state_protected)
12830 return vcpu->arch.preempted_in_kernel;
12833 unsigned long kvm_arch_vcpu_get_ip(struct kvm_vcpu *vcpu)
12835 return kvm_rip_read(vcpu);
12838 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
12840 return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
12843 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
12845 return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
12848 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
12850 /* Can't read the RIP when guest state is protected, just return 0 */
12851 if (vcpu->arch.guest_state_protected)
12854 if (is_64_bit_mode(vcpu))
12855 return kvm_rip_read(vcpu);
12856 return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
12857 kvm_rip_read(vcpu));
12859 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
12861 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
12863 return kvm_get_linear_rip(vcpu) == linear_rip;
12865 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
12867 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
12869 unsigned long rflags;
12871 rflags = static_call(kvm_x86_get_rflags)(vcpu);
12872 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
12873 rflags &= ~X86_EFLAGS_TF;
12876 EXPORT_SYMBOL_GPL(kvm_get_rflags);
12878 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
12880 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
12881 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
12882 rflags |= X86_EFLAGS_TF;
12883 static_call(kvm_x86_set_rflags)(vcpu, rflags);
12886 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
12888 __kvm_set_rflags(vcpu, rflags);
12889 kvm_make_request(KVM_REQ_EVENT, vcpu);
12891 EXPORT_SYMBOL_GPL(kvm_set_rflags);
12893 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
12895 BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
12897 return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
12900 static inline u32 kvm_async_pf_next_probe(u32 key)
12902 return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
12905 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12907 u32 key = kvm_async_pf_hash_fn(gfn);
12909 while (vcpu->arch.apf.gfns[key] != ~0)
12910 key = kvm_async_pf_next_probe(key);
12912 vcpu->arch.apf.gfns[key] = gfn;
12915 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
12918 u32 key = kvm_async_pf_hash_fn(gfn);
12920 for (i = 0; i < ASYNC_PF_PER_VCPU &&
12921 (vcpu->arch.apf.gfns[key] != gfn &&
12922 vcpu->arch.apf.gfns[key] != ~0); i++)
12923 key = kvm_async_pf_next_probe(key);
12928 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12930 return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
12933 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12937 i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
12939 if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
12943 vcpu->arch.apf.gfns[i] = ~0;
12945 j = kvm_async_pf_next_probe(j);
12946 if (vcpu->arch.apf.gfns[j] == ~0)
12948 k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
12950 * k lies cyclically in ]i,j]
12952 * |....j i.k.| or |.k..j i...|
12954 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
12955 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
12960 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
12962 u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
12964 return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
12968 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
12970 unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
12972 return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
12973 &token, offset, sizeof(token));
12976 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
12978 unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
12981 if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
12982 &val, offset, sizeof(val)))
12988 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
12991 if (!kvm_pv_async_pf_enabled(vcpu))
12994 if (vcpu->arch.apf.send_user_only &&
12995 static_call(kvm_x86_get_cpl)(vcpu) == 0)
12998 if (is_guest_mode(vcpu)) {
13000 * L1 needs to opt into the special #PF vmexits that are
13001 * used to deliver async page faults.
13003 return vcpu->arch.apf.delivery_as_pf_vmexit;
13006 * Play it safe in case the guest temporarily disables paging.
13007 * The real mode IDT in particular is unlikely to have a #PF
13010 return is_paging(vcpu);
13014 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
13016 if (unlikely(!lapic_in_kernel(vcpu) ||
13017 kvm_event_needs_reinjection(vcpu) ||
13018 kvm_is_exception_pending(vcpu)))
13021 if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
13025 * If interrupts are off we cannot even use an artificial
13028 return kvm_arch_interrupt_allowed(vcpu);
13031 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
13032 struct kvm_async_pf *work)
13034 struct x86_exception fault;
13036 trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
13037 kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
13039 if (kvm_can_deliver_async_pf(vcpu) &&
13040 !apf_put_user_notpresent(vcpu)) {
13041 fault.vector = PF_VECTOR;
13042 fault.error_code_valid = true;
13043 fault.error_code = 0;
13044 fault.nested_page_fault = false;
13045 fault.address = work->arch.token;
13046 fault.async_page_fault = true;
13047 kvm_inject_page_fault(vcpu, &fault);
13051 * It is not possible to deliver a paravirtualized asynchronous
13052 * page fault, but putting the guest in an artificial halt state
13053 * can be beneficial nevertheless: if an interrupt arrives, we
13054 * can deliver it timely and perhaps the guest will schedule
13055 * another process. When the instruction that triggered a page
13056 * fault is retried, hopefully the page will be ready in the host.
13058 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
13063 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
13064 struct kvm_async_pf *work)
13066 struct kvm_lapic_irq irq = {
13067 .delivery_mode = APIC_DM_FIXED,
13068 .vector = vcpu->arch.apf.vec
13071 if (work->wakeup_all)
13072 work->arch.token = ~0; /* broadcast wakeup */
13074 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
13075 trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
13077 if ((work->wakeup_all || work->notpresent_injected) &&
13078 kvm_pv_async_pf_enabled(vcpu) &&
13079 !apf_put_user_ready(vcpu, work->arch.token)) {
13080 vcpu->arch.apf.pageready_pending = true;
13081 kvm_apic_set_irq(vcpu, &irq, NULL);
13084 vcpu->arch.apf.halted = false;
13085 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
13088 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
13090 kvm_make_request(KVM_REQ_APF_READY, vcpu);
13091 if (!vcpu->arch.apf.pageready_pending)
13092 kvm_vcpu_kick(vcpu);
13095 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
13097 if (!kvm_pv_async_pf_enabled(vcpu))
13100 return kvm_lapic_enabled(vcpu) && apf_pageready_slot_free(vcpu);
13103 void kvm_arch_start_assignment(struct kvm *kvm)
13105 if (atomic_inc_return(&kvm->arch.assigned_device_count) == 1)
13106 static_call_cond(kvm_x86_pi_start_assignment)(kvm);
13108 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
13110 void kvm_arch_end_assignment(struct kvm *kvm)
13112 atomic_dec(&kvm->arch.assigned_device_count);
13114 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
13116 bool noinstr kvm_arch_has_assigned_device(struct kvm *kvm)
13118 return arch_atomic_read(&kvm->arch.assigned_device_count);
13120 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
13122 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
13124 atomic_inc(&kvm->arch.noncoherent_dma_count);
13126 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
13128 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
13130 atomic_dec(&kvm->arch.noncoherent_dma_count);
13132 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
13134 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
13136 return atomic_read(&kvm->arch.noncoherent_dma_count);
13138 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
13140 bool kvm_arch_has_irq_bypass(void)
13145 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
13146 struct irq_bypass_producer *prod)
13148 struct kvm_kernel_irqfd *irqfd =
13149 container_of(cons, struct kvm_kernel_irqfd, consumer);
13152 irqfd->producer = prod;
13153 kvm_arch_start_assignment(irqfd->kvm);
13154 ret = static_call(kvm_x86_pi_update_irte)(irqfd->kvm,
13155 prod->irq, irqfd->gsi, 1);
13158 kvm_arch_end_assignment(irqfd->kvm);
13163 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
13164 struct irq_bypass_producer *prod)
13167 struct kvm_kernel_irqfd *irqfd =
13168 container_of(cons, struct kvm_kernel_irqfd, consumer);
13170 WARN_ON(irqfd->producer != prod);
13171 irqfd->producer = NULL;
13174 * When producer of consumer is unregistered, we change back to
13175 * remapped mode, so we can re-use the current implementation
13176 * when the irq is masked/disabled or the consumer side (KVM
13177 * int this case doesn't want to receive the interrupts.
13179 ret = static_call(kvm_x86_pi_update_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
13181 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
13182 " fails: %d\n", irqfd->consumer.token, ret);
13184 kvm_arch_end_assignment(irqfd->kvm);
13187 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
13188 uint32_t guest_irq, bool set)
13190 return static_call(kvm_x86_pi_update_irte)(kvm, host_irq, guest_irq, set);
13193 bool kvm_arch_irqfd_route_changed(struct kvm_kernel_irq_routing_entry *old,
13194 struct kvm_kernel_irq_routing_entry *new)
13196 if (new->type != KVM_IRQ_ROUTING_MSI)
13199 return !!memcmp(&old->msi, &new->msi, sizeof(new->msi));
13202 bool kvm_vector_hashing_enabled(void)
13204 return vector_hashing;
13207 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
13209 return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
13211 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
13214 int kvm_spec_ctrl_test_value(u64 value)
13217 * test that setting IA32_SPEC_CTRL to given value
13218 * is allowed by the host processor
13222 unsigned long flags;
13225 local_irq_save(flags);
13227 if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
13229 else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
13232 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
13234 local_irq_restore(flags);
13238 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
13240 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
13242 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
13243 struct x86_exception fault;
13244 u64 access = error_code &
13245 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
13247 if (!(error_code & PFERR_PRESENT_MASK) ||
13248 mmu->gva_to_gpa(vcpu, mmu, gva, access, &fault) != INVALID_GPA) {
13250 * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
13251 * tables probably do not match the TLB. Just proceed
13252 * with the error code that the processor gave.
13254 fault.vector = PF_VECTOR;
13255 fault.error_code_valid = true;
13256 fault.error_code = error_code;
13257 fault.nested_page_fault = false;
13258 fault.address = gva;
13259 fault.async_page_fault = false;
13261 vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
13263 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
13266 * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
13267 * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
13268 * indicates whether exit to userspace is needed.
13270 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
13271 struct x86_exception *e)
13273 if (r == X86EMUL_PROPAGATE_FAULT) {
13274 if (KVM_BUG_ON(!e, vcpu->kvm))
13277 kvm_inject_emulated_page_fault(vcpu, e);
13282 * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
13283 * while handling a VMX instruction KVM could've handled the request
13284 * correctly by exiting to userspace and performing I/O but there
13285 * doesn't seem to be a real use-case behind such requests, just return
13286 * KVM_EXIT_INTERNAL_ERROR for now.
13288 kvm_prepare_emulation_failure_exit(vcpu);
13292 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
13294 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
13297 struct x86_exception e;
13304 r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
13305 if (r != X86EMUL_CONTINUE)
13306 return kvm_handle_memory_failure(vcpu, r, &e);
13308 if (operand.pcid >> 12 != 0) {
13309 kvm_inject_gp(vcpu, 0);
13313 pcid_enabled = kvm_is_cr4_bit_set(vcpu, X86_CR4_PCIDE);
13316 case INVPCID_TYPE_INDIV_ADDR:
13317 if ((!pcid_enabled && (operand.pcid != 0)) ||
13318 is_noncanonical_address(operand.gla, vcpu)) {
13319 kvm_inject_gp(vcpu, 0);
13322 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
13323 return kvm_skip_emulated_instruction(vcpu);
13325 case INVPCID_TYPE_SINGLE_CTXT:
13326 if (!pcid_enabled && (operand.pcid != 0)) {
13327 kvm_inject_gp(vcpu, 0);
13331 kvm_invalidate_pcid(vcpu, operand.pcid);
13332 return kvm_skip_emulated_instruction(vcpu);
13334 case INVPCID_TYPE_ALL_NON_GLOBAL:
13336 * Currently, KVM doesn't mark global entries in the shadow
13337 * page tables, so a non-global flush just degenerates to a
13338 * global flush. If needed, we could optimize this later by
13339 * keeping track of global entries in shadow page tables.
13343 case INVPCID_TYPE_ALL_INCL_GLOBAL:
13344 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
13345 return kvm_skip_emulated_instruction(vcpu);
13348 kvm_inject_gp(vcpu, 0);
13352 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
13354 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
13356 struct kvm_run *run = vcpu->run;
13357 struct kvm_mmio_fragment *frag;
13360 BUG_ON(!vcpu->mmio_needed);
13362 /* Complete previous fragment */
13363 frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
13364 len = min(8u, frag->len);
13365 if (!vcpu->mmio_is_write)
13366 memcpy(frag->data, run->mmio.data, len);
13368 if (frag->len <= 8) {
13369 /* Switch to the next fragment. */
13371 vcpu->mmio_cur_fragment++;
13373 /* Go forward to the next mmio piece. */
13379 if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
13380 vcpu->mmio_needed = 0;
13382 // VMG change, at this point, we're always done
13383 // RIP has already been advanced
13387 // More MMIO is needed
13388 run->mmio.phys_addr = frag->gpa;
13389 run->mmio.len = min(8u, frag->len);
13390 run->mmio.is_write = vcpu->mmio_is_write;
13391 if (run->mmio.is_write)
13392 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
13393 run->exit_reason = KVM_EXIT_MMIO;
13395 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
13400 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
13404 struct kvm_mmio_fragment *frag;
13409 handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
13410 if (handled == bytes)
13417 /*TODO: Check if need to increment number of frags */
13418 frag = vcpu->mmio_fragments;
13419 vcpu->mmio_nr_fragments = 1;
13424 vcpu->mmio_needed = 1;
13425 vcpu->mmio_cur_fragment = 0;
13427 vcpu->run->mmio.phys_addr = gpa;
13428 vcpu->run->mmio.len = min(8u, frag->len);
13429 vcpu->run->mmio.is_write = 1;
13430 memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
13431 vcpu->run->exit_reason = KVM_EXIT_MMIO;
13433 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
13437 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
13439 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
13443 struct kvm_mmio_fragment *frag;
13448 handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
13449 if (handled == bytes)
13456 /*TODO: Check if need to increment number of frags */
13457 frag = vcpu->mmio_fragments;
13458 vcpu->mmio_nr_fragments = 1;
13463 vcpu->mmio_needed = 1;
13464 vcpu->mmio_cur_fragment = 0;
13466 vcpu->run->mmio.phys_addr = gpa;
13467 vcpu->run->mmio.len = min(8u, frag->len);
13468 vcpu->run->mmio.is_write = 0;
13469 vcpu->run->exit_reason = KVM_EXIT_MMIO;
13471 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
13475 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
13477 static void advance_sev_es_emulated_pio(struct kvm_vcpu *vcpu, unsigned count, int size)
13479 vcpu->arch.sev_pio_count -= count;
13480 vcpu->arch.sev_pio_data += count * size;
13483 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
13484 unsigned int port);
13486 static int complete_sev_es_emulated_outs(struct kvm_vcpu *vcpu)
13488 int size = vcpu->arch.pio.size;
13489 int port = vcpu->arch.pio.port;
13491 vcpu->arch.pio.count = 0;
13492 if (vcpu->arch.sev_pio_count)
13493 return kvm_sev_es_outs(vcpu, size, port);
13497 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
13501 unsigned int count =
13502 min_t(unsigned int, PAGE_SIZE / size, vcpu->arch.sev_pio_count);
13503 int ret = emulator_pio_out(vcpu, size, port, vcpu->arch.sev_pio_data, count);
13505 /* memcpy done already by emulator_pio_out. */
13506 advance_sev_es_emulated_pio(vcpu, count, size);
13510 /* Emulation done by the kernel. */
13511 if (!vcpu->arch.sev_pio_count)
13515 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_outs;
13519 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
13520 unsigned int port);
13522 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
13524 unsigned count = vcpu->arch.pio.count;
13525 int size = vcpu->arch.pio.size;
13526 int port = vcpu->arch.pio.port;
13528 complete_emulator_pio_in(vcpu, vcpu->arch.sev_pio_data);
13529 advance_sev_es_emulated_pio(vcpu, count, size);
13530 if (vcpu->arch.sev_pio_count)
13531 return kvm_sev_es_ins(vcpu, size, port);
13535 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
13539 unsigned int count =
13540 min_t(unsigned int, PAGE_SIZE / size, vcpu->arch.sev_pio_count);
13541 if (!emulator_pio_in(vcpu, size, port, vcpu->arch.sev_pio_data, count))
13544 /* Emulation done by the kernel. */
13545 advance_sev_es_emulated_pio(vcpu, count, size);
13546 if (!vcpu->arch.sev_pio_count)
13550 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
13554 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
13555 unsigned int port, void *data, unsigned int count,
13558 vcpu->arch.sev_pio_data = data;
13559 vcpu->arch.sev_pio_count = count;
13560 return in ? kvm_sev_es_ins(vcpu, size, port)
13561 : kvm_sev_es_outs(vcpu, size, port);
13563 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
13565 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
13566 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
13567 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
13568 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
13569 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
13570 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
13571 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
13572 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter);
13573 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
13574 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
13575 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
13576 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
13577 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
13578 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
13579 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
13580 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
13581 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
13582 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
13583 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
13584 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
13585 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
13586 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
13587 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_kick_vcpu_slowpath);
13588 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_doorbell);
13589 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_accept_irq);
13590 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
13591 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
13592 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
13593 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);
13595 static int __init kvm_x86_init(void)
13597 kvm_mmu_x86_module_init();
13598 mitigate_smt_rsb &= boot_cpu_has_bug(X86_BUG_SMT_RSB) && cpu_smt_possible();
13601 module_init(kvm_x86_init);
13603 static void __exit kvm_x86_exit(void)
13606 * If module_init() is implemented, module_exit() must also be
13607 * implemented to allow module unload.
13610 module_exit(kvm_x86_exit);