2 * Copyright (c) 1991,1992,1995 Linus Torvalds
3 * Copyright (c) 1994 Alan Modra
4 * Copyright (c) 1995 Markus Kuhn
5 * Copyright (c) 1996 Ingo Molnar
6 * Copyright (c) 1998 Andrea Arcangeli
7 * Copyright (c) 2002,2006 Vojtech Pavlik
8 * Copyright (c) 2003 Andi Kleen
12 #include <linux/clockchips.h>
13 #include <linux/interrupt.h>
14 #include <linux/time.h>
15 #include <linux/mca.h>
17 #include <asm/vsyscall.h>
18 #include <asm/x86_init.h>
19 #include <asm/i8259.h>
20 #include <asm/i8253.h>
21 #include <asm/timer.h>
26 #if defined(CONFIG_X86_32) && defined(CONFIG_X86_IO_APIC)
30 unsigned long profile_pc(struct pt_regs *regs)
32 unsigned long pc = instruction_pointer(regs);
35 if (!user_mode_vm(regs) && in_lock_functions(pc)) {
36 #ifdef CONFIG_FRAME_POINTER
37 return *(unsigned long *)(regs->bp + sizeof(long));
39 unsigned long *sp = (unsigned long *)®s->sp;
41 /* Return address is either directly at stack pointer
42 or above a saved flags. Eflags has bits 22-31 zero,
43 kernel addresses don't. */
53 EXPORT_SYMBOL(profile_pc);
56 * This is the same as the above, except we _also_ save the current
57 * Time Stamp Counter value at the time of the timer interrupt, so that
58 * we later on can estimate the time of day more exactly.
60 static irqreturn_t timer_interrupt(int irq, void *dev_id)
62 /* Keep nmi watchdog up to date */
63 inc_irq_stat(irq0_irqs);
65 /* Optimized out for !IO_APIC and x86_64 */
68 * Subtle, when I/O APICs are used we have to ack timer IRQ
69 * manually to deassert NMI lines for the watchdog if run
70 * on an 82489DX-based system.
72 spin_lock(&i8259A_lock);
73 outb(0x0c, PIC_MASTER_OCW3);
74 /* Ack the IRQ; AEOI will end it automatically. */
76 spin_unlock(&i8259A_lock);
79 global_clock_event->event_handler(global_clock_event);
83 /* The PS/2 uses level-triggered interrupts. You can't
84 turn them off, nor would you want to (any attempt to
85 enable edge-triggered interrupts usually gets intercepted by a
86 special hardware circuit). Hence we have to acknowledge
87 the timer interrupt. Through some incredibly stupid
88 design idea, the reset for IRQ 0 is done by setting the
89 high bit of the PPI port B (0x61). Note that some PS/2s,
90 notably the 55SX, work fine if this is removed. */
92 u8 irq_v = inb_p(0x61); /* read the current state */
93 outb_p(irq_v | 0x80, 0x61); /* reset the IRQ */
100 static struct irqaction irq0 = {
101 .handler = timer_interrupt,
102 .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER,
106 void __init setup_default_timer_irq(void)
108 irq0.mask = cpumask_of_cpu(0);
112 /* Default timer init function */
113 void __init hpet_time_init(void)
117 setup_default_timer_irq();
120 static void x86_late_time_init(void)
122 x86_init.timers.timer_init();
126 * Initialize TSC and delay the periodic timer init to
127 * late x86_late_time_init() so ioremap works.
129 void __init time_init(void)
132 late_time_init = x86_late_time_init;