1 // SPDX-License-Identifier: GPL-2.0-only
3 * HyperV Detection code.
5 * Copyright (C) 2010, Novell, Inc.
6 * Author : K. Y. Srinivasan <ksrinivasan@novell.com>
9 #include <linux/types.h>
10 #include <linux/time.h>
11 #include <linux/clocksource.h>
12 #include <linux/init.h>
13 #include <linux/export.h>
14 #include <linux/hardirq.h>
15 #include <linux/efi.h>
16 #include <linux/interrupt.h>
17 #include <linux/irq.h>
18 #include <linux/kexec.h>
19 #include <linux/i8253.h>
20 #include <linux/random.h>
21 #include <asm/processor.h>
22 #include <asm/hypervisor.h>
23 #include <asm/hyperv-tlfs.h>
24 #include <asm/mshyperv.h>
26 #include <asm/idtentry.h>
27 #include <asm/irq_regs.h>
28 #include <asm/i8259.h>
30 #include <asm/timer.h>
31 #include <asm/reboot.h>
33 #include <clocksource/hyperv_timer.h>
35 struct ms_hyperv_info ms_hyperv;
36 EXPORT_SYMBOL_GPL(ms_hyperv);
38 #if IS_ENABLED(CONFIG_HYPERV)
39 static void (*vmbus_handler)(void);
40 static void (*hv_stimer0_handler)(void);
41 static void (*hv_kexec_handler)(void);
42 static void (*hv_crash_handler)(struct pt_regs *regs);
44 DEFINE_IDTENTRY_SYSVEC(sysvec_hyperv_callback)
46 struct pt_regs *old_regs = set_irq_regs(regs);
48 inc_irq_stat(irq_hv_callback_count);
52 if (ms_hyperv.hints & HV_DEPRECATING_AEOI_RECOMMENDED)
55 set_irq_regs(old_regs);
58 int hv_setup_vmbus_irq(int irq, void (*handler)(void))
61 * The 'irq' argument is ignored on x86/x64 because a hard-coded
62 * interrupt vector is used for Hyper-V interrupts.
64 vmbus_handler = handler;
68 void hv_remove_vmbus_irq(void)
70 /* We have no way to deallocate the interrupt gate */
73 EXPORT_SYMBOL_GPL(hv_setup_vmbus_irq);
74 EXPORT_SYMBOL_GPL(hv_remove_vmbus_irq);
77 * Routines to do per-architecture handling of stimer0
78 * interrupts when in Direct Mode
80 DEFINE_IDTENTRY_SYSVEC(sysvec_hyperv_stimer0)
82 struct pt_regs *old_regs = set_irq_regs(regs);
84 inc_irq_stat(hyperv_stimer0_count);
85 if (hv_stimer0_handler)
87 add_interrupt_randomness(HYPERV_STIMER0_VECTOR, 0);
90 set_irq_regs(old_regs);
93 int hv_setup_stimer0_irq(int *irq, int *vector, void (*handler)(void))
95 *vector = HYPERV_STIMER0_VECTOR;
96 *irq = -1; /* Unused on x86/x64 */
97 hv_stimer0_handler = handler;
100 EXPORT_SYMBOL_GPL(hv_setup_stimer0_irq);
102 void hv_remove_stimer0_irq(int irq)
104 /* We have no way to deallocate the interrupt gate */
105 hv_stimer0_handler = NULL;
107 EXPORT_SYMBOL_GPL(hv_remove_stimer0_irq);
109 void hv_setup_kexec_handler(void (*handler)(void))
111 hv_kexec_handler = handler;
113 EXPORT_SYMBOL_GPL(hv_setup_kexec_handler);
115 void hv_remove_kexec_handler(void)
117 hv_kexec_handler = NULL;
119 EXPORT_SYMBOL_GPL(hv_remove_kexec_handler);
121 void hv_setup_crash_handler(void (*handler)(struct pt_regs *regs))
123 hv_crash_handler = handler;
125 EXPORT_SYMBOL_GPL(hv_setup_crash_handler);
127 void hv_remove_crash_handler(void)
129 hv_crash_handler = NULL;
131 EXPORT_SYMBOL_GPL(hv_remove_crash_handler);
133 #ifdef CONFIG_KEXEC_CORE
134 static void hv_machine_shutdown(void)
136 if (kexec_in_progress && hv_kexec_handler)
140 * Call hv_cpu_die() on all the CPUs, otherwise later the hypervisor
141 * corrupts the old VP Assist Pages and can crash the kexec kernel.
143 if (kexec_in_progress && hyperv_init_cpuhp > 0)
144 cpuhp_remove_state(hyperv_init_cpuhp);
146 /* The function calls stop_other_cpus(). */
147 native_machine_shutdown();
149 /* Disable the hypercall page when there is only 1 active CPU. */
150 if (kexec_in_progress)
154 static void hv_machine_crash_shutdown(struct pt_regs *regs)
156 if (hv_crash_handler)
157 hv_crash_handler(regs);
159 /* The function calls crash_smp_send_stop(). */
160 native_machine_crash_shutdown(regs);
162 /* Disable the hypercall page when there is only 1 active CPU. */
165 #endif /* CONFIG_KEXEC_CORE */
166 #endif /* CONFIG_HYPERV */
168 static uint32_t __init ms_hyperv_platform(void)
171 u32 hyp_signature[3];
173 if (!boot_cpu_has(X86_FEATURE_HYPERVISOR))
176 cpuid(HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS,
177 &eax, &hyp_signature[0], &hyp_signature[1], &hyp_signature[2]);
179 if (eax >= HYPERV_CPUID_MIN &&
180 eax <= HYPERV_CPUID_MAX &&
181 !memcmp("Microsoft Hv", hyp_signature, 12))
182 return HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS;
187 static unsigned char hv_get_nmi_reason(void)
192 #ifdef CONFIG_X86_LOCAL_APIC
194 * Prior to WS2016 Debug-VM sends NMIs to all CPUs which makes
195 * it dificult to process CHANNELMSG_UNLOAD in case of crash. Handle
196 * unknown NMI on the first CPU which gets it.
198 static int hv_nmi_unknown(unsigned int val, struct pt_regs *regs)
200 static atomic_t nmi_cpu = ATOMIC_INIT(-1);
202 if (!unknown_nmi_panic)
205 if (atomic_cmpxchg(&nmi_cpu, -1, raw_smp_processor_id()) != -1)
212 static unsigned long hv_get_tsc_khz(void)
216 rdmsrl(HV_X64_MSR_TSC_FREQUENCY, freq);
221 #if defined(CONFIG_SMP) && IS_ENABLED(CONFIG_HYPERV)
222 static void __init hv_smp_prepare_boot_cpu(void)
224 native_smp_prepare_boot_cpu();
225 #if defined(CONFIG_X86_64) && defined(CONFIG_PARAVIRT_SPINLOCKS)
231 static void __init ms_hyperv_init_platform(void)
233 int hv_host_info_eax;
234 int hv_host_info_ebx;
235 int hv_host_info_ecx;
236 int hv_host_info_edx;
238 #ifdef CONFIG_PARAVIRT
239 pv_info.name = "Hyper-V";
243 * Extract the features and hints
245 ms_hyperv.features = cpuid_eax(HYPERV_CPUID_FEATURES);
246 ms_hyperv.misc_features = cpuid_edx(HYPERV_CPUID_FEATURES);
247 ms_hyperv.hints = cpuid_eax(HYPERV_CPUID_ENLIGHTMENT_INFO);
249 pr_info("Hyper-V: features 0x%x, hints 0x%x, misc 0x%x\n",
250 ms_hyperv.features, ms_hyperv.hints, ms_hyperv.misc_features);
252 ms_hyperv.max_vp_index = cpuid_eax(HYPERV_CPUID_IMPLEMENT_LIMITS);
253 ms_hyperv.max_lp_index = cpuid_ebx(HYPERV_CPUID_IMPLEMENT_LIMITS);
255 pr_debug("Hyper-V: max %u virtual processors, %u logical processors\n",
256 ms_hyperv.max_vp_index, ms_hyperv.max_lp_index);
259 * Extract host information.
261 if (cpuid_eax(HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS) >=
262 HYPERV_CPUID_VERSION) {
263 hv_host_info_eax = cpuid_eax(HYPERV_CPUID_VERSION);
264 hv_host_info_ebx = cpuid_ebx(HYPERV_CPUID_VERSION);
265 hv_host_info_ecx = cpuid_ecx(HYPERV_CPUID_VERSION);
266 hv_host_info_edx = cpuid_edx(HYPERV_CPUID_VERSION);
268 pr_info("Hyper-V Host Build:%d-%d.%d-%d-%d.%d\n",
269 hv_host_info_eax, hv_host_info_ebx >> 16,
270 hv_host_info_ebx & 0xFFFF, hv_host_info_ecx,
271 hv_host_info_edx >> 24, hv_host_info_edx & 0xFFFFFF);
274 if (ms_hyperv.features & HV_ACCESS_FREQUENCY_MSRS &&
275 ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) {
276 x86_platform.calibrate_tsc = hv_get_tsc_khz;
277 x86_platform.calibrate_cpu = hv_get_tsc_khz;
280 if (ms_hyperv.hints & HV_X64_ENLIGHTENED_VMCS_RECOMMENDED) {
281 ms_hyperv.nested_features =
282 cpuid_eax(HYPERV_CPUID_NESTED_FEATURES);
286 * Hyper-V expects to get crash register data or kmsg when
287 * crash enlightment is available and system crashes. Set
288 * crash_kexec_post_notifiers to be true to make sure that
289 * calling crash enlightment interface before running kdump
292 if (ms_hyperv.misc_features & HV_FEATURE_GUEST_CRASH_MSR_AVAILABLE)
293 crash_kexec_post_notifiers = true;
295 #ifdef CONFIG_X86_LOCAL_APIC
296 if (ms_hyperv.features & HV_ACCESS_FREQUENCY_MSRS &&
297 ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) {
299 * Get the APIC frequency.
301 u64 hv_lapic_frequency;
303 rdmsrl(HV_X64_MSR_APIC_FREQUENCY, hv_lapic_frequency);
304 hv_lapic_frequency = div_u64(hv_lapic_frequency, HZ);
305 lapic_timer_period = hv_lapic_frequency;
306 pr_info("Hyper-V: LAPIC Timer Frequency: %#x\n",
310 register_nmi_handler(NMI_UNKNOWN, hv_nmi_unknown, NMI_FLAG_FIRST,
314 #ifdef CONFIG_X86_IO_APIC
318 #if IS_ENABLED(CONFIG_HYPERV) && defined(CONFIG_KEXEC_CORE)
319 machine_ops.shutdown = hv_machine_shutdown;
320 machine_ops.crash_shutdown = hv_machine_crash_shutdown;
322 if (ms_hyperv.features & HV_ACCESS_TSC_INVARIANT) {
323 wrmsrl(HV_X64_MSR_TSC_INVARIANT_CONTROL, 0x1);
324 setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE);
326 mark_tsc_unstable("running on Hyper-V");
330 * Generation 2 instances don't support reading the NMI status from
333 if (efi_enabled(EFI_BOOT))
334 x86_platform.get_nmi_reason = hv_get_nmi_reason;
337 * Hyper-V VMs have a PIT emulation quirk such that zeroing the
338 * counter register during PIT shutdown restarts the PIT. So it
339 * continues to interrupt @18.2 HZ. Setting i8253_clear_counter
340 * to false tells pit_shutdown() not to zero the counter so that
341 * the PIT really is shutdown. Generation 2 VMs don't have a PIT,
342 * and setting this value has no effect.
344 i8253_clear_counter_on_shutdown = false;
346 #if IS_ENABLED(CONFIG_HYPERV)
348 * Setup the hook to get control post apic initialization.
350 x86_platform.apic_post_init = hyperv_init;
351 hyperv_setup_mmu_ops();
352 /* Setup the IDT for hypervisor callback */
353 alloc_intr_gate(HYPERVISOR_CALLBACK_VECTOR, asm_sysvec_hyperv_callback);
355 /* Setup the IDT for reenlightenment notifications */
356 if (ms_hyperv.features & HV_ACCESS_REENLIGHTENMENT) {
357 alloc_intr_gate(HYPERV_REENLIGHTENMENT_VECTOR,
358 asm_sysvec_hyperv_reenlightenment);
361 /* Setup the IDT for stimer0 */
362 if (ms_hyperv.misc_features & HV_STIMER_DIRECT_MODE_AVAILABLE) {
363 alloc_intr_gate(HYPERV_STIMER0_VECTOR,
364 asm_sysvec_hyperv_stimer0);
368 smp_ops.smp_prepare_boot_cpu = hv_smp_prepare_boot_cpu;
372 * Hyper-V doesn't provide irq remapping for IO-APIC. To enable x2apic,
373 * set x2apic destination mode to physcial mode when x2apic is available
374 * and Hyper-V IOMMU driver makes sure cpus assigned with IO-APIC irqs
375 * have 8-bit APIC id.
377 # ifdef CONFIG_X86_X2APIC
378 if (x2apic_supported())
382 /* Register Hyper-V specific clocksource */
383 hv_init_clocksource();
387 static bool __init ms_hyperv_x2apic_available(void)
389 return x2apic_supported();
393 * If ms_hyperv_msi_ext_dest_id() returns true, hyperv_prepare_irq_remapping()
394 * returns -ENODEV and the Hyper-V IOMMU driver is not used; instead, the
395 * generic support of the 15-bit APIC ID is used: see __irq_msi_compose_msg().
397 * Note: for a VM on Hyper-V, the I/O-APIC is the only device which
398 * (logically) generates MSIs directly to the system APIC irq domain.
399 * There is no HPET, and PCI MSI/MSI-X interrupts are remapped by the
400 * pci-hyperv host bridge.
402 static bool __init ms_hyperv_msi_ext_dest_id(void)
406 eax = cpuid_eax(HYPERV_CPUID_VIRT_STACK_INTERFACE);
407 if (eax != HYPERV_VS_INTERFACE_EAX_SIGNATURE)
410 eax = cpuid_eax(HYPERV_CPUID_VIRT_STACK_PROPERTIES);
411 return eax & HYPERV_VS_PROPERTIES_EAX_EXTENDED_IOAPIC_RTE;
414 const __initconst struct hypervisor_x86 x86_hyper_ms_hyperv = {
415 .name = "Microsoft Hyper-V",
416 .detect = ms_hyperv_platform,
417 .type = X86_HYPER_MS_HYPERV,
418 .init.x2apic_available = ms_hyperv_x2apic_available,
419 .init.msi_ext_dest_id = ms_hyperv_msi_ext_dest_id,
420 .init.init_platform = ms_hyperv_init_platform,