Merge branch 'x86/urgent' into x86/mce2
[sfrench/cifs-2.6.git] / arch / x86 / kernel / cpu / mcheck / mce_amd_64.c
1 /*
2  *  (c) 2005, 2006 Advanced Micro Devices, Inc.
3  *  Your use of this code is subject to the terms and conditions of the
4  *  GNU general public license version 2. See "COPYING" or
5  *  http://www.gnu.org/licenses/gpl.html
6  *
7  *  Written by Jacob Shin - AMD, Inc.
8  *
9  *  Support : jacob.shin@amd.com
10  *
11  *  April 2006
12  *     - added support for AMD Family 0x10 processors
13  *
14  *  All MC4_MISCi registers are shared between multi-cores
15  */
16
17 #include <linux/cpu.h>
18 #include <linux/errno.h>
19 #include <linux/init.h>
20 #include <linux/interrupt.h>
21 #include <linux/kobject.h>
22 #include <linux/notifier.h>
23 #include <linux/sched.h>
24 #include <linux/smp.h>
25 #include <linux/sysdev.h>
26 #include <linux/sysfs.h>
27 #include <asm/apic.h>
28 #include <asm/mce.h>
29 #include <asm/msr.h>
30 #include <asm/percpu.h>
31 #include <asm/idle.h>
32
33 #define PFX               "mce_threshold: "
34 #define VERSION           "version 1.1.1"
35 #define NR_BANKS          6
36 #define NR_BLOCKS         9
37 #define THRESHOLD_MAX     0xFFF
38 #define INT_TYPE_APIC     0x00020000
39 #define MASK_VALID_HI     0x80000000
40 #define MASK_CNTP_HI      0x40000000
41 #define MASK_LOCKED_HI    0x20000000
42 #define MASK_LVTOFF_HI    0x00F00000
43 #define MASK_COUNT_EN_HI  0x00080000
44 #define MASK_INT_TYPE_HI  0x00060000
45 #define MASK_OVERFLOW_HI  0x00010000
46 #define MASK_ERR_COUNT_HI 0x00000FFF
47 #define MASK_BLKPTR_LO    0xFF000000
48 #define MCG_XBLK_ADDR     0xC0000400
49
50 struct threshold_block {
51         unsigned int block;
52         unsigned int bank;
53         unsigned int cpu;
54         u32 address;
55         u16 interrupt_enable;
56         u16 threshold_limit;
57         struct kobject kobj;
58         struct list_head miscj;
59 };
60
61 /* defaults used early on boot */
62 static struct threshold_block threshold_defaults = {
63         .interrupt_enable = 0,
64         .threshold_limit = THRESHOLD_MAX,
65 };
66
67 struct threshold_bank {
68         struct kobject *kobj;
69         struct threshold_block *blocks;
70         cpumask_t cpus;
71 };
72 static DEFINE_PER_CPU(struct threshold_bank *, threshold_banks[NR_BANKS]);
73
74 #ifdef CONFIG_SMP
75 static unsigned char shared_bank[NR_BANKS] = {
76         0, 0, 0, 0, 1
77 };
78 #endif
79
80 static DEFINE_PER_CPU(unsigned char, bank_map); /* see which banks are on */
81
82 /*
83  * CPU Initialization
84  */
85
86 struct thresh_restart {
87         struct threshold_block *b;
88         int reset;
89         u16 old_limit;
90 };
91
92 /* must be called with correct cpu affinity */
93 static long threshold_restart_bank(void *_tr)
94 {
95         struct thresh_restart *tr = _tr;
96         u32 mci_misc_hi, mci_misc_lo;
97
98         rdmsr(tr->b->address, mci_misc_lo, mci_misc_hi);
99
100         if (tr->b->threshold_limit < (mci_misc_hi & THRESHOLD_MAX))
101                 tr->reset = 1;  /* limit cannot be lower than err count */
102
103         if (tr->reset) {                /* reset err count and overflow bit */
104                 mci_misc_hi =
105                     (mci_misc_hi & ~(MASK_ERR_COUNT_HI | MASK_OVERFLOW_HI)) |
106                     (THRESHOLD_MAX - tr->b->threshold_limit);
107         } else if (tr->old_limit) {     /* change limit w/o reset */
108                 int new_count = (mci_misc_hi & THRESHOLD_MAX) +
109                     (tr->old_limit - tr->b->threshold_limit);
110                 mci_misc_hi = (mci_misc_hi & ~MASK_ERR_COUNT_HI) |
111                     (new_count & THRESHOLD_MAX);
112         }
113
114         tr->b->interrupt_enable ?
115             (mci_misc_hi = (mci_misc_hi & ~MASK_INT_TYPE_HI) | INT_TYPE_APIC) :
116             (mci_misc_hi &= ~MASK_INT_TYPE_HI);
117
118         mci_misc_hi |= MASK_COUNT_EN_HI;
119         wrmsr(tr->b->address, mci_misc_lo, mci_misc_hi);
120         return 0;
121 }
122
123 /* cpu init entry point, called from mce.c with preempt off */
124 void mce_amd_feature_init(struct cpuinfo_x86 *c)
125 {
126         unsigned int bank, block;
127         unsigned int cpu = smp_processor_id();
128         u8 lvt_off;
129         u32 low = 0, high = 0, address = 0;
130         struct thresh_restart tr;
131
132         for (bank = 0; bank < NR_BANKS; ++bank) {
133                 for (block = 0; block < NR_BLOCKS; ++block) {
134                         if (block == 0)
135                                 address = MSR_IA32_MC0_MISC + bank * 4;
136                         else if (block == 1) {
137                                 address = (low & MASK_BLKPTR_LO) >> 21;
138                                 if (!address)
139                                         break;
140                                 address += MCG_XBLK_ADDR;
141                         }
142                         else
143                                 ++address;
144
145                         if (rdmsr_safe(address, &low, &high))
146                                 break;
147
148                         if (!(high & MASK_VALID_HI)) {
149                                 if (block)
150                                         continue;
151                                 else
152                                         break;
153                         }
154
155                         if (!(high & MASK_CNTP_HI)  ||
156                              (high & MASK_LOCKED_HI))
157                                 continue;
158
159                         if (!block)
160                                 per_cpu(bank_map, cpu) |= (1 << bank);
161 #ifdef CONFIG_SMP
162                         if (shared_bank[bank] && c->cpu_core_id)
163                                 break;
164 #endif
165                         lvt_off = setup_APIC_eilvt_mce(THRESHOLD_APIC_VECTOR,
166                                                        APIC_EILVT_MSG_FIX, 0);
167
168                         high &= ~MASK_LVTOFF_HI;
169                         high |= lvt_off << 20;
170                         wrmsr(address, low, high);
171
172                         threshold_defaults.address = address;
173                         tr.b = &threshold_defaults;
174                         tr.reset = 0;
175                         tr.old_limit = 0;
176                         threshold_restart_bank(&tr);
177                 }
178         }
179 }
180
181 /*
182  * APIC Interrupt Handler
183  */
184
185 /*
186  * threshold interrupt handler will service THRESHOLD_APIC_VECTOR.
187  * the interrupt goes off when error_count reaches threshold_limit.
188  * the handler will simply log mcelog w/ software defined bank number.
189  */
190 asmlinkage void mce_threshold_interrupt(void)
191 {
192         unsigned int bank, block;
193         struct mce m;
194         u32 low = 0, high = 0, address = 0;
195
196         ack_APIC_irq();
197         exit_idle();
198         irq_enter();
199
200         mce_setup(&m);
201
202         /* assume first bank caused it */
203         for (bank = 0; bank < NR_BANKS; ++bank) {
204                 if (!(per_cpu(bank_map, m.cpu) & (1 << bank)))
205                         continue;
206                 for (block = 0; block < NR_BLOCKS; ++block) {
207                         if (block == 0)
208                                 address = MSR_IA32_MC0_MISC + bank * 4;
209                         else if (block == 1) {
210                                 address = (low & MASK_BLKPTR_LO) >> 21;
211                                 if (!address)
212                                         break;
213                                 address += MCG_XBLK_ADDR;
214                         }
215                         else
216                                 ++address;
217
218                         if (rdmsr_safe(address, &low, &high))
219                                 break;
220
221                         if (!(high & MASK_VALID_HI)) {
222                                 if (block)
223                                         continue;
224                                 else
225                                         break;
226                         }
227
228                         if (!(high & MASK_CNTP_HI)  ||
229                              (high & MASK_LOCKED_HI))
230                                 continue;
231
232                         /* Log the machine check that caused the threshold
233                            event. */
234                         machine_check_poll(MCP_TIMESTAMP);
235
236                         if (high & MASK_OVERFLOW_HI) {
237                                 rdmsrl(address, m.misc);
238                                 rdmsrl(MSR_IA32_MC0_STATUS + bank * 4,
239                                        m.status);
240                                 m.bank = K8_MCE_THRESHOLD_BASE
241                                        + bank * NR_BLOCKS
242                                        + block;
243                                 mce_log(&m);
244                                 goto out;
245                         }
246                 }
247         }
248 out:
249         inc_irq_stat(irq_threshold_count);
250         irq_exit();
251 }
252
253 /*
254  * Sysfs Interface
255  */
256
257 struct threshold_attr {
258         struct attribute attr;
259         ssize_t(*show) (struct threshold_block *, char *);
260         ssize_t(*store) (struct threshold_block *, const char *, size_t count);
261 };
262
263 #define SHOW_FIELDS(name)                                           \
264 static ssize_t show_ ## name(struct threshold_block * b, char *buf) \
265 {                                                                   \
266         return sprintf(buf, "%lx\n", (unsigned long) b->name);      \
267 }
268 SHOW_FIELDS(interrupt_enable)
269 SHOW_FIELDS(threshold_limit)
270
271 static ssize_t store_interrupt_enable(struct threshold_block *b,
272                                       const char *buf, size_t count)
273 {
274         char *end;
275         struct thresh_restart tr;
276         unsigned long new = simple_strtoul(buf, &end, 0);
277         if (end == buf)
278                 return -EINVAL;
279         b->interrupt_enable = !!new;
280
281         tr.b = b;
282         tr.reset = 0;
283         tr.old_limit = 0;
284         work_on_cpu(b->cpu, threshold_restart_bank, &tr);
285
286         return end - buf;
287 }
288
289 static ssize_t store_threshold_limit(struct threshold_block *b,
290                                      const char *buf, size_t count)
291 {
292         char *end;
293         struct thresh_restart tr;
294         unsigned long new = simple_strtoul(buf, &end, 0);
295         if (end == buf)
296                 return -EINVAL;
297         if (new > THRESHOLD_MAX)
298                 new = THRESHOLD_MAX;
299         if (new < 1)
300                 new = 1;
301         tr.old_limit = b->threshold_limit;
302         b->threshold_limit = new;
303         tr.b = b;
304         tr.reset = 0;
305
306         work_on_cpu(b->cpu, threshold_restart_bank, &tr);
307
308         return end - buf;
309 }
310
311 static long local_error_count(void *_b)
312 {
313         struct threshold_block *b = _b;
314         u32 low, high;
315
316         rdmsr(b->address, low, high);
317         return (high & 0xFFF) - (THRESHOLD_MAX - b->threshold_limit);
318 }
319
320 static ssize_t show_error_count(struct threshold_block *b, char *buf)
321 {
322         return sprintf(buf, "%lx\n", work_on_cpu(b->cpu, local_error_count, b));
323 }
324
325 static ssize_t store_error_count(struct threshold_block *b,
326                                  const char *buf, size_t count)
327 {
328         struct thresh_restart tr = { .b = b, .reset = 1, .old_limit = 0 };
329
330         work_on_cpu(b->cpu, threshold_restart_bank, &tr);
331         return 1;
332 }
333
334 #define THRESHOLD_ATTR(_name,_mode,_show,_store) {            \
335         .attr = {.name = __stringify(_name), .mode = _mode }, \
336         .show = _show,                                        \
337         .store = _store,                                      \
338 };
339
340 #define RW_ATTR(name)                                           \
341 static struct threshold_attr name =                             \
342         THRESHOLD_ATTR(name, 0644, show_## name, store_## name)
343
344 RW_ATTR(interrupt_enable);
345 RW_ATTR(threshold_limit);
346 RW_ATTR(error_count);
347
348 static struct attribute *default_attrs[] = {
349         &interrupt_enable.attr,
350         &threshold_limit.attr,
351         &error_count.attr,
352         NULL
353 };
354
355 #define to_block(k) container_of(k, struct threshold_block, kobj)
356 #define to_attr(a) container_of(a, struct threshold_attr, attr)
357
358 static ssize_t show(struct kobject *kobj, struct attribute *attr, char *buf)
359 {
360         struct threshold_block *b = to_block(kobj);
361         struct threshold_attr *a = to_attr(attr);
362         ssize_t ret;
363         ret = a->show ? a->show(b, buf) : -EIO;
364         return ret;
365 }
366
367 static ssize_t store(struct kobject *kobj, struct attribute *attr,
368                      const char *buf, size_t count)
369 {
370         struct threshold_block *b = to_block(kobj);
371         struct threshold_attr *a = to_attr(attr);
372         ssize_t ret;
373         ret = a->store ? a->store(b, buf, count) : -EIO;
374         return ret;
375 }
376
377 static struct sysfs_ops threshold_ops = {
378         .show = show,
379         .store = store,
380 };
381
382 static struct kobj_type threshold_ktype = {
383         .sysfs_ops = &threshold_ops,
384         .default_attrs = default_attrs,
385 };
386
387 static __cpuinit int allocate_threshold_blocks(unsigned int cpu,
388                                                unsigned int bank,
389                                                unsigned int block,
390                                                u32 address)
391 {
392         int err;
393         u32 low, high;
394         struct threshold_block *b = NULL;
395
396         if ((bank >= NR_BANKS) || (block >= NR_BLOCKS))
397                 return 0;
398
399         if (rdmsr_safe(address, &low, &high))
400                 return 0;
401
402         if (!(high & MASK_VALID_HI)) {
403                 if (block)
404                         goto recurse;
405                 else
406                         return 0;
407         }
408
409         if (!(high & MASK_CNTP_HI)  ||
410              (high & MASK_LOCKED_HI))
411                 goto recurse;
412
413         b = kzalloc(sizeof(struct threshold_block), GFP_KERNEL);
414         if (!b)
415                 return -ENOMEM;
416
417         b->block = block;
418         b->bank = bank;
419         b->cpu = cpu;
420         b->address = address;
421         b->interrupt_enable = 0;
422         b->threshold_limit = THRESHOLD_MAX;
423
424         INIT_LIST_HEAD(&b->miscj);
425
426         if (per_cpu(threshold_banks, cpu)[bank]->blocks)
427                 list_add(&b->miscj,
428                          &per_cpu(threshold_banks, cpu)[bank]->blocks->miscj);
429         else
430                 per_cpu(threshold_banks, cpu)[bank]->blocks = b;
431
432         err = kobject_init_and_add(&b->kobj, &threshold_ktype,
433                                    per_cpu(threshold_banks, cpu)[bank]->kobj,
434                                    "misc%i", block);
435         if (err)
436                 goto out_free;
437 recurse:
438         if (!block) {
439                 address = (low & MASK_BLKPTR_LO) >> 21;
440                 if (!address)
441                         return 0;
442                 address += MCG_XBLK_ADDR;
443         } else
444                 ++address;
445
446         err = allocate_threshold_blocks(cpu, bank, ++block, address);
447         if (err)
448                 goto out_free;
449
450         if (b)
451                 kobject_uevent(&b->kobj, KOBJ_ADD);
452
453         return err;
454
455 out_free:
456         if (b) {
457                 kobject_put(&b->kobj);
458                 kfree(b);
459         }
460         return err;
461 }
462
463 static __cpuinit long local_allocate_threshold_blocks(void *_bank)
464 {
465         unsigned int *bank = _bank;
466
467         return allocate_threshold_blocks(smp_processor_id(), *bank, 0,
468                                          MSR_IA32_MC0_MISC + *bank * 4);
469 }
470
471 /* symlinks sibling shared banks to first core.  first core owns dir/files. */
472 static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
473 {
474         int i, err = 0;
475         struct threshold_bank *b = NULL;
476         char name[32];
477
478         sprintf(name, "threshold_bank%i", bank);
479
480 #ifdef CONFIG_SMP
481         if (cpu_data(cpu).cpu_core_id && shared_bank[bank]) {   /* symlink */
482                 i = first_cpu(per_cpu(cpu_core_map, cpu));
483
484                 /* first core not up yet */
485                 if (cpu_data(i).cpu_core_id)
486                         goto out;
487
488                 /* already linked */
489                 if (per_cpu(threshold_banks, cpu)[bank])
490                         goto out;
491
492                 b = per_cpu(threshold_banks, i)[bank];
493
494                 if (!b)
495                         goto out;
496
497                 err = sysfs_create_link(&per_cpu(device_mce, cpu).kobj,
498                                         b->kobj, name);
499                 if (err)
500                         goto out;
501
502                 b->cpus = per_cpu(cpu_core_map, cpu);
503                 per_cpu(threshold_banks, cpu)[bank] = b;
504                 goto out;
505         }
506 #endif
507
508         b = kzalloc(sizeof(struct threshold_bank), GFP_KERNEL);
509         if (!b) {
510                 err = -ENOMEM;
511                 goto out;
512         }
513
514         b->kobj = kobject_create_and_add(name, &per_cpu(device_mce, cpu).kobj);
515         if (!b->kobj)
516                 goto out_free;
517
518 #ifndef CONFIG_SMP
519         b->cpus = CPU_MASK_ALL;
520 #else
521         b->cpus = per_cpu(cpu_core_map, cpu);
522 #endif
523
524         per_cpu(threshold_banks, cpu)[bank] = b;
525
526         err = work_on_cpu(cpu, local_allocate_threshold_blocks, &bank);
527         if (err)
528                 goto out_free;
529
530         for_each_cpu_mask_nr(i, b->cpus) {
531                 if (i == cpu)
532                         continue;
533
534                 err = sysfs_create_link(&per_cpu(device_mce, i).kobj,
535                                         b->kobj, name);
536                 if (err)
537                         goto out;
538
539                 per_cpu(threshold_banks, i)[bank] = b;
540         }
541
542         goto out;
543
544 out_free:
545         per_cpu(threshold_banks, cpu)[bank] = NULL;
546         kfree(b);
547 out:
548         return err;
549 }
550
551 /* create dir/files for all valid threshold banks */
552 static __cpuinit int threshold_create_device(unsigned int cpu)
553 {
554         unsigned int bank;
555         int err = 0;
556
557         for (bank = 0; bank < NR_BANKS; ++bank) {
558                 if (!(per_cpu(bank_map, cpu) & (1 << bank)))
559                         continue;
560                 err = threshold_create_bank(cpu, bank);
561                 if (err)
562                         goto out;
563         }
564 out:
565         return err;
566 }
567
568 /*
569  * let's be hotplug friendly.
570  * in case of multiple core processors, the first core always takes ownership
571  *   of shared sysfs dir/files, and rest of the cores will be symlinked to it.
572  */
573
574 static void deallocate_threshold_block(unsigned int cpu,
575                                                  unsigned int bank)
576 {
577         struct threshold_block *pos = NULL;
578         struct threshold_block *tmp = NULL;
579         struct threshold_bank *head = per_cpu(threshold_banks, cpu)[bank];
580
581         if (!head)
582                 return;
583
584         list_for_each_entry_safe(pos, tmp, &head->blocks->miscj, miscj) {
585                 kobject_put(&pos->kobj);
586                 list_del(&pos->miscj);
587                 kfree(pos);
588         }
589
590         kfree(per_cpu(threshold_banks, cpu)[bank]->blocks);
591         per_cpu(threshold_banks, cpu)[bank]->blocks = NULL;
592 }
593
594 static void threshold_remove_bank(unsigned int cpu, int bank)
595 {
596         int i = 0;
597         struct threshold_bank *b;
598         char name[32];
599
600         b = per_cpu(threshold_banks, cpu)[bank];
601
602         if (!b)
603                 return;
604
605         if (!b->blocks)
606                 goto free_out;
607
608         sprintf(name, "threshold_bank%i", bank);
609
610 #ifdef CONFIG_SMP
611         /* sibling symlink */
612         if (shared_bank[bank] && b->blocks->cpu != cpu) {
613                 sysfs_remove_link(&per_cpu(device_mce, cpu).kobj, name);
614                 per_cpu(threshold_banks, cpu)[bank] = NULL;
615                 return;
616         }
617 #endif
618
619         /* remove all sibling symlinks before unregistering */
620         for_each_cpu_mask_nr(i, b->cpus) {
621                 if (i == cpu)
622                         continue;
623
624                 sysfs_remove_link(&per_cpu(device_mce, i).kobj, name);
625                 per_cpu(threshold_banks, i)[bank] = NULL;
626         }
627
628         deallocate_threshold_block(cpu, bank);
629
630 free_out:
631         kobject_del(b->kobj);
632         kobject_put(b->kobj);
633         kfree(b);
634         per_cpu(threshold_banks, cpu)[bank] = NULL;
635 }
636
637 static void threshold_remove_device(unsigned int cpu)
638 {
639         unsigned int bank;
640
641         for (bank = 0; bank < NR_BANKS; ++bank) {
642                 if (!(per_cpu(bank_map, cpu) & (1 << bank)))
643                         continue;
644                 threshold_remove_bank(cpu, bank);
645         }
646 }
647
648 /* get notified when a cpu comes on/off */
649 static void __cpuinit amd_64_threshold_cpu_callback(unsigned long action,
650                                                      unsigned int cpu)
651 {
652         if (cpu >= NR_CPUS)
653                 return;
654
655         switch (action) {
656         case CPU_ONLINE:
657         case CPU_ONLINE_FROZEN:
658                 threshold_create_device(cpu);
659                 break;
660         case CPU_DEAD:
661         case CPU_DEAD_FROZEN:
662                 threshold_remove_device(cpu);
663                 break;
664         default:
665                 break;
666         }
667 }
668
669 static __init int threshold_init_device(void)
670 {
671         unsigned lcpu = 0;
672
673         /* to hit CPUs online before the notifier is up */
674         for_each_online_cpu(lcpu) {
675                 int err = threshold_create_device(lcpu);
676                 if (err)
677                         return err;
678         }
679         threshold_cpu_callback = amd_64_threshold_cpu_callback;
680         return 0;
681 }
682
683 device_initcall(threshold_init_device);