1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Kernel-based Virtual Machine driver for Linux
5 * This header defines architecture specific interfaces, x86 version
8 #ifndef _ASM_X86_KVM_HOST_H
9 #define _ASM_X86_KVM_HOST_H
11 #include <linux/types.h>
13 #include <linux/mmu_notifier.h>
14 #include <linux/tracepoint.h>
15 #include <linux/cpumask.h>
16 #include <linux/irq_work.h>
17 #include <linux/irq.h>
18 #include <linux/workqueue.h>
20 #include <linux/kvm.h>
21 #include <linux/kvm_para.h>
22 #include <linux/kvm_types.h>
23 #include <linux/perf_event.h>
24 #include <linux/pvclock_gtod.h>
25 #include <linux/clocksource.h>
26 #include <linux/irqbypass.h>
27 #include <linux/hyperv.h>
28 #include <linux/kfifo.h>
31 #include <asm/pvclock-abi.h>
34 #include <asm/msr-index.h>
36 #include <asm/kvm_page_track.h>
37 #include <asm/kvm_vcpu_regs.h>
38 #include <asm/hyperv-tlfs.h>
40 #define __KVM_HAVE_ARCH_VCPU_DEBUGFS
43 * CONFIG_KVM_MAX_NR_VCPUS is defined iff CONFIG_KVM!=n, provide a dummy max if
44 * KVM is disabled (arbitrarily use the default from CONFIG_KVM_MAX_NR_VCPUS).
46 #ifdef CONFIG_KVM_MAX_NR_VCPUS
47 #define KVM_MAX_VCPUS CONFIG_KVM_MAX_NR_VCPUS
49 #define KVM_MAX_VCPUS 1024
53 * In x86, the VCPU ID corresponds to the APIC ID, and APIC IDs
54 * might be larger than the actual number of VCPUs because the
55 * APIC ID encodes CPU topology information.
57 * In the worst case, we'll need less than one extra bit for the
58 * Core ID, and less than one extra bit for the Package (Die) ID,
59 * so ratio of 4 should be enough.
61 #define KVM_VCPU_ID_RATIO 4
62 #define KVM_MAX_VCPU_IDS (KVM_MAX_VCPUS * KVM_VCPU_ID_RATIO)
64 /* memory slots that are not exposed to userspace */
65 #define KVM_INTERNAL_MEM_SLOTS 3
67 #define KVM_HALT_POLL_NS_DEFAULT 200000
69 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS
71 #define KVM_DIRTY_LOG_MANUAL_CAPS (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \
72 KVM_DIRTY_LOG_INITIALLY_SET)
74 #define KVM_BUS_LOCK_DETECTION_VALID_MODE (KVM_BUS_LOCK_DETECTION_OFF | \
75 KVM_BUS_LOCK_DETECTION_EXIT)
77 #define KVM_X86_NOTIFY_VMEXIT_VALID_BITS (KVM_X86_NOTIFY_VMEXIT_ENABLED | \
78 KVM_X86_NOTIFY_VMEXIT_USER)
80 /* x86-specific vcpu->requests bit members */
81 #define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0)
82 #define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1)
83 #define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2)
84 #define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3)
85 #define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4)
86 #define KVM_REQ_LOAD_MMU_PGD KVM_ARCH_REQ(5)
87 #define KVM_REQ_EVENT KVM_ARCH_REQ(6)
88 #define KVM_REQ_APF_HALT KVM_ARCH_REQ(7)
89 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8)
90 #define KVM_REQ_NMI KVM_ARCH_REQ(9)
91 #define KVM_REQ_PMU KVM_ARCH_REQ(10)
92 #define KVM_REQ_PMI KVM_ARCH_REQ(11)
94 #define KVM_REQ_SMI KVM_ARCH_REQ(12)
96 #define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13)
97 #define KVM_REQ_MCLOCK_INPROGRESS \
98 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
99 #define KVM_REQ_SCAN_IOAPIC \
100 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
101 #define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16)
102 #define KVM_REQ_APIC_PAGE_RELOAD \
103 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
104 #define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18)
105 #define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19)
106 #define KVM_REQ_HV_RESET KVM_ARCH_REQ(20)
107 #define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21)
108 #define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22)
109 #define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23)
110 #define KVM_REQ_GET_NESTED_STATE_PAGES KVM_ARCH_REQ(24)
111 #define KVM_REQ_APICV_UPDATE \
112 KVM_ARCH_REQ_FLAGS(25, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
113 #define KVM_REQ_TLB_FLUSH_CURRENT KVM_ARCH_REQ(26)
114 #define KVM_REQ_TLB_FLUSH_GUEST \
115 KVM_ARCH_REQ_FLAGS(27, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
116 #define KVM_REQ_APF_READY KVM_ARCH_REQ(28)
117 #define KVM_REQ_MSR_FILTER_CHANGED KVM_ARCH_REQ(29)
118 #define KVM_REQ_UPDATE_CPU_DIRTY_LOGGING \
119 KVM_ARCH_REQ_FLAGS(30, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
120 #define KVM_REQ_MMU_FREE_OBSOLETE_ROOTS \
121 KVM_ARCH_REQ_FLAGS(31, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
122 #define KVM_REQ_HV_TLB_FLUSH \
123 KVM_ARCH_REQ_FLAGS(32, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
125 #define CR0_RESERVED_BITS \
126 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
127 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
128 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
130 #define CR4_RESERVED_BITS \
131 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
132 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
133 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
134 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
135 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \
136 | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP))
138 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
142 #define INVALID_PAGE (~(hpa_t)0)
143 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
145 /* KVM Hugepage definitions for x86 */
146 #define KVM_MAX_HUGEPAGE_LEVEL PG_LEVEL_1G
147 #define KVM_NR_PAGE_SIZES (KVM_MAX_HUGEPAGE_LEVEL - PG_LEVEL_4K + 1)
148 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9)
149 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x))
150 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x))
151 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1))
152 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE)
154 #define KVM_MEMSLOT_PAGES_TO_MMU_PAGES_RATIO 50
155 #define KVM_MIN_ALLOC_MMU_PAGES 64UL
156 #define KVM_MMU_HASH_SHIFT 12
157 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
158 #define KVM_MIN_FREE_MMU_PAGES 5
159 #define KVM_REFILL_PAGES 25
160 #define KVM_MAX_CPUID_ENTRIES 256
161 #define KVM_NR_FIXED_MTRR_REGION 88
162 #define KVM_NR_VAR_MTRR 8
164 #define ASYNC_PF_PER_VCPU 64
167 VCPU_REGS_RAX = __VCPU_REGS_RAX,
168 VCPU_REGS_RCX = __VCPU_REGS_RCX,
169 VCPU_REGS_RDX = __VCPU_REGS_RDX,
170 VCPU_REGS_RBX = __VCPU_REGS_RBX,
171 VCPU_REGS_RSP = __VCPU_REGS_RSP,
172 VCPU_REGS_RBP = __VCPU_REGS_RBP,
173 VCPU_REGS_RSI = __VCPU_REGS_RSI,
174 VCPU_REGS_RDI = __VCPU_REGS_RDI,
176 VCPU_REGS_R8 = __VCPU_REGS_R8,
177 VCPU_REGS_R9 = __VCPU_REGS_R9,
178 VCPU_REGS_R10 = __VCPU_REGS_R10,
179 VCPU_REGS_R11 = __VCPU_REGS_R11,
180 VCPU_REGS_R12 = __VCPU_REGS_R12,
181 VCPU_REGS_R13 = __VCPU_REGS_R13,
182 VCPU_REGS_R14 = __VCPU_REGS_R14,
183 VCPU_REGS_R15 = __VCPU_REGS_R15,
188 VCPU_EXREG_PDPTR = NR_VCPU_REGS,
194 VCPU_EXREG_EXIT_INFO_1,
195 VCPU_EXREG_EXIT_INFO_2,
209 enum exit_fastpath_completion {
211 EXIT_FASTPATH_REENTER_GUEST,
212 EXIT_FASTPATH_EXIT_HANDLED,
214 typedef enum exit_fastpath_completion fastpath_t;
216 struct x86_emulate_ctxt;
217 struct x86_exception;
220 enum x86_intercept_stage;
222 #define KVM_NR_DB_REGS 4
224 #define DR6_BUS_LOCK (1 << 11)
225 #define DR6_BD (1 << 13)
226 #define DR6_BS (1 << 14)
227 #define DR6_BT (1 << 15)
228 #define DR6_RTM (1 << 16)
230 * DR6_ACTIVE_LOW combines fixed-1 and active-low bits.
231 * We can regard all the bits in DR6_FIXED_1 as active_low bits;
232 * they will never be 0 for now, but when they are defined
233 * in the future it will require no code change.
235 * DR6_ACTIVE_LOW is also used as the init/reset value for DR6.
237 #define DR6_ACTIVE_LOW 0xffff0ff0
238 #define DR6_VOLATILE 0x0001e80f
239 #define DR6_FIXED_1 (DR6_ACTIVE_LOW & ~DR6_VOLATILE)
241 #define DR7_BP_EN_MASK 0x000000ff
242 #define DR7_GE (1 << 9)
243 #define DR7_GD (1 << 13)
244 #define DR7_FIXED_1 0x00000400
245 #define DR7_VOLATILE 0xffff2bff
247 #define KVM_GUESTDBG_VALID_MASK \
248 (KVM_GUESTDBG_ENABLE | \
249 KVM_GUESTDBG_SINGLESTEP | \
250 KVM_GUESTDBG_USE_HW_BP | \
251 KVM_GUESTDBG_USE_SW_BP | \
252 KVM_GUESTDBG_INJECT_BP | \
253 KVM_GUESTDBG_INJECT_DB | \
254 KVM_GUESTDBG_BLOCKIRQ)
257 #define PFERR_PRESENT_BIT 0
258 #define PFERR_WRITE_BIT 1
259 #define PFERR_USER_BIT 2
260 #define PFERR_RSVD_BIT 3
261 #define PFERR_FETCH_BIT 4
262 #define PFERR_PK_BIT 5
263 #define PFERR_SGX_BIT 15
264 #define PFERR_GUEST_FINAL_BIT 32
265 #define PFERR_GUEST_PAGE_BIT 33
266 #define PFERR_IMPLICIT_ACCESS_BIT 48
268 #define PFERR_PRESENT_MASK BIT(PFERR_PRESENT_BIT)
269 #define PFERR_WRITE_MASK BIT(PFERR_WRITE_BIT)
270 #define PFERR_USER_MASK BIT(PFERR_USER_BIT)
271 #define PFERR_RSVD_MASK BIT(PFERR_RSVD_BIT)
272 #define PFERR_FETCH_MASK BIT(PFERR_FETCH_BIT)
273 #define PFERR_PK_MASK BIT(PFERR_PK_BIT)
274 #define PFERR_SGX_MASK BIT(PFERR_SGX_BIT)
275 #define PFERR_GUEST_FINAL_MASK BIT_ULL(PFERR_GUEST_FINAL_BIT)
276 #define PFERR_GUEST_PAGE_MASK BIT_ULL(PFERR_GUEST_PAGE_BIT)
277 #define PFERR_IMPLICIT_ACCESS BIT_ULL(PFERR_IMPLICIT_ACCESS_BIT)
279 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \
283 /* apic attention bits */
284 #define KVM_APIC_CHECK_VAPIC 0
286 * The following bit is set with PV-EOI, unset on EOI.
287 * We detect PV-EOI changes by guest by comparing
288 * this bit with PV-EOI in guest memory.
289 * See the implementation in apic_update_pv_eoi.
291 #define KVM_APIC_PV_EOI_PENDING 1
293 struct kvm_kernel_irq_routing_entry;
296 * kvm_mmu_page_role tracks the properties of a shadow page (where shadow page
297 * also includes TDP pages) to determine whether or not a page can be used in
298 * the given MMU context. This is a subset of the overall kvm_cpu_role to
299 * minimize the size of kvm_memory_slot.arch.gfn_write_track, i.e. allows
300 * allocating 2 bytes per gfn instead of 4 bytes per gfn.
302 * Upper-level shadow pages having gptes are tracked for write-protection via
303 * gfn_write_track. As above, gfn_write_track is a 16 bit counter, so KVM must
304 * not create more than 2^16-1 upper-level shadow pages at a single gfn,
305 * otherwise gfn_write_track will overflow and explosions will ensue.
307 * A unique shadow page (SP) for a gfn is created if and only if an existing SP
308 * cannot be reused. The ability to reuse a SP is tracked by its role, which
309 * incorporates various mode bits and properties of the SP. Roughly speaking,
310 * the number of unique SPs that can theoretically be created is 2^n, where n
311 * is the number of bits that are used to compute the role.
313 * But, even though there are 19 bits in the mask below, not all combinations
314 * of modes and flags are possible:
316 * - invalid shadow pages are not accounted, so the bits are effectively 18
318 * - quadrant will only be used if has_4_byte_gpte=1 (non-PAE paging);
319 * execonly and ad_disabled are only used for nested EPT which has
320 * has_4_byte_gpte=0. Therefore, 2 bits are always unused.
322 * - the 4 bits of level are effectively limited to the values 2/3/4/5,
323 * as 4k SPs are not tracked (allowed to go unsync). In addition non-PAE
324 * paging has exactly one upper level, making level completely redundant
325 * when has_4_byte_gpte=1.
327 * - on top of this, smep_andnot_wp and smap_andnot_wp are only set if
328 * cr0_wp=0, therefore these three bits only give rise to 5 possibilities.
330 * Therefore, the maximum number of possible upper-level shadow pages for a
331 * single gfn is a bit less than 2^13.
333 union kvm_mmu_page_role {
337 unsigned has_4_byte_gpte:1;
344 unsigned smep_andnot_wp:1;
345 unsigned smap_andnot_wp:1;
346 unsigned ad_disabled:1;
347 unsigned guest_mode:1;
348 unsigned passthrough:1;
352 * This is left at the top of the word so that
353 * kvm_memslots_for_spte_role can extract it with a
354 * simple shift. While there is room, give it a whole
355 * byte so it is also faster to load it from memory.
362 * kvm_mmu_extended_role complements kvm_mmu_page_role, tracking properties
363 * relevant to the current MMU configuration. When loading CR0, CR4, or EFER,
364 * including on nested transitions, if nothing in the full role changes then
365 * MMU re-configuration can be skipped. @valid bit is set on first usage so we
366 * don't treat all-zero structure as valid data.
368 * The properties that are tracked in the extended role but not the page role
369 * are for things that either (a) do not affect the validity of the shadow page
370 * or (b) are indirectly reflected in the shadow page's role. For example,
371 * CR4.PKE only affects permission checks for software walks of the guest page
372 * tables (because KVM doesn't support Protection Keys with shadow paging), and
373 * CR0.PG, CR4.PAE, and CR4.PSE are indirectly reflected in role.level.
375 * Note, SMEP and SMAP are not redundant with sm*p_andnot_wp in the page role.
376 * If CR0.WP=1, KVM can reuse shadow pages for the guest regardless of SMEP and
377 * SMAP, but the MMU's permission checks for software walks need to be SMEP and
378 * SMAP aware regardless of CR0.WP.
380 union kvm_mmu_extended_role {
383 unsigned int valid:1;
384 unsigned int execonly:1;
385 unsigned int cr4_pse:1;
386 unsigned int cr4_pke:1;
387 unsigned int cr4_smap:1;
388 unsigned int cr4_smep:1;
389 unsigned int cr4_la57:1;
390 unsigned int efer_lma:1;
397 union kvm_mmu_page_role base;
398 union kvm_mmu_extended_role ext;
402 struct kvm_rmap_head {
406 struct kvm_pio_request {
407 unsigned long linear_rip;
414 #define PT64_ROOT_MAX_LEVEL 5
416 struct rsvd_bits_validate {
417 u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL];
421 struct kvm_mmu_root_info {
426 #define KVM_MMU_ROOT_INFO_INVALID \
427 ((struct kvm_mmu_root_info) { .pgd = INVALID_PAGE, .hpa = INVALID_PAGE })
429 #define KVM_MMU_NUM_PREV_ROOTS 3
431 #define KVM_MMU_ROOT_CURRENT BIT(0)
432 #define KVM_MMU_ROOT_PREVIOUS(i) BIT(1+i)
433 #define KVM_MMU_ROOTS_ALL (BIT(1 + KVM_MMU_NUM_PREV_ROOTS) - 1)
435 #define KVM_HAVE_MMU_RWLOCK
438 struct kvm_page_fault;
441 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit,
442 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the
446 unsigned long (*get_guest_pgd)(struct kvm_vcpu *vcpu);
447 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index);
448 int (*page_fault)(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault);
449 void (*inject_page_fault)(struct kvm_vcpu *vcpu,
450 struct x86_exception *fault);
451 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
452 gpa_t gva_or_gpa, u64 access,
453 struct x86_exception *exception);
454 int (*sync_spte)(struct kvm_vcpu *vcpu,
455 struct kvm_mmu_page *sp, int i);
456 struct kvm_mmu_root_info root;
457 union kvm_cpu_role cpu_role;
458 union kvm_mmu_page_role root_role;
461 * The pkru_mask indicates if protection key checks are needed. It
462 * consists of 16 domains indexed by page fault error code bits [4:1],
463 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables.
464 * Each domain has 2 bits which are ANDed with AD and WD from PKRU.
468 struct kvm_mmu_root_info prev_roots[KVM_MMU_NUM_PREV_ROOTS];
471 * Bitmap; bit set = permission fault
472 * Byte index: page fault error code [4:1]
473 * Bit index: pte permissions in ACC_* format
482 * check zero bits on shadow page table entries, these
483 * bits include not only hardware reserved bits but also
484 * the bits spte never used.
486 struct rsvd_bits_validate shadow_zero_check;
488 struct rsvd_bits_validate guest_rsvd_check;
490 u64 pdptrs[4]; /* pae */
506 struct perf_event *perf_event;
507 struct kvm_vcpu *vcpu;
509 * only for creating or reusing perf_event,
510 * eventsel value for general purpose counters,
511 * ctrl value for fixed counters.
516 /* More counters may conflict with other existing Architectural MSRs */
517 #define KVM_INTEL_PMC_MAX_GENERIC 8
518 #define MSR_ARCH_PERFMON_PERFCTR_MAX (MSR_ARCH_PERFMON_PERFCTR0 + KVM_INTEL_PMC_MAX_GENERIC - 1)
519 #define MSR_ARCH_PERFMON_EVENTSEL_MAX (MSR_ARCH_PERFMON_EVENTSEL0 + KVM_INTEL_PMC_MAX_GENERIC - 1)
520 #define KVM_PMC_MAX_FIXED 3
521 #define MSR_ARCH_PERFMON_FIXED_CTR_MAX (MSR_ARCH_PERFMON_FIXED_CTR0 + KVM_PMC_MAX_FIXED - 1)
522 #define KVM_AMD_PMC_MAX_GENERIC 6
525 unsigned nr_arch_gp_counters;
526 unsigned nr_arch_fixed_counters;
527 unsigned available_event_types;
529 u64 fixed_ctr_ctrl_mask;
532 u64 counter_bitmask[2];
533 u64 global_ctrl_mask;
534 u64 global_status_mask;
537 struct kvm_pmc gp_counters[KVM_INTEL_PMC_MAX_GENERIC];
538 struct kvm_pmc fixed_counters[KVM_PMC_MAX_FIXED];
541 * Overlay the bitmap with a 64-bit atomic so that all bits can be
542 * set in a single access, e.g. to reprogram all counters when the PMU
546 DECLARE_BITMAP(reprogram_pmi, X86_PMC_IDX_MAX);
547 atomic64_t __reprogram_pmi;
549 DECLARE_BITMAP(all_valid_pmc_idx, X86_PMC_IDX_MAX);
550 DECLARE_BITMAP(pmc_in_use, X86_PMC_IDX_MAX);
554 u64 pebs_enable_mask;
556 u64 pebs_data_cfg_mask;
559 * If a guest counter is cross-mapped to host counter with different
560 * index, its PEBS capability will be temporarily disabled.
562 * The user should make sure that this mask is updated
563 * after disabling interrupts and before perf_guest_get_msrs();
565 u64 host_cross_mapped_mask;
568 * The gate to release perf_events not marked in
569 * pmc_in_use only once in a vcpu time slice.
574 * The total number of programmed perf_events and it helps to avoid
575 * redundant check before cleanup if guest don't use vPMU at all.
583 KVM_DEBUGREG_BP_ENABLED = 1,
584 KVM_DEBUGREG_WONT_EXIT = 2,
587 struct kvm_mtrr_range {
590 struct list_head node;
594 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR];
595 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION];
598 struct list_head head;
601 /* Hyper-V SynIC timer */
602 struct kvm_vcpu_hv_stimer {
603 struct hrtimer timer;
605 union hv_stimer_config config;
608 struct hv_message msg;
612 /* Hyper-V synthetic interrupt controller (SynIC)*/
613 struct kvm_vcpu_hv_synic {
618 atomic64_t sint[HV_SYNIC_SINT_COUNT];
619 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT];
620 DECLARE_BITMAP(auto_eoi_bitmap, 256);
621 DECLARE_BITMAP(vec_bitmap, 256);
623 bool dont_zero_synic_pages;
626 /* The maximum number of entries on the TLB flush fifo. */
627 #define KVM_HV_TLB_FLUSH_FIFO_SIZE (16)
629 * Note: the following 'magic' entry is made up by KVM to avoid putting
630 * anything besides GVA on the TLB flush fifo. It is theoretically possible
631 * to observe a request to flush 4095 PFNs starting from 0xfffffffffffff000
632 * which will look identical. KVM's action to 'flush everything' instead of
633 * flushing these particular addresses is, however, fully legitimate as
634 * flushing more than requested is always OK.
636 #define KVM_HV_TLB_FLUSHALL_ENTRY ((u64)-1)
638 enum hv_tlb_flush_fifos {
639 HV_L1_TLB_FLUSH_FIFO,
640 HV_L2_TLB_FLUSH_FIFO,
641 HV_NR_TLB_FLUSH_FIFOS,
644 struct kvm_vcpu_hv_tlb_flush_fifo {
645 spinlock_t write_lock;
646 DECLARE_KFIFO(entries, u64, KVM_HV_TLB_FLUSH_FIFO_SIZE);
649 /* Hyper-V per vcpu emulation context */
651 struct kvm_vcpu *vcpu;
655 struct kvm_vcpu_hv_synic synic;
656 struct kvm_hyperv_exit exit;
657 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT];
658 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT);
661 u32 features_eax; /* HYPERV_CPUID_FEATURES.EAX */
662 u32 features_ebx; /* HYPERV_CPUID_FEATURES.EBX */
663 u32 features_edx; /* HYPERV_CPUID_FEATURES.EDX */
664 u32 enlightenments_eax; /* HYPERV_CPUID_ENLIGHTMENT_INFO.EAX */
665 u32 enlightenments_ebx; /* HYPERV_CPUID_ENLIGHTMENT_INFO.EBX */
666 u32 syndbg_cap_eax; /* HYPERV_CPUID_SYNDBG_PLATFORM_CAPABILITIES.EAX */
667 u32 nested_eax; /* HYPERV_CPUID_NESTED_FEATURES.EAX */
668 u32 nested_ebx; /* HYPERV_CPUID_NESTED_FEATURES.EBX */
671 struct kvm_vcpu_hv_tlb_flush_fifo tlb_flush_fifo[HV_NR_TLB_FLUSH_FIFOS];
673 /* Preallocated buffer for handling hypercalls passing sparse vCPU set */
674 u64 sparse_banks[HV_MAX_SPARSE_VCPU_BANKS];
676 struct hv_vp_assist_page vp_assist_page;
685 struct kvm_hypervisor_cpuid {
690 /* Xen HVM per vcpu emulation context */
691 struct kvm_vcpu_xen {
693 u32 current_runstate;
695 struct gfn_to_pfn_cache vcpu_info_cache;
696 struct gfn_to_pfn_cache vcpu_time_info_cache;
697 struct gfn_to_pfn_cache runstate_cache;
698 struct gfn_to_pfn_cache runstate2_cache;
700 u64 runstate_entry_time;
701 u64 runstate_times[4];
702 unsigned long evtchn_pending_sel;
703 u32 vcpu_id; /* The Xen / ACPI vCPU ID */
705 u64 timer_expires; /* In guest epoch */
706 atomic_t timer_pending;
707 struct hrtimer timer;
709 struct timer_list poll_timer;
710 struct kvm_hypervisor_cpuid cpuid;
713 struct kvm_queued_exception {
719 unsigned long payload;
723 struct kvm_vcpu_arch {
725 * rip and regs accesses must go through
726 * kvm_{register,rip}_{read,write} functions.
728 unsigned long regs[NR_VCPU_REGS];
733 unsigned long cr0_guest_owned_bits;
737 unsigned long cr4_guest_owned_bits;
738 unsigned long cr4_guest_rsvd_bits;
745 struct kvm_lapic *apic; /* kernel irqchip context */
746 bool load_eoi_exitmap_pending;
747 DECLARE_BITMAP(ioapic_handled_vectors, 256);
748 unsigned long apic_attention;
749 int32_t apic_arb_prio;
751 u64 ia32_misc_enable_msr;
754 bool at_instruction_boundary;
755 bool tpr_access_reporting;
756 bool xfd_no_write_intercept;
758 u64 microcode_version;
759 u64 arch_capabilities;
760 u64 perf_capabilities;
763 * Paging state of the vcpu
765 * If the vcpu runs in guest mode with two level paging this still saves
766 * the paging mode of the l1 guest. This context is always used to
771 /* Non-nested MMU for L1 */
772 struct kvm_mmu root_mmu;
774 /* L1 MMU when running nested */
775 struct kvm_mmu guest_mmu;
778 * Paging state of an L2 guest (used for nested npt)
780 * This context will save all necessary information to walk page tables
781 * of an L2 guest. This context is only initialized for page table
782 * walking and not for faulting since we never handle l2 page faults on
785 struct kvm_mmu nested_mmu;
788 * Pointer to the mmu context currently used for
789 * gva_to_gpa translations.
791 struct kvm_mmu *walk_mmu;
793 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache;
794 struct kvm_mmu_memory_cache mmu_shadow_page_cache;
795 struct kvm_mmu_memory_cache mmu_shadowed_info_cache;
796 struct kvm_mmu_memory_cache mmu_page_header_cache;
799 * QEMU userspace and the guest each have their own FPU state.
800 * In vcpu_run, we switch between the user and guest FPU contexts.
801 * While running a VCPU, the VCPU thread will have the guest FPU
804 * Note that while the PKRU state lives inside the fpu registers,
805 * it is switched out separately at VMENTER and VMEXIT time. The
806 * "guest_fpstate" state here contains the guest FPU context, with the
809 struct fpu_guest guest_fpu;
812 u64 guest_supported_xcr0;
814 struct kvm_pio_request pio;
817 unsigned sev_pio_count;
819 u8 event_exit_inst_len;
821 bool exception_from_userspace;
823 /* Exceptions to be injected to the guest. */
824 struct kvm_queued_exception exception;
825 /* Exception VM-Exits to be synthesized to L1. */
826 struct kvm_queued_exception exception_vmexit;
828 struct kvm_queued_interrupt {
834 int halt_request; /* real mode on Intel only */
837 struct kvm_cpuid_entry2 *cpuid_entries;
838 struct kvm_hypervisor_cpuid kvm_cpuid;
841 * FIXME: Drop this macro and use KVM_NR_GOVERNED_FEATURES directly
842 * when "struct kvm_vcpu_arch" is no longer defined in an
843 * arch/x86/include/asm header. The max is mostly arbitrary, i.e.
844 * can be increased as necessary.
846 #define KVM_MAX_NR_GOVERNED_FEATURES BITS_PER_LONG
849 * Track whether or not the guest is allowed to use features that are
850 * governed by KVM, where "governed" means KVM needs to manage state
851 * and/or explicitly enable the feature in hardware. Typically, but
852 * not always, governed features can be used by the guest if and only
853 * if both KVM and userspace want to expose the feature to the guest.
856 DECLARE_BITMAP(enabled, KVM_MAX_NR_GOVERNED_FEATURES);
859 u64 reserved_gpa_bits;
862 /* emulate context */
864 struct x86_emulate_ctxt *emulate_ctxt;
865 bool emulate_regs_need_sync_to_vcpu;
866 bool emulate_regs_need_sync_from_vcpu;
867 int (*complete_userspace_io)(struct kvm_vcpu *vcpu);
870 struct pvclock_vcpu_time_info hv_clock;
871 unsigned int hw_tsc_khz;
872 struct gfn_to_pfn_cache pv_time;
873 /* set guest stopped flag in pvclock flags field */
874 bool pvclock_set_guest_stopped_request;
880 struct gfn_to_hva_cache cache;
884 u64 tsc_offset; /* current tsc offset */
887 u64 tsc_offset_adjustment;
890 u64 this_tsc_generation;
892 bool tsc_always_catchup;
893 s8 virtual_tsc_shift;
894 u32 virtual_tsc_mult;
896 s64 ia32_tsc_adjust_msr;
897 u64 msr_ia32_power_ctl;
898 u64 l1_tsc_scaling_ratio;
899 u64 tsc_scaling_ratio; /* current scaling ratio */
901 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */
902 /* Number of NMIs pending injection, not including hardware vNMIs. */
903 unsigned int nmi_pending;
904 bool nmi_injected; /* Trying to inject an NMI this entry */
905 bool smi_pending; /* SMI queued after currently running handler */
906 u8 handling_intr_from_guest;
908 struct kvm_mtrr mtrr_state;
911 unsigned switch_db_regs;
912 unsigned long db[KVM_NR_DB_REGS];
915 unsigned long eff_db[KVM_NR_DB_REGS];
916 unsigned long guest_debug_dr7;
917 u64 msr_platform_info;
918 u64 msr_misc_features_enables;
927 /* Cache MMIO info */
929 unsigned mmio_access;
935 /* used for guest single stepping over the given code position */
936 unsigned long singlestep_rip;
939 struct kvm_vcpu_hv *hyperv;
940 struct kvm_vcpu_xen xen;
942 cpumask_var_t wbinvd_dirty_mask;
944 unsigned long last_retry_eip;
945 unsigned long last_retry_addr;
949 gfn_t gfns[ASYNC_PF_PER_VCPU];
950 struct gfn_to_hva_cache data;
951 u64 msr_en_val; /* MSR_KVM_ASYNC_PF_EN */
952 u64 msr_int_val; /* MSR_KVM_ASYNC_PF_INT */
957 bool delivery_as_pf_vmexit;
958 bool pageready_pending;
961 /* OSVW MSRs (AMD only) */
969 struct gfn_to_hva_cache data;
972 u64 msr_kvm_poll_control;
974 /* set at EPT violation at this point */
975 unsigned long exit_qualification;
977 /* pv related host specific info */
982 int pending_ioapic_eoi;
983 int pending_external_vector;
985 /* be preempted when it's in kernel-mode(cpl=0) */
986 bool preempted_in_kernel;
988 /* Flush the L1 Data cache for L1TF mitigation on VMENTER */
991 /* Host CPU on which VM-entry was most recently attempted */
992 int last_vmentry_cpu;
994 /* AMD MSRC001_0015 Hardware Configuration */
997 /* pv related cpuid info */
1000 * value of the eax register in the KVM_CPUID_FEATURES CPUID
1006 * indicates whether pv emulation should be disabled if features
1007 * are not present in the guest's cpuid
1012 /* Protected Guests */
1013 bool guest_state_protected;
1016 * Set when PDPTS were loaded directly by the userspace without
1017 * reading the guest memory
1019 bool pdptrs_from_userspace;
1021 #if IS_ENABLED(CONFIG_HYPERV)
1026 struct kvm_lpage_info {
1030 struct kvm_arch_memory_slot {
1031 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES];
1032 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1];
1033 unsigned short *gfn_write_track;
1037 * Track the mode of the optimized logical map, as the rules for decoding the
1038 * destination vary per mode. Enabling the optimized logical map requires all
1039 * software-enabled local APIs to be in the same mode, each addressable APIC to
1040 * be mapped to only one MDA, and each MDA to map to at most one APIC.
1042 enum kvm_apic_logical_mode {
1043 /* All local APICs are software disabled. */
1044 KVM_APIC_MODE_SW_DISABLED,
1045 /* All software enabled local APICs in xAPIC cluster addressing mode. */
1046 KVM_APIC_MODE_XAPIC_CLUSTER,
1047 /* All software enabled local APICs in xAPIC flat addressing mode. */
1048 KVM_APIC_MODE_XAPIC_FLAT,
1049 /* All software enabled local APICs in x2APIC mode. */
1050 KVM_APIC_MODE_X2APIC,
1052 * Optimized map disabled, e.g. not all local APICs in the same logical
1053 * mode, same logical ID assigned to multiple APICs, etc.
1055 KVM_APIC_MODE_MAP_DISABLED,
1058 struct kvm_apic_map {
1059 struct rcu_head rcu;
1060 enum kvm_apic_logical_mode logical_mode;
1063 struct kvm_lapic *xapic_flat_map[8];
1064 struct kvm_lapic *xapic_cluster_map[16][4];
1066 struct kvm_lapic *phys_map[];
1069 /* Hyper-V synthetic debugger (SynDbg)*/
1070 struct kvm_hv_syndbg {
1081 /* Current state of Hyper-V TSC page clocksource */
1082 enum hv_tsc_page_status {
1083 /* TSC page was not set up or disabled */
1084 HV_TSC_PAGE_UNSET = 0,
1085 /* TSC page MSR was written by the guest, update pending */
1086 HV_TSC_PAGE_GUEST_CHANGED,
1087 /* TSC page update was triggered from the host side */
1088 HV_TSC_PAGE_HOST_CHANGED,
1089 /* TSC page was properly set up and is currently active */
1091 /* TSC page was set up with an inaccessible GPA */
1095 /* Hyper-V emulation context */
1097 struct mutex hv_lock;
1101 enum hv_tsc_page_status hv_tsc_page_status;
1103 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */
1104 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS];
1107 struct ms_hyperv_tsc_page tsc_ref;
1109 struct idr conn_to_evt;
1111 u64 hv_reenlightenment_control;
1112 u64 hv_tsc_emulation_control;
1113 u64 hv_tsc_emulation_status;
1114 u64 hv_invtsc_control;
1116 /* How many vCPUs have VP index != vCPU index */
1117 atomic_t num_mismatched_vp_indexes;
1120 * How many SynICs use 'AutoEOI' feature
1121 * (protected by arch.apicv_update_lock)
1123 unsigned int synic_auto_eoi_used;
1125 struct hv_partition_assist_pg *hv_pa_pg;
1126 struct kvm_hv_syndbg hv_syndbg;
1129 struct msr_bitmap_range {
1133 unsigned long *bitmap;
1136 /* Xen emulation context */
1138 struct mutex xen_lock;
1141 bool runstate_update_flag;
1143 struct gfn_to_pfn_cache shinfo_cache;
1144 struct idr evtchn_ports;
1145 unsigned long poll_mask[BITS_TO_LONGS(KVM_MAX_VCPUS)];
1148 enum kvm_irqchip_mode {
1150 KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */
1151 KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */
1154 struct kvm_x86_msr_filter {
1156 bool default_allow:1;
1157 struct msr_bitmap_range ranges[16];
1160 struct kvm_x86_pmu_event_filter {
1163 __u32 fixed_counter_bitmap;
1172 enum kvm_apicv_inhibit {
1174 /********************************************************************/
1175 /* INHIBITs that are relevant to both Intel's APICv and AMD's AVIC. */
1176 /********************************************************************/
1179 * APIC acceleration is disabled by a module parameter
1180 * and/or not supported in hardware.
1182 APICV_INHIBIT_REASON_DISABLE,
1185 * APIC acceleration is inhibited because AutoEOI feature is
1186 * being used by a HyperV guest.
1188 APICV_INHIBIT_REASON_HYPERV,
1191 * APIC acceleration is inhibited because the userspace didn't yet
1192 * enable the kernel/split irqchip.
1194 APICV_INHIBIT_REASON_ABSENT,
1196 /* APIC acceleration is inhibited because KVM_GUESTDBG_BLOCKIRQ
1197 * (out of band, debug measure of blocking all interrupts on this vCPU)
1198 * was enabled, to avoid AVIC/APICv bypassing it.
1200 APICV_INHIBIT_REASON_BLOCKIRQ,
1203 * APICv is disabled because not all vCPUs have a 1:1 mapping between
1204 * APIC ID and vCPU, _and_ KVM is not applying its x2APIC hotplug hack.
1206 APICV_INHIBIT_REASON_PHYSICAL_ID_ALIASED,
1209 * For simplicity, the APIC acceleration is inhibited
1210 * first time either APIC ID or APIC base are changed by the guest
1211 * from their reset values.
1213 APICV_INHIBIT_REASON_APIC_ID_MODIFIED,
1214 APICV_INHIBIT_REASON_APIC_BASE_MODIFIED,
1216 /******************************************************/
1217 /* INHIBITs that are relevant only to the AMD's AVIC. */
1218 /******************************************************/
1221 * AVIC is inhibited on a vCPU because it runs a nested guest.
1223 * This is needed because unlike APICv, the peers of this vCPU
1224 * cannot use the doorbell mechanism to signal interrupts via AVIC when
1225 * a vCPU runs nested.
1227 APICV_INHIBIT_REASON_NESTED,
1230 * On SVM, the wait for the IRQ window is implemented with pending vIRQ,
1231 * which cannot be injected when the AVIC is enabled, thus AVIC
1232 * is inhibited while KVM waits for IRQ window.
1234 APICV_INHIBIT_REASON_IRQWIN,
1237 * PIT (i8254) 're-inject' mode, relies on EOI intercept,
1238 * which AVIC doesn't support for edge triggered interrupts.
1240 APICV_INHIBIT_REASON_PIT_REINJ,
1243 * AVIC is disabled because SEV doesn't support it.
1245 APICV_INHIBIT_REASON_SEV,
1248 * AVIC is disabled because not all vCPUs with a valid LDR have a 1:1
1249 * mapping between logical ID and vCPU.
1251 APICV_INHIBIT_REASON_LOGICAL_ID_ALIASED,
1255 unsigned long n_used_mmu_pages;
1256 unsigned long n_requested_mmu_pages;
1257 unsigned long n_max_mmu_pages;
1258 unsigned int indirect_shadow_pages;
1260 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
1261 struct list_head active_mmu_pages;
1262 struct list_head zapped_obsolete_pages;
1264 * A list of kvm_mmu_page structs that, if zapped, could possibly be
1265 * replaced by an NX huge page. A shadow page is on this list if its
1266 * existence disallows an NX huge page (nx_huge_page_disallowed is set)
1267 * and there are no other conditions that prevent a huge page, e.g.
1268 * the backing host page is huge, dirtly logging is not enabled for its
1269 * memslot, etc... Note, zapping shadow pages on this list doesn't
1270 * guarantee an NX huge page will be created in its stead, e.g. if the
1271 * guest attempts to execute from the region then KVM obviously can't
1272 * create an NX huge page (without hanging the guest).
1274 struct list_head possible_nx_huge_pages;
1275 #ifdef CONFIG_KVM_EXTERNAL_WRITE_TRACKING
1276 struct kvm_page_track_notifier_head track_notifier_head;
1279 * Protects marking pages unsync during page faults, as TDP MMU page
1280 * faults only take mmu_lock for read. For simplicity, the unsync
1281 * pages lock is always taken when marking pages unsync regardless of
1282 * whether mmu_lock is held for read or write.
1284 spinlock_t mmu_unsync_pages_lock;
1286 struct iommu_domain *iommu_domain;
1287 bool iommu_noncoherent;
1288 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA
1289 atomic_t noncoherent_dma_count;
1290 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE
1291 atomic_t assigned_device_count;
1292 struct kvm_pic *vpic;
1293 struct kvm_ioapic *vioapic;
1294 struct kvm_pit *vpit;
1295 atomic_t vapics_in_nmi_mode;
1296 struct mutex apic_map_lock;
1297 struct kvm_apic_map __rcu *apic_map;
1298 atomic_t apic_map_dirty;
1300 bool apic_access_memslot_enabled;
1301 bool apic_access_memslot_inhibited;
1303 /* Protects apicv_inhibit_reasons */
1304 struct rw_semaphore apicv_update_lock;
1305 unsigned long apicv_inhibit_reasons;
1309 bool mwait_in_guest;
1311 bool pause_in_guest;
1312 bool cstate_in_guest;
1314 unsigned long irq_sources_bitmap;
1315 s64 kvmclock_offset;
1318 * This also protects nr_vcpus_matched_tsc which is read from a
1319 * preemption-disabled region, so it must be a raw spinlock.
1321 raw_spinlock_t tsc_write_lock;
1325 u64 last_tsc_offset;
1329 u64 cur_tsc_generation;
1330 int nr_vcpus_matched_tsc;
1332 u32 default_tsc_khz;
1335 seqcount_raw_spinlock_t pvclock_sc;
1336 bool use_master_clock;
1337 u64 master_kernel_ns;
1338 u64 master_cycle_now;
1339 struct delayed_work kvmclock_update_work;
1340 struct delayed_work kvmclock_sync_work;
1342 struct kvm_xen_hvm_config xen_hvm_config;
1344 /* reads protected by irq_srcu, writes by irq_lock */
1345 struct hlist_head mask_notifier_list;
1347 struct kvm_hv hyperv;
1350 bool backwards_tsc_observed;
1351 bool boot_vcpu_runs_old_kvmclock;
1354 u64 disabled_quirks;
1356 enum kvm_irqchip_mode irqchip_mode;
1357 u8 nr_reserved_ioapic_pins;
1359 bool disabled_lapic_found;
1362 bool x2apic_broadcast_quirk_disabled;
1364 bool guest_can_read_msr_platform_info;
1365 bool exception_payload_enabled;
1367 bool triple_fault_event;
1369 bool bus_lock_detection_enabled;
1373 u32 notify_vmexit_flags;
1375 * If exit_on_emulation_error is set, and the in-kernel instruction
1376 * emulator fails to emulate an instruction, allow userspace
1377 * the opportunity to look at it.
1379 bool exit_on_emulation_error;
1381 /* Deflect RDMSR and WRMSR to user space when they trigger a #GP */
1382 u32 user_space_msr_mask;
1383 struct kvm_x86_msr_filter __rcu *msr_filter;
1385 u32 hypercall_exit_enabled;
1387 /* Guest can access the SGX PROVISIONKEY. */
1388 bool sgx_provisioning_allowed;
1390 struct kvm_x86_pmu_event_filter __rcu *pmu_event_filter;
1391 struct task_struct *nx_huge_page_recovery_thread;
1393 #ifdef CONFIG_X86_64
1394 /* The number of TDP MMU pages across all roots. */
1395 atomic64_t tdp_mmu_pages;
1398 * List of struct kvm_mmu_pages being used as roots.
1399 * All struct kvm_mmu_pages in the list should have
1402 * For reads, this list is protected by:
1403 * the MMU lock in read mode + RCU or
1404 * the MMU lock in write mode
1406 * For writes, this list is protected by:
1407 * the MMU lock in read mode + the tdp_mmu_pages_lock or
1408 * the MMU lock in write mode
1410 * Roots will remain in the list until their tdp_mmu_root_count
1411 * drops to zero, at which point the thread that decremented the
1412 * count to zero should removed the root from the list and clean
1413 * it up, freeing the root after an RCU grace period.
1415 struct list_head tdp_mmu_roots;
1418 * Protects accesses to the following fields when the MMU lock
1419 * is held in read mode:
1420 * - tdp_mmu_roots (above)
1421 * - the link field of kvm_mmu_page structs used by the TDP MMU
1422 * - possible_nx_huge_pages;
1423 * - the possible_nx_huge_page_link field of kvm_mmu_page structs used
1425 * It is acceptable, but not necessary, to acquire this lock when
1426 * the thread holds the MMU lock in write mode.
1428 spinlock_t tdp_mmu_pages_lock;
1429 #endif /* CONFIG_X86_64 */
1432 * If set, at least one shadow root has been allocated. This flag
1433 * is used as one input when determining whether certain memslot
1434 * related allocations are necessary.
1436 bool shadow_root_allocated;
1438 #if IS_ENABLED(CONFIG_HYPERV)
1440 spinlock_t hv_root_tdp_lock;
1443 * VM-scope maximum vCPU ID. Used to determine the size of structures
1444 * that increase along with the maximum vCPU ID, in which case, using
1445 * the global KVM_MAX_VCPU_IDS may lead to significant memory waste.
1449 bool disable_nx_huge_pages;
1452 * Memory caches used to allocate shadow pages when performing eager
1453 * page splitting. No need for a shadowed_info_cache since eager page
1454 * splitting only allocates direct shadow pages.
1456 * Protected by kvm->slots_lock.
1458 struct kvm_mmu_memory_cache split_shadow_page_cache;
1459 struct kvm_mmu_memory_cache split_page_header_cache;
1462 * Memory cache used to allocate pte_list_desc structs while splitting
1463 * huge pages. In the worst case, to split one huge page, 512
1464 * pte_list_desc structs are needed to add each lower level leaf sptep
1465 * to the rmap plus 1 to extend the parent_ptes rmap of the lower level
1468 * Protected by kvm->slots_lock.
1470 #define SPLIT_DESC_CACHE_MIN_NR_OBJECTS (SPTE_ENT_PER_PAGE + 1)
1471 struct kvm_mmu_memory_cache split_desc_cache;
1474 struct kvm_vm_stat {
1475 struct kvm_vm_stat_generic generic;
1476 u64 mmu_shadow_zapped;
1485 atomic64_t pages_4k;
1486 atomic64_t pages_2m;
1487 atomic64_t pages_1g;
1489 atomic64_t pages[KVM_NR_PAGE_SIZES];
1491 u64 nx_lpage_splits;
1492 u64 max_mmu_page_hash_collisions;
1493 u64 max_mmu_rmap_size;
1496 struct kvm_vcpu_stat {
1497 struct kvm_vcpu_stat_generic generic;
1503 u64 pf_mmio_spte_created;
1512 u64 irq_window_exits;
1513 u64 nmi_window_exits;
1516 u64 request_irq_exits;
1518 u64 host_state_reload;
1521 u64 insn_emulation_fail;
1527 u64 directed_yield_attempted;
1528 u64 directed_yield_successful;
1529 u64 preemption_reported;
1530 u64 preemption_other;
1532 u64 notify_window_exits;
1535 struct x86_instruction_info;
1538 bool host_initiated;
1543 struct kvm_lapic_irq {
1551 bool msi_redir_hint;
1554 static inline u16 kvm_lapic_irq_dest_mode(bool dest_mode_logical)
1556 return dest_mode_logical ? APIC_DEST_LOGICAL : APIC_DEST_PHYSICAL;
1559 struct kvm_x86_ops {
1562 int (*check_processor_compatibility)(void);
1564 int (*hardware_enable)(void);
1565 void (*hardware_disable)(void);
1566 void (*hardware_unsetup)(void);
1567 bool (*has_emulated_msr)(struct kvm *kvm, u32 index);
1568 void (*vcpu_after_set_cpuid)(struct kvm_vcpu *vcpu);
1570 unsigned int vm_size;
1571 int (*vm_init)(struct kvm *kvm);
1572 void (*vm_destroy)(struct kvm *kvm);
1574 /* Create, but do not attach this VCPU */
1575 int (*vcpu_precreate)(struct kvm *kvm);
1576 int (*vcpu_create)(struct kvm_vcpu *vcpu);
1577 void (*vcpu_free)(struct kvm_vcpu *vcpu);
1578 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event);
1580 void (*prepare_switch_to_guest)(struct kvm_vcpu *vcpu);
1581 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
1582 void (*vcpu_put)(struct kvm_vcpu *vcpu);
1584 void (*update_exception_bitmap)(struct kvm_vcpu *vcpu);
1585 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
1586 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
1587 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
1588 void (*get_segment)(struct kvm_vcpu *vcpu,
1589 struct kvm_segment *var, int seg);
1590 int (*get_cpl)(struct kvm_vcpu *vcpu);
1591 void (*set_segment)(struct kvm_vcpu *vcpu,
1592 struct kvm_segment *var, int seg);
1593 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
1594 bool (*is_valid_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
1595 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
1596 void (*post_set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
1597 bool (*is_valid_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
1598 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
1599 int (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
1600 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1601 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1602 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1603 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1604 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu);
1605 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
1606 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
1607 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
1608 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
1609 bool (*get_if_flag)(struct kvm_vcpu *vcpu);
1611 void (*flush_tlb_all)(struct kvm_vcpu *vcpu);
1612 void (*flush_tlb_current)(struct kvm_vcpu *vcpu);
1613 int (*flush_remote_tlbs)(struct kvm *kvm);
1614 int (*flush_remote_tlbs_range)(struct kvm *kvm, gfn_t gfn,
1618 * Flush any TLB entries associated with the given GVA.
1619 * Does not need to flush GPA->HPA mappings.
1620 * Can potentially get non-canonical addresses through INVLPGs, which
1621 * the implementation may choose to ignore if appropriate.
1623 void (*flush_tlb_gva)(struct kvm_vcpu *vcpu, gva_t addr);
1626 * Flush any TLB entries created by the guest. Like tlb_flush_gva(),
1627 * does not need to flush GPA->HPA mappings.
1629 void (*flush_tlb_guest)(struct kvm_vcpu *vcpu);
1631 int (*vcpu_pre_run)(struct kvm_vcpu *vcpu);
1632 enum exit_fastpath_completion (*vcpu_run)(struct kvm_vcpu *vcpu);
1633 int (*handle_exit)(struct kvm_vcpu *vcpu,
1634 enum exit_fastpath_completion exit_fastpath);
1635 int (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
1636 void (*update_emulated_instruction)(struct kvm_vcpu *vcpu);
1637 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
1638 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu);
1639 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
1640 unsigned char *hypercall_addr);
1641 void (*inject_irq)(struct kvm_vcpu *vcpu, bool reinjected);
1642 void (*inject_nmi)(struct kvm_vcpu *vcpu);
1643 void (*inject_exception)(struct kvm_vcpu *vcpu);
1644 void (*cancel_injection)(struct kvm_vcpu *vcpu);
1645 int (*interrupt_allowed)(struct kvm_vcpu *vcpu, bool for_injection);
1646 int (*nmi_allowed)(struct kvm_vcpu *vcpu, bool for_injection);
1647 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
1648 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
1649 /* Whether or not a virtual NMI is pending in hardware. */
1650 bool (*is_vnmi_pending)(struct kvm_vcpu *vcpu);
1652 * Attempt to pend a virtual NMI in harware. Returns %true on success
1653 * to allow using static_call_ret0 as the fallback.
1655 bool (*set_vnmi_pending)(struct kvm_vcpu *vcpu);
1656 void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
1657 void (*enable_irq_window)(struct kvm_vcpu *vcpu);
1658 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
1659 bool (*check_apicv_inhibit_reasons)(enum kvm_apicv_inhibit reason);
1660 const unsigned long required_apicv_inhibits;
1661 bool allow_apicv_in_x2apic_without_x2apic_virtualization;
1662 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu);
1663 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);
1664 void (*hwapic_isr_update)(int isr);
1665 bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu);
1666 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);
1667 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu);
1668 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu);
1669 void (*deliver_interrupt)(struct kvm_lapic *apic, int delivery_mode,
1670 int trig_mode, int vector);
1671 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu);
1672 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
1673 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr);
1674 u8 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
1676 void (*load_mmu_pgd)(struct kvm_vcpu *vcpu, hpa_t root_hpa,
1679 bool (*has_wbinvd_exit)(void);
1681 u64 (*get_l2_tsc_offset)(struct kvm_vcpu *vcpu);
1682 u64 (*get_l2_tsc_multiplier)(struct kvm_vcpu *vcpu);
1683 void (*write_tsc_offset)(struct kvm_vcpu *vcpu);
1684 void (*write_tsc_multiplier)(struct kvm_vcpu *vcpu);
1687 * Retrieve somewhat arbitrary exit information. Intended to
1688 * be used only from within tracepoints or error paths.
1690 void (*get_exit_info)(struct kvm_vcpu *vcpu, u32 *reason,
1691 u64 *info1, u64 *info2,
1692 u32 *exit_int_info, u32 *exit_int_info_err_code);
1694 int (*check_intercept)(struct kvm_vcpu *vcpu,
1695 struct x86_instruction_info *info,
1696 enum x86_intercept_stage stage,
1697 struct x86_exception *exception);
1698 void (*handle_exit_irqoff)(struct kvm_vcpu *vcpu);
1700 void (*request_immediate_exit)(struct kvm_vcpu *vcpu);
1702 void (*sched_in)(struct kvm_vcpu *vcpu, int cpu);
1705 * Size of the CPU's dirty log buffer, i.e. VMX's PML buffer. A zero
1706 * value indicates CPU dirty logging is unsupported or disabled.
1708 int cpu_dirty_log_size;
1709 void (*update_cpu_dirty_logging)(struct kvm_vcpu *vcpu);
1711 const struct kvm_x86_nested_ops *nested_ops;
1713 void (*vcpu_blocking)(struct kvm_vcpu *vcpu);
1714 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu);
1716 int (*pi_update_irte)(struct kvm *kvm, unsigned int host_irq,
1717 uint32_t guest_irq, bool set);
1718 void (*pi_start_assignment)(struct kvm *kvm);
1719 void (*apicv_pre_state_restore)(struct kvm_vcpu *vcpu);
1720 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu);
1721 bool (*dy_apicv_has_pending_interrupt)(struct kvm_vcpu *vcpu);
1723 int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc,
1725 void (*cancel_hv_timer)(struct kvm_vcpu *vcpu);
1727 void (*setup_mce)(struct kvm_vcpu *vcpu);
1729 #ifdef CONFIG_KVM_SMM
1730 int (*smi_allowed)(struct kvm_vcpu *vcpu, bool for_injection);
1731 int (*enter_smm)(struct kvm_vcpu *vcpu, union kvm_smram *smram);
1732 int (*leave_smm)(struct kvm_vcpu *vcpu, const union kvm_smram *smram);
1733 void (*enable_smi_window)(struct kvm_vcpu *vcpu);
1736 int (*mem_enc_ioctl)(struct kvm *kvm, void __user *argp);
1737 int (*mem_enc_register_region)(struct kvm *kvm, struct kvm_enc_region *argp);
1738 int (*mem_enc_unregister_region)(struct kvm *kvm, struct kvm_enc_region *argp);
1739 int (*vm_copy_enc_context_from)(struct kvm *kvm, unsigned int source_fd);
1740 int (*vm_move_enc_context_from)(struct kvm *kvm, unsigned int source_fd);
1741 void (*guest_memory_reclaimed)(struct kvm *kvm);
1743 int (*get_msr_feature)(struct kvm_msr_entry *entry);
1745 bool (*can_emulate_instruction)(struct kvm_vcpu *vcpu, int emul_type,
1746 void *insn, int insn_len);
1748 bool (*apic_init_signal_blocked)(struct kvm_vcpu *vcpu);
1749 int (*enable_l2_tlb_flush)(struct kvm_vcpu *vcpu);
1751 void (*migrate_timers)(struct kvm_vcpu *vcpu);
1752 void (*msr_filter_changed)(struct kvm_vcpu *vcpu);
1753 int (*complete_emulated_msr)(struct kvm_vcpu *vcpu, int err);
1755 void (*vcpu_deliver_sipi_vector)(struct kvm_vcpu *vcpu, u8 vector);
1758 * Returns vCPU specific APICv inhibit reasons
1760 unsigned long (*vcpu_get_apicv_inhibit_reasons)(struct kvm_vcpu *vcpu);
1763 struct kvm_x86_nested_ops {
1764 void (*leave_nested)(struct kvm_vcpu *vcpu);
1765 bool (*is_exception_vmexit)(struct kvm_vcpu *vcpu, u8 vector,
1767 int (*check_events)(struct kvm_vcpu *vcpu);
1768 bool (*has_events)(struct kvm_vcpu *vcpu);
1769 void (*triple_fault)(struct kvm_vcpu *vcpu);
1770 int (*get_state)(struct kvm_vcpu *vcpu,
1771 struct kvm_nested_state __user *user_kvm_nested_state,
1772 unsigned user_data_size);
1773 int (*set_state)(struct kvm_vcpu *vcpu,
1774 struct kvm_nested_state __user *user_kvm_nested_state,
1775 struct kvm_nested_state *kvm_state);
1776 bool (*get_nested_state_pages)(struct kvm_vcpu *vcpu);
1777 int (*write_log_dirty)(struct kvm_vcpu *vcpu, gpa_t l2_gpa);
1779 int (*enable_evmcs)(struct kvm_vcpu *vcpu,
1780 uint16_t *vmcs_version);
1781 uint16_t (*get_evmcs_version)(struct kvm_vcpu *vcpu);
1782 void (*hv_inject_synthetic_vmexit_post_tlb_flush)(struct kvm_vcpu *vcpu);
1785 struct kvm_x86_init_ops {
1786 int (*hardware_setup)(void);
1787 unsigned int (*handle_intel_pt_intr)(void);
1789 struct kvm_x86_ops *runtime_ops;
1790 struct kvm_pmu_ops *pmu_ops;
1793 struct kvm_arch_async_pf {
1800 extern u32 __read_mostly kvm_nr_uret_msrs;
1801 extern u64 __read_mostly host_efer;
1802 extern bool __read_mostly allow_smaller_maxphyaddr;
1803 extern bool __read_mostly enable_apicv;
1804 extern struct kvm_x86_ops kvm_x86_ops;
1806 #define KVM_X86_OP(func) \
1807 DECLARE_STATIC_CALL(kvm_x86_##func, *(((struct kvm_x86_ops *)0)->func));
1808 #define KVM_X86_OP_OPTIONAL KVM_X86_OP
1809 #define KVM_X86_OP_OPTIONAL_RET0 KVM_X86_OP
1810 #include <asm/kvm-x86-ops.h>
1812 int kvm_x86_vendor_init(struct kvm_x86_init_ops *ops);
1813 void kvm_x86_vendor_exit(void);
1815 #define __KVM_HAVE_ARCH_VM_ALLOC
1816 static inline struct kvm *kvm_arch_alloc_vm(void)
1818 return __vmalloc(kvm_x86_ops.vm_size, GFP_KERNEL_ACCOUNT | __GFP_ZERO);
1821 #define __KVM_HAVE_ARCH_VM_FREE
1822 void kvm_arch_free_vm(struct kvm *kvm);
1824 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLBS
1825 static inline int kvm_arch_flush_remote_tlbs(struct kvm *kvm)
1827 if (kvm_x86_ops.flush_remote_tlbs &&
1828 !static_call(kvm_x86_flush_remote_tlbs)(kvm))
1834 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLBS_RANGE
1836 #define kvm_arch_pmi_in_guest(vcpu) \
1837 ((vcpu) && (vcpu)->arch.handling_intr_from_guest)
1839 void __init kvm_mmu_x86_module_init(void);
1840 int kvm_mmu_vendor_module_init(void);
1841 void kvm_mmu_vendor_module_exit(void);
1843 void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
1844 int kvm_mmu_create(struct kvm_vcpu *vcpu);
1845 void kvm_mmu_init_vm(struct kvm *kvm);
1846 void kvm_mmu_uninit_vm(struct kvm *kvm);
1848 void kvm_mmu_after_set_cpuid(struct kvm_vcpu *vcpu);
1849 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
1850 void kvm_mmu_slot_remove_write_access(struct kvm *kvm,
1851 const struct kvm_memory_slot *memslot,
1853 void kvm_mmu_slot_try_split_huge_pages(struct kvm *kvm,
1854 const struct kvm_memory_slot *memslot,
1856 void kvm_mmu_try_split_huge_pages(struct kvm *kvm,
1857 const struct kvm_memory_slot *memslot,
1860 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm,
1861 const struct kvm_memory_slot *memslot);
1862 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm,
1863 const struct kvm_memory_slot *memslot);
1864 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen);
1865 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long kvm_nr_mmu_pages);
1867 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
1869 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
1870 const void *val, int bytes);
1872 struct kvm_irq_mask_notifier {
1873 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked);
1875 struct hlist_node link;
1878 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
1879 struct kvm_irq_mask_notifier *kimn);
1880 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
1881 struct kvm_irq_mask_notifier *kimn);
1882 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
1885 extern bool tdp_enabled;
1887 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu);
1890 * EMULTYPE_NO_DECODE - Set when re-emulating an instruction (after completing
1891 * userspace I/O) to indicate that the emulation context
1892 * should be reused as is, i.e. skip initialization of
1893 * emulation context, instruction fetch and decode.
1895 * EMULTYPE_TRAP_UD - Set when emulating an intercepted #UD from hardware.
1896 * Indicates that only select instructions (tagged with
1897 * EmulateOnUD) should be emulated (to minimize the emulator
1898 * attack surface). See also EMULTYPE_TRAP_UD_FORCED.
1900 * EMULTYPE_SKIP - Set when emulating solely to skip an instruction, i.e. to
1901 * decode the instruction length. For use *only* by
1902 * kvm_x86_ops.skip_emulated_instruction() implementations if
1903 * EMULTYPE_COMPLETE_USER_EXIT is not set.
1905 * EMULTYPE_ALLOW_RETRY_PF - Set when the emulator should resume the guest to
1906 * retry native execution under certain conditions,
1907 * Can only be set in conjunction with EMULTYPE_PF.
1909 * EMULTYPE_TRAP_UD_FORCED - Set when emulating an intercepted #UD that was
1910 * triggered by KVM's magic "force emulation" prefix,
1911 * which is opt in via module param (off by default).
1912 * Bypasses EmulateOnUD restriction despite emulating
1913 * due to an intercepted #UD (see EMULTYPE_TRAP_UD).
1914 * Used to test the full emulator from userspace.
1916 * EMULTYPE_VMWARE_GP - Set when emulating an intercepted #GP for VMware
1917 * backdoor emulation, which is opt in via module param.
1918 * VMware backdoor emulation handles select instructions
1919 * and reinjects the #GP for all other cases.
1921 * EMULTYPE_PF - Set when emulating MMIO by way of an intercepted #PF, in which
1922 * case the CR2/GPA value pass on the stack is valid.
1924 * EMULTYPE_COMPLETE_USER_EXIT - Set when the emulator should update interruptibility
1925 * state and inject single-step #DBs after skipping
1926 * an instruction (after completing userspace I/O).
1928 * EMULTYPE_WRITE_PF_TO_SP - Set when emulating an intercepted page fault that
1929 * is attempting to write a gfn that contains one or
1930 * more of the PTEs used to translate the write itself,
1931 * and the owning page table is being shadowed by KVM.
1932 * If emulation of the faulting instruction fails and
1933 * this flag is set, KVM will exit to userspace instead
1934 * of retrying emulation as KVM cannot make forward
1937 * If emulation fails for a write to guest page tables,
1938 * KVM unprotects (zaps) the shadow page for the target
1939 * gfn and resumes the guest to retry the non-emulatable
1940 * instruction (on hardware). Unprotecting the gfn
1941 * doesn't allow forward progress for a self-changing
1942 * access because doing so also zaps the translation for
1943 * the gfn, i.e. retrying the instruction will hit a
1944 * !PRESENT fault, which results in a new shadow page
1945 * and sends KVM back to square one.
1947 #define EMULTYPE_NO_DECODE (1 << 0)
1948 #define EMULTYPE_TRAP_UD (1 << 1)
1949 #define EMULTYPE_SKIP (1 << 2)
1950 #define EMULTYPE_ALLOW_RETRY_PF (1 << 3)
1951 #define EMULTYPE_TRAP_UD_FORCED (1 << 4)
1952 #define EMULTYPE_VMWARE_GP (1 << 5)
1953 #define EMULTYPE_PF (1 << 6)
1954 #define EMULTYPE_COMPLETE_USER_EXIT (1 << 7)
1955 #define EMULTYPE_WRITE_PF_TO_SP (1 << 8)
1957 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type);
1958 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
1959 void *insn, int insn_len);
1960 void __kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu,
1961 u64 *data, u8 ndata);
1962 void kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu);
1964 void kvm_enable_efer_bits(u64);
1965 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer);
1966 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data, bool host_initiated);
1967 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data);
1968 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data);
1969 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu);
1970 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu);
1971 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu);
1972 int kvm_emulate_invd(struct kvm_vcpu *vcpu);
1973 int kvm_emulate_mwait(struct kvm_vcpu *vcpu);
1974 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu);
1975 int kvm_emulate_monitor(struct kvm_vcpu *vcpu);
1977 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in);
1978 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
1979 int kvm_emulate_halt(struct kvm_vcpu *vcpu);
1980 int kvm_emulate_halt_noskip(struct kvm_vcpu *vcpu);
1981 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu);
1982 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
1984 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
1985 void kvm_set_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
1986 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
1987 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector);
1989 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
1990 int reason, bool has_error_code, u32 error_code);
1992 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0);
1993 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4);
1994 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
1995 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
1996 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
1997 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
1998 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val);
1999 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val);
2000 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
2001 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
2002 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu);
2004 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
2005 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
2007 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
2008 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
2009 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu);
2011 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
2012 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
2013 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr, unsigned long payload);
2014 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr);
2015 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
2016 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
2017 void kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
2018 struct x86_exception *fault);
2019 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
2020 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr);
2022 static inline int __kvm_irq_line_state(unsigned long *irq_state,
2023 int irq_source_id, int level)
2025 /* Logical OR for level trig interrupt */
2027 __set_bit(irq_source_id, irq_state);
2029 __clear_bit(irq_source_id, irq_state);
2031 return !!(*irq_state);
2034 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level);
2035 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id);
2037 void kvm_inject_nmi(struct kvm_vcpu *vcpu);
2038 int kvm_get_nr_pending_nmis(struct kvm_vcpu *vcpu);
2040 void kvm_update_dr7(struct kvm_vcpu *vcpu);
2042 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn);
2043 void kvm_mmu_free_roots(struct kvm *kvm, struct kvm_mmu *mmu,
2044 ulong roots_to_free);
2045 void kvm_mmu_free_guest_mode_roots(struct kvm *kvm, struct kvm_mmu *mmu);
2046 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
2047 struct x86_exception *exception);
2048 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
2049 struct x86_exception *exception);
2050 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
2051 struct x86_exception *exception);
2053 bool kvm_apicv_activated(struct kvm *kvm);
2054 bool kvm_vcpu_apicv_activated(struct kvm_vcpu *vcpu);
2055 void __kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu);
2056 void __kvm_set_or_clear_apicv_inhibit(struct kvm *kvm,
2057 enum kvm_apicv_inhibit reason, bool set);
2058 void kvm_set_or_clear_apicv_inhibit(struct kvm *kvm,
2059 enum kvm_apicv_inhibit reason, bool set);
2061 static inline void kvm_set_apicv_inhibit(struct kvm *kvm,
2062 enum kvm_apicv_inhibit reason)
2064 kvm_set_or_clear_apicv_inhibit(kvm, reason, true);
2067 static inline void kvm_clear_apicv_inhibit(struct kvm *kvm,
2068 enum kvm_apicv_inhibit reason)
2070 kvm_set_or_clear_apicv_inhibit(kvm, reason, false);
2073 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
2075 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code,
2076 void *insn, int insn_len);
2077 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
2078 void kvm_mmu_invalidate_addr(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
2079 u64 addr, unsigned long roots);
2080 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid);
2081 void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd);
2083 void kvm_configure_mmu(bool enable_tdp, int tdp_forced_root_level,
2084 int tdp_max_root_level, int tdp_huge_page_level);
2086 static inline u16 kvm_read_ldt(void)
2089 asm("sldt %0" : "=g"(ldt));
2093 static inline void kvm_load_ldt(u16 sel)
2095 asm("lldt %0" : : "rm"(sel));
2098 #ifdef CONFIG_X86_64
2099 static inline unsigned long read_msr(unsigned long msr)
2108 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
2110 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
2113 #define TSS_IOPB_BASE_OFFSET 0x66
2114 #define TSS_BASE_SIZE 0x68
2115 #define TSS_IOPB_SIZE (65536 / 8)
2116 #define TSS_REDIRECTION_SIZE (256 / 8)
2117 #define RMODE_TSS_SIZE \
2118 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
2121 TASK_SWITCH_CALL = 0,
2122 TASK_SWITCH_IRET = 1,
2123 TASK_SWITCH_JMP = 2,
2124 TASK_SWITCH_GATE = 3,
2127 #define HF_GUEST_MASK (1 << 0) /* VCPU is in guest-mode */
2129 #ifdef CONFIG_KVM_SMM
2130 #define HF_SMM_MASK (1 << 1)
2131 #define HF_SMM_INSIDE_NMI_MASK (1 << 2)
2133 # define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE
2134 # define KVM_ADDRESS_SPACE_NUM 2
2135 # define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0)
2136 # define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm)
2138 # define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, 0)
2141 #define KVM_ARCH_WANT_MMU_NOTIFIER
2143 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v);
2144 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
2145 int kvm_cpu_has_extint(struct kvm_vcpu *v);
2146 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
2147 int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
2148 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event);
2150 int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low,
2151 unsigned long ipi_bitmap_high, u32 min,
2152 unsigned long icr, int op_64_bit);
2154 int kvm_add_user_return_msr(u32 msr);
2155 int kvm_find_user_return_msr(u32 msr);
2156 int kvm_set_user_return_msr(unsigned index, u64 val, u64 mask);
2158 static inline bool kvm_is_supported_user_return_msr(u32 msr)
2160 return kvm_find_user_return_msr(msr) >= 0;
2163 u64 kvm_scale_tsc(u64 tsc, u64 ratio);
2164 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc);
2165 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier);
2166 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier);
2168 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu);
2169 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip);
2171 void kvm_make_scan_ioapic_request(struct kvm *kvm);
2172 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
2173 unsigned long *vcpu_bitmap);
2175 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
2176 struct kvm_async_pf *work);
2177 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
2178 struct kvm_async_pf *work);
2179 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu,
2180 struct kvm_async_pf *work);
2181 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu);
2182 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu);
2183 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn);
2185 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu);
2186 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);
2187 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu);
2189 void __user *__x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
2191 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu);
2192 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu);
2194 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq,
2195 struct kvm_vcpu **dest_vcpu);
2197 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e,
2198 struct kvm_lapic_irq *irq);
2200 static inline bool kvm_irq_is_postable(struct kvm_lapic_irq *irq)
2202 /* We can only post Fixed and LowPrio IRQs */
2203 return (irq->delivery_mode == APIC_DM_FIXED ||
2204 irq->delivery_mode == APIC_DM_LOWEST);
2207 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu)
2209 static_call_cond(kvm_x86_vcpu_blocking)(vcpu);
2212 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu)
2214 static_call_cond(kvm_x86_vcpu_unblocking)(vcpu);
2217 static inline int kvm_cpu_get_apicid(int mps_cpu)
2219 #ifdef CONFIG_X86_LOCAL_APIC
2220 return default_cpu_present_to_apicid(mps_cpu);
2227 int memslot_rmap_alloc(struct kvm_memory_slot *slot, unsigned long npages);
2229 #define KVM_CLOCK_VALID_FLAGS \
2230 (KVM_CLOCK_TSC_STABLE | KVM_CLOCK_REALTIME | KVM_CLOCK_HOST_TSC)
2232 #define KVM_X86_VALID_QUIRKS \
2233 (KVM_X86_QUIRK_LINT0_REENABLED | \
2234 KVM_X86_QUIRK_CD_NW_CLEARED | \
2235 KVM_X86_QUIRK_LAPIC_MMIO_HOLE | \
2236 KVM_X86_QUIRK_OUT_7E_INC_RIP | \
2237 KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT | \
2238 KVM_X86_QUIRK_FIX_HYPERCALL_INSN | \
2239 KVM_X86_QUIRK_MWAIT_NEVER_UD_FAULTS)
2242 * KVM previously used a u32 field in kvm_run to indicate the hypercall was
2243 * initiated from long mode. KVM now sets bit 0 to indicate long mode, but the
2244 * remaining 31 lower bits must be 0 to preserve ABI.
2246 #define KVM_EXIT_HYPERCALL_MBZ GENMASK_ULL(31, 1)
2248 #endif /* _ASM_X86_KVM_HOST_H */