arch/riscv/mm/dma-noncoherent.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * RISC-V specific functions to support DMA for non-coherent devices
   4  *
   5  * Copyright (c) 2021 Western Digital Corporation or its affiliates.
   6  */
   7
   8 #include <linux/dma-direct.h>
   9 #include <linux/dma-map-ops.h>
  10 #include <linux/mm.h>
  11 #include <asm/cacheflush.h>
  12
  13 static bool noncoherent_supported __ro_after_init;
  14 int dma_cache_alignment __ro_after_init = ARCH_DMA_MINALIGN;
  15 EXPORT_SYMBOL_GPL(dma_cache_alignment);
  16
  17 static inline void arch_dma_cache_wback(phys_addr_t paddr, size_t size)
  18 {
  19         void *vaddr = phys_to_virt(paddr);
  20
  21         ALT_CMO_OP(clean, vaddr, size, riscv_cbom_block_size);
  22 }
  23
  24 static inline void arch_dma_cache_inv(phys_addr_t paddr, size_t size)
  25 {
  26         void *vaddr = phys_to_virt(paddr);
  27
  28         ALT_CMO_OP(inval, vaddr, size, riscv_cbom_block_size);
  29 }
  30
  31 static inline void arch_dma_cache_wback_inv(phys_addr_t paddr, size_t size)
  32 {
  33         void *vaddr = phys_to_virt(paddr);
  34
  35         ALT_CMO_OP(flush, vaddr, size, riscv_cbom_block_size);
  36 }
  37
  38 static inline bool arch_sync_dma_clean_before_fromdevice(void)
  39 {
  40         return true;
  41 }
  42
  43 static inline bool arch_sync_dma_cpu_needs_post_dma_flush(void)
  44 {
  45         return true;
  46 }
  47
  48 void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
  49                               enum dma_data_direction dir)
  50 {
  51         switch (dir) {
  52         case DMA_TO_DEVICE:
  53                 arch_dma_cache_wback(paddr, size);
  54                 break;
  55
  56         case DMA_FROM_DEVICE:
  57                 if (!arch_sync_dma_clean_before_fromdevice()) {
  58                         arch_dma_cache_inv(paddr, size);
  59                         break;
  60                 }
  61                 fallthrough;
  62
  63         case DMA_BIDIRECTIONAL:
  64                 /* Skip the invalidate here if it's done later */
  65                 if (IS_ENABLED(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) &&
  66                     arch_sync_dma_cpu_needs_post_dma_flush())
  67                         arch_dma_cache_wback(paddr, size);
  68                 else
  69                         arch_dma_cache_wback_inv(paddr, size);
  70                 break;
  71
  72         default:
  73                 break;
  74         }
  75 }
  76
  77 void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
  78                            enum dma_data_direction dir)
  79 {
  80         switch (dir) {
  81         case DMA_TO_DEVICE:
  82                 break;
  83
  84         case DMA_FROM_DEVICE:
  85         case DMA_BIDIRECTIONAL:
  86                 /* FROM_DEVICE invalidate needed if speculative CPU prefetch only */
  87                 if (arch_sync_dma_cpu_needs_post_dma_flush())
  88                         arch_dma_cache_inv(paddr, size);
  89                 break;
  90
  91         default:
  92                 break;
  93         }
  94 }
  95
  96 void arch_dma_prep_coherent(struct page *page, size_t size)
  97 {
  98         void *flush_addr = page_address(page);
  99
 100         ALT_CMO_OP(flush, flush_addr, size, riscv_cbom_block_size);
 101 }
 102
 103 void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
 104                 const struct iommu_ops *iommu, bool coherent)
 105 {
 106         WARN_TAINT(!coherent && riscv_cbom_block_size > ARCH_DMA_MINALIGN,
 107                    TAINT_CPU_OUT_OF_SPEC,
 108                    "%s %s: ARCH_DMA_MINALIGN smaller than riscv,cbom-block-size (%d < %d)",
 109                    dev_driver_string(dev), dev_name(dev),
 110                    ARCH_DMA_MINALIGN, riscv_cbom_block_size);
 111
 112         WARN_TAINT(!coherent && !noncoherent_supported, TAINT_CPU_OUT_OF_SPEC,
 113                    "%s %s: device non-coherent but no non-coherent operations supported",
 114                    dev_driver_string(dev), dev_name(dev));
 115
 116         dev->dma_coherent = coherent;
 117 }
 118
 119 void riscv_noncoherent_supported(void)
 120 {
 121         WARN(!riscv_cbom_block_size,
 122              "Non-coherent DMA support enabled without a block size\n");
 123         noncoherent_supported = true;
 124 }
 125
 126 void __init riscv_set_dma_cache_alignment(void)
 127 {
 128         if (!noncoherent_supported)
 129                 dma_cache_alignment = 1;
 130 }