arch/powerpc/platforms/pseries/setup.c

   1 /*
   2  *  64-bit pSeries and RS/6000 setup code.
   3  *
   4  *  Copyright (C) 1995  Linus Torvalds
   5  *  Adapted from 'alpha' version by Gary Thomas
   6  *  Modified by Cort Dougan (cort@cs.nmt.edu)
   7  *  Modified by PPC64 Team, IBM Corp
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License
  11  * as published by the Free Software Foundation; either version
  12  * 2 of the License, or (at your option) any later version.
  13  */
  14
  15 /*
  16  * bootup setup stuff..
  17  */
  18
  19 #include <linux/cpu.h>
  20 #include <linux/errno.h>
  21 #include <linux/sched.h>
  22 #include <linux/kernel.h>
  23 #include <linux/mm.h>
  24 #include <linux/stddef.h>
  25 #include <linux/unistd.h>
  26 #include <linux/user.h>
  27 #include <linux/tty.h>
  28 #include <linux/major.h>
  29 #include <linux/interrupt.h>
  30 #include <linux/reboot.h>
  31 #include <linux/init.h>
  32 #include <linux/ioport.h>
  33 #include <linux/console.h>
  34 #include <linux/pci.h>
  35 #include <linux/utsname.h>
  36 #include <linux/adb.h>
  37 #include <linux/export.h>
  38 #include <linux/delay.h>
  39 #include <linux/irq.h>
  40 #include <linux/seq_file.h>
  41 #include <linux/root_dev.h>
  42 #include <linux/of.h>
  43 #include <linux/of_pci.h>
  44
  45 #include <asm/mmu.h>
  46 #include <asm/processor.h>
  47 #include <asm/io.h>
  48 #include <asm/pgtable.h>
  49 #include <asm/prom.h>
  50 #include <asm/rtas.h>
  51 #include <asm/pci-bridge.h>
  52 #include <asm/iommu.h>
  53 #include <asm/dma.h>
  54 #include <asm/machdep.h>
  55 #include <asm/irq.h>
  56 #include <asm/time.h>
  57 #include <asm/nvram.h>
  58 #include <asm/pmc.h>
  59 #include <asm/xics.h>
  60 #include <asm/xive.h>
  61 #include <asm/ppc-pci.h>
  62 #include <asm/i8259.h>
  63 #include <asm/udbg.h>
  64 #include <asm/smp.h>
  65 #include <asm/firmware.h>
  66 #include <asm/eeh.h>
  67 #include <asm/reg.h>
  68 #include <asm/plpar_wrappers.h>
  69 #include <asm/kexec.h>
  70 #include <asm/isa-bridge.h>
  71 #include <asm/security_features.h>
  72
  73 #include "pseries.h"
  74 #include "../../../../drivers/pci/pci.h"
  75
  76 int CMO_PrPSP = -1;
  77 int CMO_SecPSP = -1;
  78 unsigned long CMO_PageSize = (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K);
  79 EXPORT_SYMBOL(CMO_PageSize);
  80
  81 int fwnmi_active;  /* TRUE if an FWNMI handler is present */
  82
  83 static void pSeries_show_cpuinfo(struct seq_file *m)
  84 {
  85         struct device_node *root;
  86         const char *model = "";
  87
  88         root = of_find_node_by_path("/");
  89         if (root)
  90                 model = of_get_property(root, "model", NULL);
  91         seq_printf(m, "machine\t\t: CHRP %s\n", model);
  92         of_node_put(root);
  93         if (radix_enabled())
  94                 seq_printf(m, "MMU\t\t: Radix\n");
  95         else
  96                 seq_printf(m, "MMU\t\t: Hash\n");
  97 }
  98
  99 /* Initialize firmware assisted non-maskable interrupts if
 100  * the firmware supports this feature.
 101  */
 102 static void __init fwnmi_init(void)
 103 {
 104         unsigned long system_reset_addr, machine_check_addr;
 105
 106         int ibm_nmi_register = rtas_token("ibm,nmi-register");
 107         if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE)
 108                 return;
 109
 110         /* If the kernel's not linked at zero we point the firmware at low
 111          * addresses anyway, and use a trampoline to get to the real code. */
 112         system_reset_addr  = __pa(system_reset_fwnmi) - PHYSICAL_START;
 113         machine_check_addr = __pa(machine_check_fwnmi) - PHYSICAL_START;
 114
 115         if (0 == rtas_call(ibm_nmi_register, 2, 1, NULL, system_reset_addr,
 116                                 machine_check_addr))
 117                 fwnmi_active = 1;
 118 }
 119
 120 static void pseries_8259_cascade(struct irq_desc *desc)
 121 {
 122         struct irq_chip *chip = irq_desc_get_chip(desc);
 123         unsigned int cascade_irq = i8259_irq();
 124
 125         if (cascade_irq)
 126                 generic_handle_irq(cascade_irq);
 127
 128         chip->irq_eoi(&desc->irq_data);
 129 }
 130
 131 static void __init pseries_setup_i8259_cascade(void)
 132 {
 133         struct device_node *np, *old, *found = NULL;
 134         unsigned int cascade;
 135         const u32 *addrp;
 136         unsigned long intack = 0;
 137         int naddr;
 138
 139         for_each_node_by_type(np, "interrupt-controller") {
 140                 if (of_device_is_compatible(np, "chrp,iic")) {
 141                         found = np;
 142                         break;
 143                 }
 144         }
 145
 146         if (found == NULL) {
 147                 printk(KERN_DEBUG "pic: no ISA interrupt controller\n");
 148                 return;
 149         }
 150
 151         cascade = irq_of_parse_and_map(found, 0);
 152         if (!cascade) {
 153                 printk(KERN_ERR "pic: failed to map cascade interrupt");
 154                 return;
 155         }
 156         pr_debug("pic: cascade mapped to irq %d\n", cascade);
 157
 158         for (old = of_node_get(found); old != NULL ; old = np) {
 159                 np = of_get_parent(old);
 160                 of_node_put(old);
 161                 if (np == NULL)
 162                         break;
 163                 if (strcmp(np->name, "pci") != 0)
 164                         continue;
 165                 addrp = of_get_property(np, "8259-interrupt-acknowledge", NULL);
 166                 if (addrp == NULL)
 167                         continue;
 168                 naddr = of_n_addr_cells(np);
 169                 intack = addrp[naddr-1];
 170                 if (naddr > 1)
 171                         intack |= ((unsigned long)addrp[naddr-2]) << 32;
 172         }
 173         if (intack)
 174                 printk(KERN_DEBUG "pic: PCI 8259 intack at 0x%016lx\n", intack);
 175         i8259_init(found, intack);
 176         of_node_put(found);
 177         irq_set_chained_handler(cascade, pseries_8259_cascade);
 178 }
 179
 180 static void __init pseries_init_irq(void)
 181 {
 182         /* Try using a XIVE if available, otherwise use a XICS */
 183         if (!xive_spapr_init()) {
 184                 xics_init();
 185                 pseries_setup_i8259_cascade();
 186         }
 187 }
 188
 189 static void pseries_lpar_enable_pmcs(void)
 190 {
 191         unsigned long set, reset;
 192
 193         set = 1UL << 63;
 194         reset = 0;
 195         plpar_hcall_norets(H_PERFMON, set, reset);
 196 }
 197
 198 static int pci_dn_reconfig_notifier(struct notifier_block *nb, unsigned long action, void *data)
 199 {
 200         struct of_reconfig_data *rd = data;
 201         struct device_node *parent, *np = rd->dn;
 202         struct pci_dn *pdn;
 203         int err = NOTIFY_OK;
 204
 205         switch (action) {
 206         case OF_RECONFIG_ATTACH_NODE:
 207                 parent = of_get_parent(np);
 208                 pdn = parent ? PCI_DN(parent) : NULL;
 209                 if (pdn)
 210                         pci_add_device_node_info(pdn->phb, np);
 211
 212                 of_node_put(parent);
 213                 break;
 214         case OF_RECONFIG_DETACH_NODE:
 215                 pdn = PCI_DN(np);
 216                 if (pdn)
 217                         list_del(&pdn->list);
 218                 break;
 219         default:
 220                 err = NOTIFY_DONE;
 221                 break;
 222         }
 223         return err;
 224 }
 225
 226 static struct notifier_block pci_dn_reconfig_nb = {
 227         .notifier_call = pci_dn_reconfig_notifier,
 228 };
 229
 230 struct kmem_cache *dtl_cache;
 231
 232 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
 233 /*
 234  * Allocate space for the dispatch trace log for all possible cpus
 235  * and register the buffers with the hypervisor.  This is used for
 236  * computing time stolen by the hypervisor.
 237  */
 238 static int alloc_dispatch_logs(void)
 239 {
 240         int cpu, ret;
 241         struct paca_struct *pp;
 242         struct dtl_entry *dtl;
 243
 244         if (!firmware_has_feature(FW_FEATURE_SPLPAR))
 245                 return 0;
 246
 247         if (!dtl_cache)
 248                 return 0;
 249
 250         for_each_possible_cpu(cpu) {
 251                 pp = paca_ptrs[cpu];
 252                 dtl = kmem_cache_alloc(dtl_cache, GFP_KERNEL);
 253                 if (!dtl) {
 254                         pr_warn("Failed to allocate dispatch trace log for cpu %d\n",
 255                                 cpu);
 256                         pr_warn("Stolen time statistics will be unreliable\n");
 257                         break;
 258                 }
 259
 260                 pp->dtl_ridx = 0;
 261                 pp->dispatch_log = dtl;
 262                 pp->dispatch_log_end = dtl + N_DISPATCH_LOG;
 263                 pp->dtl_curr = dtl;
 264         }
 265
 266         /* Register the DTL for the current (boot) cpu */
 267         dtl = get_paca()->dispatch_log;
 268         get_paca()->dtl_ridx = 0;
 269         get_paca()->dtl_curr = dtl;
 270         get_paca()->lppaca_ptr->dtl_idx = 0;
 271
 272         /* hypervisor reads buffer length from this field */
 273         dtl->enqueue_to_dispatch_time = cpu_to_be32(DISPATCH_LOG_BYTES);
 274         ret = register_dtl(hard_smp_processor_id(), __pa(dtl));
 275         if (ret)
 276                 pr_err("WARNING: DTL registration of cpu %d (hw %d) failed "
 277                        "with %d\n", smp_processor_id(),
 278                        hard_smp_processor_id(), ret);
 279         get_paca()->lppaca_ptr->dtl_enable_mask = 2;
 280
 281         return 0;
 282 }
 283 #else /* !CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */
 284 static inline int alloc_dispatch_logs(void)
 285 {
 286         return 0;
 287 }
 288 #endif /* CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */
 289
 290 static int alloc_dispatch_log_kmem_cache(void)
 291 {
 292         dtl_cache = kmem_cache_create("dtl", DISPATCH_LOG_BYTES,
 293                                                 DISPATCH_LOG_BYTES, 0, NULL);
 294         if (!dtl_cache) {
 295                 pr_warn("Failed to create dispatch trace log buffer cache\n");
 296                 pr_warn("Stolen time statistics will be unreliable\n");
 297                 return 0;
 298         }
 299
 300         return alloc_dispatch_logs();
 301 }
 302 machine_early_initcall(pseries, alloc_dispatch_log_kmem_cache);
 303
 304 static void pseries_lpar_idle(void)
 305 {
 306         /*
 307          * Default handler to go into low thread priority and possibly
 308          * low power mode by ceding processor to hypervisor
 309          */
 310
 311         /* Indicate to hypervisor that we are idle. */
 312         get_lppaca()->idle = 1;
 313
 314         /*
 315          * Yield the processor to the hypervisor.  We return if
 316          * an external interrupt occurs (which are driven prior
 317          * to returning here) or if a prod occurs from another
 318          * processor. When returning here, external interrupts
 319          * are enabled.
 320          */
 321         cede_processor();
 322
 323         get_lppaca()->idle = 0;
 324 }
 325
 326 /*
 327  * Enable relocation on during exceptions. This has partition wide scope and
 328  * may take a while to complete, if it takes longer than one second we will
 329  * just give up rather than wasting any more time on this - if that turns out
 330  * to ever be a problem in practice we can move this into a kernel thread to
 331  * finish off the process later in boot.
 332  */
 333 void pseries_enable_reloc_on_exc(void)
 334 {
 335         long rc;
 336         unsigned int delay, total_delay = 0;
 337
 338         while (1) {
 339                 rc = enable_reloc_on_exceptions();
 340                 if (!H_IS_LONG_BUSY(rc)) {
 341                         if (rc == H_P2) {
 342                                 pr_info("Relocation on exceptions not"
 343                                         " supported\n");
 344                         } else if (rc != H_SUCCESS) {
 345                                 pr_warn("Unable to enable relocation"
 346                                         " on exceptions: %ld\n", rc);
 347                         }
 348                         break;
 349                 }
 350
 351                 delay = get_longbusy_msecs(rc);
 352                 total_delay += delay;
 353                 if (total_delay > 1000) {
 354                         pr_warn("Warning: Giving up waiting to enable "
 355                                 "relocation on exceptions (%u msec)!\n",
 356                                 total_delay);
 357                         return;
 358                 }
 359
 360                 mdelay(delay);
 361         }
 362 }
 363 EXPORT_SYMBOL(pseries_enable_reloc_on_exc);
 364
 365 void pseries_disable_reloc_on_exc(void)
 366 {
 367         long rc;
 368
 369         while (1) {
 370                 rc = disable_reloc_on_exceptions();
 371                 if (!H_IS_LONG_BUSY(rc))
 372                         break;
 373                 mdelay(get_longbusy_msecs(rc));
 374         }
 375         if (rc != H_SUCCESS)
 376                 pr_warn("Warning: Failed to disable relocation on exceptions: %ld\n",
 377                         rc);
 378 }
 379 EXPORT_SYMBOL(pseries_disable_reloc_on_exc);
 380
 381 #ifdef CONFIG_KEXEC_CORE
 382 static void pSeries_machine_kexec(struct kimage *image)
 383 {
 384         if (firmware_has_feature(FW_FEATURE_SET_MODE))
 385                 pseries_disable_reloc_on_exc();
 386
 387         default_machine_kexec(image);
 388 }
 389 #endif
 390
 391 #ifdef __LITTLE_ENDIAN__
 392 void pseries_big_endian_exceptions(void)
 393 {
 394         long rc;
 395
 396         while (1) {
 397                 rc = enable_big_endian_exceptions();
 398                 if (!H_IS_LONG_BUSY(rc))
 399                         break;
 400                 mdelay(get_longbusy_msecs(rc));
 401         }
 402
 403         /*
 404          * At this point it is unlikely panic() will get anything
 405          * out to the user, since this is called very late in kexec
 406          * but at least this will stop us from continuing on further
 407          * and creating an even more difficult to debug situation.
 408          *
 409          * There is a known problem when kdump'ing, if cpus are offline
 410          * the above call will fail. Rather than panicking again, keep
 411          * going and hope the kdump kernel is also little endian, which
 412          * it usually is.
 413          */
 414         if (rc && !kdump_in_progress())
 415                 panic("Could not enable big endian exceptions");
 416 }
 417
 418 void pseries_little_endian_exceptions(void)
 419 {
 420         long rc;
 421
 422         while (1) {
 423                 rc = enable_little_endian_exceptions();
 424                 if (!H_IS_LONG_BUSY(rc))
 425                         break;
 426                 mdelay(get_longbusy_msecs(rc));
 427         }
 428         if (rc) {
 429                 ppc_md.progress("H_SET_MODE LE exception fail", 0);
 430                 panic("Could not enable little endian exceptions");
 431         }
 432 }
 433 #endif
 434
 435 static void __init find_and_init_phbs(void)
 436 {
 437         struct device_node *node;
 438         struct pci_controller *phb;
 439         struct device_node *root = of_find_node_by_path("/");
 440
 441         for_each_child_of_node(root, node) {
 442                 if (node->type == NULL || (strcmp(node->type, "pci") != 0 &&
 443                                            strcmp(node->type, "pciex") != 0))
 444                         continue;
 445
 446                 phb = pcibios_alloc_controller(node);
 447                 if (!phb)
 448                         continue;
 449                 rtas_setup_phb(phb);
 450                 pci_process_bridge_OF_ranges(phb, node, 0);
 451                 isa_bridge_find_early(phb);
 452                 phb->controller_ops = pseries_pci_controller_ops;
 453         }
 454
 455         of_node_put(root);
 456
 457         /*
 458          * PCI_PROBE_ONLY and PCI_REASSIGN_ALL_BUS can be set via properties
 459          * in chosen.
 460          */
 461         of_pci_check_probe_only();
 462 }
 463
 464 static void init_cpu_char_feature_flags(struct h_cpu_char_result *result)
 465 {
 466         /*
 467          * The features below are disabled by default, so we instead look to see
 468          * if firmware has *enabled* them, and set them if so.
 469          */
 470         if (result->character & H_CPU_CHAR_SPEC_BAR_ORI31)
 471                 security_ftr_set(SEC_FTR_SPEC_BAR_ORI31);
 472
 473         if (result->character & H_CPU_CHAR_BCCTRL_SERIALISED)
 474                 security_ftr_set(SEC_FTR_BCCTRL_SERIALISED);
 475
 476         if (result->character & H_CPU_CHAR_L1D_FLUSH_ORI30)
 477                 security_ftr_set(SEC_FTR_L1D_FLUSH_ORI30);
 478
 479         if (result->character & H_CPU_CHAR_L1D_FLUSH_TRIG2)
 480                 security_ftr_set(SEC_FTR_L1D_FLUSH_TRIG2);
 481
 482         if (result->character & H_CPU_CHAR_L1D_THREAD_PRIV)
 483                 security_ftr_set(SEC_FTR_L1D_THREAD_PRIV);
 484
 485         if (result->character & H_CPU_CHAR_COUNT_CACHE_DISABLED)
 486                 security_ftr_set(SEC_FTR_COUNT_CACHE_DISABLED);
 487
 488         /*
 489          * The features below are enabled by default, so we instead look to see
 490          * if firmware has *disabled* them, and clear them if so.
 491          */
 492         if (!(result->behaviour & H_CPU_BEHAV_FAVOUR_SECURITY))
 493                 security_ftr_clear(SEC_FTR_FAVOUR_SECURITY);
 494
 495         if (!(result->behaviour & H_CPU_BEHAV_L1D_FLUSH_PR))
 496                 security_ftr_clear(SEC_FTR_L1D_FLUSH_PR);
 497
 498         if (!(result->behaviour & H_CPU_BEHAV_BNDS_CHK_SPEC_BAR))
 499                 security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR);
 500 }
 501
 502 void pseries_setup_rfi_flush(void)
 503 {
 504         struct h_cpu_char_result result;
 505         enum l1d_flush_type types;
 506         bool enable;
 507         long rc;
 508
 509         /*
 510          * Set features to the defaults assumed by init_cpu_char_feature_flags()
 511          * so it can set/clear again any features that might have changed after
 512          * migration, and in case the hypercall fails and it is not even called.
 513          */
 514         powerpc_security_features = SEC_FTR_DEFAULT;
 515
 516         rc = plpar_get_cpu_characteristics(&result);
 517         if (rc == H_SUCCESS)
 518                 init_cpu_char_feature_flags(&result);
 519
 520         /*
 521          * We're the guest so this doesn't apply to us, clear it to simplify
 522          * handling of it elsewhere.
 523          */
 524         security_ftr_clear(SEC_FTR_L1D_FLUSH_HV);
 525
 526         types = L1D_FLUSH_FALLBACK;
 527
 528         if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_TRIG2))
 529                 types |= L1D_FLUSH_MTTRIG;
 530
 531         if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_ORI30))
 532                 types |= L1D_FLUSH_ORI;
 533
 534         enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && \
 535                  security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR);
 536
 537         setup_rfi_flush(types, enable);
 538         setup_barrier_nospec();
 539 }
 540
 541 #ifdef CONFIG_PCI_IOV
 542 enum rtas_iov_fw_value_map {
 543         NUM_RES_PROPERTY  = 0, /* Number of Resources */
 544         LOW_INT           = 1, /* Lowest 32 bits of Address */
 545         START_OF_ENTRIES  = 2, /* Always start of entry */
 546         APERTURE_PROPERTY = 2, /* Start of entry+ to  Aperture Size */
 547         WDW_SIZE_PROPERTY = 4, /* Start of entry+ to Window Size */
 548         NEXT_ENTRY        = 7  /* Go to next entry on array */
 549 };
 550
 551 enum get_iov_fw_value_index {
 552         BAR_ADDRS     = 1,    /*  Get Bar Address */
 553         APERTURE_SIZE = 2,    /*  Get Aperture Size */
 554         WDW_SIZE      = 3     /*  Get Window Size */
 555 };
 556
 557 resource_size_t pseries_get_iov_fw_value(struct pci_dev *dev, int resno,
 558                                          enum get_iov_fw_value_index value)
 559 {
 560         const int *indexes;
 561         struct device_node *dn = pci_device_to_OF_node(dev);
 562         int i, num_res, ret = 0;
 563
 564         indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL);
 565         if (!indexes)
 566                 return  0;
 567
 568         /*
 569          * First element in the array is the number of Bars
 570          * returned.  Search through the list to find the matching
 571          * bar
 572          */
 573         num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1);
 574         if (resno >= num_res)
 575                 return 0; /* or an errror */
 576
 577         i = START_OF_ENTRIES + NEXT_ENTRY * resno;
 578         switch (value) {
 579         case BAR_ADDRS:
 580                 ret = of_read_number(&indexes[i], 2);
 581                 break;
 582         case APERTURE_SIZE:
 583                 ret = of_read_number(&indexes[i + APERTURE_PROPERTY], 2);
 584                 break;
 585         case WDW_SIZE:
 586                 ret = of_read_number(&indexes[i + WDW_SIZE_PROPERTY], 2);
 587                 break;
 588         }
 589
 590         return ret;
 591 }
 592
 593 void of_pci_set_vf_bar_size(struct pci_dev *dev, const int *indexes)
 594 {
 595         struct resource *res;
 596         resource_size_t base, size;
 597         int i, r, num_res;
 598
 599         num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1);
 600         num_res = min_t(int, num_res, PCI_SRIOV_NUM_BARS);
 601         for (i = START_OF_ENTRIES, r = 0; r < num_res && r < PCI_SRIOV_NUM_BARS;
 602              i += NEXT_ENTRY, r++) {
 603                 res = &dev->resource[r + PCI_IOV_RESOURCES];
 604                 base = of_read_number(&indexes[i], 2);
 605                 size = of_read_number(&indexes[i + APERTURE_PROPERTY], 2);
 606                 res->flags = pci_parse_of_flags(of_read_number
 607                                                 (&indexes[i + LOW_INT], 1), 0);
 608                 res->flags |= (IORESOURCE_MEM_64 | IORESOURCE_PCI_FIXED);
 609                 res->name = pci_name(dev);
 610                 res->start = base;
 611                 res->end = base + size - 1;
 612         }
 613 }
 614
 615 void of_pci_parse_iov_addrs(struct pci_dev *dev, const int *indexes)
 616 {
 617         struct resource *res, *root, *conflict;
 618         resource_size_t base, size;
 619         int i, r, num_res;
 620
 621         /*
 622          * First element in the array is the number of Bars
 623          * returned.  Search through the list to find the matching
 624          * bars assign them from firmware into resources structure.
 625          */
 626         num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1);
 627         for (i = START_OF_ENTRIES, r = 0; r < num_res && r < PCI_SRIOV_NUM_BARS;
 628              i += NEXT_ENTRY, r++) {
 629                 res = &dev->resource[r + PCI_IOV_RESOURCES];
 630                 base = of_read_number(&indexes[i], 2);
 631                 size = of_read_number(&indexes[i + WDW_SIZE_PROPERTY], 2);
 632                 res->name = pci_name(dev);
 633                 res->start = base;
 634                 res->end = base + size - 1;
 635                 root = &iomem_resource;
 636                 dev_dbg(&dev->dev,
 637                         "pSeries IOV BAR %d: trying firmware assignment %pR\n",
 638                          r + PCI_IOV_RESOURCES, res);
 639                 conflict = request_resource_conflict(root, res);
 640                 if (conflict) {
 641                         dev_info(&dev->dev,
 642                                  "BAR %d: %pR conflicts with %s %pR\n",
 643                                  r + PCI_IOV_RESOURCES, res,
 644                                  conflict->name, conflict);
 645                         res->flags |= IORESOURCE_UNSET;
 646                 }
 647         }
 648 }
 649
 650 static void pseries_pci_fixup_resources(struct pci_dev *pdev)
 651 {
 652         const int *indexes;
 653         struct device_node *dn = pci_device_to_OF_node(pdev);
 654
 655         /*Firmware must support open sriov otherwise dont configure*/
 656         indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL);
 657         if (!indexes)
 658                 return;
 659         /* Assign the addresses from device tree*/
 660         of_pci_set_vf_bar_size(pdev, indexes);
 661 }
 662
 663 static void pseries_pci_fixup_iov_resources(struct pci_dev *pdev)
 664 {
 665         const int *indexes;
 666         struct device_node *dn = pci_device_to_OF_node(pdev);
 667
 668         if (!pdev->is_physfn || pci_dev_is_added(pdev))
 669                 return;
 670         /*Firmware must support open sriov otherwise dont configure*/
 671         indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL);
 672         if (!indexes)
 673                 return;
 674         /* Assign the addresses from device tree*/
 675         of_pci_parse_iov_addrs(pdev, indexes);
 676 }
 677
 678 static resource_size_t pseries_pci_iov_resource_alignment(struct pci_dev *pdev,
 679                                                           int resno)
 680 {
 681         const __be32 *reg;
 682         struct device_node *dn = pci_device_to_OF_node(pdev);
 683
 684         /*Firmware must support open sriov otherwise report regular alignment*/
 685         reg = of_get_property(dn, "ibm,is-open-sriov-pf", NULL);
 686         if (!reg)
 687                 return pci_iov_resource_size(pdev, resno);
 688
 689         if (!pdev->is_physfn)
 690                 return 0;
 691         return pseries_get_iov_fw_value(pdev,
 692                                         resno - PCI_IOV_RESOURCES,
 693                                         APERTURE_SIZE);
 694 }
 695 #endif
 696
 697 static void __init pSeries_setup_arch(void)
 698 {
 699         set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
 700
 701         /* Discover PIC type and setup ppc_md accordingly */
 702         smp_init_pseries();
 703
 704
 705         /* openpic global configuration register (64-bit format). */
 706         /* openpic Interrupt Source Unit pointer (64-bit format). */
 707         /* python0 facility area (mmio) (64-bit format) REAL address. */
 708
 709         /* init to some ~sane value until calibrate_delay() runs */
 710         loops_per_jiffy = 50000000;
 711
 712         fwnmi_init();
 713
 714         pseries_setup_rfi_flush();
 715         setup_stf_barrier();
 716
 717         /* By default, only probe PCI (can be overridden by rtas_pci) */
 718         pci_add_flags(PCI_PROBE_ONLY);
 719
 720         /* Find and initialize PCI host bridges */
 721         init_pci_config_tokens();
 722         find_and_init_phbs();
 723         of_reconfig_notifier_register(&pci_dn_reconfig_nb);
 724
 725         pSeries_nvram_init();
 726
 727         if (firmware_has_feature(FW_FEATURE_LPAR)) {
 728                 vpa_init(boot_cpuid);
 729                 ppc_md.power_save = pseries_lpar_idle;
 730                 ppc_md.enable_pmcs = pseries_lpar_enable_pmcs;
 731 #ifdef CONFIG_PCI_IOV
 732                 ppc_md.pcibios_fixup_resources =
 733                         pseries_pci_fixup_resources;
 734                 ppc_md.pcibios_fixup_sriov =
 735                         pseries_pci_fixup_iov_resources;
 736                 ppc_md.pcibios_iov_resource_alignment =
 737                         pseries_pci_iov_resource_alignment;
 738 #endif
 739         } else {
 740                 /* No special idle routine */
 741                 ppc_md.enable_pmcs = power4_enable_pmcs;
 742         }
 743
 744         ppc_md.pcibios_root_bridge_prepare = pseries_root_bridge_prepare;
 745 }
 746
 747 static void pseries_panic(char *str)
 748 {
 749         panic_flush_kmsg_end();
 750         rtas_os_term(str);
 751 }
 752
 753 static int __init pSeries_init_panel(void)
 754 {
 755         /* Manually leave the kernel version on the panel. */
 756 #ifdef __BIG_ENDIAN__
 757         ppc_md.progress("Linux ppc64\n", 0);
 758 #else
 759         ppc_md.progress("Linux ppc64le\n", 0);
 760 #endif
 761         ppc_md.progress(init_utsname()->version, 0);
 762
 763         return 0;
 764 }
 765 machine_arch_initcall(pseries, pSeries_init_panel);
 766
 767 static int pseries_set_dabr(unsigned long dabr, unsigned long dabrx)
 768 {
 769         return plpar_hcall_norets(H_SET_DABR, dabr);
 770 }
 771
 772 static int pseries_set_xdabr(unsigned long dabr, unsigned long dabrx)
 773 {
 774         /* Have to set at least one bit in the DABRX according to PAPR */
 775         if (dabrx == 0 && dabr == 0)
 776                 dabrx = DABRX_USER;
 777         /* PAPR says we can only set kernel and user bits */
 778         dabrx &= DABRX_KERNEL | DABRX_USER;
 779
 780         return plpar_hcall_norets(H_SET_XDABR, dabr, dabrx);
 781 }
 782
 783 static int pseries_set_dawr(unsigned long dawr, unsigned long dawrx)
 784 {
 785         /* PAPR says we can't set HYP */
 786         dawrx &= ~DAWRX_HYP;
 787
 788         return  plpar_set_watchpoint0(dawr, dawrx);
 789 }
 790
 791 #define CMO_CHARACTERISTICS_TOKEN 44
 792 #define CMO_MAXLENGTH 1026
 793
 794 void pSeries_coalesce_init(void)
 795 {
 796         struct hvcall_mpp_x_data mpp_x_data;
 797
 798         if (firmware_has_feature(FW_FEATURE_CMO) && !h_get_mpp_x(&mpp_x_data))
 799                 powerpc_firmware_features |= FW_FEATURE_XCMO;
 800         else
 801                 powerpc_firmware_features &= ~FW_FEATURE_XCMO;
 802 }
 803
 804 /**
 805  * fw_cmo_feature_init - FW_FEATURE_CMO is not stored in ibm,hypertas-functions,
 806  * handle that here. (Stolen from parse_system_parameter_string)
 807  */
 808 static void pSeries_cmo_feature_init(void)
 809 {
 810         char *ptr, *key, *value, *end;
 811         int call_status;
 812         int page_order = IOMMU_PAGE_SHIFT_4K;
 813
 814         pr_debug(" -> fw_cmo_feature_init()\n");
 815         spin_lock(&rtas_data_buf_lock);
 816         memset(rtas_data_buf, 0, RTAS_DATA_BUF_SIZE);
 817         call_status = rtas_call(rtas_token("ibm,get-system-parameter"), 3, 1,
 818                                 NULL,
 819                                 CMO_CHARACTERISTICS_TOKEN,
 820                                 __pa(rtas_data_buf),
 821                                 RTAS_DATA_BUF_SIZE);
 822
 823         if (call_status != 0) {
 824                 spin_unlock(&rtas_data_buf_lock);
 825                 pr_debug("CMO not available\n");
 826                 pr_debug(" <- fw_cmo_feature_init()\n");
 827                 return;
 828         }
 829
 830         end = rtas_data_buf + CMO_MAXLENGTH - 2;
 831         ptr = rtas_data_buf + 2;        /* step over strlen value */
 832         key = value = ptr;
 833
 834         while (*ptr && (ptr <= end)) {
 835                 /* Separate the key and value by replacing '=' with '\0' and
 836                  * point the value at the string after the '='
 837                  */
 838                 if (ptr[0] == '=') {
 839                         ptr[0] = '\0';
 840                         value = ptr + 1;
 841                 } else if (ptr[0] == '\0' || ptr[0] == ',') {
 842                         /* Terminate the string containing the key/value pair */
 843                         ptr[0] = '\0';
 844
 845                         if (key == value) {
 846                                 pr_debug("Malformed key/value pair\n");
 847                                 /* Never found a '=', end processing */
 848                                 break;
 849                         }
 850
 851                         if (0 == strcmp(key, "CMOPageSize"))
 852                                 page_order = simple_strtol(value, NULL, 10);
 853                         else if (0 == strcmp(key, "PrPSP"))
 854                                 CMO_PrPSP = simple_strtol(value, NULL, 10);
 855                         else if (0 == strcmp(key, "SecPSP"))
 856                                 CMO_SecPSP = simple_strtol(value, NULL, 10);
 857                         value = key = ptr + 1;
 858                 }
 859                 ptr++;
 860         }
 861
 862         /* Page size is returned as the power of 2 of the page size,
 863          * convert to the page size in bytes before returning
 864          */
 865         CMO_PageSize = 1 << page_order;
 866         pr_debug("CMO_PageSize = %lu\n", CMO_PageSize);
 867
 868         if (CMO_PrPSP != -1 || CMO_SecPSP != -1) {
 869                 pr_info("CMO enabled\n");
 870                 pr_debug("CMO enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP,
 871                          CMO_SecPSP);
 872                 powerpc_firmware_features |= FW_FEATURE_CMO;
 873                 pSeries_coalesce_init();
 874         } else
 875                 pr_debug("CMO not enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP,
 876                          CMO_SecPSP);
 877         spin_unlock(&rtas_data_buf_lock);
 878         pr_debug(" <- fw_cmo_feature_init()\n");
 879 }
 880
 881 /*
 882  * Early initialization.  Relocation is on but do not reference unbolted pages
 883  */
 884 static void __init pseries_init(void)
 885 {
 886         pr_debug(" -> pseries_init()\n");
 887
 888 #ifdef CONFIG_HVC_CONSOLE
 889         if (firmware_has_feature(FW_FEATURE_LPAR))
 890                 hvc_vio_init_early();
 891 #endif
 892         if (firmware_has_feature(FW_FEATURE_XDABR))
 893                 ppc_md.set_dabr = pseries_set_xdabr;
 894         else if (firmware_has_feature(FW_FEATURE_DABR))
 895                 ppc_md.set_dabr = pseries_set_dabr;
 896
 897         if (firmware_has_feature(FW_FEATURE_SET_MODE))
 898                 ppc_md.set_dawr = pseries_set_dawr;
 899
 900         pSeries_cmo_feature_init();
 901         iommu_init_early_pSeries();
 902
 903         pr_debug(" <- pseries_init()\n");
 904 }
 905
 906 /**
 907  * pseries_power_off - tell firmware about how to power off the system.
 908  *
 909  * This function calls either the power-off rtas token in normal cases
 910  * or the ibm,power-off-ups token (if present & requested) in case of
 911  * a power failure. If power-off token is used, power on will only be
 912  * possible with power button press. If ibm,power-off-ups token is used
 913  * it will allow auto poweron after power is restored.
 914  */
 915 static void pseries_power_off(void)
 916 {
 917         int rc;
 918         int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups");
 919
 920         if (rtas_flash_term_hook)
 921                 rtas_flash_term_hook(SYS_POWER_OFF);
 922
 923         if (rtas_poweron_auto == 0 ||
 924                 rtas_poweroff_ups_token == RTAS_UNKNOWN_SERVICE) {
 925                 rc = rtas_call(rtas_token("power-off"), 2, 1, NULL, -1, -1);
 926                 printk(KERN_INFO "RTAS power-off returned %d\n", rc);
 927         } else {
 928                 rc = rtas_call(rtas_poweroff_ups_token, 0, 1, NULL);
 929                 printk(KERN_INFO "RTAS ibm,power-off-ups returned %d\n", rc);
 930         }
 931         for (;;);
 932 }
 933
 934 static int __init pSeries_probe(void)
 935 {
 936         const char *dtype = of_get_property(of_root, "device_type", NULL);
 937
 938         if (dtype == NULL)
 939                 return 0;
 940         if (strcmp(dtype, "chrp"))
 941                 return 0;
 942
 943         /* Cell blades firmware claims to be chrp while it's not. Until this
 944          * is fixed, we need to avoid those here.
 945          */
 946         if (of_machine_is_compatible("IBM,CPBW-1.0") ||
 947             of_machine_is_compatible("IBM,CBEA"))
 948                 return 0;
 949
 950         pm_power_off = pseries_power_off;
 951
 952         pr_debug("Machine is%s LPAR !\n",
 953                  (powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not");
 954
 955         pseries_init();
 956
 957         return 1;
 958 }
 959
 960 static int pSeries_pci_probe_mode(struct pci_bus *bus)
 961 {
 962         if (firmware_has_feature(FW_FEATURE_LPAR))
 963                 return PCI_PROBE_DEVTREE;
 964         return PCI_PROBE_NORMAL;
 965 }
 966
 967 struct pci_controller_ops pseries_pci_controller_ops = {
 968         .probe_mode             = pSeries_pci_probe_mode,
 969 };
 970
 971 define_machine(pseries) {
 972         .name                   = "pSeries",
 973         .probe                  = pSeries_probe,
 974         .setup_arch             = pSeries_setup_arch,
 975         .init_IRQ               = pseries_init_irq,
 976         .show_cpuinfo           = pSeries_show_cpuinfo,
 977         .log_error              = pSeries_log_error,
 978         .pcibios_fixup          = pSeries_final_fixup,
 979         .restart                = rtas_restart,
 980         .halt                   = rtas_halt,
 981         .panic                  = pseries_panic,
 982         .get_boot_time          = rtas_get_boot_time,
 983         .get_rtc_time           = rtas_get_rtc_time,
 984         .set_rtc_time           = rtas_set_rtc_time,
 985         .calibrate_decr         = generic_calibrate_decr,
 986         .progress               = rtas_progress,
 987         .system_reset_exception = pSeries_system_reset_exception,
 988         .machine_check_exception = pSeries_machine_check_exception,
 989 #ifdef CONFIG_KEXEC_CORE
 990         .machine_kexec          = pSeries_machine_kexec,
 991         .kexec_cpu_down         = pseries_kexec_cpu_down,
 992 #endif
 993 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
 994         .memory_block_size      = pseries_memory_block_size,
 995 #endif
 996 };