Merge commit 'v3.4-rc4' into next
[sfrench/cifs-2.6.git] / arch / powerpc / platforms / 85xx / p5020_ds.c
1 /*
2  * P5020 DS Setup
3  *
4  * Maintained by Kumar Gala (see MAINTAINERS for contact information)
5  *
6  * Copyright 2009-2010 Freescale Semiconductor Inc.
7  *
8  * This program is free software; you can redistribute  it and/or modify it
9  * under  the terms of  the GNU General  Public License as published by the
10  * Free Software Foundation;  either version 2 of the  License, or (at your
11  * option) any later version.
12  */
13
14 #include <linux/kernel.h>
15 #include <linux/pci.h>
16 #include <linux/kdev_t.h>
17 #include <linux/delay.h>
18 #include <linux/interrupt.h>
19 #include <linux/phy.h>
20
21 #include <asm/time.h>
22 #include <asm/machdep.h>
23 #include <asm/pci-bridge.h>
24 #include <mm/mmu_decl.h>
25 #include <asm/prom.h>
26 #include <asm/udbg.h>
27 #include <asm/mpic.h>
28
29 #include <linux/of_platform.h>
30 #include <sysdev/fsl_soc.h>
31 #include <sysdev/fsl_pci.h>
32 #include <asm/ehv_pic.h>
33
34 #include "corenet_ds.h"
35
36 /*
37  * Called very early, device-tree isn't unflattened
38  */
39 static int __init p5020_ds_probe(void)
40 {
41         unsigned long root = of_get_flat_dt_root();
42 #ifdef CONFIG_SMP
43         extern struct smp_ops_t smp_85xx_ops;
44 #endif
45
46         if (of_flat_dt_is_compatible(root, "fsl,P5020DS"))
47                 return 1;
48
49         /* Check if we're running under the Freescale hypervisor */
50         if (of_flat_dt_is_compatible(root, "fsl,P5020DS-hv")) {
51                 ppc_md.init_IRQ = ehv_pic_init;
52                 ppc_md.get_irq = ehv_pic_get_irq;
53                 ppc_md.restart = fsl_hv_restart;
54                 ppc_md.power_off = fsl_hv_halt;
55                 ppc_md.halt = fsl_hv_halt;
56 #ifdef CONFIG_SMP
57                 /*
58                  * Disable the timebase sync operations because we can't write
59                  * to the timebase registers under the hypervisor.
60                   */
61                 smp_85xx_ops.give_timebase = NULL;
62                 smp_85xx_ops.take_timebase = NULL;
63 #endif
64                 return 1;
65         }
66
67         return 0;
68 }
69
70 define_machine(p5020_ds) {
71         .name                   = "P5020 DS",
72         .probe                  = p5020_ds_probe,
73         .setup_arch             = corenet_ds_setup_arch,
74         .init_IRQ               = corenet_ds_pic_init,
75 #ifdef CONFIG_PCI
76         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
77 #endif
78 /* coreint doesn't play nice with lazy EE, use legacy mpic for now */
79 #ifdef CONFIG_PPC64
80         .get_irq                = mpic_get_irq,
81 #else
82         .get_irq                = mpic_get_coreint_irq,
83 #endif
84         .restart                = fsl_rstcr_restart,
85         .calibrate_decr         = generic_calibrate_decr,
86         .progress               = udbg_progress,
87 #ifdef CONFIG_PPC64
88         .power_save             = book3e_idle,
89 #else
90         .power_save             = e500_idle,
91 #endif
92 };
93
94 machine_device_initcall(p5020_ds, corenet_ds_publish_devices);
95
96 #ifdef CONFIG_SWIOTLB
97 machine_arch_initcall(p5020_ds, swiotlb_setup_bus_notifier);
98 #endif