2 * MPC85xx RDB Board Setup
4 * Copyright 2009,2012 Freescale Semiconductor Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
12 #include <linux/stddef.h>
13 #include <linux/kernel.h>
14 #include <linux/pci.h>
15 #include <linux/kdev_t.h>
16 #include <linux/delay.h>
17 #include <linux/seq_file.h>
18 #include <linux/interrupt.h>
19 #include <linux/of_platform.h>
22 #include <asm/machdep.h>
23 #include <asm/pci-bridge.h>
24 #include <mm/mmu_decl.h>
29 #include <asm/qe_ic.h>
30 #include <asm/fsl_guts.h>
32 #include <sysdev/fsl_soc.h>
33 #include <sysdev/fsl_pci.h>
41 #define DBG(fmt, args...) printk(KERN_ERR "%s: " fmt, __func__, ## args)
43 #define DBG(fmt, args...)
47 void __init mpc85xx_rdb_pic_init(void)
50 unsigned long root = of_get_flat_dt_root();
52 #ifdef CONFIG_QUICC_ENGINE
53 struct device_node *np;
56 if (of_flat_dt_is_compatible(root, "fsl,MPC85XXRDB-CAMP")) {
57 mpic = mpic_alloc(NULL, 0, MPIC_NO_RESET |
62 mpic = mpic_alloc(NULL, 0,
71 #ifdef CONFIG_QUICC_ENGINE
72 np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
74 qe_ic_init(np, 0, qe_ic_cascade_low_mpic,
75 qe_ic_cascade_high_mpic);
79 pr_err("%s: Could not find qe-ic node\n", __func__);
85 * Setup the architecture
87 static void __init mpc85xx_rdb_setup_arch(void)
89 #if defined(CONFIG_PCI) || defined(CONFIG_QUICC_ENGINE)
90 struct device_node *np;
94 ppc_md.progress("mpc85xx_rdb_setup_arch()", 0);
97 for_each_node_by_type(np, "pci") {
98 if (of_device_is_compatible(np, "fsl,mpc8548-pcie"))
99 fsl_add_bridge(np, 0);
106 #ifdef CONFIG_QUICC_ENGINE
107 np = of_find_compatible_node(NULL, NULL, "fsl,qe");
109 pr_err("%s: Could not find Quicc Engine node\n", __func__);
116 np = of_find_node_by_name(NULL, "par_io");
118 struct device_node *ucc;
123 for_each_node_by_name(ucc, "ucc")
124 par_io_of_config(ucc);
127 #if defined(CONFIG_UCC_GETH) || defined(CONFIG_SERIAL_QE)
128 if (machine_is(p1025_rdb)) {
130 struct ccsr_guts __iomem *guts;
132 np = of_find_node_by_name(NULL, "global-utilities");
134 guts = of_iomap(np, 0);
137 pr_err("mpc85xx-rdb: could not map global utilities register\n");
140 /* P1025 has pins muxed for QE and other functions. To
141 * enable QE UEC mode, we need to set bit QE0 for UCC1
142 * in Eth mode, QE0 and QE3 for UCC5 in Eth mode, QE9
143 * and QE12 for QE MII management singals in PMUXCR
146 setbits32(&guts->pmuxcr, MPC85xx_PMUXCR_QE(0) |
147 MPC85xx_PMUXCR_QE(3) |
148 MPC85xx_PMUXCR_QE(9) |
149 MPC85xx_PMUXCR_QE(12));
159 #endif /* CONFIG_QUICC_ENGINE */
161 printk(KERN_INFO "MPC85xx RDB board from Freescale Semiconductor\n");
164 machine_device_initcall(p2020_rdb, mpc85xx_common_publish_devices);
165 machine_device_initcall(p2020_rdb_pc, mpc85xx_common_publish_devices);
166 machine_device_initcall(p1020_mbg_pc, mpc85xx_common_publish_devices);
167 machine_device_initcall(p1020_rdb, mpc85xx_common_publish_devices);
168 machine_device_initcall(p1020_rdb_pc, mpc85xx_common_publish_devices);
169 machine_device_initcall(p1020_utm_pc, mpc85xx_common_publish_devices);
170 machine_device_initcall(p1021_rdb_pc, mpc85xx_common_publish_devices);
171 machine_device_initcall(p1025_rdb, mpc85xx_common_publish_devices);
172 machine_device_initcall(p1024_rdb, mpc85xx_common_publish_devices);
175 * Called very early, device-tree isn't unflattened
177 static int __init p2020_rdb_probe(void)
179 unsigned long root = of_get_flat_dt_root();
181 if (of_flat_dt_is_compatible(root, "fsl,P2020RDB"))
186 static int __init p1020_rdb_probe(void)
188 unsigned long root = of_get_flat_dt_root();
190 if (of_flat_dt_is_compatible(root, "fsl,P1020RDB"))
195 static int __init p1020_rdb_pc_probe(void)
197 unsigned long root = of_get_flat_dt_root();
199 return of_flat_dt_is_compatible(root, "fsl,P1020RDB-PC");
202 static int __init p1021_rdb_pc_probe(void)
204 unsigned long root = of_get_flat_dt_root();
206 if (of_flat_dt_is_compatible(root, "fsl,P1021RDB-PC"))
211 static int __init p2020_rdb_pc_probe(void)
213 unsigned long root = of_get_flat_dt_root();
215 if (of_flat_dt_is_compatible(root, "fsl,P2020RDB-PC"))
220 static int __init p1025_rdb_probe(void)
222 unsigned long root = of_get_flat_dt_root();
224 return of_flat_dt_is_compatible(root, "fsl,P1025RDB");
227 static int __init p1020_mbg_pc_probe(void)
229 unsigned long root = of_get_flat_dt_root();
231 return of_flat_dt_is_compatible(root, "fsl,P1020MBG-PC");
234 static int __init p1020_utm_pc_probe(void)
236 unsigned long root = of_get_flat_dt_root();
238 return of_flat_dt_is_compatible(root, "fsl,P1020UTM-PC");
241 static int __init p1024_rdb_probe(void)
243 unsigned long root = of_get_flat_dt_root();
245 return of_flat_dt_is_compatible(root, "fsl,P1024RDB");
248 define_machine(p2020_rdb) {
250 .probe = p2020_rdb_probe,
251 .setup_arch = mpc85xx_rdb_setup_arch,
252 .init_IRQ = mpc85xx_rdb_pic_init,
254 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
256 .get_irq = mpic_get_irq,
257 .restart = fsl_rstcr_restart,
258 .calibrate_decr = generic_calibrate_decr,
259 .progress = udbg_progress,
262 define_machine(p1020_rdb) {
264 .probe = p1020_rdb_probe,
265 .setup_arch = mpc85xx_rdb_setup_arch,
266 .init_IRQ = mpc85xx_rdb_pic_init,
268 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
270 .get_irq = mpic_get_irq,
271 .restart = fsl_rstcr_restart,
272 .calibrate_decr = generic_calibrate_decr,
273 .progress = udbg_progress,
276 define_machine(p1021_rdb_pc) {
277 .name = "P1021 RDB-PC",
278 .probe = p1021_rdb_pc_probe,
279 .setup_arch = mpc85xx_rdb_setup_arch,
280 .init_IRQ = mpc85xx_rdb_pic_init,
282 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
284 .get_irq = mpic_get_irq,
285 .restart = fsl_rstcr_restart,
286 .calibrate_decr = generic_calibrate_decr,
287 .progress = udbg_progress,
290 define_machine(p2020_rdb_pc) {
291 .name = "P2020RDB-PC",
292 .probe = p2020_rdb_pc_probe,
293 .setup_arch = mpc85xx_rdb_setup_arch,
294 .init_IRQ = mpc85xx_rdb_pic_init,
296 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
298 .get_irq = mpic_get_irq,
299 .restart = fsl_rstcr_restart,
300 .calibrate_decr = generic_calibrate_decr,
301 .progress = udbg_progress,
304 define_machine(p1025_rdb) {
306 .probe = p1025_rdb_probe,
307 .setup_arch = mpc85xx_rdb_setup_arch,
308 .init_IRQ = mpc85xx_rdb_pic_init,
310 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
312 .get_irq = mpic_get_irq,
313 .restart = fsl_rstcr_restart,
314 .calibrate_decr = generic_calibrate_decr,
315 .progress = udbg_progress,
318 define_machine(p1020_mbg_pc) {
319 .name = "P1020 MBG-PC",
320 .probe = p1020_mbg_pc_probe,
321 .setup_arch = mpc85xx_rdb_setup_arch,
322 .init_IRQ = mpc85xx_rdb_pic_init,
324 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
326 .get_irq = mpic_get_irq,
327 .restart = fsl_rstcr_restart,
328 .calibrate_decr = generic_calibrate_decr,
329 .progress = udbg_progress,
332 define_machine(p1020_utm_pc) {
333 .name = "P1020 UTM-PC",
334 .probe = p1020_utm_pc_probe,
335 .setup_arch = mpc85xx_rdb_setup_arch,
336 .init_IRQ = mpc85xx_rdb_pic_init,
338 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
340 .get_irq = mpic_get_irq,
341 .restart = fsl_rstcr_restart,
342 .calibrate_decr = generic_calibrate_decr,
343 .progress = udbg_progress,
346 define_machine(p1020_rdb_pc) {
347 .name = "P1020RDB-PC",
348 .probe = p1020_rdb_pc_probe,
349 .setup_arch = mpc85xx_rdb_setup_arch,
350 .init_IRQ = mpc85xx_rdb_pic_init,
352 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
354 .get_irq = mpic_get_irq,
355 .restart = fsl_rstcr_restart,
356 .calibrate_decr = generic_calibrate_decr,
357 .progress = udbg_progress,
360 define_machine(p1024_rdb) {
362 .probe = p1024_rdb_probe,
363 .setup_arch = mpc85xx_rdb_setup_arch,
364 .init_IRQ = mpc85xx_rdb_pic_init,
366 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
368 .get_irq = mpic_get_irq,
369 .restart = fsl_rstcr_restart,
370 .calibrate_decr = generic_calibrate_decr,
371 .progress = udbg_progress,