2 * MPC85xx setup and early boot code plus other random bits.
4 * Maintained by Kumar Gala (see MAINTAINERS for contact information)
6 * Copyright 2005 Freescale Semiconductor Inc.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
14 #include <linux/stddef.h>
15 #include <linux/kernel.h>
16 #include <linux/pci.h>
17 #include <linux/kdev_t.h>
18 #include <linux/delay.h>
19 #include <linux/seq_file.h>
20 #include <linux/of_platform.h>
22 #include <asm/system.h>
24 #include <asm/machdep.h>
25 #include <asm/pci-bridge.h>
27 #include <mm/mmu_decl.h>
30 #include <sysdev/fsl_soc.h>
31 #include <sysdev/fsl_pci.h>
35 #include <sysdev/cpm2_pic.h>
41 static int mpc85xx_exclude_device(struct pci_controller *hose,
42 u_char bus, u_char devfn)
44 if (bus == 0 && PCI_SLOT(devfn) == 0)
45 return PCIBIOS_DEVICE_NOT_FOUND;
47 return PCIBIOS_SUCCESSFUL;
49 #endif /* CONFIG_PCI */
51 static void __init mpc85xx_ads_pic_init(void)
55 struct device_node *np = NULL;
57 np = of_find_node_by_type(np, "open-pic");
59 printk(KERN_ERR "Could not find open-pic node\n");
63 if (of_address_to_resource(np, 0, &r)) {
64 printk(KERN_ERR "Could not map mpic register space\n");
69 mpic = mpic_alloc(np, r.start,
70 MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
77 mpc85xx_cpm2_pic_init();
81 * Setup the architecture
88 static const struct cpm_pin mpc8560_ads_pins[] = {
90 {3, 29, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
91 {3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
92 {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
95 {2, 12, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
96 {2, 13, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
97 {3, 26, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
98 {3, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
99 {3, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
102 {1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
103 {1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
104 {1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
105 {1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
106 {1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
107 {1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
108 {1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
109 {1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
110 {1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
111 {1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
112 {1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
113 {1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
114 {1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
115 {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
116 {2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK14 */
117 {2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK13 */
120 {1, 4, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
121 {1, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
122 {1, 6, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
123 {1, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
124 {1, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
125 {1, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
126 {1, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
127 {1, 12, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
128 {1, 13, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
129 {1, 14, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
130 {1, 15, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
131 {1, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
132 {1, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
133 {2, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK16 */
134 {2, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK15 */
135 {2, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
138 static void __init init_ioports(void)
142 for (i = 0; i < ARRAY_SIZE(mpc8560_ads_pins); i++) {
143 const struct cpm_pin *pin = &mpc8560_ads_pins[i];
144 cpm2_set_pin(pin->port, pin->pin, pin->flags);
147 cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
148 cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
149 cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_RX);
150 cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_TX);
151 cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX);
152 cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX);
153 cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK15, CPM_CLK_RX);
154 cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK16, CPM_CLK_TX);
158 static void __init mpc85xx_ads_setup_arch(void)
161 struct device_node *np;
165 ppc_md.progress("mpc85xx_ads_setup_arch()", 0);
173 for_each_compatible_node(np, "pci", "fsl,mpc8540-pci")
174 fsl_add_bridge(np, 1);
176 ppc_md.pci_exclude_device = mpc85xx_exclude_device;
180 static void mpc85xx_ads_show_cpuinfo(struct seq_file *m)
182 uint pvid, svid, phid1;
184 pvid = mfspr(SPRN_PVR);
185 svid = mfspr(SPRN_SVR);
187 seq_printf(m, "Vendor\t\t: Freescale Semiconductor\n");
188 seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
189 seq_printf(m, "SVR\t\t: 0x%x\n", svid);
191 /* Display cpu Pll setting */
192 phid1 = mfspr(SPRN_HID1);
193 seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
196 machine_device_initcall(mpc85xx_ads, mpc85xx_common_publish_devices);
199 * Called very early, device-tree isn't unflattened
201 static int __init mpc85xx_ads_probe(void)
203 unsigned long root = of_get_flat_dt_root();
205 return of_flat_dt_is_compatible(root, "MPC85xxADS");
208 define_machine(mpc85xx_ads) {
209 .name = "MPC85xx ADS",
210 .probe = mpc85xx_ads_probe,
211 .setup_arch = mpc85xx_ads_setup_arch,
212 .init_IRQ = mpc85xx_ads_pic_init,
213 .show_cpuinfo = mpc85xx_ads_show_cpuinfo,
214 .get_irq = mpic_get_irq,
215 .restart = fsl_rstcr_restart,
216 .calibrate_decr = generic_calibrate_decr,
217 .progress = udbg_progress,