3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
5 * Derived from "arch/m68k/kernel/ptrace.c"
6 * Copyright (C) 1994 by Hamish Macdonald
7 * Taken from linux/kernel/ptrace.c and modified for M680x0.
8 * linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds
10 * Modified by Cort Dougan (cort@hq.fsmlabs.com)
11 * and Paul Mackerras (paulus@samba.org).
13 * This file is subject to the terms and conditions of the GNU General
14 * Public License. See the file README.legal in the main directory of
15 * this archive for more details.
18 #include <linux/kernel.h>
19 #include <linux/sched.h>
21 #include <linux/smp.h>
22 #include <linux/errno.h>
23 #include <linux/ptrace.h>
24 #include <linux/regset.h>
25 #include <linux/tracehook.h>
26 #include <linux/elf.h>
27 #include <linux/user.h>
28 #include <linux/security.h>
29 #include <linux/signal.h>
30 #include <linux/seccomp.h>
31 #include <linux/audit.h>
33 #include <linux/module.h>
36 #include <asm/uaccess.h>
38 #include <asm/pgtable.h>
39 #include <asm/system.h>
42 * The parameter save area on the stack is used to store arguments being passed
43 * to callee function and is located at fixed offset from stack pointer.
46 #define PARAMETER_SAVE_AREA_OFFSET 24 /* bytes */
47 #else /* CONFIG_PPC32 */
48 #define PARAMETER_SAVE_AREA_OFFSET 48 /* bytes */
51 struct pt_regs_offset {
56 #define STR(s) #s /* convert to string */
57 #define REG_OFFSET_NAME(r) {.name = #r, .offset = offsetof(struct pt_regs, r)}
58 #define GPR_OFFSET_NAME(num) \
59 {.name = STR(gpr##num), .offset = offsetof(struct pt_regs, gpr[num])}
60 #define REG_OFFSET_END {.name = NULL, .offset = 0}
62 static const struct pt_regs_offset regoffset_table[] = {
98 REG_OFFSET_NAME(link),
100 REG_OFFSET_NAME(ccr),
102 REG_OFFSET_NAME(softe),
106 REG_OFFSET_NAME(trap),
107 REG_OFFSET_NAME(dar),
108 REG_OFFSET_NAME(dsisr),
113 * regs_query_register_offset() - query register offset from its name
114 * @name: the name of a register
116 * regs_query_register_offset() returns the offset of a register in struct
117 * pt_regs from its name. If the name is invalid, this returns -EINVAL;
119 int regs_query_register_offset(const char *name)
121 const struct pt_regs_offset *roff;
122 for (roff = regoffset_table; roff->name != NULL; roff++)
123 if (!strcmp(roff->name, name))
129 * regs_query_register_name() - query register name from its offset
130 * @offset: the offset of a register in struct pt_regs.
132 * regs_query_register_name() returns the name of a register from its
133 * offset in struct pt_regs. If the @offset is invalid, this returns NULL;
135 const char *regs_query_register_name(unsigned int offset)
137 const struct pt_regs_offset *roff;
138 for (roff = regoffset_table; roff->name != NULL; roff++)
139 if (roff->offset == offset)
145 * does not yet catch signals sent when the child dies.
146 * in exit.c or in signal.c.
150 * Set of msr bits that gdb can change on behalf of a process.
152 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
153 #define MSR_DEBUGCHANGE 0
155 #define MSR_DEBUGCHANGE (MSR_SE | MSR_BE)
159 * Max register writeable via put_reg
162 #define PT_MAX_PUT_REG PT_MQ
164 #define PT_MAX_PUT_REG PT_CCR
167 static unsigned long get_user_msr(struct task_struct *task)
169 return task->thread.regs->msr | task->thread.fpexc_mode;
172 static int set_user_msr(struct task_struct *task, unsigned long msr)
174 task->thread.regs->msr &= ~MSR_DEBUGCHANGE;
175 task->thread.regs->msr |= msr & MSR_DEBUGCHANGE;
180 * We prevent mucking around with the reserved area of trap
181 * which are used internally by the kernel.
183 static int set_user_trap(struct task_struct *task, unsigned long trap)
185 task->thread.regs->trap = trap & 0xfff0;
190 * Get contents of register REGNO in task TASK.
192 unsigned long ptrace_get_reg(struct task_struct *task, int regno)
194 if (task->thread.regs == NULL)
198 return get_user_msr(task);
200 if (regno < (sizeof(struct pt_regs) / sizeof(unsigned long)))
201 return ((unsigned long *)task->thread.regs)[regno];
207 * Write contents of register REGNO in task TASK.
209 int ptrace_put_reg(struct task_struct *task, int regno, unsigned long data)
211 if (task->thread.regs == NULL)
215 return set_user_msr(task, data);
216 if (regno == PT_TRAP)
217 return set_user_trap(task, data);
219 if (regno <= PT_MAX_PUT_REG) {
220 ((unsigned long *)task->thread.regs)[regno] = data;
226 static int gpr_get(struct task_struct *target, const struct user_regset *regset,
227 unsigned int pos, unsigned int count,
228 void *kbuf, void __user *ubuf)
232 if (target->thread.regs == NULL)
235 CHECK_FULL_REGS(target->thread.regs);
237 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
239 0, offsetof(struct pt_regs, msr));
241 unsigned long msr = get_user_msr(target);
242 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &msr,
243 offsetof(struct pt_regs, msr),
244 offsetof(struct pt_regs, msr) +
248 BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
249 offsetof(struct pt_regs, msr) + sizeof(long));
252 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
253 &target->thread.regs->orig_gpr3,
254 offsetof(struct pt_regs, orig_gpr3),
255 sizeof(struct pt_regs));
257 ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
258 sizeof(struct pt_regs), -1);
263 static int gpr_set(struct task_struct *target, const struct user_regset *regset,
264 unsigned int pos, unsigned int count,
265 const void *kbuf, const void __user *ubuf)
270 if (target->thread.regs == NULL)
273 CHECK_FULL_REGS(target->thread.regs);
275 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
277 0, PT_MSR * sizeof(reg));
279 if (!ret && count > 0) {
280 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, ®,
281 PT_MSR * sizeof(reg),
282 (PT_MSR + 1) * sizeof(reg));
284 ret = set_user_msr(target, reg);
287 BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
288 offsetof(struct pt_regs, msr) + sizeof(long));
291 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
292 &target->thread.regs->orig_gpr3,
293 PT_ORIG_R3 * sizeof(reg),
294 (PT_MAX_PUT_REG + 1) * sizeof(reg));
296 if (PT_MAX_PUT_REG + 1 < PT_TRAP && !ret)
297 ret = user_regset_copyin_ignore(
298 &pos, &count, &kbuf, &ubuf,
299 (PT_MAX_PUT_REG + 1) * sizeof(reg),
300 PT_TRAP * sizeof(reg));
302 if (!ret && count > 0) {
303 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, ®,
304 PT_TRAP * sizeof(reg),
305 (PT_TRAP + 1) * sizeof(reg));
307 ret = set_user_trap(target, reg);
311 ret = user_regset_copyin_ignore(
312 &pos, &count, &kbuf, &ubuf,
313 (PT_TRAP + 1) * sizeof(reg), -1);
318 static int fpr_get(struct task_struct *target, const struct user_regset *regset,
319 unsigned int pos, unsigned int count,
320 void *kbuf, void __user *ubuf)
326 flush_fp_to_thread(target);
329 /* copy to local buffer then write that out */
330 for (i = 0; i < 32 ; i++)
331 buf[i] = target->thread.TS_FPR(i);
332 memcpy(&buf[32], &target->thread.fpscr, sizeof(double));
333 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
336 BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
337 offsetof(struct thread_struct, TS_FPR(32)));
339 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
340 &target->thread.fpr, 0, -1);
344 static int fpr_set(struct task_struct *target, const struct user_regset *regset,
345 unsigned int pos, unsigned int count,
346 const void *kbuf, const void __user *ubuf)
352 flush_fp_to_thread(target);
355 /* copy to local buffer then write that out */
356 i = user_regset_copyin(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
359 for (i = 0; i < 32 ; i++)
360 target->thread.TS_FPR(i) = buf[i];
361 memcpy(&target->thread.fpscr, &buf[32], sizeof(double));
364 BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
365 offsetof(struct thread_struct, TS_FPR(32)));
367 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
368 &target->thread.fpr, 0, -1);
372 #ifdef CONFIG_ALTIVEC
374 * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go.
375 * The transfer totals 34 quadword. Quadwords 0-31 contain the
376 * corresponding vector registers. Quadword 32 contains the vscr as the
377 * last word (offset 12) within that quadword. Quadword 33 contains the
378 * vrsave as the first word (offset 0) within the quadword.
380 * This definition of the VMX state is compatible with the current PPC32
381 * ptrace interface. This allows signal handling and ptrace to use the
382 * same structures. This also simplifies the implementation of a bi-arch
383 * (combined (32- and 64-bit) gdb.
386 static int vr_active(struct task_struct *target,
387 const struct user_regset *regset)
389 flush_altivec_to_thread(target);
390 return target->thread.used_vr ? regset->n : 0;
393 static int vr_get(struct task_struct *target, const struct user_regset *regset,
394 unsigned int pos, unsigned int count,
395 void *kbuf, void __user *ubuf)
399 flush_altivec_to_thread(target);
401 BUILD_BUG_ON(offsetof(struct thread_struct, vscr) !=
402 offsetof(struct thread_struct, vr[32]));
404 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
405 &target->thread.vr, 0,
406 33 * sizeof(vector128));
409 * Copy out only the low-order word of vrsave.
415 memset(&vrsave, 0, sizeof(vrsave));
416 vrsave.word = target->thread.vrsave;
417 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &vrsave,
418 33 * sizeof(vector128), -1);
424 static int vr_set(struct task_struct *target, const struct user_regset *regset,
425 unsigned int pos, unsigned int count,
426 const void *kbuf, const void __user *ubuf)
430 flush_altivec_to_thread(target);
432 BUILD_BUG_ON(offsetof(struct thread_struct, vscr) !=
433 offsetof(struct thread_struct, vr[32]));
435 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
436 &target->thread.vr, 0, 33 * sizeof(vector128));
437 if (!ret && count > 0) {
439 * We use only the first word of vrsave.
445 memset(&vrsave, 0, sizeof(vrsave));
446 vrsave.word = target->thread.vrsave;
447 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &vrsave,
448 33 * sizeof(vector128), -1);
450 target->thread.vrsave = vrsave.word;
455 #endif /* CONFIG_ALTIVEC */
459 * Currently to set and and get all the vsx state, you need to call
460 * the fp and VMX calls aswell. This only get/sets the lower 32
461 * 128bit VSX registers.
464 static int vsr_active(struct task_struct *target,
465 const struct user_regset *regset)
467 flush_vsx_to_thread(target);
468 return target->thread.used_vsr ? regset->n : 0;
471 static int vsr_get(struct task_struct *target, const struct user_regset *regset,
472 unsigned int pos, unsigned int count,
473 void *kbuf, void __user *ubuf)
478 flush_vsx_to_thread(target);
480 for (i = 0; i < 32 ; i++)
481 buf[i] = target->thread.fpr[i][TS_VSRLOWOFFSET];
482 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
483 buf, 0, 32 * sizeof(double));
488 static int vsr_set(struct task_struct *target, const struct user_regset *regset,
489 unsigned int pos, unsigned int count,
490 const void *kbuf, const void __user *ubuf)
495 flush_vsx_to_thread(target);
497 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
498 buf, 0, 32 * sizeof(double));
499 for (i = 0; i < 32 ; i++)
500 target->thread.fpr[i][TS_VSRLOWOFFSET] = buf[i];
505 #endif /* CONFIG_VSX */
510 * For get_evrregs/set_evrregs functions 'data' has the following layout:
519 static int evr_active(struct task_struct *target,
520 const struct user_regset *regset)
522 flush_spe_to_thread(target);
523 return target->thread.used_spe ? regset->n : 0;
526 static int evr_get(struct task_struct *target, const struct user_regset *regset,
527 unsigned int pos, unsigned int count,
528 void *kbuf, void __user *ubuf)
532 flush_spe_to_thread(target);
534 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
536 0, sizeof(target->thread.evr));
538 BUILD_BUG_ON(offsetof(struct thread_struct, acc) + sizeof(u64) !=
539 offsetof(struct thread_struct, spefscr));
542 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
544 sizeof(target->thread.evr), -1);
549 static int evr_set(struct task_struct *target, const struct user_regset *regset,
550 unsigned int pos, unsigned int count,
551 const void *kbuf, const void __user *ubuf)
555 flush_spe_to_thread(target);
557 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
559 0, sizeof(target->thread.evr));
561 BUILD_BUG_ON(offsetof(struct thread_struct, acc) + sizeof(u64) !=
562 offsetof(struct thread_struct, spefscr));
565 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
567 sizeof(target->thread.evr), -1);
571 #endif /* CONFIG_SPE */
575 * These are our native regset flavors.
577 enum powerpc_regset {
580 #ifdef CONFIG_ALTIVEC
591 static const struct user_regset native_regsets[] = {
593 .core_note_type = NT_PRSTATUS, .n = ELF_NGREG,
594 .size = sizeof(long), .align = sizeof(long),
595 .get = gpr_get, .set = gpr_set
598 .core_note_type = NT_PRFPREG, .n = ELF_NFPREG,
599 .size = sizeof(double), .align = sizeof(double),
600 .get = fpr_get, .set = fpr_set
602 #ifdef CONFIG_ALTIVEC
604 .core_note_type = NT_PPC_VMX, .n = 34,
605 .size = sizeof(vector128), .align = sizeof(vector128),
606 .active = vr_active, .get = vr_get, .set = vr_set
611 .core_note_type = NT_PPC_VSX, .n = 32,
612 .size = sizeof(double), .align = sizeof(double),
613 .active = vsr_active, .get = vsr_get, .set = vsr_set
619 .size = sizeof(u32), .align = sizeof(u32),
620 .active = evr_active, .get = evr_get, .set = evr_set
625 static const struct user_regset_view user_ppc_native_view = {
626 .name = UTS_MACHINE, .e_machine = ELF_ARCH, .ei_osabi = ELF_OSABI,
627 .regsets = native_regsets, .n = ARRAY_SIZE(native_regsets)
631 #include <linux/compat.h>
633 static int gpr32_get(struct task_struct *target,
634 const struct user_regset *regset,
635 unsigned int pos, unsigned int count,
636 void *kbuf, void __user *ubuf)
638 const unsigned long *regs = &target->thread.regs->gpr[0];
639 compat_ulong_t *k = kbuf;
640 compat_ulong_t __user *u = ubuf;
643 if (target->thread.regs == NULL)
646 CHECK_FULL_REGS(target->thread.regs);
649 count /= sizeof(reg);
652 for (; count > 0 && pos < PT_MSR; --count)
655 for (; count > 0 && pos < PT_MSR; --count)
656 if (__put_user((compat_ulong_t) regs[pos++], u++))
659 if (count > 0 && pos == PT_MSR) {
660 reg = get_user_msr(target);
663 else if (__put_user(reg, u++))
670 for (; count > 0 && pos < PT_REGS_COUNT; --count)
673 for (; count > 0 && pos < PT_REGS_COUNT; --count)
674 if (__put_user((compat_ulong_t) regs[pos++], u++))
680 count *= sizeof(reg);
681 return user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
682 PT_REGS_COUNT * sizeof(reg), -1);
685 static int gpr32_set(struct task_struct *target,
686 const struct user_regset *regset,
687 unsigned int pos, unsigned int count,
688 const void *kbuf, const void __user *ubuf)
690 unsigned long *regs = &target->thread.regs->gpr[0];
691 const compat_ulong_t *k = kbuf;
692 const compat_ulong_t __user *u = ubuf;
695 if (target->thread.regs == NULL)
698 CHECK_FULL_REGS(target->thread.regs);
701 count /= sizeof(reg);
704 for (; count > 0 && pos < PT_MSR; --count)
707 for (; count > 0 && pos < PT_MSR; --count) {
708 if (__get_user(reg, u++))
714 if (count > 0 && pos == PT_MSR) {
717 else if (__get_user(reg, u++))
719 set_user_msr(target, reg);
725 for (; count > 0 && pos <= PT_MAX_PUT_REG; --count)
727 for (; count > 0 && pos < PT_TRAP; --count, ++pos)
730 for (; count > 0 && pos <= PT_MAX_PUT_REG; --count) {
731 if (__get_user(reg, u++))
735 for (; count > 0 && pos < PT_TRAP; --count, ++pos)
736 if (__get_user(reg, u++))
740 if (count > 0 && pos == PT_TRAP) {
743 else if (__get_user(reg, u++))
745 set_user_trap(target, reg);
753 count *= sizeof(reg);
754 return user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
755 (PT_TRAP + 1) * sizeof(reg), -1);
759 * These are the regset flavors matching the CONFIG_PPC32 native set.
761 static const struct user_regset compat_regsets[] = {
763 .core_note_type = NT_PRSTATUS, .n = ELF_NGREG,
764 .size = sizeof(compat_long_t), .align = sizeof(compat_long_t),
765 .get = gpr32_get, .set = gpr32_set
768 .core_note_type = NT_PRFPREG, .n = ELF_NFPREG,
769 .size = sizeof(double), .align = sizeof(double),
770 .get = fpr_get, .set = fpr_set
772 #ifdef CONFIG_ALTIVEC
774 .core_note_type = NT_PPC_VMX, .n = 34,
775 .size = sizeof(vector128), .align = sizeof(vector128),
776 .active = vr_active, .get = vr_get, .set = vr_set
781 .core_note_type = NT_PPC_SPE, .n = 35,
782 .size = sizeof(u32), .align = sizeof(u32),
783 .active = evr_active, .get = evr_get, .set = evr_set
788 static const struct user_regset_view user_ppc_compat_view = {
789 .name = "ppc", .e_machine = EM_PPC, .ei_osabi = ELF_OSABI,
790 .regsets = compat_regsets, .n = ARRAY_SIZE(compat_regsets)
792 #endif /* CONFIG_PPC64 */
794 const struct user_regset_view *task_user_regset_view(struct task_struct *task)
797 if (test_tsk_thread_flag(task, TIF_32BIT))
798 return &user_ppc_compat_view;
800 return &user_ppc_native_view;
804 void user_enable_single_step(struct task_struct *task)
806 struct pt_regs *regs = task->thread.regs;
809 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
810 task->thread.dbcr0 &= ~DBCR0_BT;
811 task->thread.dbcr0 |= DBCR0_IDM | DBCR0_IC;
814 regs->msr &= ~MSR_BE;
818 set_tsk_thread_flag(task, TIF_SINGLESTEP);
821 void user_enable_block_step(struct task_struct *task)
823 struct pt_regs *regs = task->thread.regs;
826 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
827 task->thread.dbcr0 &= ~DBCR0_IC;
828 task->thread.dbcr0 = DBCR0_IDM | DBCR0_BT;
831 regs->msr &= ~MSR_SE;
835 set_tsk_thread_flag(task, TIF_SINGLESTEP);
838 void user_disable_single_step(struct task_struct *task)
840 struct pt_regs *regs = task->thread.regs;
843 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
845 * The logic to disable single stepping should be as
846 * simple as turning off the Instruction Complete flag.
847 * And, after doing so, if all debug flags are off, turn
848 * off DBCR0(IDM) and MSR(DE) .... Torez
850 task->thread.dbcr0 &= ~DBCR0_IC;
852 * Test to see if any of the DBCR_ACTIVE_EVENTS bits are set.
854 if (!DBCR_ACTIVE_EVENTS(task->thread.dbcr0,
855 task->thread.dbcr1)) {
857 * All debug events were off.....
859 task->thread.dbcr0 &= ~DBCR0_IDM;
860 regs->msr &= ~MSR_DE;
863 regs->msr &= ~(MSR_SE | MSR_BE);
866 clear_tsk_thread_flag(task, TIF_SINGLESTEP);
869 int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
872 /* For ppc64 we support one DABR and no IABR's at the moment (ppc64).
873 * For embedded processors we support one DAC and no IAC's at the
879 /* The bottom 3 bits in dabr are flags */
880 if ((data & ~0x7UL) >= TASK_SIZE)
883 #ifndef CONFIG_PPC_ADV_DEBUG_REGS
884 /* For processors using DABR (i.e. 970), the bottom 3 bits are flags.
885 * It was assumed, on previous implementations, that 3 bits were
886 * passed together with the data address, fitting the design of the
887 * DABR register, as follows:
891 * bit 2: Breakpoint translation
893 * Thus, we use them here as so.
896 /* Ensure breakpoint translation bit is set */
897 if (data && !(data & DABR_TRANSLATION))
900 /* Move contents to the DABR register */
901 task->thread.dabr = data;
902 #else /* CONFIG_PPC_ADV_DEBUG_REGS */
903 /* As described above, it was assumed 3 bits were passed with the data
904 * address, but we will assume only the mode bits will be passed
905 * as to not cause alignment restrictions for DAC-based processors.
908 /* DAC's hold the whole address without any mode flags */
909 task->thread.dac1 = data & ~0x3UL;
911 if (task->thread.dac1 == 0) {
912 dbcr_dac(task) &= ~(DBCR_DAC1R | DBCR_DAC1W);
913 if (!DBCR_ACTIVE_EVENTS(task->thread.dbcr0,
914 task->thread.dbcr1)) {
915 task->thread.regs->msr &= ~MSR_DE;
916 task->thread.dbcr0 &= ~DBCR0_IDM;
921 /* Read or Write bits must be set */
926 /* Set the Internal Debugging flag (IDM bit 1) for the DBCR0
928 task->thread.dbcr0 |= DBCR0_IDM;
930 /* Check for write and read flags and set DBCR0
932 dbcr_dac(task) &= ~(DBCR_DAC1R|DBCR_DAC1W);
934 dbcr_dac(task) |= DBCR_DAC1R;
936 dbcr_dac(task) |= DBCR_DAC1W;
937 task->thread.regs->msr |= MSR_DE;
938 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
943 * Called by kernel/ptrace.c when detaching..
945 * Make sure single step bits etc are not set.
947 void ptrace_disable(struct task_struct *child)
949 /* make sure the single step bit is not set. */
950 user_disable_single_step(child);
953 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
954 static long set_intruction_bp(struct task_struct *child,
955 struct ppc_hw_breakpoint *bp_info)
958 int slot1_in_use = ((child->thread.dbcr0 & DBCR0_IAC1) != 0);
959 int slot2_in_use = ((child->thread.dbcr0 & DBCR0_IAC2) != 0);
960 int slot3_in_use = ((child->thread.dbcr0 & DBCR0_IAC3) != 0);
961 int slot4_in_use = ((child->thread.dbcr0 & DBCR0_IAC4) != 0);
963 if (dbcr_iac_range(child) & DBCR_IAC12MODE)
965 if (dbcr_iac_range(child) & DBCR_IAC34MODE)
968 if (bp_info->addr >= TASK_SIZE)
971 if (bp_info->addr_mode != PPC_BREAKPOINT_MODE_EXACT) {
973 /* Make sure range is valid. */
974 if (bp_info->addr2 >= TASK_SIZE)
977 /* We need a pair of IAC regsisters */
978 if ((!slot1_in_use) && (!slot2_in_use)) {
980 child->thread.iac1 = bp_info->addr;
981 child->thread.iac2 = bp_info->addr2;
982 child->thread.dbcr0 |= DBCR0_IAC1;
983 if (bp_info->addr_mode ==
984 PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE)
985 dbcr_iac_range(child) |= DBCR_IAC12X;
987 dbcr_iac_range(child) |= DBCR_IAC12I;
988 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
989 } else if ((!slot3_in_use) && (!slot4_in_use)) {
991 child->thread.iac3 = bp_info->addr;
992 child->thread.iac4 = bp_info->addr2;
993 child->thread.dbcr0 |= DBCR0_IAC3;
994 if (bp_info->addr_mode ==
995 PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE)
996 dbcr_iac_range(child) |= DBCR_IAC34X;
998 dbcr_iac_range(child) |= DBCR_IAC34I;
1003 /* We only need one. If possible leave a pair free in
1004 * case a range is needed later
1006 if (!slot1_in_use) {
1008 * Don't use iac1 if iac1-iac2 are free and either
1009 * iac3 or iac4 (but not both) are free
1011 if (slot2_in_use || (slot3_in_use == slot4_in_use)) {
1013 child->thread.iac1 = bp_info->addr;
1014 child->thread.dbcr0 |= DBCR0_IAC1;
1018 if (!slot2_in_use) {
1020 child->thread.iac2 = bp_info->addr;
1021 child->thread.dbcr0 |= DBCR0_IAC2;
1022 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1023 } else if (!slot3_in_use) {
1025 child->thread.iac3 = bp_info->addr;
1026 child->thread.dbcr0 |= DBCR0_IAC3;
1027 } else if (!slot4_in_use) {
1029 child->thread.iac4 = bp_info->addr;
1030 child->thread.dbcr0 |= DBCR0_IAC4;
1036 child->thread.dbcr0 |= DBCR0_IDM;
1037 child->thread.regs->msr |= MSR_DE;
1042 static int del_instruction_bp(struct task_struct *child, int slot)
1046 if ((child->thread.dbcr0 & DBCR0_IAC1) == 0)
1049 if (dbcr_iac_range(child) & DBCR_IAC12MODE) {
1050 /* address range - clear slots 1 & 2 */
1051 child->thread.iac2 = 0;
1052 dbcr_iac_range(child) &= ~DBCR_IAC12MODE;
1054 child->thread.iac1 = 0;
1055 child->thread.dbcr0 &= ~DBCR0_IAC1;
1058 if ((child->thread.dbcr0 & DBCR0_IAC2) == 0)
1061 if (dbcr_iac_range(child) & DBCR_IAC12MODE)
1062 /* used in a range */
1064 child->thread.iac2 = 0;
1065 child->thread.dbcr0 &= ~DBCR0_IAC2;
1067 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1069 if ((child->thread.dbcr0 & DBCR0_IAC3) == 0)
1072 if (dbcr_iac_range(child) & DBCR_IAC34MODE) {
1073 /* address range - clear slots 3 & 4 */
1074 child->thread.iac4 = 0;
1075 dbcr_iac_range(child) &= ~DBCR_IAC34MODE;
1077 child->thread.iac3 = 0;
1078 child->thread.dbcr0 &= ~DBCR0_IAC3;
1081 if ((child->thread.dbcr0 & DBCR0_IAC4) == 0)
1084 if (dbcr_iac_range(child) & DBCR_IAC34MODE)
1085 /* Used in a range */
1087 child->thread.iac4 = 0;
1088 child->thread.dbcr0 &= ~DBCR0_IAC4;
1097 static int set_dac(struct task_struct *child, struct ppc_hw_breakpoint *bp_info)
1100 (bp_info->condition_mode >> PPC_BREAKPOINT_CONDITION_BE_SHIFT)
1102 int condition_mode =
1103 bp_info->condition_mode & PPC_BREAKPOINT_CONDITION_MODE;
1106 if (byte_enable && (condition_mode == 0))
1109 if (bp_info->addr >= TASK_SIZE)
1112 if ((dbcr_dac(child) & (DBCR_DAC1R | DBCR_DAC1W)) == 0) {
1114 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
1115 dbcr_dac(child) |= DBCR_DAC1R;
1116 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
1117 dbcr_dac(child) |= DBCR_DAC1W;
1118 child->thread.dac1 = (unsigned long)bp_info->addr;
1119 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
1121 child->thread.dvc1 =
1122 (unsigned long)bp_info->condition_value;
1123 child->thread.dbcr2 |=
1124 ((byte_enable << DBCR2_DVC1BE_SHIFT) |
1125 (condition_mode << DBCR2_DVC1M_SHIFT));
1128 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1129 } else if (child->thread.dbcr2 & DBCR2_DAC12MODE) {
1130 /* Both dac1 and dac2 are part of a range */
1133 } else if ((dbcr_dac(child) & (DBCR_DAC2R | DBCR_DAC2W)) == 0) {
1135 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
1136 dbcr_dac(child) |= DBCR_DAC2R;
1137 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
1138 dbcr_dac(child) |= DBCR_DAC2W;
1139 child->thread.dac2 = (unsigned long)bp_info->addr;
1140 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
1142 child->thread.dvc2 =
1143 (unsigned long)bp_info->condition_value;
1144 child->thread.dbcr2 |=
1145 ((byte_enable << DBCR2_DVC2BE_SHIFT) |
1146 (condition_mode << DBCR2_DVC2M_SHIFT));
1151 child->thread.dbcr0 |= DBCR0_IDM;
1152 child->thread.regs->msr |= MSR_DE;
1157 static int del_dac(struct task_struct *child, int slot)
1160 if ((dbcr_dac(child) & (DBCR_DAC1R | DBCR_DAC1W)) == 0)
1163 child->thread.dac1 = 0;
1164 dbcr_dac(child) &= ~(DBCR_DAC1R | DBCR_DAC1W);
1165 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1166 if (child->thread.dbcr2 & DBCR2_DAC12MODE) {
1167 child->thread.dac2 = 0;
1168 child->thread.dbcr2 &= ~DBCR2_DAC12MODE;
1170 child->thread.dbcr2 &= ~(DBCR2_DVC1M | DBCR2_DVC1BE);
1172 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
1173 child->thread.dvc1 = 0;
1175 } else if (slot == 2) {
1176 if ((dbcr_dac(child) & (DBCR_DAC2R | DBCR_DAC2W)) == 0)
1179 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1180 if (child->thread.dbcr2 & DBCR2_DAC12MODE)
1181 /* Part of a range */
1183 child->thread.dbcr2 &= ~(DBCR2_DVC2M | DBCR2_DVC2BE);
1185 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
1186 child->thread.dvc2 = 0;
1188 child->thread.dac2 = 0;
1189 dbcr_dac(child) &= ~(DBCR_DAC2R | DBCR_DAC2W);
1195 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
1197 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1198 static int set_dac_range(struct task_struct *child,
1199 struct ppc_hw_breakpoint *bp_info)
1201 int mode = bp_info->addr_mode & PPC_BREAKPOINT_MODE_MASK;
1203 /* We don't allow range watchpoints to be used with DVC */
1204 if (bp_info->condition_mode)
1208 * Best effort to verify the address range. The user/supervisor bits
1209 * prevent trapping in kernel space, but let's fail on an obvious bad
1210 * range. The simple test on the mask is not fool-proof, and any
1211 * exclusive range will spill over into kernel space.
1213 if (bp_info->addr >= TASK_SIZE)
1215 if (mode == PPC_BREAKPOINT_MODE_MASK) {
1217 * dac2 is a bitmask. Don't allow a mask that makes a
1218 * kernel space address from a valid dac1 value
1220 if (~((unsigned long)bp_info->addr2) >= TASK_SIZE)
1224 * For range breakpoints, addr2 must also be a valid address
1226 if (bp_info->addr2 >= TASK_SIZE)
1230 if (child->thread.dbcr0 &
1231 (DBCR0_DAC1R | DBCR0_DAC1W | DBCR0_DAC2R | DBCR0_DAC2W))
1234 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
1235 child->thread.dbcr0 |= (DBCR0_DAC1R | DBCR0_IDM);
1236 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
1237 child->thread.dbcr0 |= (DBCR0_DAC1W | DBCR0_IDM);
1238 child->thread.dac1 = bp_info->addr;
1239 child->thread.dac2 = bp_info->addr2;
1240 if (mode == PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE)
1241 child->thread.dbcr2 |= DBCR2_DAC12M;
1242 else if (mode == PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE)
1243 child->thread.dbcr2 |= DBCR2_DAC12MX;
1244 else /* PPC_BREAKPOINT_MODE_MASK */
1245 child->thread.dbcr2 |= DBCR2_DAC12MM;
1246 child->thread.regs->msr |= MSR_DE;
1250 #endif /* CONFIG_PPC_ADV_DEBUG_DAC_RANGE */
1252 static long ppc_set_hwdebug(struct task_struct *child,
1253 struct ppc_hw_breakpoint *bp_info)
1255 if (bp_info->version != 1)
1257 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
1259 * Check for invalid flags and combinations
1261 if ((bp_info->trigger_type == 0) ||
1262 (bp_info->trigger_type & ~(PPC_BREAKPOINT_TRIGGER_EXECUTE |
1263 PPC_BREAKPOINT_TRIGGER_RW)) ||
1264 (bp_info->addr_mode & ~PPC_BREAKPOINT_MODE_MASK) ||
1265 (bp_info->condition_mode &
1266 ~(PPC_BREAKPOINT_CONDITION_MODE |
1267 PPC_BREAKPOINT_CONDITION_BE_ALL)))
1269 #if CONFIG_PPC_ADV_DEBUG_DVCS == 0
1270 if (bp_info->condition_mode != PPC_BREAKPOINT_CONDITION_NONE)
1274 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_EXECUTE) {
1275 if ((bp_info->trigger_type != PPC_BREAKPOINT_TRIGGER_EXECUTE) ||
1276 (bp_info->condition_mode != PPC_BREAKPOINT_CONDITION_NONE))
1278 return set_intruction_bp(child, bp_info);
1280 if (bp_info->addr_mode == PPC_BREAKPOINT_MODE_EXACT)
1281 return set_dac(child, bp_info);
1283 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1284 return set_dac_range(child, bp_info);
1288 #else /* !CONFIG_PPC_ADV_DEBUG_DVCS */
1290 * We only support one data breakpoint
1292 if (((bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_RW) == 0) ||
1293 ((bp_info->trigger_type & ~PPC_BREAKPOINT_TRIGGER_RW) != 0) ||
1294 (bp_info->trigger_type != PPC_BREAKPOINT_TRIGGER_WRITE) ||
1295 (bp_info->addr_mode != PPC_BREAKPOINT_MODE_EXACT) ||
1296 (bp_info->condition_mode != PPC_BREAKPOINT_CONDITION_NONE))
1299 if (child->thread.dabr)
1302 if ((unsigned long)bp_info->addr >= TASK_SIZE)
1305 child->thread.dabr = (unsigned long)bp_info->addr;
1308 #endif /* !CONFIG_PPC_ADV_DEBUG_DVCS */
1311 static long ppc_del_hwdebug(struct task_struct *child, long addr, long data)
1313 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
1317 rc = del_instruction_bp(child, (int)data);
1319 rc = del_dac(child, (int)data - 4);
1322 if (!DBCR_ACTIVE_EVENTS(child->thread.dbcr0,
1323 child->thread.dbcr1)) {
1324 child->thread.dbcr0 &= ~DBCR0_IDM;
1325 child->thread.regs->msr &= ~MSR_DE;
1332 if (child->thread.dabr == 0)
1335 child->thread.dabr = 0;
1342 * Here are the old "legacy" powerpc specific getregs/setregs ptrace calls,
1343 * we mark them as obsolete now, they will be removed in a future version
1345 static long arch_ptrace_old(struct task_struct *child, long request, long addr,
1349 case PPC_PTRACE_GETREGS: /* Get GPRs 0 - 31. */
1350 return copy_regset_to_user(child, &user_ppc_native_view,
1351 REGSET_GPR, 0, 32 * sizeof(long),
1352 (void __user *) data);
1354 case PPC_PTRACE_SETREGS: /* Set GPRs 0 - 31. */
1355 return copy_regset_from_user(child, &user_ppc_native_view,
1356 REGSET_GPR, 0, 32 * sizeof(long),
1357 (const void __user *) data);
1359 case PPC_PTRACE_GETFPREGS: /* Get FPRs 0 - 31. */
1360 return copy_regset_to_user(child, &user_ppc_native_view,
1361 REGSET_FPR, 0, 32 * sizeof(double),
1362 (void __user *) data);
1364 case PPC_PTRACE_SETFPREGS: /* Set FPRs 0 - 31. */
1365 return copy_regset_from_user(child, &user_ppc_native_view,
1366 REGSET_FPR, 0, 32 * sizeof(double),
1367 (const void __user *) data);
1373 long arch_ptrace(struct task_struct *child, long request, long addr, long data)
1378 /* read the word at location addr in the USER area. */
1379 case PTRACE_PEEKUSR: {
1380 unsigned long index, tmp;
1383 /* convert to index and check */
1385 index = (unsigned long) addr >> 2;
1386 if ((addr & 3) || (index > PT_FPSCR)
1387 || (child->thread.regs == NULL))
1389 index = (unsigned long) addr >> 3;
1390 if ((addr & 7) || (index > PT_FPSCR))
1394 CHECK_FULL_REGS(child->thread.regs);
1395 if (index < PT_FPR0) {
1396 tmp = ptrace_get_reg(child, (int) index);
1398 flush_fp_to_thread(child);
1399 tmp = ((unsigned long *)child->thread.fpr)
1400 [TS_FPRWIDTH * (index - PT_FPR0)];
1402 ret = put_user(tmp,(unsigned long __user *) data);
1406 /* write the word at location addr in the USER area */
1407 case PTRACE_POKEUSR: {
1408 unsigned long index;
1411 /* convert to index and check */
1413 index = (unsigned long) addr >> 2;
1414 if ((addr & 3) || (index > PT_FPSCR)
1415 || (child->thread.regs == NULL))
1417 index = (unsigned long) addr >> 3;
1418 if ((addr & 7) || (index > PT_FPSCR))
1422 CHECK_FULL_REGS(child->thread.regs);
1423 if (index < PT_FPR0) {
1424 ret = ptrace_put_reg(child, index, data);
1426 flush_fp_to_thread(child);
1427 ((unsigned long *)child->thread.fpr)
1428 [TS_FPRWIDTH * (index - PT_FPR0)] = data;
1434 case PPC_PTRACE_GETHWDBGINFO: {
1435 struct ppc_debug_info dbginfo;
1437 dbginfo.version = 1;
1438 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
1439 dbginfo.num_instruction_bps = CONFIG_PPC_ADV_DEBUG_IACS;
1440 dbginfo.num_data_bps = CONFIG_PPC_ADV_DEBUG_DACS;
1441 dbginfo.num_condition_regs = CONFIG_PPC_ADV_DEBUG_DVCS;
1442 dbginfo.data_bp_alignment = 4;
1443 dbginfo.sizeof_condition = 4;
1444 dbginfo.features = PPC_DEBUG_FEATURE_INSN_BP_RANGE |
1445 PPC_DEBUG_FEATURE_INSN_BP_MASK;
1446 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1448 PPC_DEBUG_FEATURE_DATA_BP_RANGE |
1449 PPC_DEBUG_FEATURE_DATA_BP_MASK;
1451 #else /* !CONFIG_PPC_ADV_DEBUG_REGS */
1452 dbginfo.num_instruction_bps = 0;
1453 dbginfo.num_data_bps = 1;
1454 dbginfo.num_condition_regs = 0;
1456 dbginfo.data_bp_alignment = 8;
1458 dbginfo.data_bp_alignment = 4;
1460 dbginfo.sizeof_condition = 0;
1461 dbginfo.features = 0;
1462 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
1464 if (!access_ok(VERIFY_WRITE, data,
1465 sizeof(struct ppc_debug_info)))
1467 ret = __copy_to_user((struct ppc_debug_info __user *)data,
1468 &dbginfo, sizeof(struct ppc_debug_info)) ?
1473 case PPC_PTRACE_SETHWDEBUG: {
1474 struct ppc_hw_breakpoint bp_info;
1476 if (!access_ok(VERIFY_READ, data,
1477 sizeof(struct ppc_hw_breakpoint)))
1479 ret = __copy_from_user(&bp_info,
1480 (struct ppc_hw_breakpoint __user *)data,
1481 sizeof(struct ppc_hw_breakpoint)) ?
1484 ret = ppc_set_hwdebug(child, &bp_info);
1488 case PPC_PTRACE_DELHWDEBUG: {
1489 ret = ppc_del_hwdebug(child, addr, data);
1493 case PTRACE_GET_DEBUGREG: {
1495 /* We only support one DABR and no IABRS at the moment */
1498 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
1499 ret = put_user(child->thread.dac1,
1500 (unsigned long __user *)data);
1502 ret = put_user(child->thread.dabr,
1503 (unsigned long __user *)data);
1508 case PTRACE_SET_DEBUGREG:
1509 ret = ptrace_set_debugreg(child, addr, data);
1513 case PTRACE_GETREGS64:
1515 case PTRACE_GETREGS: /* Get all pt_regs from the child. */
1516 return copy_regset_to_user(child, &user_ppc_native_view,
1518 0, sizeof(struct pt_regs),
1519 (void __user *) data);
1522 case PTRACE_SETREGS64:
1524 case PTRACE_SETREGS: /* Set all gp regs in the child. */
1525 return copy_regset_from_user(child, &user_ppc_native_view,
1527 0, sizeof(struct pt_regs),
1528 (const void __user *) data);
1530 case PTRACE_GETFPREGS: /* Get the child FPU state (FPR0...31 + FPSCR) */
1531 return copy_regset_to_user(child, &user_ppc_native_view,
1533 0, sizeof(elf_fpregset_t),
1534 (void __user *) data);
1536 case PTRACE_SETFPREGS: /* Set the child FPU state (FPR0...31 + FPSCR) */
1537 return copy_regset_from_user(child, &user_ppc_native_view,
1539 0, sizeof(elf_fpregset_t),
1540 (const void __user *) data);
1542 #ifdef CONFIG_ALTIVEC
1543 case PTRACE_GETVRREGS:
1544 return copy_regset_to_user(child, &user_ppc_native_view,
1546 0, (33 * sizeof(vector128) +
1548 (void __user *) data);
1550 case PTRACE_SETVRREGS:
1551 return copy_regset_from_user(child, &user_ppc_native_view,
1553 0, (33 * sizeof(vector128) +
1555 (const void __user *) data);
1558 case PTRACE_GETVSRREGS:
1559 return copy_regset_to_user(child, &user_ppc_native_view,
1561 0, 32 * sizeof(double),
1562 (void __user *) data);
1564 case PTRACE_SETVSRREGS:
1565 return copy_regset_from_user(child, &user_ppc_native_view,
1567 0, 32 * sizeof(double),
1568 (const void __user *) data);
1571 case PTRACE_GETEVRREGS:
1572 /* Get the child spe register state. */
1573 return copy_regset_to_user(child, &user_ppc_native_view,
1574 REGSET_SPE, 0, 35 * sizeof(u32),
1575 (void __user *) data);
1577 case PTRACE_SETEVRREGS:
1578 /* Set the child spe register state. */
1579 return copy_regset_from_user(child, &user_ppc_native_view,
1580 REGSET_SPE, 0, 35 * sizeof(u32),
1581 (const void __user *) data);
1584 /* Old reverse args ptrace callss */
1585 case PPC_PTRACE_GETREGS: /* Get GPRs 0 - 31. */
1586 case PPC_PTRACE_SETREGS: /* Set GPRs 0 - 31. */
1587 case PPC_PTRACE_GETFPREGS: /* Get FPRs 0 - 31. */
1588 case PPC_PTRACE_SETFPREGS: /* Get FPRs 0 - 31. */
1589 ret = arch_ptrace_old(child, request, addr, data);
1593 ret = ptrace_request(child, request, addr, data);
1600 * We must return the syscall number to actually look up in the table.
1601 * This can be -1L to skip running any syscall at all.
1603 long do_syscall_trace_enter(struct pt_regs *regs)
1607 secure_computing(regs->gpr[0]);
1609 if (test_thread_flag(TIF_SYSCALL_TRACE) &&
1610 tracehook_report_syscall_entry(regs))
1612 * Tracing decided this syscall should not happen.
1613 * We'll return a bogus call number to get an ENOSYS
1614 * error, but leave the original number in regs->gpr[0].
1618 if (unlikely(current->audit_context)) {
1620 if (!test_thread_flag(TIF_32BIT))
1621 audit_syscall_entry(AUDIT_ARCH_PPC64,
1623 regs->gpr[3], regs->gpr[4],
1624 regs->gpr[5], regs->gpr[6]);
1627 audit_syscall_entry(AUDIT_ARCH_PPC,
1629 regs->gpr[3] & 0xffffffff,
1630 regs->gpr[4] & 0xffffffff,
1631 regs->gpr[5] & 0xffffffff,
1632 regs->gpr[6] & 0xffffffff);
1635 return ret ?: regs->gpr[0];
1638 void do_syscall_trace_leave(struct pt_regs *regs)
1642 if (unlikely(current->audit_context))
1643 audit_syscall_exit((regs->ccr&0x10000000)?AUDITSC_FAILURE:AUDITSC_SUCCESS,
1646 step = test_thread_flag(TIF_SINGLESTEP);
1647 if (step || test_thread_flag(TIF_SYSCALL_TRACE))
1648 tracehook_report_syscall_exit(regs, step);