1 #ifndef _ASM_POWERPC_BOOK3S_64_MMU_H_
2 #define _ASM_POWERPC_BOOK3S_64_MMU_H_
8 * shift : is the "PAGE_SHIFT" value for that page size
9 * sllp : is a bit mask with the value of SLB L || LP to be or'ed
10 * directly to a slbmte "vsid" value
11 * penc : is the HPTE encoding mask for the "LP" field:
14 struct mmu_psize_def {
15 unsigned int shift; /* number of bits */
16 int penc[MMU_PAGE_COUNT]; /* HPTE encoding */
17 unsigned int tlbiel; /* tlbiel supported for that page size */
18 unsigned long avpnm; /* bits to mask out in AVPN in the HPTE */
20 unsigned long sllp; /* SLB L||LP (exact mask to use in slbmte) */
21 unsigned long ap; /* Ap encoding used by PowerISA 3.0 */
24 extern struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];
26 #endif /* __ASSEMBLY__ */
28 /* 64-bit classic hash table MMU */
29 #include <asm/book3s/64/mmu-hash.h>
33 * ISA 3.0 partition and process table entry format
39 extern struct prtb_entry *process_tb;
45 extern struct patb_entry *partition_tb;
47 /* Bits in patb0 field */
48 #define PATB_HR (1UL << 63)
49 #define RPDB_MASK 0x0ffffffffffff00fUL
50 #define RPDB_SHIFT (1UL << 8)
51 #define RTS1_SHIFT 61 /* top 2 bits of radix tree size */
52 #define RTS1_MASK (3UL << RTS1_SHIFT)
53 #define RTS2_SHIFT 5 /* bottom 3 bits of radix tree size */
54 #define RTS2_MASK (7UL << RTS2_SHIFT)
55 #define RPDS_MASK 0x1f /* root page dir. size field */
57 /* Bits in patb1 field */
58 #define PATB_GR (1UL << 63) /* guest uses radix; must match HR */
59 #define PRTS_MASK 0x1f /* process table size field */
62 * Limit process table to PAGE_SIZE table. This
63 * also limit the max pid we can support.
64 * MAX_USER_CONTEXT * 16 bytes of space.
66 #define PRTB_SIZE_SHIFT (CONTEXT_BITS + 4)
68 * Power9 currently only support 64K partition table size.
70 #define PATB_SIZE_SHIFT 16
72 typedef unsigned long mm_context_id_t;
77 u16 user_psize; /* page size index */
79 #ifdef CONFIG_PPC_MM_SLICES
80 u64 low_slices_psize; /* SLB page size encodings */
81 unsigned char high_slices_psize[SLICE_ARRAY_SIZE];
83 u16 sllp; /* SLB page size encoding */
85 unsigned long vdso_base;
86 #ifdef CONFIG_PPC_SUBPAGE_PROT
87 struct subpage_prot_table spt;
88 #endif /* CONFIG_PPC_SUBPAGE_PROT */
89 #ifdef CONFIG_PPC_ICSWX
90 struct spinlock *cop_lockp; /* guard acop and cop_pid */
91 unsigned long acop; /* mask of enabled coprocessor types */
92 unsigned int cop_pid; /* pid value used with coprocessors */
93 #endif /* CONFIG_PPC_ICSWX */
94 #ifdef CONFIG_PPC_64K_PAGES
95 /* for 4K PTE fragment support */
98 #ifdef CONFIG_SPAPR_TCE_IOMMU
99 struct list_head iommu_group_mem_list;
104 * The current system page and segment sizes
106 extern int mmu_linear_psize;
107 extern int mmu_virtual_psize;
108 extern int mmu_vmalloc_psize;
109 extern int mmu_vmemmap_psize;
110 extern int mmu_io_psize;
112 /* MMU initialization */
113 void mmu_early_init_devtree(void);
114 void hash__early_init_devtree(void);
115 void radix__early_init_devtree(void);
116 extern void radix_init_native(void);
117 extern void hash__early_init_mmu(void);
118 extern void radix__early_init_mmu(void);
119 static inline void early_init_mmu(void)
122 return radix__early_init_mmu();
123 return hash__early_init_mmu();
125 extern void hash__early_init_mmu_secondary(void);
126 extern void radix__early_init_mmu_secondary(void);
127 static inline void early_init_mmu_secondary(void)
130 return radix__early_init_mmu_secondary();
131 return hash__early_init_mmu_secondary();
134 extern void hash__setup_initial_memory_limit(phys_addr_t first_memblock_base,
135 phys_addr_t first_memblock_size);
136 extern void radix__setup_initial_memory_limit(phys_addr_t first_memblock_base,
137 phys_addr_t first_memblock_size);
138 static inline void setup_initial_memory_limit(phys_addr_t first_memblock_base,
139 phys_addr_t first_memblock_size)
141 if (early_radix_enabled())
142 return radix__setup_initial_memory_limit(first_memblock_base,
143 first_memblock_size);
144 return hash__setup_initial_memory_limit(first_memblock_base,
145 first_memblock_size);
148 extern int (*register_process_table)(unsigned long base, unsigned long page_size,
149 unsigned long tbl_size);
151 #ifdef CONFIG_PPC_PSERIES
152 extern void radix_init_pseries(void);
154 static inline void radix_init_pseries(void) { };
157 #endif /* __ASSEMBLY__ */
158 #endif /* _ASM_POWERPC_BOOK3S_64_MMU_H_ */