arch/powerpc/boot/dts/katmai.dts

   1 /*
   2  * Device Tree Source for AMCC Katmai eval board
   3  *
   4  * Copyright (c) 2006, 2007 IBM Corp.
   5  * Benjamin Herrenschmidt <benh@kernel.crashing.org>
   6  *
   7  * Copyright (c) 2006, 2007 IBM Corp.
   8  * Josh Boyer <jwboyer@linux.vnet.ibm.com>
   9  *
  10  * This file is licensed under the terms of the GNU General Public
  11  * License version 2.  This program is licensed "as is" without
  12  * any warranty of any kind, whether express or implied.
  13  */
  14
  15 /dts-v1/;
  16
  17 / {
  18         #address-cells = <2>;
  19         #size-cells = <2>;
  20         model = "amcc,katmai";
  21         compatible = "amcc,katmai";
  22         dcr-parent = <&{/cpus/cpu@0}>;
  23
  24         aliases {
  25                 ethernet0 = &EMAC0;
  26                 serial0 = &UART0;
  27                 serial1 = &UART1;
  28                 serial2 = &UART2;
  29         };
  30
  31         cpus {
  32                 #address-cells = <1>;
  33                 #size-cells = <0>;
  34
  35                 cpu@0 {
  36                         device_type = "cpu";
  37                         model = "PowerPC,440SPe";
  38                         reg = <0x00000000>;
  39                         clock-frequency = <0>; /* Filled in by zImage */
  40                         timebase-frequency = <0>; /* Filled in by zImage */
  41                         i-cache-line-size = <32>;
  42                         d-cache-line-size = <32>;
  43                         i-cache-size = <32768>;
  44                         d-cache-size = <32768>;
  45                         dcr-controller;
  46                         dcr-access-method = "native";
  47                 };
  48         };
  49
  50         memory {
  51                 device_type = "memory";
  52                 reg = <0x0 0x00000000 0x0 0x00000000>; /* Filled in by U-Boot */
  53         };
  54
  55         UIC0: interrupt-controller0 {
  56                 compatible = "ibm,uic-440spe","ibm,uic";
  57                 interrupt-controller;
  58                 cell-index = <0>;
  59                 dcr-reg = <0x0c0 0x009>;
  60                 #address-cells = <0>;
  61                 #size-cells = <0>;
  62                 #interrupt-cells = <2>;
  63         };
  64
  65         UIC1: interrupt-controller1 {
  66                 compatible = "ibm,uic-440spe","ibm,uic";
  67                 interrupt-controller;
  68                 cell-index = <1>;
  69                 dcr-reg = <0x0d0 0x009>;
  70                 #address-cells = <0>;
  71                 #size-cells = <0>;
  72                 #interrupt-cells = <2>;
  73                 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
  74                 interrupt-parent = <&UIC0>;
  75         };
  76
  77         UIC2: interrupt-controller2 {
  78                 compatible = "ibm,uic-440spe","ibm,uic";
  79                 interrupt-controller;
  80                 cell-index = <2>;
  81                 dcr-reg = <0x0e0 0x009>;
  82                 #address-cells = <0>;
  83                 #size-cells = <0>;
  84                 #interrupt-cells = <2>;
  85                 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
  86                 interrupt-parent = <&UIC0>;
  87         };
  88
  89         UIC3: interrupt-controller3 {
  90                 compatible = "ibm,uic-440spe","ibm,uic";
  91                 interrupt-controller;
  92                 cell-index = <3>;
  93                 dcr-reg = <0x0f0 0x009>;
  94                 #address-cells = <0>;
  95                 #size-cells = <0>;
  96                 #interrupt-cells = <2>;
  97                 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
  98                 interrupt-parent = <&UIC0>;
  99         };
 100
 101         SDR0: sdr {
 102                 compatible = "ibm,sdr-440spe";
 103                 dcr-reg = <0x00e 0x002>;
 104         };
 105
 106         CPR0: cpr {
 107                 compatible = "ibm,cpr-440spe";
 108                 dcr-reg = <0x00c 0x002>;
 109         };
 110
 111         MQ0: mq {
 112                 compatible = "ibm,mq-440spe";
 113                 dcr-reg = <0x040 0x020>;
 114         };
 115
 116         plb {
 117                 compatible = "ibm,plb-440spe", "ibm,plb-440gp", "ibm,plb4";
 118                 #address-cells = <2>;
 119                 #size-cells = <1>;
 120                 /*        addr-child     addr-parent    size */
 121                 ranges = <0x4 0x00100000 0x4 0x00100000 0x00001000
 122                           0x4 0x00200000 0x4 0x00200000 0x00000400
 123                           0x4 0xe0000000 0x4 0xe0000000 0x20000000
 124                           0xc 0x00000000 0xc 0x00000000 0x20000000
 125                           0xd 0x00000000 0xd 0x00000000 0x80000000
 126                           0xd 0x80000000 0xd 0x80000000 0x80000000
 127                           0xe 0x00000000 0xe 0x00000000 0x80000000
 128                           0xe 0x80000000 0xe 0x80000000 0x80000000
 129                           0xf 0x00000000 0xf 0x00000000 0x80000000
 130                           0xf 0x80000000 0xf 0x80000000 0x80000000>;
 131                 clock-frequency = <0>; /* Filled in by zImage */
 132
 133                 SDRAM0: sdram {
 134                         compatible = "ibm,sdram-440spe", "ibm,sdram-405gp";
 135                         dcr-reg = <0x010 0x002>;
 136                 };
 137
 138                 MAL0: mcmal {
 139                         compatible = "ibm,mcmal-440spe", "ibm,mcmal2";
 140                         dcr-reg = <0x180 0x062>;
 141                         num-tx-chans = <2>;
 142                         num-rx-chans = <1>;
 143                         interrupt-parent = <&MAL0>;
 144                         interrupts = <0x0 0x1 0x2 0x3 0x4>;
 145                         #interrupt-cells = <1>;
 146                         #address-cells = <0>;
 147                         #size-cells = <0>;
 148                         interrupt-map = </*TXEOB*/ 0x0 &UIC1 0x6 0x4
 149                                          /*RXEOB*/ 0x1 &UIC1 0x7 0x4
 150                                          /*SERR*/  0x2 &UIC1 0x1 0x4
 151                                          /*TXDE*/  0x3 &UIC1 0x2 0x4
 152                                          /*RXDE*/  0x4 &UIC1 0x3 0x4>;
 153                 };
 154
 155                 POB0: opb {
 156                         compatible = "ibm,opb-440spe", "ibm,opb-440gp", "ibm,opb";
 157                         #address-cells = <1>;
 158                         #size-cells = <1>;
 159                         ranges = <0x00000000 0x00000004 0xe0000000 0x20000000>;
 160                         clock-frequency = <0>; /* Filled in by zImage */
 161
 162                         EBC0: ebc {
 163                                 compatible = "ibm,ebc-440spe", "ibm,ebc-440gp", "ibm,ebc";
 164                                 dcr-reg = <0x012 0x002>;
 165                                 #address-cells = <2>;
 166                                 #size-cells = <1>;
 167                                 clock-frequency = <0>; /* Filled in by zImage */
 168                                 interrupts = <0x5 0x1>;
 169                                 interrupt-parent = <&UIC1>;
 170                         };
 171
 172                         UART0: serial@10000200 {
 173                                 device_type = "serial";
 174                                 compatible = "ns16550";
 175                                 reg = <0x10000200 0x00000008>;
 176                                 virtual-reg = <0xa0000200>;
 177                                 clock-frequency = <0>; /* Filled in by zImage */
 178                                 current-speed = <115200>;
 179                                 interrupt-parent = <&UIC0>;
 180                                 interrupts = <0x0 0x4>;
 181                         };
 182
 183                         UART1: serial@10000300 {
 184                                 device_type = "serial";
 185                                 compatible = "ns16550";
 186                                 reg = <0x10000300 0x00000008>;
 187                                 virtual-reg = <0xa0000300>;
 188                                 clock-frequency = <0>;
 189                                 current-speed = <0>;
 190                                 interrupt-parent = <&UIC0>;
 191                                 interrupts = <0x1 0x4>;
 192                         };
 193
 194
 195                         UART2: serial@10000600 {
 196                                 device_type = "serial";
 197                                 compatible = "ns16550";
 198                                 reg = <0x10000600 0x00000008>;
 199                                 virtual-reg = <0xa0000600>;
 200                                 clock-frequency = <0>;
 201                                 current-speed = <0>;
 202                                 interrupt-parent = <&UIC1>;
 203                                 interrupts = <0x5 0x4>;
 204                         };
 205
 206                         IIC0: i2c@10000400 {
 207                                 compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic";
 208                                 reg = <0x10000400 0x00000014>;
 209                                 interrupt-parent = <&UIC0>;
 210                                 interrupts = <0x2 0x4>;
 211                         };
 212
 213                         IIC1: i2c@10000500 {
 214                                 compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic";
 215                                 reg = <0x10000500 0x00000014>;
 216                                 interrupt-parent = <&UIC0>;
 217                                 interrupts = <0x3 0x4>;
 218                         };
 219
 220                         EMAC0: ethernet@10000800 {
 221                                 linux,network-index = <0x0>;
 222                                 device_type = "network";
 223                                 compatible = "ibm,emac-440spe", "ibm,emac4";
 224                                 interrupt-parent = <&UIC1>;
 225                                 interrupts = <0x1c 0x4 0x1d 0x4>;
 226                                 reg = <0x10000800 0x00000074>;
 227                                 local-mac-address = [000000000000];
 228                                 mal-device = <&MAL0>;
 229                                 mal-tx-channel = <0>;
 230                                 mal-rx-channel = <0>;
 231                                 cell-index = <0>;
 232                                 max-frame-size = <9000>;
 233                                 rx-fifo-size = <4096>;
 234                                 tx-fifo-size = <2048>;
 235                                 phy-mode = "gmii";
 236                                 phy-map = <0x00000000>;
 237                                 has-inverted-stacr-oc;
 238                                 has-new-stacr-staopc;
 239                         };
 240                 };
 241
 242                 PCIX0: pci@c0ec00000 {
 243                         device_type = "pci";
 244                         #interrupt-cells = <1>;
 245                         #size-cells = <2>;
 246                         #address-cells = <3>;
 247                         compatible = "ibm,plb-pcix-440spe", "ibm,plb-pcix";
 248                         primary;
 249                         large-inbound-windows;
 250                         enable-msi-hole;
 251                         reg = <0x0000000c 0x0ec00000   0x00000008       /* Config space access */
 252                                0x00000000 0x00000000 0x00000000         /* no IACK cycles */
 253                                0x0000000c 0x0ed00000   0x00000004   /* Special cycles */
 254                                0x0000000c 0x0ec80000 0x00000100 /* Internal registers */
 255                                0x0000000c 0x0ec80100  0x000000fc>;      /* Internal messaging registers */
 256
 257                         /* Outbound ranges, one memory and one IO,
 258                          * later cannot be changed
 259                          */
 260                         ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000
 261                                   0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>;
 262
 263                         /* Inbound 4GB range starting at 0 */
 264                         dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
 265
 266                         /* This drives busses 0 to 0xf */
 267                         bus-range = <0x0 0xf>;
 268
 269                         /*
 270                          * On Katmai, the following PCI-X interrupts signals
 271                          * have to be enabled via jumpers (only INTA is
 272                          * enabled per default):
 273                          *
 274                          * INTB: J3: 1-2
 275                          * INTC: J2: 1-2
 276                          * INTD: J1: 1-2
 277                          */
 278                         interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 279                         interrupt-map = <
 280                                 /* IDSEL 1 */
 281                                 0x800 0x0 0x0 0x1 &UIC1 0x14 0x8
 282                                 0x800 0x0 0x0 0x2 &UIC1 0x13 0x8
 283                                 0x800 0x0 0x0 0x3 &UIC1 0x12 0x8
 284                                 0x800 0x0 0x0 0x4 &UIC1 0x11 0x8
 285                         >;
 286                 };
 287
 288                 PCIE0: pciex@d00000000 {
 289                         device_type = "pci";
 290                         #interrupt-cells = <1>;
 291                         #size-cells = <2>;
 292                         #address-cells = <3>;
 293                         compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex";
 294                         primary;
 295                         port = <0x0>; /* port number */
 296                         reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */
 297                                0x0000000c 0x10000000 0x00001000>;       /* Registers */
 298                         dcr-reg = <0x100 0x020>;
 299                         sdr-base = <0x300>;
 300
 301                         /* Outbound ranges, one memory and one IO,
 302                          * later cannot be changed
 303                          */
 304                         ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000
 305                                   0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
 306
 307                         /* Inbound 4GB range starting at 0 */
 308                         dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
 309
 310                         /* This drives busses 0x10 to 0x1f */
 311                         bus-range = <0x10 0x1f>;
 312
 313                         /* Legacy interrupts (note the weird polarity, the bridge seems
 314                          * to invert PCIe legacy interrupts).
 315                          * We are de-swizzling here because the numbers are actually for
 316                          * port of the root complex virtual P2P bridge. But I want
 317                          * to avoid putting a node for it in the tree, so the numbers
 318                          * below are basically de-swizzled numbers.
 319                          * The real slot is on idsel 0, so the swizzling is 1:1
 320                          */
 321                         interrupt-map-mask = <0x0 0x0 0x0 0x7>;
 322                         interrupt-map = <
 323                                 0x0 0x0 0x0 0x1 &UIC3 0x0 0x4 /* swizzled int A */
 324                                 0x0 0x0 0x0 0x2 &UIC3 0x1 0x4 /* swizzled int B */
 325                                 0x0 0x0 0x0 0x3 &UIC3 0x2 0x4 /* swizzled int C */
 326                                 0x0 0x0 0x0 0x4 &UIC3 0x3 0x4 /* swizzled int D */>;
 327                 };
 328
 329                 PCIE1: pciex@d20000000 {
 330                         device_type = "pci";
 331                         #interrupt-cells = <1>;
 332                         #size-cells = <2>;
 333                         #address-cells = <3>;
 334                         compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex";
 335                         primary;
 336                         port = <0x1>; /* port number */
 337                         reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */
 338                                0x0000000c 0x10001000 0x00001000>;       /* Registers */
 339                         dcr-reg = <0x120 0x020>;
 340                         sdr-base = <0x340>;
 341
 342                         /* Outbound ranges, one memory and one IO,
 343                          * later cannot be changed
 344                          */
 345                         ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000
 346                                   0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>;
 347
 348                         /* Inbound 4GB range starting at 0 */
 349                         dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
 350
 351                         /* This drives busses 0x20 to 0x2f */
 352                         bus-range = <0x20 0x2f>;
 353
 354                         /* Legacy interrupts (note the weird polarity, the bridge seems
 355                          * to invert PCIe legacy interrupts).
 356                          * We are de-swizzling here because the numbers are actually for
 357                          * port of the root complex virtual P2P bridge. But I want
 358                          * to avoid putting a node for it in the tree, so the numbers
 359                          * below are basically de-swizzled numbers.
 360                          * The real slot is on idsel 0, so the swizzling is 1:1
 361                          */
 362                         interrupt-map-mask = <0x0 0x0 0x0 0x7>;
 363                         interrupt-map = <
 364                                 0x0 0x0 0x0 0x1 &UIC3 0x4 0x4 /* swizzled int A */
 365                                 0x0 0x0 0x0 0x2 &UIC3 0x5 0x4 /* swizzled int B */
 366                                 0x0 0x0 0x0 0x3 &UIC3 0x6 0x4 /* swizzled int C */
 367                                 0x0 0x0 0x0 0x4 &UIC3 0x7 0x4 /* swizzled int D */>;
 368                 };
 369
 370                 PCIE2: pciex@d40000000 {
 371                         device_type = "pci";
 372                         #interrupt-cells = <1>;
 373                         #size-cells = <2>;
 374                         #address-cells = <3>;
 375                         compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex";
 376                         primary;
 377                         port = <0x2>; /* port number */
 378                         reg = <0x0000000d 0x40000000 0x20000000 /* Config space access */
 379                                0x0000000c 0x10002000 0x00001000>;       /* Registers */
 380                         dcr-reg = <0x140 0x020>;
 381                         sdr-base = <0x370>;
 382
 383                         /* Outbound ranges, one memory and one IO,
 384                          * later cannot be changed
 385                          */
 386                         ranges = <0x02000000 0x00000000 0x80000000 0x0000000f 0x00000000 0x00000000 0x80000000
 387                                   0x01000000 0x00000000 0x00000000 0x0000000f 0x80020000 0x00000000 0x00010000>;
 388
 389                         /* Inbound 4GB range starting at 0 */
 390                         dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
 391
 392                         /* This drives busses 0x30 to 0x3f */
 393                         bus-range = <0x30 0x3f>;
 394
 395                         /* Legacy interrupts (note the weird polarity, the bridge seems
 396                          * to invert PCIe legacy interrupts).
 397                          * We are de-swizzling here because the numbers are actually for
 398                          * port of the root complex virtual P2P bridge. But I want
 399                          * to avoid putting a node for it in the tree, so the numbers
 400                          * below are basically de-swizzled numbers.
 401                          * The real slot is on idsel 0, so the swizzling is 1:1
 402                          */
 403                         interrupt-map-mask = <0x0 0x0 0x0 0x7>;
 404                         interrupt-map = <
 405                                 0x0 0x0 0x0 0x1 &UIC3 0x8 0x4 /* swizzled int A */
 406                                 0x0 0x0 0x0 0x2 &UIC3 0x9 0x4 /* swizzled int B */
 407                                 0x0 0x0 0x0 0x3 &UIC3 0xa 0x4 /* swizzled int C */
 408                                 0x0 0x0 0x0 0x4 &UIC3 0xb 0x4 /* swizzled int D */>;
 409                 };
 410
 411                 I2O: i2o@400100000 {
 412                         compatible = "ibm,i2o-440spe";
 413                         reg = <0x00000004 0x00100000 0x100>;
 414                         dcr-reg = <0x060 0x020>;
 415                 };
 416
 417                 DMA0: dma0@400100100 {
 418                         compatible = "ibm,dma-440spe";
 419                         cell-index = <0>;
 420                         reg = <0x00000004 0x00100100 0x100>;
 421                         dcr-reg = <0x060 0x020>;
 422                         interrupt-parent = <&DMA0>;
 423                         interrupts = <0 1>;
 424                         #interrupt-cells = <1>;
 425                         #address-cells = <0>;
 426                         #size-cells = <0>;
 427                         interrupt-map = <
 428                                 0 &UIC0 0x14 4
 429                                 1 &UIC1 0x16 4>;
 430                 };
 431
 432                 DMA1: dma1@400100200 {
 433                         compatible = "ibm,dma-440spe";
 434                         cell-index = <1>;
 435                         reg = <0x00000004 0x00100200 0x100>;
 436                         dcr-reg = <0x060 0x020>;
 437                         interrupt-parent = <&DMA1>;
 438                         interrupts = <0 1>;
 439                         #interrupt-cells = <1>;
 440                         #address-cells = <0>;
 441                         #size-cells = <0>;
 442                         interrupt-map = <
 443                                 0 &UIC0 0x16 4
 444                                 1 &UIC1 0x16 4>;
 445                 };
 446
 447                 xor-accel@400200000 {
 448                         compatible = "amcc,xor-accelerator";
 449                         reg = <0x00000004 0x00200000 0x400>;
 450                         interrupt-parent = <&UIC1>;
 451                         interrupts = <0x1f 4>;
 452                 };
 453         };
 454
 455         chosen {
 456                 linux,stdout-path = "/plb/opb/serial@10000200";
 457         };
 458 };