1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __PARISC_SPECIAL_INSNS_H
3 #define __PARISC_SPECIAL_INSNS_H
7 __asm__ __volatile__( \
9 "8:\tlpa %%r0(%1),%0\n" \
11 ASM_EXCEPTIONTABLE_ENTRY(8b, 9b) \
19 #define lpa_user(va) ({ \
21 __asm__ __volatile__( \
23 "8:\tlpa %%r0(%%sr3,%1),%0\n" \
25 ASM_EXCEPTIONTABLE_ENTRY(8b, 9b) \
33 #define CR_EIEM 15 /* External Interrupt Enable Mask */
34 #define CR_CR16 16 /* CR16 Interval Timer */
35 #define CR_EIRR 23 /* External Interrupt Request Register */
37 #define mfctl(reg) ({ \
39 __asm__ __volatile__( \
41 "=r" (cr) : "i" (reg) \
46 #define mtctl(gr, cr) \
47 __asm__ __volatile__("mtctl %0,%1" \
49 : "r" (gr), "i" (cr) : "memory")
51 #define get_eiem() mfctl(CR_EIEM)
52 #define set_eiem(val) mtctl(val, CR_EIEM)
54 #define mfsp(reg) ({ \
56 __asm__ __volatile__( \
58 : "=r" (cr) : "i"(reg) \
63 #define mtsp(val, cr) \
64 { if (__builtin_constant_p(val) && ((val) == 0)) \
65 __asm__ __volatile__("mtsp %%r0,%0" : : "i" (cr) : "memory"); \
67 __asm__ __volatile__("mtsp %0,%1" \
69 : "r" (val), "i" (cr) : "memory"); }
71 #endif /* __PARISC_SPECIAL_INSNS_H */