3 select ARCH_HAS_SYNC_DMA_FOR_CPU
4 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
5 select ARCH_USE_BUILTIN_BSWAP
6 select ARCH_USE_QUEUED_RWLOCKS if NR_CPUS>2
11 select DMA_NONCOHERENT_OPS
13 select HANDLE_DOMAIN_IRQ
14 select DW_APB_TIMER_OF
15 select GENERIC_LIB_ASHLDI3
16 select GENERIC_LIB_ASHRDI3
17 select GENERIC_LIB_LSHRDI3
18 select GENERIC_LIB_MULDI3
19 select GENERIC_LIB_CMPDI2
20 select GENERIC_LIB_UCMPDI2
21 select GENERIC_ALLOCATOR
22 select GENERIC_ATOMIC64
23 select GENERIC_CLOCKEVENTS
24 select GENERIC_CPU_DEVICES
25 select GENERIC_IRQ_CHIP
26 select GENERIC_IRQ_PROBE
27 select GENERIC_IRQ_SHOW
28 select GENERIC_IRQ_MULTI_HANDLER
29 select GENERIC_SCHED_CLOCK
30 select GENERIC_SMP_IDLE_THREAD
31 select HAVE_ARCH_TRACEHOOK
32 select HAVE_GENERIC_DMA_COHERENT
33 select HAVE_KERNEL_GZIP
34 select HAVE_KERNEL_LZO
35 select HAVE_KERNEL_LZMA
36 select HAVE_C_RECORDMCOUNT
37 select HAVE_DMA_API_DEBUG
38 select HAVE_DMA_CONTIGUOUS
40 select MAY_HAVE_SPARSE_IRQ
41 select MODULES_USE_ELF_RELA if MODULES
43 select OF_EARLY_FLATTREE
44 select OF_RESERVED_MEM
45 select PERF_USE_VMALLOC
48 select USB_ARCH_HAS_EHCI
49 select USB_ARCH_HAS_OHCI
51 config CPU_HAS_CACHEV2
66 For SMP, CPU needs "ldex&stex" instrcutions to atomic operations.
68 config CPU_NEED_TLBSYNC
71 config CPU_NEED_SOFTALIGN
74 config CPU_NO_USER_BKPT
77 For abiv2 we couldn't use "trap 1" as user space bkpt in gdbserver, because
78 abiv2 is 16/32bit instruction set and "trap 1" is 32bit.
79 So we need a 16bit instruction as user space bkpt, and it will cause an illegal
80 instruction exception.
81 In kernel we parse the *regs->pc to determine whether to send SIGTRAP or not.
83 config GENERIC_CALIBRATE_DELAY
89 config GENERIC_HWEIGHT
95 config RWSEM_GENERIC_SPINLOCK
101 config TRACE_IRQFLAGS_SUPPORT
106 default "128" if (CPU_CK610 || CPU_CK807 || CPU_CK810)
107 default "1024" if (CPU_CK860)
111 default "8" if (CPU_CK610 || CPU_CK807 || CPU_CK810)
112 default "12" if (CPU_CK860)
114 config L1_CACHE_SHIFT
116 default "4" if (CPU_CK610)
117 default "5" if (CPU_CK807 || CPU_CK810)
118 default "6" if (CPU_CK860)
120 menu "Processor type and features"
127 bool "CSKY CPU ck610"
128 select CPU_NEED_TLBSYNC
129 select CPU_NEED_SOFTALIGN
130 select CPU_NO_USER_BKPT
133 bool "CSKY CPU ck810"
135 select CPU_NEED_TLBSYNC
138 bool "CSKY CPU ck807"
142 bool "CSKY CPU ck860"
144 select CPU_HAS_CACHEV2
145 select CPU_HAS_LDSTEX
150 prompt "Power Manager Instruction (wait/doze/stop)"
167 bool "CPU has VDSP coprocessor"
168 depends on CPU_HAS_FPU && CPU_HAS_FPUV2
171 bool "CPU has FPU coprocessor"
172 depends on CPU_CK807 || CPU_CK810 || CPU_CK860
175 bool "CPU has Trusted Execution Environment"
179 bool "Symmetric Multi-Processing (SMP) support for C-SKY"
184 int "Maximum number of CPUs (2-32)"
190 bool "High Memory Support"
191 depends on !CPU_CK610
194 config FORCE_MAX_ZONEORDER
195 int "Maximum zone order"
199 hex "DRAM start addr (the same with memory-section in dts)"
204 source "kernel/Kconfig.hz"