arch/arm64/boot/dts/renesas/r8a77970.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the R-Car V3M (R8A77970) SoC
   4  *
   5  * Copyright (C) 2016-2017 Renesas Electronics Corp.
   6  * Copyright (C) 2017 Cogent Embedded, Inc.
   7  */
   8
   9 #include <dt-bindings/clock/r8a77970-cpg-mssr.h>
  10 #include <dt-bindings/interrupt-controller/arm-gic.h>
  11 #include <dt-bindings/interrupt-controller/irq.h>
  12 #include <dt-bindings/power/r8a77970-sysc.h>
  13
  14 / {
  15         compatible = "renesas,r8a77970";
  16         #address-cells = <2>;
  17         #size-cells = <2>;
  18
  19         /* External CAN clock - to be overridden by boards that provide it */
  20         can_clk: can {
  21                 compatible = "fixed-clock";
  22                 #clock-cells = <0>;
  23                 clock-frequency = <0>;
  24         };
  25
  26         cpus {
  27                 #address-cells = <1>;
  28                 #size-cells = <0>;
  29
  30                 a53_0: cpu@0 {
  31                         device_type = "cpu";
  32                         compatible = "arm,cortex-a53";
  33                         reg = <0>;
  34                         clocks = <&cpg CPG_CORE R8A77970_CLK_Z2>;
  35                         power-domains = <&sysc R8A77970_PD_CA53_CPU0>;
  36                         next-level-cache = <&L2_CA53>;
  37                         enable-method = "psci";
  38                 };
  39
  40                 a53_1: cpu@1 {
  41                         device_type = "cpu";
  42                         compatible = "arm,cortex-a53";
  43                         reg = <1>;
  44                         clocks = <&cpg CPG_CORE R8A77970_CLK_Z2>;
  45                         power-domains = <&sysc R8A77970_PD_CA53_CPU1>;
  46                         next-level-cache = <&L2_CA53>;
  47                         enable-method = "psci";
  48                 };
  49
  50                 L2_CA53: cache-controller {
  51                         compatible = "cache";
  52                         power-domains = <&sysc R8A77970_PD_CA53_SCU>;
  53                         cache-unified;
  54                         cache-level = <2>;
  55                 };
  56         };
  57
  58         extal_clk: extal {
  59                 compatible = "fixed-clock";
  60                 #clock-cells = <0>;
  61                 /* This value must be overridden by the board */
  62                 clock-frequency = <0>;
  63         };
  64
  65         extalr_clk: extalr {
  66                 compatible = "fixed-clock";
  67                 #clock-cells = <0>;
  68                 /* This value must be overridden by the board */
  69                 clock-frequency = <0>;
  70         };
  71
  72         pmu_a53 {
  73                 compatible = "arm,cortex-a53-pmu";
  74                 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
  75                                       <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
  76                 interrupt-affinity = <&a53_0>, <&a53_1>;
  77         };
  78
  79         psci {
  80                 compatible = "arm,psci-1.0", "arm,psci-0.2";
  81                 method = "smc";
  82         };
  83
  84         /* External SCIF clock - to be overridden by boards that provide it */
  85         scif_clk: scif {
  86                 compatible = "fixed-clock";
  87                 #clock-cells = <0>;
  88                 clock-frequency = <0>;
  89         };
  90
  91         soc {
  92                 compatible = "simple-bus";
  93                 interrupt-parent = <&gic>;
  94
  95                 #address-cells = <2>;
  96                 #size-cells = <2>;
  97                 ranges;
  98
  99                 rwdt: watchdog@e6020000 {
 100                         compatible = "renesas,r8a77970-wdt",
 101                                      "renesas,rcar-gen3-wdt";
 102                         reg = <0 0xe6020000 0 0x0c>;
 103                         interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
 104                         clocks = <&cpg CPG_MOD 402>;
 105                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 106                         resets = <&cpg 402>;
 107                         status = "disabled";
 108                 };
 109
 110                 gpio0: gpio@e6050000 {
 111                         compatible = "renesas,gpio-r8a77970",
 112                                      "renesas,rcar-gen3-gpio";
 113                         reg = <0 0xe6050000 0 0x50>;
 114                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 115                         #gpio-cells = <2>;
 116                         gpio-controller;
 117                         gpio-ranges = <&pfc 0 0 22>;
 118                         #interrupt-cells = <2>;
 119                         interrupt-controller;
 120                         clocks = <&cpg CPG_MOD 912>;
 121                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 122                         resets = <&cpg 912>;
 123                 };
 124
 125                 gpio1: gpio@e6051000 {
 126                         compatible = "renesas,gpio-r8a77970",
 127                                      "renesas,rcar-gen3-gpio";
 128                         reg = <0 0xe6051000 0 0x50>;
 129                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 130                         #gpio-cells = <2>;
 131                         gpio-controller;
 132                         gpio-ranges = <&pfc 0 32 28>;
 133                         #interrupt-cells = <2>;
 134                         interrupt-controller;
 135                         clocks = <&cpg CPG_MOD 911>;
 136                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 137                         resets = <&cpg 911>;
 138                 };
 139
 140                 gpio2: gpio@e6052000 {
 141                         compatible = "renesas,gpio-r8a77970",
 142                                      "renesas,rcar-gen3-gpio";
 143                         reg = <0 0xe6052000 0 0x50>;
 144                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 145                         #gpio-cells = <2>;
 146                         gpio-controller;
 147                         gpio-ranges = <&pfc 0 64 17>;
 148                         #interrupt-cells = <2>;
 149                         interrupt-controller;
 150                         clocks = <&cpg CPG_MOD 910>;
 151                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 152                         resets = <&cpg 910>;
 153                 };
 154
 155                 gpio3: gpio@e6053000 {
 156                         compatible = "renesas,gpio-r8a77970",
 157                                      "renesas,rcar-gen3-gpio";
 158                         reg = <0 0xe6053000 0 0x50>;
 159                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 160                         #gpio-cells = <2>;
 161                         gpio-controller;
 162                         gpio-ranges = <&pfc 0 96 17>;
 163                         #interrupt-cells = <2>;
 164                         interrupt-controller;
 165                         clocks = <&cpg CPG_MOD 909>;
 166                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 167                         resets = <&cpg 909>;
 168                 };
 169
 170                 gpio4: gpio@e6054000 {
 171                         compatible = "renesas,gpio-r8a77970",
 172                                      "renesas,rcar-gen3-gpio";
 173                         reg = <0 0xe6054000 0 0x50>;
 174                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 175                         #gpio-cells = <2>;
 176                         gpio-controller;
 177                         gpio-ranges = <&pfc 0 128 6>;
 178                         #interrupt-cells = <2>;
 179                         interrupt-controller;
 180                         clocks = <&cpg CPG_MOD 908>;
 181                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 182                         resets = <&cpg 908>;
 183                 };
 184
 185                 gpio5: gpio@e6055000 {
 186                         compatible = "renesas,gpio-r8a77970",
 187                                      "renesas,rcar-gen3-gpio";
 188                         reg = <0 0xe6055000 0 0x50>;
 189                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 190                         #gpio-cells = <2>;
 191                         gpio-controller;
 192                         gpio-ranges = <&pfc 0 160 15>;
 193                         #interrupt-cells = <2>;
 194                         interrupt-controller;
 195                         clocks = <&cpg CPG_MOD 907>;
 196                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 197                         resets = <&cpg 907>;
 198                 };
 199
 200                 pfc: pinctrl@e6060000 {
 201                         compatible = "renesas,pfc-r8a77970";
 202                         reg = <0 0xe6060000 0 0x504>;
 203                 };
 204
 205                 cmt0: timer@e60f0000 {
 206                         compatible = "renesas,r8a77970-cmt0",
 207                                      "renesas,rcar-gen3-cmt0";
 208                         reg = <0 0xe60f0000 0 0x1004>;
 209                         interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
 210                                      <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
 211                         clocks = <&cpg CPG_MOD 303>;
 212                         clock-names = "fck";
 213                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 214                         resets = <&cpg 303>;
 215                         status = "disabled";
 216                 };
 217
 218                 cmt1: timer@e6130000 {
 219                         compatible = "renesas,r8a77970-cmt1",
 220                                      "renesas,rcar-gen3-cmt1";
 221                         reg = <0 0xe6130000 0 0x1004>;
 222                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
 223                                      <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
 224                                      <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
 225                                      <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
 226                                      <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
 227                                      <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
 228                                      <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
 229                                      <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
 230                         clocks = <&cpg CPG_MOD 302>;
 231                         clock-names = "fck";
 232                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 233                         resets = <&cpg 302>;
 234                         status = "disabled";
 235                 };
 236
 237                 cmt2: timer@e6140000 {
 238                         compatible = "renesas,r8a77970-cmt1",
 239                                      "renesas,rcar-gen3-cmt1";
 240                         reg = <0 0xe6140000 0 0x1004>;
 241                         interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>,
 242                                      <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>,
 243                                      <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
 244                                      <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>,
 245                                      <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
 246                                      <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>,
 247                                      <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,
 248                                      <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
 249                         clocks = <&cpg CPG_MOD 301>;
 250                         clock-names = "fck";
 251                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 252                         resets = <&cpg 301>;
 253                         status = "disabled";
 254                 };
 255
 256                 cmt3: timer@e6148000 {
 257                         compatible = "renesas,r8a77970-cmt1",
 258                                      "renesas,rcar-gen3-cmt1";
 259                         reg = <0 0xe6148000 0 0x1004>;
 260                         interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
 261                                      <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>,
 262                                      <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>,
 263                                      <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>,
 264                                      <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>,
 265                                      <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
 266                                      <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
 267                                      <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>;
 268                         clocks = <&cpg CPG_MOD 300>;
 269                         clock-names = "fck";
 270                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 271                         resets = <&cpg 300>;
 272                         status = "disabled";
 273                 };
 274
 275                 cpg: clock-controller@e6150000 {
 276                         compatible = "renesas,r8a77970-cpg-mssr";
 277                         reg = <0 0xe6150000 0 0x1000>;
 278                         clocks = <&extal_clk>, <&extalr_clk>;
 279                         clock-names = "extal", "extalr";
 280                         #clock-cells = <2>;
 281                         #power-domain-cells = <0>;
 282                         #reset-cells = <1>;
 283                 };
 284
 285                 rst: reset-controller@e6160000 {
 286                         compatible = "renesas,r8a77970-rst";
 287                         reg = <0 0xe6160000 0 0x200>;
 288                 };
 289
 290                 sysc: system-controller@e6180000 {
 291                         compatible = "renesas,r8a77970-sysc";
 292                         reg = <0 0xe6180000 0 0x440>;
 293                         #power-domain-cells = <1>;
 294                 };
 295
 296                 thermal: thermal@e6190000 {
 297                         compatible = "renesas,thermal-r8a77970";
 298                         reg = <0 0xe6190000 0 0x10>,
 299                               <0 0xe6190100 0 0x120>;
 300                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
 301                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
 302                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 303                         clocks = <&cpg CPG_MOD 522>;
 304                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 305                         resets = <&cpg 522>;
 306                         #thermal-sensor-cells = <0>;
 307                 };
 308
 309                 intc_ex: interrupt-controller@e61c0000 {
 310                         compatible = "renesas,intc-ex-r8a77970", "renesas,irqc";
 311                         #interrupt-cells = <2>;
 312                         interrupt-controller;
 313                         reg = <0 0xe61c0000 0 0x200>;
 314                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 315                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 316                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 317                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
 318                                      <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
 319                                      <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 320                         clocks = <&cpg CPG_MOD 407>;
 321                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 322                         resets = <&cpg 407>;
 323                 };
 324
 325                 tmu0: timer@e61e0000 {
 326                         compatible = "renesas,tmu-r8a77970", "renesas,tmu";
 327                         reg = <0 0xe61e0000 0 0x30>;
 328                         interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
 329                                      <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
 330                                      <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
 331                         interrupt-names = "tuni0", "tuni1", "tuni2";
 332                         clocks = <&cpg CPG_MOD 125>;
 333                         clock-names = "fck";
 334                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 335                         resets = <&cpg 125>;
 336                         status = "disabled";
 337                 };
 338
 339                 tmu1: timer@e6fc0000 {
 340                         compatible = "renesas,tmu-r8a77970", "renesas,tmu";
 341                         reg = <0 0xe6fc0000 0 0x30>;
 342                         interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
 343                                      <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
 344                                      <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
 345                                      <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
 346                         interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
 347                         clocks = <&cpg CPG_MOD 124>;
 348                         clock-names = "fck";
 349                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 350                         resets = <&cpg 124>;
 351                         status = "disabled";
 352                 };
 353
 354                 tmu2: timer@e6fd0000 {
 355                         compatible = "renesas,tmu-r8a77970", "renesas,tmu";
 356                         reg = <0 0xe6fd0000 0 0x30>;
 357                         interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
 358                                      <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
 359                                      <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
 360                                      <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
 361                         interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
 362                         clocks = <&cpg CPG_MOD 123>;
 363                         clock-names = "fck";
 364                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 365                         resets = <&cpg 123>;
 366                         status = "disabled";
 367                 };
 368
 369                 tmu3: timer@e6fe0000 {
 370                         compatible = "renesas,tmu-r8a77970", "renesas,tmu";
 371                         reg = <0 0xe6fe0000 0 0x30>;
 372                         interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
 373                                      <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
 374                                      <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
 375                         interrupt-names = "tuni0", "tuni1", "tuni2";
 376                         clocks = <&cpg CPG_MOD 122>;
 377                         clock-names = "fck";
 378                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 379                         resets = <&cpg 122>;
 380                         status = "disabled";
 381                 };
 382
 383                 tmu4: timer@ffc00000 {
 384                         compatible = "renesas,tmu-r8a77970", "renesas,tmu";
 385                         reg = <0 0xffc00000 0 0x30>;
 386                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
 387                                      <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
 388                                      <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
 389                         interrupt-names = "tuni0", "tuni1", "tuni2";
 390                         clocks = <&cpg CPG_MOD 121>;
 391                         clock-names = "fck";
 392                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 393                         resets = <&cpg 121>;
 394                         status = "disabled";
 395                 };
 396
 397                 i2c0: i2c@e6500000 {
 398                         compatible = "renesas,i2c-r8a77970",
 399                                      "renesas,rcar-gen3-i2c";
 400                         reg = <0 0xe6500000 0 0x40>;
 401                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 402                         clocks = <&cpg CPG_MOD 931>;
 403                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 404                         resets = <&cpg 931>;
 405                         dmas = <&dmac1 0x91>, <&dmac1 0x90>,
 406                                <&dmac2 0x91>, <&dmac2 0x90>;
 407                         dma-names = "tx", "rx", "tx", "rx";
 408                         i2c-scl-internal-delay-ns = <6>;
 409                         #address-cells = <1>;
 410                         #size-cells = <0>;
 411                         status = "disabled";
 412                 };
 413
 414                 i2c1: i2c@e6508000 {
 415                         compatible = "renesas,i2c-r8a77970",
 416                                      "renesas,rcar-gen3-i2c";
 417                         reg = <0 0xe6508000 0 0x40>;
 418                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 419                         clocks = <&cpg CPG_MOD 930>;
 420                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 421                         resets = <&cpg 930>;
 422                         dmas = <&dmac1 0x93>, <&dmac1 0x92>,
 423                                <&dmac2 0x93>, <&dmac2 0x92>;
 424                         dma-names = "tx", "rx", "tx", "rx";
 425                         i2c-scl-internal-delay-ns = <6>;
 426                         #address-cells = <1>;
 427                         #size-cells = <0>;
 428                         status = "disabled";
 429                 };
 430
 431                 i2c2: i2c@e6510000 {
 432                         compatible = "renesas,i2c-r8a77970",
 433                                      "renesas,rcar-gen3-i2c";
 434                         reg = <0 0xe6510000 0 0x40>;
 435                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 436                         clocks = <&cpg CPG_MOD 929>;
 437                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 438                         resets = <&cpg 929>;
 439                         dmas = <&dmac1 0x95>, <&dmac1 0x94>,
 440                                <&dmac2 0x95>, <&dmac2 0x94>;
 441                         dma-names = "tx", "rx", "tx", "rx";
 442                         i2c-scl-internal-delay-ns = <6>;
 443                         #address-cells = <1>;
 444                         #size-cells = <0>;
 445                         status = "disabled";
 446                 };
 447
 448                 i2c3: i2c@e66d0000 {
 449                         compatible = "renesas,i2c-r8a77970",
 450                                      "renesas,rcar-gen3-i2c";
 451                         reg = <0 0xe66d0000 0 0x40>;
 452                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 453                         clocks = <&cpg CPG_MOD 928>;
 454                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 455                         resets = <&cpg 928>;
 456                         dmas = <&dmac1 0x97>, <&dmac1 0x96>,
 457                                <&dmac2 0x97>, <&dmac2 0x96>;
 458                         dma-names = "tx", "rx", "tx", "rx";
 459                         i2c-scl-internal-delay-ns = <6>;
 460                         #address-cells = <1>;
 461                         #size-cells = <0>;
 462                         status = "disabled";
 463                 };
 464
 465                 i2c4: i2c@e66d8000 {
 466                         compatible = "renesas,i2c-r8a77970",
 467                                      "renesas,rcar-gen3-i2c";
 468                         reg = <0 0xe66d8000 0 0x40>;
 469                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 470                         clocks = <&cpg CPG_MOD 927>;
 471                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 472                         resets = <&cpg 927>;
 473                         dmas = <&dmac1 0x99>, <&dmac1 0x98>,
 474                                <&dmac2 0x99>, <&dmac2 0x98>;
 475                         dma-names = "tx", "rx", "tx", "rx";
 476                         i2c-scl-internal-delay-ns = <6>;
 477                         #address-cells = <1>;
 478                         #size-cells = <0>;
 479                         status = "disabled";
 480                 };
 481
 482                 hscif0: serial@e6540000 {
 483                         compatible = "renesas,hscif-r8a77970",
 484                                      "renesas,rcar-gen3-hscif",
 485                                      "renesas,hscif";
 486                         reg = <0 0xe6540000 0 96>;
 487                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 488                         clocks = <&cpg CPG_MOD 520>,
 489                                  <&cpg CPG_CORE R8A77970_CLK_S2D1>,
 490                                  <&scif_clk>;
 491                         clock-names = "fck", "brg_int", "scif_clk";
 492                         dmas = <&dmac1 0x31>, <&dmac1 0x30>,
 493                                <&dmac2 0x31>, <&dmac2 0x30>;
 494                         dma-names = "tx", "rx", "tx", "rx";
 495                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 496                         resets = <&cpg 520>;
 497                         status = "disabled";
 498                 };
 499
 500                 hscif1: serial@e6550000 {
 501                         compatible = "renesas,hscif-r8a77970",
 502                                      "renesas,rcar-gen3-hscif",
 503                                      "renesas,hscif";
 504                         reg = <0 0xe6550000 0 96>;
 505                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 506                         clocks = <&cpg CPG_MOD 519>,
 507                                  <&cpg CPG_CORE R8A77970_CLK_S2D1>,
 508                                  <&scif_clk>;
 509                         clock-names = "fck", "brg_int", "scif_clk";
 510                         dmas = <&dmac1 0x33>, <&dmac1 0x32>,
 511                                <&dmac2 0x33>, <&dmac2 0x32>;
 512                         dma-names = "tx", "rx", "tx", "rx";
 513                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 514                         resets = <&cpg 519>;
 515                         status = "disabled";
 516                 };
 517
 518                 hscif2: serial@e6560000 {
 519                         compatible = "renesas,hscif-r8a77970",
 520                                      "renesas,rcar-gen3-hscif",
 521                                      "renesas,hscif";
 522                         reg = <0 0xe6560000 0 96>;
 523                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 524                         clocks = <&cpg CPG_MOD 518>,
 525                                  <&cpg CPG_CORE R8A77970_CLK_S2D1>,
 526                                  <&scif_clk>;
 527                         clock-names = "fck", "brg_int", "scif_clk";
 528                         dmas = <&dmac1 0x35>, <&dmac1 0x34>,
 529                                <&dmac2 0x35>, <&dmac2 0x34>;
 530                         dma-names = "tx", "rx", "tx", "rx";
 531                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 532                         resets = <&cpg 518>;
 533                         status = "disabled";
 534                 };
 535
 536                 hscif3: serial@e66a0000 {
 537                         compatible = "renesas,hscif-r8a77970",
 538                                      "renesas,rcar-gen3-hscif", "renesas,hscif";
 539                         reg = <0 0xe66a0000 0 96>;
 540                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 541                         clocks = <&cpg CPG_MOD 517>,
 542                                  <&cpg CPG_CORE R8A77970_CLK_S2D1>,
 543                                  <&scif_clk>;
 544                         clock-names = "fck", "brg_int", "scif_clk";
 545                         dmas = <&dmac1 0x37>, <&dmac1 0x36>,
 546                                <&dmac2 0x37>, <&dmac2 0x36>;
 547                         dma-names = "tx", "rx", "tx", "rx";
 548                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 549                         resets = <&cpg 517>;
 550                         status = "disabled";
 551                 };
 552
 553                 canfd: can@e66c0000 {
 554                         compatible = "renesas,r8a77970-canfd",
 555                                      "renesas,rcar-gen3-canfd";
 556                         reg = <0 0xe66c0000 0 0x8000>;
 557                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
 558                                      <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 559                         interrupt-names = "ch_int", "g_int";
 560                         clocks = <&cpg CPG_MOD 914>,
 561                                  <&cpg CPG_CORE R8A77970_CLK_CANFD>,
 562                                  <&can_clk>;
 563                         clock-names = "fck", "canfd", "can_clk";
 564                         assigned-clocks = <&cpg CPG_CORE R8A77970_CLK_CANFD>;
 565                         assigned-clock-rates = <40000000>;
 566                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 567                         resets = <&cpg 914>;
 568                         status = "disabled";
 569
 570                         channel0 {
 571                                 status = "disabled";
 572                         };
 573
 574                         channel1 {
 575                                 status = "disabled";
 576                         };
 577                 };
 578
 579                 avb: ethernet@e6800000 {
 580                         compatible = "renesas,etheravb-r8a77970",
 581                                      "renesas,etheravb-rcar-gen3";
 582                         reg = <0 0xe6800000 0 0x800>;
 583                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 584                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 585                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 586                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 587                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
 588                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
 589                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 590                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 591                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 592                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 593                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 594                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 595                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 596                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 597                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 598                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 599                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 600                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 601                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 602                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 603                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 604                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 605                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 606                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 607                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 608                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
 609                                           "ch4", "ch5", "ch6", "ch7",
 610                                           "ch8", "ch9", "ch10", "ch11",
 611                                           "ch12", "ch13", "ch14", "ch15",
 612                                           "ch16", "ch17", "ch18", "ch19",
 613                                           "ch20", "ch21", "ch22", "ch23",
 614                                           "ch24";
 615                         clocks = <&cpg CPG_MOD 812>;
 616                         clock-names = "fck";
 617                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 618                         resets = <&cpg 812>;
 619                         phy-mode = "rgmii";
 620                         rx-internal-delay-ps = <0>;
 621                         tx-internal-delay-ps = <0>;
 622                         iommus = <&ipmmu_rt 3>;
 623                         #address-cells = <1>;
 624                         #size-cells = <0>;
 625                         status = "disabled";
 626                 };
 627
 628                 pwm0: pwm@e6e30000 {
 629                         compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar";
 630                         reg = <0 0xe6e30000 0 8>;
 631                         #pwm-cells = <2>;
 632                         clocks = <&cpg CPG_MOD 523>;
 633                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 634                         resets = <&cpg 523>;
 635                         status = "disabled";
 636                 };
 637
 638                 pwm1: pwm@e6e31000 {
 639                         compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar";
 640                         reg = <0 0xe6e31000 0 8>;
 641                         #pwm-cells = <2>;
 642                         clocks = <&cpg CPG_MOD 523>;
 643                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 644                         resets = <&cpg 523>;
 645                         status = "disabled";
 646                 };
 647
 648                 pwm2: pwm@e6e32000 {
 649                         compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar";
 650                         reg = <0 0xe6e32000 0 8>;
 651                         #pwm-cells = <2>;
 652                         clocks = <&cpg CPG_MOD 523>;
 653                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 654                         resets = <&cpg 523>;
 655                         status = "disabled";
 656                 };
 657
 658                 pwm3: pwm@e6e33000 {
 659                         compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar";
 660                         reg = <0 0xe6e33000 0 8>;
 661                         #pwm-cells = <2>;
 662                         clocks = <&cpg CPG_MOD 523>;
 663                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 664                         resets = <&cpg 523>;
 665                         status = "disabled";
 666                 };
 667
 668                 pwm4: pwm@e6e34000 {
 669                         compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar";
 670                         reg = <0 0xe6e34000 0 8>;
 671                         #pwm-cells = <2>;
 672                         clocks = <&cpg CPG_MOD 523>;
 673                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 674                         resets = <&cpg 523>;
 675                         status = "disabled";
 676                 };
 677
 678                 scif0: serial@e6e60000 {
 679                         compatible = "renesas,scif-r8a77970",
 680                                      "renesas,rcar-gen3-scif",
 681                                      "renesas,scif";
 682                         reg = <0 0xe6e60000 0 64>;
 683                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 684                         clocks = <&cpg CPG_MOD 207>,
 685                                  <&cpg CPG_CORE R8A77970_CLK_S2D1>,
 686                                  <&scif_clk>;
 687                         clock-names = "fck", "brg_int", "scif_clk";
 688                         dmas = <&dmac1 0x51>, <&dmac1 0x50>,
 689                                <&dmac2 0x51>, <&dmac2 0x50>;
 690                         dma-names = "tx", "rx", "tx", "rx";
 691                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 692                         resets = <&cpg 207>;
 693                         status = "disabled";
 694                 };
 695
 696                 scif1: serial@e6e68000 {
 697                         compatible = "renesas,scif-r8a77970",
 698                                      "renesas,rcar-gen3-scif",
 699                                      "renesas,scif";
 700                         reg = <0 0xe6e68000 0 64>;
 701                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 702                         clocks = <&cpg CPG_MOD 206>,
 703                                  <&cpg CPG_CORE R8A77970_CLK_S2D1>,
 704                                  <&scif_clk>;
 705                         clock-names = "fck", "brg_int", "scif_clk";
 706                         dmas = <&dmac1 0x53>, <&dmac1 0x52>,
 707                                <&dmac2 0x53>, <&dmac2 0x52>;
 708                         dma-names = "tx", "rx", "tx", "rx";
 709                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 710                         resets = <&cpg 206>;
 711                         status = "disabled";
 712                 };
 713
 714                 scif3: serial@e6c50000 {
 715                         compatible = "renesas,scif-r8a77970",
 716                                      "renesas,rcar-gen3-scif",
 717                                      "renesas,scif";
 718                         reg = <0 0xe6c50000 0 64>;
 719                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 720                         clocks = <&cpg CPG_MOD 204>,
 721                                  <&cpg CPG_CORE R8A77970_CLK_S2D1>,
 722                                  <&scif_clk>;
 723                         clock-names = "fck", "brg_int", "scif_clk";
 724                         dmas = <&dmac1 0x57>, <&dmac1 0x56>,
 725                                <&dmac2 0x57>, <&dmac2 0x56>;
 726                         dma-names = "tx", "rx", "tx", "rx";
 727                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 728                         resets = <&cpg 204>;
 729                         status = "disabled";
 730                 };
 731
 732                 scif4: serial@e6c40000 {
 733                         compatible = "renesas,scif-r8a77970",
 734                                      "renesas,rcar-gen3-scif", "renesas,scif";
 735                         reg = <0 0xe6c40000 0 64>;
 736                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 737                         clocks = <&cpg CPG_MOD 203>,
 738                                  <&cpg CPG_CORE R8A77970_CLK_S2D1>,
 739                                  <&scif_clk>;
 740                         clock-names = "fck", "brg_int", "scif_clk";
 741                         dmas = <&dmac1 0x59>, <&dmac1 0x58>,
 742                                <&dmac2 0x59>, <&dmac2 0x58>;
 743                         dma-names = "tx", "rx", "tx", "rx";
 744                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 745                         resets = <&cpg 203>;
 746                         status = "disabled";
 747                 };
 748
 749                 tpu: pwm@e6e80000 {
 750                         compatible = "renesas,tpu-r8a77970", "renesas,tpu";
 751                         reg = <0 0xe6e80000 0 0x148>;
 752                         interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
 753                         clocks = <&cpg CPG_MOD 304>;
 754                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 755                         resets = <&cpg 304>;
 756                         #pwm-cells = <3>;
 757                         status = "disabled";
 758                 };
 759
 760                 msiof0: spi@e6e90000 {
 761                         compatible = "renesas,msiof-r8a77970",
 762                                      "renesas,rcar-gen3-msiof";
 763                         reg = <0 0xe6e90000 0 0x64>;
 764                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
 765                         clocks = <&cpg CPG_MOD 211>;
 766                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 767                         resets = <&cpg 211>;
 768                         dmas = <&dmac1 0x41>, <&dmac1 0x40>,
 769                                <&dmac2 0x41>, <&dmac2 0x40>;
 770                         dma-names = "tx", "rx", "tx", "rx";
 771                         #address-cells = <1>;
 772                         #size-cells = <0>;
 773                         status = "disabled";
 774                 };
 775
 776                 msiof1: spi@e6ea0000 {
 777                         compatible = "renesas,msiof-r8a77970",
 778                                      "renesas,rcar-gen3-msiof";
 779                         reg = <0 0xe6ea0000 0 0x0064>;
 780                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
 781                         clocks = <&cpg CPG_MOD 210>;
 782                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 783                         resets = <&cpg 210>;
 784                         dmas = <&dmac1 0x43>, <&dmac1 0x42>,
 785                                <&dmac2 0x43>, <&dmac2 0x42>;
 786                         dma-names = "tx", "rx", "tx", "rx";
 787                         #address-cells = <1>;
 788                         #size-cells = <0>;
 789                         status = "disabled";
 790                 };
 791
 792                 msiof2: spi@e6c00000 {
 793                         compatible = "renesas,msiof-r8a77970",
 794                                      "renesas,rcar-gen3-msiof";
 795                         reg = <0 0xe6c00000 0 0x0064>;
 796                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
 797                         clocks = <&cpg CPG_MOD 209>;
 798                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 799                         resets = <&cpg 209>;
 800                         dmas = <&dmac1 0x45>, <&dmac1 0x44>,
 801                                <&dmac2 0x45>, <&dmac2 0x44>;
 802                         dma-names = "tx", "rx", "tx", "rx";
 803                         #address-cells = <1>;
 804                         #size-cells = <0>;
 805                         status = "disabled";
 806                 };
 807
 808                 msiof3: spi@e6c10000 {
 809                         compatible = "renesas,msiof-r8a77970",
 810                                      "renesas,rcar-gen3-msiof";
 811                         reg = <0 0xe6c10000 0 0x0064>;
 812                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
 813                         clocks = <&cpg CPG_MOD 208>;
 814                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 815                         resets = <&cpg 208>;
 816                         dmas = <&dmac1 0x47>, <&dmac1 0x46>,
 817                                <&dmac2 0x47>, <&dmac2 0x46>;
 818                         dma-names = "tx", "rx", "tx", "rx";
 819                         #address-cells = <1>;
 820                         #size-cells = <0>;
 821                         status = "disabled";
 822                 };
 823
 824                 vin0: video@e6ef0000 {
 825                         compatible = "renesas,vin-r8a77970";
 826                         reg = <0 0xe6ef0000 0 0x1000>;
 827                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
 828                         clocks = <&cpg CPG_MOD 811>;
 829                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 830                         resets = <&cpg 811>;
 831                         renesas,id = <0>;
 832                         status = "disabled";
 833
 834                         ports {
 835                                 #address-cells = <1>;
 836                                 #size-cells = <0>;
 837
 838                                 port@1 {
 839                                         #address-cells = <1>;
 840                                         #size-cells = <0>;
 841
 842                                         reg = <1>;
 843
 844                                         vin0csi40: endpoint@2 {
 845                                                 reg = <2>;
 846                                                 remote-endpoint = <&csi40vin0>;
 847                                         };
 848                                 };
 849                         };
 850                 };
 851
 852                 vin1: video@e6ef1000 {
 853                         compatible = "renesas,vin-r8a77970";
 854                         reg = <0 0xe6ef1000 0 0x1000>;
 855                         interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
 856                         clocks = <&cpg CPG_MOD 810>;
 857                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 858                         resets = <&cpg 810>;
 859                         renesas,id = <1>;
 860                         status = "disabled";
 861
 862                         ports {
 863                                 #address-cells = <1>;
 864                                 #size-cells = <0>;
 865
 866                                 port@1 {
 867                                         #address-cells = <1>;
 868                                         #size-cells = <0>;
 869
 870                                         reg = <1>;
 871
 872                                         vin1csi40: endpoint@2 {
 873                                                 reg = <2>;
 874                                                 remote-endpoint = <&csi40vin1>;
 875                                         };
 876                                 };
 877                         };
 878                 };
 879
 880                 vin2: video@e6ef2000 {
 881                         compatible = "renesas,vin-r8a77970";
 882                         reg = <0 0xe6ef2000 0 0x1000>;
 883                         interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
 884                         clocks = <&cpg CPG_MOD 809>;
 885                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 886                         resets = <&cpg 809>;
 887                         renesas,id = <2>;
 888                         status = "disabled";
 889
 890                         ports {
 891                                 #address-cells = <1>;
 892                                 #size-cells = <0>;
 893
 894                                 port@1 {
 895                                         #address-cells = <1>;
 896                                         #size-cells = <0>;
 897
 898                                         reg = <1>;
 899
 900                                         vin2csi40: endpoint@2 {
 901                                                 reg = <2>;
 902                                                 remote-endpoint = <&csi40vin2>;
 903                                         };
 904                                 };
 905                         };
 906                 };
 907
 908                 vin3: video@e6ef3000 {
 909                         compatible = "renesas,vin-r8a77970";
 910                         reg = <0 0xe6ef3000 0 0x1000>;
 911                         interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
 912                         clocks = <&cpg CPG_MOD 808>;
 913                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 914                         resets = <&cpg 808>;
 915                         renesas,id = <3>;
 916                         status = "disabled";
 917
 918                         ports {
 919                                 #address-cells = <1>;
 920                                 #size-cells = <0>;
 921
 922                                 port@1 {
 923                                         #address-cells = <1>;
 924                                         #size-cells = <0>;
 925
 926                                         reg = <1>;
 927
 928                                         vin3csi40: endpoint@2 {
 929                                                 reg = <2>;
 930                                                 remote-endpoint = <&csi40vin3>;
 931                                         };
 932                                 };
 933                         };
 934                 };
 935
 936                 dmac1: dma-controller@e7300000 {
 937                         compatible = "renesas,dmac-r8a77970",
 938                                      "renesas,rcar-dmac";
 939                         reg = <0 0xe7300000 0 0x10000>;
 940                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
 941                                      <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
 942                                      <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
 943                                      <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
 944                                      <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
 945                                      <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
 946                                      <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
 947                                      <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
 948                                      <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>;
 949                         interrupt-names = "error",
 950                                           "ch0", "ch1", "ch2", "ch3",
 951                                           "ch4", "ch5", "ch6", "ch7";
 952                         clocks = <&cpg CPG_MOD 218>;
 953                         clock-names = "fck";
 954                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 955                         resets = <&cpg 218>;
 956                         #dma-cells = <1>;
 957                         dma-channels = <8>;
 958                         iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
 959                                <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
 960                                <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
 961                                <&ipmmu_ds1 6>, <&ipmmu_ds1 7>;
 962                 };
 963
 964                 dmac2: dma-controller@e7310000 {
 965                         compatible = "renesas,dmac-r8a77970",
 966                                      "renesas,rcar-dmac";
 967                         reg = <0 0xe7310000 0 0x10000>;
 968                         interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
 969                                      <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
 970                                      <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
 971                                      <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
 972                                      <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
 973                                      <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
 974                                      <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
 975                                      <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
 976                                      <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 977                         interrupt-names = "error",
 978                                           "ch0", "ch1", "ch2", "ch3",
 979                                           "ch4", "ch5", "ch6", "ch7";
 980                         clocks = <&cpg CPG_MOD 217>;
 981                         clock-names = "fck";
 982                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 983                         resets = <&cpg 217>;
 984                         #dma-cells = <1>;
 985                         dma-channels = <8>;
 986                         iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
 987                                <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
 988                                <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
 989                                <&ipmmu_ds1 22>, <&ipmmu_ds1 23>;
 990                 };
 991
 992                 ipmmu_ds1: iommu@e7740000 {
 993                         compatible = "renesas,ipmmu-r8a77970";
 994                         reg = <0 0xe7740000 0 0x1000>;
 995                         renesas,ipmmu-main = <&ipmmu_mm 0>;
 996                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 997                         #iommu-cells = <1>;
 998                 };
 999
1000                 ipmmu_ir: iommu@ff8b0000 {
1001                         compatible = "renesas,ipmmu-r8a77970";
1002                         reg = <0 0xff8b0000 0 0x1000>;
1003                         renesas,ipmmu-main = <&ipmmu_mm 3>;
1004                         power-domains = <&sysc R8A77970_PD_A3IR>;
1005                         #iommu-cells = <1>;
1006                 };
1007
1008                 ipmmu_mm: iommu@e67b0000 {
1009                         compatible = "renesas,ipmmu-r8a77970";
1010                         reg = <0 0xe67b0000 0 0x1000>;
1011                         interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
1012                                      <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
1013                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1014                         #iommu-cells = <1>;
1015                 };
1016
1017                 ipmmu_rt: iommu@ffc80000 {
1018                         compatible = "renesas,ipmmu-r8a77970";
1019                         reg = <0 0xffc80000 0 0x1000>;
1020                         renesas,ipmmu-main = <&ipmmu_mm 7>;
1021                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1022                         #iommu-cells = <1>;
1023                 };
1024
1025                 ipmmu_vi0: iommu@febd0000 {
1026                         compatible = "renesas,ipmmu-r8a77970";
1027                         reg = <0 0xfebd0000 0 0x1000>;
1028                         renesas,ipmmu-main = <&ipmmu_mm 9>;
1029                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1030                         #iommu-cells = <1>;
1031                 };
1032
1033                 mmc0: mmc@ee140000 {
1034                         compatible = "renesas,sdhi-r8a77970",
1035                                      "renesas,rcar-gen3-sdhi";
1036                         reg = <0 0xee140000 0 0x2000>;
1037                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1038                         clocks = <&cpg CPG_MOD 314>;
1039                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1040                         resets = <&cpg 314>;
1041                         max-frequency = <200000000>;
1042                         iommus = <&ipmmu_ds1 32>;
1043                         status = "disabled";
1044                 };
1045
1046                 rpc: spi@ee200000 {
1047                         compatible = "renesas,r8a77970-rpc-if",
1048                                      "renesas,rcar-gen3-rpc-if";
1049                         reg = <0 0xee200000 0 0x200>,
1050                               <0 0x08000000 0 0x4000000>,
1051                               <0 0xee208000 0 0x100>;
1052                         reg-names = "regs", "dirmap", "wbuf";
1053                         interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
1054                         clocks = <&cpg CPG_MOD 917>;
1055                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1056                         resets = <&cpg 917>;
1057                         #address-cells = <1>;
1058                         #size-cells = <0>;
1059                         status = "disabled";
1060                 };
1061
1062                 gic: interrupt-controller@f1010000 {
1063                         compatible = "arm,gic-400";
1064                         #interrupt-cells = <3>;
1065                         #address-cells = <0>;
1066                         interrupt-controller;
1067                         reg = <0 0xf1010000 0 0x1000>,
1068                               <0 0xf1020000 0 0x20000>,
1069                               <0 0xf1040000 0 0x20000>,
1070                               <0 0xf1060000 0 0x20000>;
1071                         interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
1072                                       IRQ_TYPE_LEVEL_HIGH)>;
1073                         clocks = <&cpg CPG_MOD 408>;
1074                         clock-names = "clk";
1075                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1076                         resets = <&cpg 408>;
1077                 };
1078
1079                 vspd0: vsp@fea20000 {
1080                         compatible = "renesas,vsp2";
1081                         reg = <0 0xfea20000 0 0x5000>;
1082                         interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1083                         clocks = <&cpg CPG_MOD 623>;
1084                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1085                         resets = <&cpg 623>;
1086                         renesas,fcp = <&fcpvd0>;
1087                 };
1088
1089                 fcpvd0: fcp@fea27000 {
1090                         compatible = "renesas,fcpv";
1091                         reg = <0 0xfea27000 0 0x200>;
1092                         clocks = <&cpg CPG_MOD 603>;
1093                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1094                         resets = <&cpg 603>;
1095                 };
1096
1097                 csi40: csi2@feaa0000 {
1098                         compatible = "renesas,r8a77970-csi2";
1099                         reg = <0 0xfeaa0000 0 0x10000>;
1100                         interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1101                         clocks = <&cpg CPG_MOD 716>;
1102                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1103                         resets = <&cpg 716>;
1104                         status = "disabled";
1105
1106                         ports {
1107                                 #address-cells = <1>;
1108                                 #size-cells = <0>;
1109
1110                                 port@0 {
1111                                         reg = <0>;
1112                                 };
1113
1114                                 port@1 {
1115                                         #address-cells = <1>;
1116                                         #size-cells = <0>;
1117
1118                                         reg = <1>;
1119
1120                                         csi40vin0: endpoint@0 {
1121                                                 reg = <0>;
1122                                                 remote-endpoint = <&vin0csi40>;
1123                                         };
1124                                         csi40vin1: endpoint@1 {
1125                                                 reg = <1>;
1126                                                 remote-endpoint = <&vin1csi40>;
1127                                         };
1128                                         csi40vin2: endpoint@2 {
1129                                                 reg = <2>;
1130                                                 remote-endpoint = <&vin2csi40>;
1131                                         };
1132                                         csi40vin3: endpoint@3 {
1133                                                 reg = <3>;
1134                                                 remote-endpoint = <&vin3csi40>;
1135                                         };
1136                                 };
1137                         };
1138                 };
1139
1140                 du: display@feb00000 {
1141                         compatible = "renesas,du-r8a77970";
1142                         reg = <0 0xfeb00000 0 0x80000>;
1143                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
1144                         clocks = <&cpg CPG_MOD 724>;
1145                         clock-names = "du.0";
1146                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1147                         resets = <&cpg 724>;
1148                         reset-names = "du.0";
1149                         renesas,vsps = <&vspd0 0>;
1150
1151                         status = "disabled";
1152
1153                         ports {
1154                                 #address-cells = <1>;
1155                                 #size-cells = <0>;
1156
1157                                 port@0 {
1158                                         reg = <0>;
1159                                 };
1160
1161                                 port@1 {
1162                                         reg = <1>;
1163                                         du_out_lvds0: endpoint {
1164                                                 remote-endpoint = <&lvds0_in>;
1165                                         };
1166                                 };
1167                         };
1168                 };
1169
1170                 lvds0: lvds-encoder@feb90000 {
1171                         compatible = "renesas,r8a77970-lvds";
1172                         reg = <0 0xfeb90000 0 0x14>;
1173                         clocks = <&cpg CPG_MOD 727>;
1174                         power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1175                         resets = <&cpg 727>;
1176                         status = "disabled";
1177
1178                         ports {
1179                                 #address-cells = <1>;
1180                                 #size-cells = <0>;
1181
1182                                 port@0 {
1183                                         reg = <0>;
1184                                         lvds0_in: endpoint {
1185                                                 remote-endpoint =
1186                                                         <&du_out_lvds0>;
1187                                         };
1188                                 };
1189                                 port@1 {
1190                                         reg = <1>;
1191                                 };
1192                         };
1193                 };
1194
1195                 prr: chipid@fff00044 {
1196                         compatible = "renesas,prr";
1197                         reg = <0 0xfff00044 0 4>;
1198                 };
1199         };
1200
1201         thermal-zones {
1202                 cpu-thermal {
1203                         polling-delay-passive = <250>;
1204                         polling-delay = <1000>;
1205                         thermal-sensors = <&thermal>;
1206
1207                         cooling-maps {
1208                         };
1209
1210                         trips {
1211                                 cpu-crit {
1212                                         temperature = <120000>;
1213                                         hysteresis = <2000>;
1214                                         type = "critical";
1215                                 };
1216                         };
1217                 };
1218         };
1219
1220         timer {
1221                 compatible = "arm,armv8-timer";
1222                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1223                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1224                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1225                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1226         };
1227 };