arch/arm64/boot/dts/renesas/r8a7795.dtsi

   1 /*
   2  * Device Tree Source for the r8a7795 SoC
   3  *
   4  * Copyright (C) 2015 Renesas Electronics Corp.
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13 #include <dt-bindings/power/r8a7795-sysc.h>
  14
  15 #define CPG_AUDIO_CLK_I         R8A7795_CLK_S0D4
  16
  17 / {
  18         compatible = "renesas,r8a7795";
  19         #address-cells = <2>;
  20         #size-cells = <2>;
  21
  22         aliases {
  23                 i2c0 = &i2c0;
  24                 i2c1 = &i2c1;
  25                 i2c2 = &i2c2;
  26                 i2c3 = &i2c3;
  27                 i2c4 = &i2c4;
  28                 i2c5 = &i2c5;
  29                 i2c6 = &i2c6;
  30                 i2c7 = &i2c_dvfs;
  31         };
  32
  33         /*
  34          * The external audio clocks are configured as 0 Hz fixed frequency
  35          * clocks by default.
  36          * Boards that provide audio clocks should override them.
  37          */
  38         audio_clk_a: audio_clk_a {
  39                 compatible = "fixed-clock";
  40                 #clock-cells = <0>;
  41                 clock-frequency = <0>;
  42         };
  43
  44         audio_clk_b: audio_clk_b {
  45                 compatible = "fixed-clock";
  46                 #clock-cells = <0>;
  47                 clock-frequency = <0>;
  48         };
  49
  50         audio_clk_c: audio_clk_c {
  51                 compatible = "fixed-clock";
  52                 #clock-cells = <0>;
  53                 clock-frequency = <0>;
  54         };
  55
  56         /* External CAN clock - to be overridden by boards that provide it */
  57         can_clk: can {
  58                 compatible = "fixed-clock";
  59                 #clock-cells = <0>;
  60                 clock-frequency = <0>;
  61         };
  62
  63         cluster0_opp: opp_table0 {
  64                 compatible = "operating-points-v2";
  65                 opp-shared;
  66
  67                 opp-500000000 {
  68                         opp-hz = /bits/ 64 <500000000>;
  69                         opp-microvolt = <830000>;
  70                         clock-latency-ns = <300000>;
  71                 };
  72                 opp-1000000000 {
  73                         opp-hz = /bits/ 64 <1000000000>;
  74                         opp-microvolt = <830000>;
  75                         clock-latency-ns = <300000>;
  76                 };
  77                 opp-1500000000 {
  78                         opp-hz = /bits/ 64 <1500000000>;
  79                         opp-microvolt = <830000>;
  80                         clock-latency-ns = <300000>;
  81                         opp-suspend;
  82                 };
  83                 opp-1600000000 {
  84                         opp-hz = /bits/ 64 <1600000000>;
  85                         opp-microvolt = <900000>;
  86                         clock-latency-ns = <300000>;
  87                         turbo-mode;
  88                 };
  89                 opp-1700000000 {
  90                         opp-hz = /bits/ 64 <1700000000>;
  91                         opp-microvolt = <960000>;
  92                         clock-latency-ns = <300000>;
  93                         turbo-mode;
  94                 };
  95         };
  96
  97         cluster1_opp: opp_table1 {
  98                 compatible = "operating-points-v2";
  99                 opp-shared;
 100
 101                 opp-800000000 {
 102                         opp-hz = /bits/ 64 <800000000>;
 103                         opp-microvolt = <820000>;
 104                         clock-latency-ns = <300000>;
 105                 };
 106                 opp-1000000000 {
 107                         opp-hz = /bits/ 64 <1000000000>;
 108                         opp-microvolt = <820000>;
 109                         clock-latency-ns = <300000>;
 110                 };
 111                 opp-1200000000 {
 112                         opp-hz = /bits/ 64 <1200000000>;
 113                         opp-microvolt = <820000>;
 114                         clock-latency-ns = <300000>;
 115                 };
 116         };
 117
 118         cpus {
 119                 #address-cells = <1>;
 120                 #size-cells = <0>;
 121
 122                 a57_0: cpu@0 {
 123                         compatible = "arm,cortex-a57", "arm,armv8";
 124                         reg = <0x0>;
 125                         device_type = "cpu";
 126                         power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
 127                         next-level-cache = <&L2_CA57>;
 128                         enable-method = "psci";
 129                         clocks =<&cpg CPG_CORE R8A7795_CLK_Z>;
 130                         operating-points-v2 = <&cluster0_opp>;
 131                         #cooling-cells = <2>;
 132                 };
 133
 134                 a57_1: cpu@1 {
 135                         compatible = "arm,cortex-a57", "arm,armv8";
 136                         reg = <0x1>;
 137                         device_type = "cpu";
 138                         power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
 139                         next-level-cache = <&L2_CA57>;
 140                         enable-method = "psci";
 141                         clocks =<&cpg CPG_CORE R8A7795_CLK_Z>;
 142                         operating-points-v2 = <&cluster0_opp>;
 143                         #cooling-cells = <2>;
 144                 };
 145
 146                 a57_2: cpu@2 {
 147                         compatible = "arm,cortex-a57", "arm,armv8";
 148                         reg = <0x2>;
 149                         device_type = "cpu";
 150                         power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
 151                         next-level-cache = <&L2_CA57>;
 152                         enable-method = "psci";
 153                         clocks =<&cpg CPG_CORE R8A7795_CLK_Z>;
 154                         operating-points-v2 = <&cluster0_opp>;
 155                         #cooling-cells = <2>;
 156                 };
 157
 158                 a57_3: cpu@3 {
 159                         compatible = "arm,cortex-a57", "arm,armv8";
 160                         reg = <0x3>;
 161                         device_type = "cpu";
 162                         power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
 163                         next-level-cache = <&L2_CA57>;
 164                         enable-method = "psci";
 165                         clocks =<&cpg CPG_CORE R8A7795_CLK_Z>;
 166                         operating-points-v2 = <&cluster0_opp>;
 167                         #cooling-cells = <2>;
 168                 };
 169
 170                 a53_0: cpu@100 {
 171                         compatible = "arm,cortex-a53", "arm,armv8";
 172                         reg = <0x100>;
 173                         device_type = "cpu";
 174                         power-domains = <&sysc R8A7795_PD_CA53_CPU0>;
 175                         next-level-cache = <&L2_CA53>;
 176                         enable-method = "psci";
 177                         clocks =<&cpg CPG_CORE R8A7795_CLK_Z2>;
 178                         operating-points-v2 = <&cluster1_opp>;
 179                 };
 180
 181                 a53_1: cpu@101 {
 182                         compatible = "arm,cortex-a53", "arm,armv8";
 183                         reg = <0x101>;
 184                         device_type = "cpu";
 185                         power-domains = <&sysc R8A7795_PD_CA53_CPU1>;
 186                         next-level-cache = <&L2_CA53>;
 187                         enable-method = "psci";
 188                         clocks =<&cpg CPG_CORE R8A7795_CLK_Z2>;
 189                         operating-points-v2 = <&cluster1_opp>;
 190                 };
 191
 192                 a53_2: cpu@102 {
 193                         compatible = "arm,cortex-a53", "arm,armv8";
 194                         reg = <0x102>;
 195                         device_type = "cpu";
 196                         power-domains = <&sysc R8A7795_PD_CA53_CPU2>;
 197                         next-level-cache = <&L2_CA53>;
 198                         enable-method = "psci";
 199                         clocks =<&cpg CPG_CORE R8A7795_CLK_Z2>;
 200                         operating-points-v2 = <&cluster1_opp>;
 201                 };
 202
 203                 a53_3: cpu@103 {
 204                         compatible = "arm,cortex-a53", "arm,armv8";
 205                         reg = <0x103>;
 206                         device_type = "cpu";
 207                         power-domains = <&sysc R8A7795_PD_CA53_CPU3>;
 208                         next-level-cache = <&L2_CA53>;
 209                         enable-method = "psci";
 210                         clocks =<&cpg CPG_CORE R8A7795_CLK_Z2>;
 211                         operating-points-v2 = <&cluster1_opp>;
 212                 };
 213
 214                 L2_CA57: cache-controller-0 {
 215                         compatible = "cache";
 216                         power-domains = <&sysc R8A7795_PD_CA57_SCU>;
 217                         cache-unified;
 218                         cache-level = <2>;
 219                 };
 220
 221                 L2_CA53: cache-controller-1 {
 222                         compatible = "cache";
 223                         power-domains = <&sysc R8A7795_PD_CA53_SCU>;
 224                         cache-unified;
 225                         cache-level = <2>;
 226                 };
 227         };
 228
 229         extal_clk: extal {
 230                 compatible = "fixed-clock";
 231                 #clock-cells = <0>;
 232                 /* This value must be overridden by the board */
 233                 clock-frequency = <0>;
 234         };
 235
 236         extalr_clk: extalr {
 237                 compatible = "fixed-clock";
 238                 #clock-cells = <0>;
 239                 /* This value must be overridden by the board */
 240                 clock-frequency = <0>;
 241         };
 242
 243         /* External PCIe clock - can be overridden by the board */
 244         pcie_bus_clk: pcie_bus {
 245                 compatible = "fixed-clock";
 246                 #clock-cells = <0>;
 247                 clock-frequency = <0>;
 248         };
 249
 250         pmu_a53 {
 251                 compatible = "arm,cortex-a53-pmu";
 252                 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 253                                       <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
 254                                       <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
 255                                       <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 256                 interrupt-affinity = <&a53_0>,
 257                                      <&a53_1>,
 258                                      <&a53_2>,
 259                                      <&a53_3>;
 260         };
 261
 262         pmu_a57 {
 263                 compatible = "arm,cortex-a57-pmu";
 264                 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 265                                       <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
 266                                       <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
 267                                       <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 268                 interrupt-affinity = <&a57_0>,
 269                                      <&a57_1>,
 270                                      <&a57_2>,
 271                                      <&a57_3>;
 272         };
 273
 274         psci {
 275                 compatible = "arm,psci-1.0", "arm,psci-0.2";
 276                 method = "smc";
 277         };
 278
 279         /* External SCIF clock - to be overridden by boards that provide it */
 280         scif_clk: scif {
 281                 compatible = "fixed-clock";
 282                 #clock-cells = <0>;
 283                 clock-frequency = <0>;
 284         };
 285
 286         soc: soc {
 287                 compatible = "simple-bus";
 288                 interrupt-parent = <&gic>;
 289
 290                 #address-cells = <2>;
 291                 #size-cells = <2>;
 292                 ranges;
 293
 294                 wdt0: watchdog@e6020000 {
 295                         compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
 296                         reg = <0 0xe6020000 0 0x0c>;
 297                         clocks = <&cpg CPG_MOD 402>;
 298                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 299                         resets = <&cpg 402>;
 300                         status = "disabled";
 301                 };
 302
 303                 gpio0: gpio@e6050000 {
 304                         compatible = "renesas,gpio-r8a7795",
 305                                      "renesas,rcar-gen3-gpio";
 306                         reg = <0 0xe6050000 0 0x50>;
 307                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 308                         #gpio-cells = <2>;
 309                         gpio-controller;
 310                         gpio-ranges = <&pfc 0 0 16>;
 311                         #interrupt-cells = <2>;
 312                         interrupt-controller;
 313                         clocks = <&cpg CPG_MOD 912>;
 314                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 315                         resets = <&cpg 912>;
 316                 };
 317
 318                 gpio1: gpio@e6051000 {
 319                         compatible = "renesas,gpio-r8a7795",
 320                                      "renesas,rcar-gen3-gpio";
 321                         reg = <0 0xe6051000 0 0x50>;
 322                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 323                         #gpio-cells = <2>;
 324                         gpio-controller;
 325                         gpio-ranges = <&pfc 0 32 29>;
 326                         #interrupt-cells = <2>;
 327                         interrupt-controller;
 328                         clocks = <&cpg CPG_MOD 911>;
 329                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 330                         resets = <&cpg 911>;
 331                 };
 332
 333                 gpio2: gpio@e6052000 {
 334                         compatible = "renesas,gpio-r8a7795",
 335                                      "renesas,rcar-gen3-gpio";
 336                         reg = <0 0xe6052000 0 0x50>;
 337                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 338                         #gpio-cells = <2>;
 339                         gpio-controller;
 340                         gpio-ranges = <&pfc 0 64 15>;
 341                         #interrupt-cells = <2>;
 342                         interrupt-controller;
 343                         clocks = <&cpg CPG_MOD 910>;
 344                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 345                         resets = <&cpg 910>;
 346                 };
 347
 348                 gpio3: gpio@e6053000 {
 349                         compatible = "renesas,gpio-r8a7795",
 350                                      "renesas,rcar-gen3-gpio";
 351                         reg = <0 0xe6053000 0 0x50>;
 352                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 353                         #gpio-cells = <2>;
 354                         gpio-controller;
 355                         gpio-ranges = <&pfc 0 96 16>;
 356                         #interrupt-cells = <2>;
 357                         interrupt-controller;
 358                         clocks = <&cpg CPG_MOD 909>;
 359                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 360                         resets = <&cpg 909>;
 361                 };
 362
 363                 gpio4: gpio@e6054000 {
 364                         compatible = "renesas,gpio-r8a7795",
 365                                      "renesas,rcar-gen3-gpio";
 366                         reg = <0 0xe6054000 0 0x50>;
 367                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 368                         #gpio-cells = <2>;
 369                         gpio-controller;
 370                         gpio-ranges = <&pfc 0 128 18>;
 371                         #interrupt-cells = <2>;
 372                         interrupt-controller;
 373                         clocks = <&cpg CPG_MOD 908>;
 374                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 375                         resets = <&cpg 908>;
 376                 };
 377
 378                 gpio5: gpio@e6055000 {
 379                         compatible = "renesas,gpio-r8a7795",
 380                                      "renesas,rcar-gen3-gpio";
 381                         reg = <0 0xe6055000 0 0x50>;
 382                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 383                         #gpio-cells = <2>;
 384                         gpio-controller;
 385                         gpio-ranges = <&pfc 0 160 26>;
 386                         #interrupt-cells = <2>;
 387                         interrupt-controller;
 388                         clocks = <&cpg CPG_MOD 907>;
 389                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 390                         resets = <&cpg 907>;
 391                 };
 392
 393                 gpio6: gpio@e6055400 {
 394                         compatible = "renesas,gpio-r8a7795",
 395                                      "renesas,rcar-gen3-gpio";
 396                         reg = <0 0xe6055400 0 0x50>;
 397                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 398                         #gpio-cells = <2>;
 399                         gpio-controller;
 400                         gpio-ranges = <&pfc 0 192 32>;
 401                         #interrupt-cells = <2>;
 402                         interrupt-controller;
 403                         clocks = <&cpg CPG_MOD 906>;
 404                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 405                         resets = <&cpg 906>;
 406                 };
 407
 408                 gpio7: gpio@e6055800 {
 409                         compatible = "renesas,gpio-r8a7795",
 410                                      "renesas,rcar-gen3-gpio";
 411                         reg = <0 0xe6055800 0 0x50>;
 412                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 413                         #gpio-cells = <2>;
 414                         gpio-controller;
 415                         gpio-ranges = <&pfc 0 224 4>;
 416                         #interrupt-cells = <2>;
 417                         interrupt-controller;
 418                         clocks = <&cpg CPG_MOD 905>;
 419                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 420                         resets = <&cpg 905>;
 421                 };
 422
 423                 pfc: pin-controller@e6060000 {
 424                         compatible = "renesas,pfc-r8a7795";
 425                         reg = <0 0xe6060000 0 0x50c>;
 426                 };
 427
 428                 cpg: clock-controller@e6150000 {
 429                         compatible = "renesas,r8a7795-cpg-mssr";
 430                         reg = <0 0xe6150000 0 0x1000>;
 431                         clocks = <&extal_clk>, <&extalr_clk>;
 432                         clock-names = "extal", "extalr";
 433                         #clock-cells = <2>;
 434                         #power-domain-cells = <0>;
 435                         #reset-cells = <1>;
 436                 };
 437
 438                 rst: reset-controller@e6160000 {
 439                         compatible = "renesas,r8a7795-rst";
 440                         reg = <0 0xe6160000 0 0x0200>;
 441                 };
 442
 443                 sysc: system-controller@e6180000 {
 444                         compatible = "renesas,r8a7795-sysc";
 445                         reg = <0 0xe6180000 0 0x0400>;
 446                         #power-domain-cells = <1>;
 447                 };
 448
 449                 tsc: thermal@e6198000 {
 450                         compatible = "renesas,r8a7795-thermal";
 451                         reg = <0 0xe6198000 0 0x100>,
 452                               <0 0xe61a0000 0 0x100>,
 453                               <0 0xe61a8000 0 0x100>;
 454                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
 455                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
 456                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 457                         clocks = <&cpg CPG_MOD 522>;
 458                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 459                         resets = <&cpg 522>;
 460                         #thermal-sensor-cells = <1>;
 461                         status = "okay";
 462                 };
 463
 464                 intc_ex: interrupt-controller@e61c0000 {
 465                         compatible = "renesas,intc-ex-r8a7795", "renesas,irqc";
 466                         #interrupt-cells = <2>;
 467                         interrupt-controller;
 468                         reg = <0 0xe61c0000 0 0x200>;
 469                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
 470                                       GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
 471                                       GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
 472                                       GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
 473                                       GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
 474                                       GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 475                         clocks = <&cpg CPG_MOD 407>;
 476                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 477                         resets = <&cpg 407>;
 478                 };
 479
 480                 i2c0: i2c@e6500000 {
 481                         #address-cells = <1>;
 482                         #size-cells = <0>;
 483                         compatible = "renesas,i2c-r8a7795",
 484                                      "renesas,rcar-gen3-i2c";
 485                         reg = <0 0xe6500000 0 0x40>;
 486                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 487                         clocks = <&cpg CPG_MOD 931>;
 488                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 489                         resets = <&cpg 931>;
 490                         dmas = <&dmac1 0x91>, <&dmac1 0x90>,
 491                                <&dmac2 0x91>, <&dmac2 0x90>;
 492                         dma-names = "tx", "rx", "tx", "rx";
 493                         i2c-scl-internal-delay-ns = <110>;
 494                         status = "disabled";
 495                 };
 496
 497                 i2c1: i2c@e6508000 {
 498                         #address-cells = <1>;
 499                         #size-cells = <0>;
 500                         compatible = "renesas,i2c-r8a7795",
 501                                      "renesas,rcar-gen3-i2c";
 502                         reg = <0 0xe6508000 0 0x40>;
 503                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 504                         clocks = <&cpg CPG_MOD 930>;
 505                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 506                         resets = <&cpg 930>;
 507                         dmas = <&dmac1 0x93>, <&dmac1 0x92>,
 508                                <&dmac2 0x93>, <&dmac2 0x92>;
 509                         dma-names = "tx", "rx", "tx", "rx";
 510                         i2c-scl-internal-delay-ns = <6>;
 511                         status = "disabled";
 512                 };
 513
 514                 i2c2: i2c@e6510000 {
 515                         #address-cells = <1>;
 516                         #size-cells = <0>;
 517                         compatible = "renesas,i2c-r8a7795",
 518                                      "renesas,rcar-gen3-i2c";
 519                         reg = <0 0xe6510000 0 0x40>;
 520                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 521                         clocks = <&cpg CPG_MOD 929>;
 522                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 523                         resets = <&cpg 929>;
 524                         dmas = <&dmac1 0x95>, <&dmac1 0x94>,
 525                                <&dmac2 0x95>, <&dmac2 0x94>;
 526                         dma-names = "tx", "rx", "tx", "rx";
 527                         i2c-scl-internal-delay-ns = <6>;
 528                         status = "disabled";
 529                 };
 530
 531                 i2c3: i2c@e66d0000 {
 532                         #address-cells = <1>;
 533                         #size-cells = <0>;
 534                         compatible = "renesas,i2c-r8a7795",
 535                                      "renesas,rcar-gen3-i2c";
 536                         reg = <0 0xe66d0000 0 0x40>;
 537                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 538                         clocks = <&cpg CPG_MOD 928>;
 539                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 540                         resets = <&cpg 928>;
 541                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 542                         dma-names = "tx", "rx";
 543                         i2c-scl-internal-delay-ns = <110>;
 544                         status = "disabled";
 545                 };
 546
 547                 i2c4: i2c@e66d8000 {
 548                         #address-cells = <1>;
 549                         #size-cells = <0>;
 550                         compatible = "renesas,i2c-r8a7795",
 551                                      "renesas,rcar-gen3-i2c";
 552                         reg = <0 0xe66d8000 0 0x40>;
 553                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 554                         clocks = <&cpg CPG_MOD 927>;
 555                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 556                         resets = <&cpg 927>;
 557                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 558                         dma-names = "tx", "rx";
 559                         i2c-scl-internal-delay-ns = <110>;
 560                         status = "disabled";
 561                 };
 562
 563                 i2c5: i2c@e66e0000 {
 564                         #address-cells = <1>;
 565                         #size-cells = <0>;
 566                         compatible = "renesas,i2c-r8a7795",
 567                                      "renesas,rcar-gen3-i2c";
 568                         reg = <0 0xe66e0000 0 0x40>;
 569                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 570                         clocks = <&cpg CPG_MOD 919>;
 571                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 572                         resets = <&cpg 919>;
 573                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 574                         dma-names = "tx", "rx";
 575                         i2c-scl-internal-delay-ns = <110>;
 576                         status = "disabled";
 577                 };
 578
 579                 i2c6: i2c@e66e8000 {
 580                         #address-cells = <1>;
 581                         #size-cells = <0>;
 582                         compatible = "renesas,i2c-r8a7795",
 583                                      "renesas,rcar-gen3-i2c";
 584                         reg = <0 0xe66e8000 0 0x40>;
 585                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 586                         clocks = <&cpg CPG_MOD 918>;
 587                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 588                         resets = <&cpg 918>;
 589                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
 590                         dma-names = "tx", "rx";
 591                         i2c-scl-internal-delay-ns = <6>;
 592                         status = "disabled";
 593                 };
 594
 595                 i2c_dvfs: i2c@e60b0000 {
 596                         #address-cells = <1>;
 597                         #size-cells = <0>;
 598                         compatible = "renesas,iic-r8a7795",
 599                                      "renesas,rcar-gen3-iic",
 600                                      "renesas,rmobile-iic";
 601                         reg = <0 0xe60b0000 0 0x425>;
 602                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 603                         clocks = <&cpg CPG_MOD 926>;
 604                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 605                         resets = <&cpg 926>;
 606                         dmas = <&dmac0 0x11>, <&dmac0 0x10>;
 607                         dma-names = "tx", "rx";
 608                         status = "disabled";
 609                 };
 610
 611                 hscif0: serial@e6540000 {
 612                         compatible = "renesas,hscif-r8a7795",
 613                                      "renesas,rcar-gen3-hscif",
 614                                      "renesas,hscif";
 615                         reg = <0 0xe6540000 0 96>;
 616                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 617                         clocks = <&cpg CPG_MOD 520>,
 618                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 619                                  <&scif_clk>;
 620                         clock-names = "fck", "brg_int", "scif_clk";
 621                         dmas = <&dmac1 0x31>, <&dmac1 0x30>,
 622                                <&dmac2 0x31>, <&dmac2 0x30>;
 623                         dma-names = "tx", "rx", "tx", "rx";
 624                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 625                         resets = <&cpg 520>;
 626                         status = "disabled";
 627                 };
 628
 629                 hscif1: serial@e6550000 {
 630                         compatible = "renesas,hscif-r8a7795",
 631                                      "renesas,rcar-gen3-hscif",
 632                                      "renesas,hscif";
 633                         reg = <0 0xe6550000 0 96>;
 634                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 635                         clocks = <&cpg CPG_MOD 519>,
 636                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 637                                  <&scif_clk>;
 638                         clock-names = "fck", "brg_int", "scif_clk";
 639                         dmas = <&dmac1 0x33>, <&dmac1 0x32>,
 640                                <&dmac2 0x33>, <&dmac2 0x32>;
 641                         dma-names = "tx", "rx", "tx", "rx";
 642                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 643                         resets = <&cpg 519>;
 644                         status = "disabled";
 645                 };
 646
 647                 hscif2: serial@e6560000 {
 648                         compatible = "renesas,hscif-r8a7795",
 649                                      "renesas,rcar-gen3-hscif",
 650                                      "renesas,hscif";
 651                         reg = <0 0xe6560000 0 96>;
 652                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 653                         clocks = <&cpg CPG_MOD 518>,
 654                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 655                                  <&scif_clk>;
 656                         clock-names = "fck", "brg_int", "scif_clk";
 657                         dmas = <&dmac1 0x35>, <&dmac1 0x34>,
 658                                <&dmac2 0x35>, <&dmac2 0x34>;
 659                         dma-names = "tx", "rx";
 660                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 661                         resets = <&cpg 518>;
 662                         status = "disabled";
 663                 };
 664
 665                 hscif3: serial@e66a0000 {
 666                         compatible = "renesas,hscif-r8a7795",
 667                                      "renesas,rcar-gen3-hscif",
 668                                      "renesas,hscif";
 669                         reg = <0 0xe66a0000 0 96>;
 670                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 671                         clocks = <&cpg CPG_MOD 517>,
 672                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 673                                  <&scif_clk>;
 674                         clock-names = "fck", "brg_int", "scif_clk";
 675                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 676                         dma-names = "tx", "rx";
 677                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 678                         resets = <&cpg 517>;
 679                         status = "disabled";
 680                 };
 681
 682                 hscif4: serial@e66b0000 {
 683                         compatible = "renesas,hscif-r8a7795",
 684                                      "renesas,rcar-gen3-hscif",
 685                                      "renesas,hscif";
 686                         reg = <0 0xe66b0000 0 96>;
 687                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 688                         clocks = <&cpg CPG_MOD 516>,
 689                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 690                                  <&scif_clk>;
 691                         clock-names = "fck", "brg_int", "scif_clk";
 692                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 693                         dma-names = "tx", "rx";
 694                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 695                         resets = <&cpg 516>;
 696                         status = "disabled";
 697                 };
 698
 699                 hsusb: usb@e6590000 {
 700                         compatible = "renesas,usbhs-r8a7795",
 701                                      "renesas,rcar-gen3-usbhs";
 702                         reg = <0 0xe6590000 0 0x100>;
 703                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 704                         clocks = <&cpg CPG_MOD 704>;
 705                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
 706                                <&usb_dmac1 0>, <&usb_dmac1 1>;
 707                         dma-names = "ch0", "ch1", "ch2", "ch3";
 708                         renesas,buswait = <11>;
 709                         phys = <&usb2_phy0>;
 710                         phy-names = "usb";
 711                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 712                         resets = <&cpg 704>;
 713                         status = "disabled";
 714                 };
 715
 716                 hsusb3: usb@e659c000 {
 717                         compatible = "renesas,usbhs-r8a7795",
 718                                      "renesas,rcar-gen3-usbhs";
 719                         reg = <0 0xe659c000 0 0x100>;
 720                         interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
 721                         clocks = <&cpg CPG_MOD 705>;
 722                         dmas = <&usb_dmac2 0>, <&usb_dmac2 1>,
 723                                <&usb_dmac3 0>, <&usb_dmac3 1>;
 724                         dma-names = "ch0", "ch1", "ch2", "ch3";
 725                         renesas,buswait = <11>;
 726                         phys = <&usb2_phy3>;
 727                         phy-names = "usb";
 728                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 729                         resets = <&cpg 705>;
 730                         status = "disabled";
 731                 };
 732
 733                 usb_dmac0: dma-controller@e65a0000 {
 734                         compatible = "renesas,r8a7795-usb-dmac",
 735                                      "renesas,usb-dmac";
 736                         reg = <0 0xe65a0000 0 0x100>;
 737                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
 738                                       GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 739                         interrupt-names = "ch0", "ch1";
 740                         clocks = <&cpg CPG_MOD 330>;
 741                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 742                         resets = <&cpg 330>;
 743                         #dma-cells = <1>;
 744                         dma-channels = <2>;
 745                 };
 746
 747                 usb_dmac1: dma-controller@e65b0000 {
 748                         compatible = "renesas,r8a7795-usb-dmac",
 749                                      "renesas,usb-dmac";
 750                         reg = <0 0xe65b0000 0 0x100>;
 751                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
 752                                       GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 753                         interrupt-names = "ch0", "ch1";
 754                         clocks = <&cpg CPG_MOD 331>;
 755                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 756                         resets = <&cpg 331>;
 757                         #dma-cells = <1>;
 758                         dma-channels = <2>;
 759                 };
 760
 761                 usb_dmac2: dma-controller@e6460000 {
 762                         compatible = "renesas,r8a7795-usb-dmac",
 763                                      "renesas,usb-dmac";
 764                         reg = <0 0xe6460000 0 0x100>;
 765                         interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH
 766                                       GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
 767                         interrupt-names = "ch0", "ch1";
 768                         clocks = <&cpg CPG_MOD 326>;
 769                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 770                         resets = <&cpg 326>;
 771                         #dma-cells = <1>;
 772                         dma-channels = <2>;
 773                 };
 774
 775                 usb_dmac3: dma-controller@e6470000 {
 776                         compatible = "renesas,r8a7795-usb-dmac",
 777                                      "renesas,usb-dmac";
 778                         reg = <0 0xe6470000 0 0x100>;
 779                         interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH
 780                                       GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
 781                         interrupt-names = "ch0", "ch1";
 782                         clocks = <&cpg CPG_MOD 329>;
 783                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 784                         resets = <&cpg 329>;
 785                         #dma-cells = <1>;
 786                         dma-channels = <2>;
 787                 };
 788
 789                 usb3_phy0: usb-phy@e65ee000 {
 790                         compatible = "renesas,r8a7795-usb3-phy",
 791                                      "renesas,rcar-gen3-usb3-phy";
 792                         reg = <0 0xe65ee000 0 0x90>;
 793                         clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
 794                                  <&usb_extal_clk>;
 795                         clock-names = "usb3-if", "usb3s_clk", "usb_extal";
 796                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 797                         resets = <&cpg 328>;
 798                         #phy-cells = <0>;
 799                         status = "disabled";
 800                 };
 801
 802                 dmac0: dma-controller@e6700000 {
 803                         compatible = "renesas,dmac-r8a7795",
 804                                      "renesas,rcar-dmac";
 805                         reg = <0 0xe6700000 0 0x10000>;
 806                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
 807                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 808                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 809                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 810                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 811                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 812                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 813                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 814                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 815                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 816                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 817                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 818                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 819                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 820                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 821                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
 822                                       GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 823                         interrupt-names = "error",
 824                                         "ch0", "ch1", "ch2", "ch3",
 825                                         "ch4", "ch5", "ch6", "ch7",
 826                                         "ch8", "ch9", "ch10", "ch11",
 827                                         "ch12", "ch13", "ch14", "ch15";
 828                         clocks = <&cpg CPG_MOD 219>;
 829                         clock-names = "fck";
 830                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 831                         resets = <&cpg 219>;
 832                         #dma-cells = <1>;
 833                         dma-channels = <16>;
 834                         iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
 835                                <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
 836                                <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
 837                                <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
 838                                <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
 839                                <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
 840                                <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
 841                                <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
 842                 };
 843
 844                 dmac1: dma-controller@e7300000 {
 845                         compatible = "renesas,dmac-r8a7795",
 846                                      "renesas,rcar-dmac";
 847                         reg = <0 0xe7300000 0 0x10000>;
 848                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 849                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 850                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 851                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 852                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 853                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 854                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 855                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 856                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 857                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 858                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 859                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 860                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 861                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 862                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 863                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
 864                                       GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 865                         interrupt-names = "error",
 866                                         "ch0", "ch1", "ch2", "ch3",
 867                                         "ch4", "ch5", "ch6", "ch7",
 868                                         "ch8", "ch9", "ch10", "ch11",
 869                                         "ch12", "ch13", "ch14", "ch15";
 870                         clocks = <&cpg CPG_MOD 218>;
 871                         clock-names = "fck";
 872                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 873                         resets = <&cpg 218>;
 874                         #dma-cells = <1>;
 875                         dma-channels = <16>;
 876                         iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
 877                                <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
 878                                <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
 879                                <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
 880                                <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
 881                                <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
 882                                <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
 883                                <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
 884                 };
 885
 886                 dmac2: dma-controller@e7310000 {
 887                         compatible = "renesas,dmac-r8a7795",
 888                                      "renesas,rcar-dmac";
 889                         reg = <0 0xe7310000 0 0x10000>;
 890                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
 891                                       GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
 892                                       GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
 893                                       GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
 894                                       GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
 895                                       GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
 896                                       GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
 897                                       GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
 898                                       GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
 899                                       GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
 900                                       GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
 901                                       GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
 902                                       GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
 903                                       GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
 904                                       GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
 905                                       GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
 906                                       GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 907                         interrupt-names = "error",
 908                                         "ch0", "ch1", "ch2", "ch3",
 909                                         "ch4", "ch5", "ch6", "ch7",
 910                                         "ch8", "ch9", "ch10", "ch11",
 911                                         "ch12", "ch13", "ch14", "ch15";
 912                         clocks = <&cpg CPG_MOD 217>;
 913                         clock-names = "fck";
 914                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 915                         resets = <&cpg 217>;
 916                         #dma-cells = <1>;
 917                         dma-channels = <16>;
 918                         iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
 919                                <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
 920                                <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
 921                                <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
 922                                <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
 923                                <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
 924                                <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
 925                                <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
 926                 };
 927
 928                 ipmmu_ds0: mmu@e6740000 {
 929                         compatible = "renesas,ipmmu-r8a7795";
 930                         reg = <0 0xe6740000 0 0x1000>;
 931                         renesas,ipmmu-main = <&ipmmu_mm 0>;
 932                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 933                         #iommu-cells = <1>;
 934                 };
 935
 936                 ipmmu_ds1: mmu@e7740000 {
 937                         compatible = "renesas,ipmmu-r8a7795";
 938                         reg = <0 0xe7740000 0 0x1000>;
 939                         renesas,ipmmu-main = <&ipmmu_mm 1>;
 940                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 941                         #iommu-cells = <1>;
 942                 };
 943
 944                 ipmmu_hc: mmu@e6570000 {
 945                         compatible = "renesas,ipmmu-r8a7795";
 946                         reg = <0 0xe6570000 0 0x1000>;
 947                         renesas,ipmmu-main = <&ipmmu_mm 2>;
 948                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 949                         #iommu-cells = <1>;
 950                 };
 951
 952                 ipmmu_ir: mmu@ff8b0000 {
 953                         compatible = "renesas,ipmmu-r8a7795";
 954                         reg = <0 0xff8b0000 0 0x1000>;
 955                         renesas,ipmmu-main = <&ipmmu_mm 3>;
 956                         power-domains = <&sysc R8A7795_PD_A3IR>;
 957                         #iommu-cells = <1>;
 958                 };
 959
 960                 ipmmu_mm: mmu@e67b0000 {
 961                         compatible = "renesas,ipmmu-r8a7795";
 962                         reg = <0 0xe67b0000 0 0x1000>;
 963                         interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
 964                                      <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
 965                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 966                         #iommu-cells = <1>;
 967                 };
 968
 969                 ipmmu_mp0: mmu@ec670000 {
 970                         compatible = "renesas,ipmmu-r8a7795";
 971                         reg = <0 0xec670000 0 0x1000>;
 972                         renesas,ipmmu-main = <&ipmmu_mm 4>;
 973                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 974                         #iommu-cells = <1>;
 975                 };
 976
 977                 ipmmu_pv0: mmu@fd800000 {
 978                         compatible = "renesas,ipmmu-r8a7795";
 979                         reg = <0 0xfd800000 0 0x1000>;
 980                         renesas,ipmmu-main = <&ipmmu_mm 6>;
 981                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 982                         #iommu-cells = <1>;
 983                 };
 984
 985                 ipmmu_pv1: mmu@fd950000 {
 986                         compatible = "renesas,ipmmu-r8a7795";
 987                         reg = <0 0xfd950000 0 0x1000>;
 988                         renesas,ipmmu-main = <&ipmmu_mm 7>;
 989                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 990                         #iommu-cells = <1>;
 991                 };
 992
 993                 ipmmu_pv2: mmu@fd960000 {
 994                         compatible = "renesas,ipmmu-r8a7795";
 995                         reg = <0 0xfd960000 0 0x1000>;
 996                         renesas,ipmmu-main = <&ipmmu_mm 8>;
 997                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 998                         #iommu-cells = <1>;
 999                 };
1000
1001                 ipmmu_pv3: mmu@fd970000 {
1002                         compatible = "renesas,ipmmu-r8a7795";
1003                         reg = <0 0xfd970000 0 0x1000>;
1004                         renesas,ipmmu-main = <&ipmmu_mm 9>;
1005                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1006                         #iommu-cells = <1>;
1007                 };
1008
1009                 ipmmu_rt: mmu@ffc80000 {
1010                         compatible = "renesas,ipmmu-r8a7795";
1011                         reg = <0 0xffc80000 0 0x1000>;
1012                         renesas,ipmmu-main = <&ipmmu_mm 10>;
1013                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1014                         #iommu-cells = <1>;
1015                 };
1016
1017                 ipmmu_vc0: mmu@fe6b0000 {
1018                         compatible = "renesas,ipmmu-r8a7795";
1019                         reg = <0 0xfe6b0000 0 0x1000>;
1020                         renesas,ipmmu-main = <&ipmmu_mm 12>;
1021                         power-domains = <&sysc R8A7795_PD_A3VC>;
1022                         #iommu-cells = <1>;
1023                 };
1024
1025                 ipmmu_vc1: mmu@fe6f0000 {
1026                         compatible = "renesas,ipmmu-r8a7795";
1027                         reg = <0 0xfe6f0000 0 0x1000>;
1028                         renesas,ipmmu-main = <&ipmmu_mm 13>;
1029                         power-domains = <&sysc R8A7795_PD_A3VC>;
1030                         #iommu-cells = <1>;
1031                 };
1032
1033                 ipmmu_vi0: mmu@febd0000 {
1034                         compatible = "renesas,ipmmu-r8a7795";
1035                         reg = <0 0xfebd0000 0 0x1000>;
1036                         renesas,ipmmu-main = <&ipmmu_mm 14>;
1037                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1038                         #iommu-cells = <1>;
1039                 };
1040
1041                 ipmmu_vi1: mmu@febe0000 {
1042                         compatible = "renesas,ipmmu-r8a7795";
1043                         reg = <0 0xfebe0000 0 0x1000>;
1044                         renesas,ipmmu-main = <&ipmmu_mm 15>;
1045                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1046                         #iommu-cells = <1>;
1047                 };
1048
1049                 ipmmu_vp0: mmu@fe990000 {
1050                         compatible = "renesas,ipmmu-r8a7795";
1051                         reg = <0 0xfe990000 0 0x1000>;
1052                         renesas,ipmmu-main = <&ipmmu_mm 16>;
1053                         power-domains = <&sysc R8A7795_PD_A3VP>;
1054                         #iommu-cells = <1>;
1055                 };
1056
1057                 ipmmu_vp1: mmu@fe980000 {
1058                         compatible = "renesas,ipmmu-r8a7795";
1059                         reg = <0 0xfe980000 0 0x1000>;
1060                         renesas,ipmmu-main = <&ipmmu_mm 17>;
1061                         power-domains = <&sysc R8A7795_PD_A3VP>;
1062                         #iommu-cells = <1>;
1063                 };
1064
1065                 avb: ethernet@e6800000 {
1066                         compatible = "renesas,etheravb-r8a7795",
1067                                      "renesas,etheravb-rcar-gen3";
1068                         reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
1069                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
1070                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
1071                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
1072                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
1073                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
1074                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
1075                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
1076                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
1077                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
1078                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
1079                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
1080                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
1081                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
1082                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
1083                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
1084                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
1085                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
1086                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
1087                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
1088                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
1089                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
1090                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
1091                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
1092                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
1093                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
1094                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
1095                                           "ch4", "ch5", "ch6", "ch7",
1096                                           "ch8", "ch9", "ch10", "ch11",
1097                                           "ch12", "ch13", "ch14", "ch15",
1098                                           "ch16", "ch17", "ch18", "ch19",
1099                                           "ch20", "ch21", "ch22", "ch23",
1100                                           "ch24";
1101                         clocks = <&cpg CPG_MOD 812>;
1102                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1103                         resets = <&cpg 812>;
1104                         phy-mode = "rgmii";
1105                         iommus = <&ipmmu_ds0 16>;
1106                         #address-cells = <1>;
1107                         #size-cells = <0>;
1108                         status = "disabled";
1109                 };
1110
1111                 can0: can@e6c30000 {
1112                         compatible = "renesas,can-r8a7795",
1113                                      "renesas,rcar-gen3-can";
1114                         reg = <0 0xe6c30000 0 0x1000>;
1115                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1116                         clocks = <&cpg CPG_MOD 916>,
1117                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
1118                                <&can_clk>;
1119                         clock-names = "clkp1", "clkp2", "can_clk";
1120                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
1121                         assigned-clock-rates = <40000000>;
1122                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1123                         resets = <&cpg 916>;
1124                         status = "disabled";
1125                 };
1126
1127                 can1: can@e6c38000 {
1128                         compatible = "renesas,can-r8a7795",
1129                                      "renesas,rcar-gen3-can";
1130                         reg = <0 0xe6c38000 0 0x1000>;
1131                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1132                         clocks = <&cpg CPG_MOD 915>,
1133                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
1134                                <&can_clk>;
1135                         clock-names = "clkp1", "clkp2", "can_clk";
1136                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
1137                         assigned-clock-rates = <40000000>;
1138                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1139                         resets = <&cpg 915>;
1140                         status = "disabled";
1141                 };
1142
1143                 canfd: can@e66c0000 {
1144                         compatible = "renesas,r8a7795-canfd",
1145                                      "renesas,rcar-gen3-canfd";
1146                         reg = <0 0xe66c0000 0 0x8000>;
1147                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1148                                    <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1149                         clocks = <&cpg CPG_MOD 914>,
1150                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
1151                                <&can_clk>;
1152                         clock-names = "fck", "canfd", "can_clk";
1153                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
1154                         assigned-clock-rates = <40000000>;
1155                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1156                         resets = <&cpg 914>;
1157                         status = "disabled";
1158
1159                         channel0 {
1160                                 status = "disabled";
1161                         };
1162
1163                         channel1 {
1164                                 status = "disabled";
1165                         };
1166                 };
1167
1168                 pwm0: pwm@e6e30000 {
1169                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1170                         reg = <0 0xe6e30000 0 0x8>;
1171                         clocks = <&cpg CPG_MOD 523>;
1172                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1173                         resets = <&cpg 523>;
1174                         #pwm-cells = <2>;
1175                         status = "disabled";
1176                 };
1177
1178                 pwm1: pwm@e6e31000 {
1179                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1180                         reg = <0 0xe6e31000 0 0x8>;
1181                         clocks = <&cpg CPG_MOD 523>;
1182                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1183                         resets = <&cpg 523>;
1184                         #pwm-cells = <2>;
1185                         status = "disabled";
1186                 };
1187
1188                 pwm2: pwm@e6e32000 {
1189                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1190                         reg = <0 0xe6e32000 0 0x8>;
1191                         clocks = <&cpg CPG_MOD 523>;
1192                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1193                         resets = <&cpg 523>;
1194                         #pwm-cells = <2>;
1195                         status = "disabled";
1196                 };
1197
1198                 pwm3: pwm@e6e33000 {
1199                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1200                         reg = <0 0xe6e33000 0 0x8>;
1201                         clocks = <&cpg CPG_MOD 523>;
1202                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1203                         resets = <&cpg 523>;
1204                         #pwm-cells = <2>;
1205                         status = "disabled";
1206                 };
1207
1208                 pwm4: pwm@e6e34000 {
1209                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1210                         reg = <0 0xe6e34000 0 0x8>;
1211                         clocks = <&cpg CPG_MOD 523>;
1212                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1213                         resets = <&cpg 523>;
1214                         #pwm-cells = <2>;
1215                         status = "disabled";
1216                 };
1217
1218                 pwm5: pwm@e6e35000 {
1219                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1220                         reg = <0 0xe6e35000 0 0x8>;
1221                         clocks = <&cpg CPG_MOD 523>;
1222                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1223                         resets = <&cpg 523>;
1224                         #pwm-cells = <2>;
1225                         status = "disabled";
1226                 };
1227
1228                 pwm6: pwm@e6e36000 {
1229                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1230                         reg = <0 0xe6e36000 0 0x8>;
1231                         clocks = <&cpg CPG_MOD 523>;
1232                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1233                         resets = <&cpg 523>;
1234                         #pwm-cells = <2>;
1235                         status = "disabled";
1236                 };
1237
1238                 scif0: serial@e6e60000 {
1239                         compatible = "renesas,scif-r8a7795",
1240                                      "renesas,rcar-gen3-scif", "renesas,scif";
1241                         reg = <0 0xe6e60000 0 64>;
1242                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1243                         clocks = <&cpg CPG_MOD 207>,
1244                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1245                                  <&scif_clk>;
1246                         clock-names = "fck", "brg_int", "scif_clk";
1247                         dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1248                                <&dmac2 0x51>, <&dmac2 0x50>;
1249                         dma-names = "tx", "rx", "tx", "rx";
1250                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1251                         resets = <&cpg 207>;
1252                         status = "disabled";
1253                 };
1254
1255                 scif1: serial@e6e68000 {
1256                         compatible = "renesas,scif-r8a7795",
1257                                      "renesas,rcar-gen3-scif", "renesas,scif";
1258                         reg = <0 0xe6e68000 0 64>;
1259                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1260                         clocks = <&cpg CPG_MOD 206>,
1261                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1262                                  <&scif_clk>;
1263                         clock-names = "fck", "brg_int", "scif_clk";
1264                         dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1265                                <&dmac2 0x53>, <&dmac2 0x52>;
1266                         dma-names = "tx", "rx", "tx", "rx";
1267                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1268                         resets = <&cpg 206>;
1269                         status = "disabled";
1270                 };
1271
1272                 scif2: serial@e6e88000 {
1273                         compatible = "renesas,scif-r8a7795",
1274                                      "renesas,rcar-gen3-scif", "renesas,scif";
1275                         reg = <0 0xe6e88000 0 64>;
1276                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1277                         clocks = <&cpg CPG_MOD 310>,
1278                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1279                                  <&scif_clk>;
1280                         clock-names = "fck", "brg_int", "scif_clk";
1281                         dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1282                                <&dmac2 0x13>, <&dmac2 0x12>;
1283                         dma-names = "tx", "rx", "tx", "rx";
1284                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1285                         resets = <&cpg 310>;
1286                         status = "disabled";
1287                 };
1288
1289                 scif3: serial@e6c50000 {
1290                         compatible = "renesas,scif-r8a7795",
1291                                      "renesas,rcar-gen3-scif", "renesas,scif";
1292                         reg = <0 0xe6c50000 0 64>;
1293                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1294                         clocks = <&cpg CPG_MOD 204>,
1295                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1296                                  <&scif_clk>;
1297                         clock-names = "fck", "brg_int", "scif_clk";
1298                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1299                         dma-names = "tx", "rx";
1300                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1301                         resets = <&cpg 204>;
1302                         status = "disabled";
1303                 };
1304
1305                 scif4: serial@e6c40000 {
1306                         compatible = "renesas,scif-r8a7795",
1307                                      "renesas,rcar-gen3-scif", "renesas,scif";
1308                         reg = <0 0xe6c40000 0 64>;
1309                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1310                         clocks = <&cpg CPG_MOD 203>,
1311                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1312                                  <&scif_clk>;
1313                         clock-names = "fck", "brg_int", "scif_clk";
1314                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1315                         dma-names = "tx", "rx";
1316                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1317                         resets = <&cpg 203>;
1318                         status = "disabled";
1319                 };
1320
1321                 scif5: serial@e6f30000 {
1322                         compatible = "renesas,scif-r8a7795",
1323                                      "renesas,rcar-gen3-scif", "renesas,scif";
1324                         reg = <0 0xe6f30000 0 64>;
1325                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1326                         clocks = <&cpg CPG_MOD 202>,
1327                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1328                                  <&scif_clk>;
1329                         clock-names = "fck", "brg_int", "scif_clk";
1330                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1331                                <&dmac2 0x5b>, <&dmac2 0x5a>;
1332                         dma-names = "tx", "rx", "tx", "rx";
1333                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1334                         resets = <&cpg 202>;
1335                         status = "disabled";
1336                 };
1337
1338                 msiof0: spi@e6e90000 {
1339                         compatible = "renesas,msiof-r8a7795",
1340                                      "renesas,rcar-gen3-msiof";
1341                         reg = <0 0xe6e90000 0 0x0064>;
1342                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1343                         clocks = <&cpg CPG_MOD 211>;
1344                         dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1345                                <&dmac2 0x41>, <&dmac2 0x40>;
1346                         dma-names = "tx", "rx", "tx", "rx";
1347                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1348                         resets = <&cpg 211>;
1349                         #address-cells = <1>;
1350                         #size-cells = <0>;
1351                         status = "disabled";
1352                 };
1353
1354                 msiof1: spi@e6ea0000 {
1355                         compatible = "renesas,msiof-r8a7795",
1356                                      "renesas,rcar-gen3-msiof";
1357                         reg = <0 0xe6ea0000 0 0x0064>;
1358                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1359                         clocks = <&cpg CPG_MOD 210>;
1360                         dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1361                                <&dmac2 0x43>, <&dmac2 0x42>;
1362                         dma-names = "tx", "rx", "tx", "rx";
1363                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1364                         resets = <&cpg 210>;
1365                         #address-cells = <1>;
1366                         #size-cells = <0>;
1367                         status = "disabled";
1368                 };
1369
1370                 msiof2: spi@e6c00000 {
1371                         compatible = "renesas,msiof-r8a7795",
1372                                      "renesas,rcar-gen3-msiof";
1373                         reg = <0 0xe6c00000 0 0x0064>;
1374                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1375                         clocks = <&cpg CPG_MOD 209>;
1376                         dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1377                         dma-names = "tx", "rx";
1378                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1379                         resets = <&cpg 209>;
1380                         #address-cells = <1>;
1381                         #size-cells = <0>;
1382                         status = "disabled";
1383                 };
1384
1385                 msiof3: spi@e6c10000 {
1386                         compatible = "renesas,msiof-r8a7795",
1387                                      "renesas,rcar-gen3-msiof";
1388                         reg = <0 0xe6c10000 0 0x0064>;
1389                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1390                         clocks = <&cpg CPG_MOD 208>;
1391                         dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1392                         dma-names = "tx", "rx";
1393                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1394                         resets = <&cpg 208>;
1395                         #address-cells = <1>;
1396                         #size-cells = <0>;
1397                         status = "disabled";
1398                 };
1399
1400                 vin0: video@e6ef0000 {
1401                         compatible = "renesas,vin-r8a7795";
1402                         reg = <0 0xe6ef0000 0 0x1000>;
1403                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1404                         clocks = <&cpg CPG_MOD 811>;
1405                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1406                         resets = <&cpg 811>;
1407                         renesas,id = <0>;
1408                         status = "disabled";
1409
1410                         ports {
1411                                 #address-cells = <1>;
1412                                 #size-cells = <0>;
1413
1414                                 port@1 {
1415                                         #address-cells = <1>;
1416                                         #size-cells = <0>;
1417
1418                                         reg = <1>;
1419
1420                                         vin0csi20: endpoint@0 {
1421                                                 reg = <0>;
1422                                                 remote-endpoint= <&csi20vin0>;
1423                                         };
1424                                         vin0csi40: endpoint@2 {
1425                                                 reg = <2>;
1426                                                 remote-endpoint= <&csi40vin0>;
1427                                         };
1428                                 };
1429                         };
1430                 };
1431
1432                 vin1: video@e6ef1000 {
1433                         compatible = "renesas,vin-r8a7795";
1434                         reg = <0 0xe6ef1000 0 0x1000>;
1435                         interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1436                         clocks = <&cpg CPG_MOD 810>;
1437                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1438                         resets = <&cpg 810>;
1439                         renesas,id = <1>;
1440                         status = "disabled";
1441
1442                         ports {
1443                                 #address-cells = <1>;
1444                                 #size-cells = <0>;
1445
1446                                 port@1 {
1447                                         #address-cells = <1>;
1448                                         #size-cells = <0>;
1449
1450                                         reg = <1>;
1451
1452                                         vin1csi20: endpoint@0 {
1453                                                 reg = <0>;
1454                                                 remote-endpoint= <&csi20vin1>;
1455                                         };
1456                                         vin1csi40: endpoint@2 {
1457                                                 reg = <2>;
1458                                                 remote-endpoint= <&csi40vin1>;
1459                                         };
1460                                 };
1461                         };
1462                 };
1463
1464                 vin2: video@e6ef2000 {
1465                         compatible = "renesas,vin-r8a7795";
1466                         reg = <0 0xe6ef2000 0 0x1000>;
1467                         interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1468                         clocks = <&cpg CPG_MOD 809>;
1469                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1470                         resets = <&cpg 809>;
1471                         renesas,id = <2>;
1472                         status = "disabled";
1473
1474                         ports {
1475                                 #address-cells = <1>;
1476                                 #size-cells = <0>;
1477
1478                                 port@1 {
1479                                         #address-cells = <1>;
1480                                         #size-cells = <0>;
1481
1482                                         reg = <1>;
1483
1484                                         vin2csi20: endpoint@0 {
1485                                                 reg = <0>;
1486                                                 remote-endpoint= <&csi20vin2>;
1487                                         };
1488                                         vin2csi40: endpoint@2 {
1489                                                 reg = <2>;
1490                                                 remote-endpoint= <&csi40vin2>;
1491                                         };
1492                                 };
1493                         };
1494                 };
1495
1496                 vin3: video@e6ef3000 {
1497                         compatible = "renesas,vin-r8a7795";
1498                         reg = <0 0xe6ef3000 0 0x1000>;
1499                         interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1500                         clocks = <&cpg CPG_MOD 808>;
1501                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1502                         resets = <&cpg 808>;
1503                         renesas,id = <3>;
1504                         status = "disabled";
1505
1506                         ports {
1507                                 #address-cells = <1>;
1508                                 #size-cells = <0>;
1509
1510                                 port@1 {
1511                                         #address-cells = <1>;
1512                                         #size-cells = <0>;
1513
1514                                         reg = <1>;
1515
1516                                         vin3csi20: endpoint@0 {
1517                                                 reg = <0>;
1518                                                 remote-endpoint= <&csi20vin3>;
1519                                         };
1520                                         vin3csi40: endpoint@2 {
1521                                                 reg = <2>;
1522                                                 remote-endpoint= <&csi40vin3>;
1523                                         };
1524                                 };
1525                         };
1526                 };
1527
1528                 vin4: video@e6ef4000 {
1529                         compatible = "renesas,vin-r8a7795";
1530                         reg = <0 0xe6ef4000 0 0x1000>;
1531                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1532                         clocks = <&cpg CPG_MOD 807>;
1533                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1534                         resets = <&cpg 807>;
1535                         renesas,id = <4>;
1536                         status = "disabled";
1537
1538                         ports {
1539                                 #address-cells = <1>;
1540                                 #size-cells = <0>;
1541
1542                                 port@1 {
1543                                         #address-cells = <1>;
1544                                         #size-cells = <0>;
1545
1546                                         reg = <1>;
1547
1548                                         vin4csi20: endpoint@0 {
1549                                                 reg = <0>;
1550                                                 remote-endpoint= <&csi20vin4>;
1551                                         };
1552                                         vin4csi41: endpoint@3 {
1553                                                 reg = <3>;
1554                                                 remote-endpoint= <&csi41vin4>;
1555                                         };
1556                                 };
1557                         };
1558                 };
1559
1560                 vin5: video@e6ef5000 {
1561                         compatible = "renesas,vin-r8a7795";
1562                         reg = <0 0xe6ef5000 0 0x1000>;
1563                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1564                         clocks = <&cpg CPG_MOD 806>;
1565                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1566                         resets = <&cpg 806>;
1567                         renesas,id = <5>;
1568                         status = "disabled";
1569
1570                         ports {
1571                                 #address-cells = <1>;
1572                                 #size-cells = <0>;
1573
1574                                 port@1 {
1575                                         #address-cells = <1>;
1576                                         #size-cells = <0>;
1577
1578                                         reg = <1>;
1579
1580                                         vin5csi20: endpoint@0 {
1581                                                 reg = <0>;
1582                                                 remote-endpoint= <&csi20vin5>;
1583                                         };
1584                                         vin5csi41: endpoint@3 {
1585                                                 reg = <3>;
1586                                                 remote-endpoint= <&csi41vin5>;
1587                                         };
1588                                 };
1589                         };
1590                 };
1591
1592                 vin6: video@e6ef6000 {
1593                         compatible = "renesas,vin-r8a7795";
1594                         reg = <0 0xe6ef6000 0 0x1000>;
1595                         interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1596                         clocks = <&cpg CPG_MOD 805>;
1597                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1598                         resets = <&cpg 805>;
1599                         renesas,id = <6>;
1600                         status = "disabled";
1601
1602                         ports {
1603                                 #address-cells = <1>;
1604                                 #size-cells = <0>;
1605
1606                                 port@1 {
1607                                         #address-cells = <1>;
1608                                         #size-cells = <0>;
1609
1610                                         reg = <1>;
1611
1612                                         vin6csi20: endpoint@0 {
1613                                                 reg = <0>;
1614                                                 remote-endpoint= <&csi20vin6>;
1615                                         };
1616                                         vin6csi41: endpoint@3 {
1617                                                 reg = <3>;
1618                                                 remote-endpoint= <&csi41vin6>;
1619                                         };
1620                                 };
1621                         };
1622                 };
1623
1624                 vin7: video@e6ef7000 {
1625                         compatible = "renesas,vin-r8a7795";
1626                         reg = <0 0xe6ef7000 0 0x1000>;
1627                         interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1628                         clocks = <&cpg CPG_MOD 804>;
1629                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1630                         resets = <&cpg 804>;
1631                         renesas,id = <7>;
1632                         status = "disabled";
1633
1634                         ports {
1635                                 #address-cells = <1>;
1636                                 #size-cells = <0>;
1637
1638                                 port@1 {
1639                                         #address-cells = <1>;
1640                                         #size-cells = <0>;
1641
1642                                         reg = <1>;
1643
1644                                         vin7csi20: endpoint@0 {
1645                                                 reg = <0>;
1646                                                 remote-endpoint= <&csi20vin7>;
1647                                         };
1648                                         vin7csi41: endpoint@3 {
1649                                                 reg = <3>;
1650                                                 remote-endpoint= <&csi41vin7>;
1651                                         };
1652                                 };
1653                         };
1654                 };
1655
1656                 drif00: rif@e6f40000 {
1657                         compatible = "renesas,r8a7795-drif",
1658                                      "renesas,rcar-gen3-drif";
1659                         reg = <0 0xe6f40000 0 0x64>;
1660                         interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
1661                         clocks = <&cpg CPG_MOD 515>;
1662                         clock-names = "fck";
1663                         dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1664                         dma-names = "rx", "rx";
1665                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1666                         resets = <&cpg 515>;
1667                         renesas,bonding = <&drif01>;
1668                         status = "disabled";
1669                 };
1670
1671                 drif01: rif@e6f50000 {
1672                         compatible = "renesas,r8a7795-drif",
1673                                      "renesas,rcar-gen3-drif";
1674                         reg = <0 0xe6f50000 0 0x64>;
1675                         interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
1676                         clocks = <&cpg CPG_MOD 514>;
1677                         clock-names = "fck";
1678                         dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1679                         dma-names = "rx", "rx";
1680                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1681                         resets = <&cpg 514>;
1682                         renesas,bonding = <&drif00>;
1683                         status = "disabled";
1684                 };
1685
1686                 drif10: rif@e6f60000 {
1687                         compatible = "renesas,r8a7795-drif",
1688                                      "renesas,rcar-gen3-drif";
1689                         reg = <0 0xe6f60000 0 0x64>;
1690                         interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
1691                         clocks = <&cpg CPG_MOD 513>;
1692                         clock-names = "fck";
1693                         dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1694                         dma-names = "rx", "rx";
1695                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1696                         resets = <&cpg 513>;
1697                         renesas,bonding = <&drif11>;
1698                         status = "disabled";
1699                 };
1700
1701                 drif11: rif@e6f70000 {
1702                         compatible = "renesas,r8a7795-drif",
1703                                      "renesas,rcar-gen3-drif";
1704                         reg = <0 0xe6f70000 0 0x64>;
1705                         interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
1706                         clocks = <&cpg CPG_MOD 512>;
1707                         clock-names = "fck";
1708                         dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1709                         dma-names = "rx", "rx";
1710                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1711                         resets = <&cpg 512>;
1712                         renesas,bonding = <&drif10>;
1713                         status = "disabled";
1714                 };
1715
1716                 drif20: rif@e6f80000 {
1717                         compatible = "renesas,r8a7795-drif",
1718                                      "renesas,rcar-gen3-drif";
1719                         reg = <0 0xe6f80000 0 0x64>;
1720                         interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1721                         clocks = <&cpg CPG_MOD 511>;
1722                         clock-names = "fck";
1723                         dmas = <&dmac1 0x28>, <&dmac2 0x28>;
1724                         dma-names = "rx", "rx";
1725                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1726                         resets = <&cpg 511>;
1727                         renesas,bonding = <&drif21>;
1728                         status = "disabled";
1729                 };
1730
1731                 drif21: rif@e6f90000 {
1732                         compatible = "renesas,r8a7795-drif",
1733                                      "renesas,rcar-gen3-drif";
1734                         reg = <0 0xe6f90000 0 0x64>;
1735                         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
1736                         clocks = <&cpg CPG_MOD 510>;
1737                         clock-names = "fck";
1738                         dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
1739                         dma-names = "rx", "rx";
1740                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1741                         resets = <&cpg 510>;
1742                         renesas,bonding = <&drif20>;
1743                         status = "disabled";
1744                 };
1745
1746                 drif30: rif@e6fa0000 {
1747                         compatible = "renesas,r8a7795-drif",
1748                                      "renesas,rcar-gen3-drif";
1749                         reg = <0 0xe6fa0000 0 0x64>;
1750                         interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
1751                         clocks = <&cpg CPG_MOD 509>;
1752                         clock-names = "fck";
1753                         dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
1754                         dma-names = "rx", "rx";
1755                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1756                         resets = <&cpg 509>;
1757                         renesas,bonding = <&drif31>;
1758                         status = "disabled";
1759                 };
1760
1761                 drif31: rif@e6fb0000 {
1762                         compatible = "renesas,r8a7795-drif",
1763                                      "renesas,rcar-gen3-drif";
1764                         reg = <0 0xe6fb0000 0 0x64>;
1765                         interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
1766                         clocks = <&cpg CPG_MOD 508>;
1767                         clock-names = "fck";
1768                         dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
1769                         dma-names = "rx", "rx";
1770                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1771                         resets = <&cpg 508>;
1772                         renesas,bonding = <&drif30>;
1773                         status = "disabled";
1774                 };
1775
1776                 rcar_sound: sound@ec500000 {
1777                         /*
1778                          * #sound-dai-cells is required
1779                          *
1780                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1781                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1782                          */
1783                         /*
1784                          * #clock-cells is required for audio_clkout0/1/2/3
1785                          *
1786                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
1787                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
1788                          */
1789                         compatible =  "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
1790                         reg =   <0 0xec500000 0 0x1000>, /* SCU */
1791                                 <0 0xec5a0000 0 0x100>,  /* ADG */
1792                                 <0 0xec540000 0 0x1000>, /* SSIU */
1793                                 <0 0xec541000 0 0x280>,  /* SSI */
1794                                 <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1795                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1796
1797                         clocks = <&cpg CPG_MOD 1005>,
1798                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1799                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1800                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1801                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1802                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1803                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1804                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1805                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1806                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1807                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1808                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1809                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1810                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1811                                  <&audio_clk_a>, <&audio_clk_b>,
1812                                  <&audio_clk_c>,
1813                                  <&cpg CPG_CORE R8A7795_CLK_S0D4>;
1814                         clock-names = "ssi-all",
1815                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1816                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1817                                       "ssi.1", "ssi.0",
1818                                       "src.9", "src.8", "src.7", "src.6",
1819                                       "src.5", "src.4", "src.3", "src.2",
1820                                       "src.1", "src.0",
1821                                       "mix.1", "mix.0",
1822                                       "ctu.1", "ctu.0",
1823                                       "dvc.0", "dvc.1",
1824                                       "clk_a", "clk_b", "clk_c", "clk_i";
1825                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1826                         resets = <&cpg 1005>,
1827                                  <&cpg 1006>, <&cpg 1007>,
1828                                  <&cpg 1008>, <&cpg 1009>,
1829                                  <&cpg 1010>, <&cpg 1011>,
1830                                  <&cpg 1012>, <&cpg 1013>,
1831                                  <&cpg 1014>, <&cpg 1015>;
1832                         reset-names = "ssi-all",
1833                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1834                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1835                                       "ssi.1", "ssi.0";
1836                         status = "disabled";
1837
1838                         rcar_sound,dvc {
1839                                 dvc0: dvc-0 {
1840                                         dmas = <&audma1 0xbc>;
1841                                         dma-names = "tx";
1842                                 };
1843                                 dvc1: dvc-1 {
1844                                         dmas = <&audma1 0xbe>;
1845                                         dma-names = "tx";
1846                                 };
1847                         };
1848
1849                         rcar_sound,mix {
1850                                 mix0: mix-0 { };
1851                                 mix1: mix-1 { };
1852                         };
1853
1854                         rcar_sound,ctu {
1855                                 ctu00: ctu-0 { };
1856                                 ctu01: ctu-1 { };
1857                                 ctu02: ctu-2 { };
1858                                 ctu03: ctu-3 { };
1859                                 ctu10: ctu-4 { };
1860                                 ctu11: ctu-5 { };
1861                                 ctu12: ctu-6 { };
1862                                 ctu13: ctu-7 { };
1863                         };
1864
1865                         rcar_sound,src {
1866                                 src0: src-0 {
1867                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1868                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1869                                         dma-names = "rx", "tx";
1870                                 };
1871                                 src1: src-1 {
1872                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1873                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1874                                         dma-names = "rx", "tx";
1875                                 };
1876                                 src2: src-2 {
1877                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1878                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1879                                         dma-names = "rx", "tx";
1880                                 };
1881                                 src3: src-3 {
1882                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1883                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1884                                         dma-names = "rx", "tx";
1885                                 };
1886                                 src4: src-4 {
1887                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1888                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1889                                         dma-names = "rx", "tx";
1890                                 };
1891                                 src5: src-5 {
1892                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1893                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1894                                         dma-names = "rx", "tx";
1895                                 };
1896                                 src6: src-6 {
1897                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1898                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1899                                         dma-names = "rx", "tx";
1900                                 };
1901                                 src7: src-7 {
1902                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1903                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1904                                         dma-names = "rx", "tx";
1905                                 };
1906                                 src8: src-8 {
1907                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1908                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
1909                                         dma-names = "rx", "tx";
1910                                 };
1911                                 src9: src-9 {
1912                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1913                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
1914                                         dma-names = "rx", "tx";
1915                                 };
1916                         };
1917
1918                         rcar_sound,ssi {
1919                                 ssi0: ssi-0 {
1920                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1921                                         dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1922                                         dma-names = "rx", "tx", "rxu", "txu";
1923                                 };
1924                                 ssi1: ssi-1 {
1925                                          interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1926                                         dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1927                                         dma-names = "rx", "tx", "rxu", "txu";
1928                                 };
1929                                 ssi2: ssi-2 {
1930                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1931                                         dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1932                                         dma-names = "rx", "tx", "rxu", "txu";
1933                                 };
1934                                 ssi3: ssi-3 {
1935                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1936                                         dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1937                                         dma-names = "rx", "tx", "rxu", "txu";
1938                                 };
1939                                 ssi4: ssi-4 {
1940                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1941                                         dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1942                                         dma-names = "rx", "tx", "rxu", "txu";
1943                                 };
1944                                 ssi5: ssi-5 {
1945                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1946                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1947                                         dma-names = "rx", "tx", "rxu", "txu";
1948                                 };
1949                                 ssi6: ssi-6 {
1950                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1951                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1952                                         dma-names = "rx", "tx", "rxu", "txu";
1953                                 };
1954                                 ssi7: ssi-7 {
1955                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1956                                         dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1957                                         dma-names = "rx", "tx", "rxu", "txu";
1958                                 };
1959                                 ssi8: ssi-8 {
1960                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1961                                         dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1962                                         dma-names = "rx", "tx", "rxu", "txu";
1963                                 };
1964                                 ssi9: ssi-9 {
1965                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1966                                         dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1967                                         dma-names = "rx", "tx", "rxu", "txu";
1968                                 };
1969                         };
1970
1971                         ports {
1972                                 #address-cells = <1>;
1973                                 #size-cells = <0>;
1974                                 port@0 {
1975                                         reg = <0>;
1976                                 };
1977                                 port@1 {
1978                                         reg = <1>;
1979                                 };
1980                                 port@2 {
1981                                         reg = <2>;
1982                                 };
1983                         };
1984                 };
1985
1986                 audma0: dma-controller@ec700000 {
1987                         compatible = "renesas,dmac-r8a7795",
1988                                      "renesas,rcar-dmac";
1989                         reg = <0 0xec700000 0 0x10000>;
1990                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
1991                                       GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
1992                                       GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
1993                                       GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
1994                                       GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
1995                                       GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
1996                                       GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
1997                                       GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
1998                                       GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
1999                                       GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
2000                                       GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
2001                                       GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
2002                                       GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
2003                                       GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
2004                                       GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
2005                                       GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
2006                                       GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
2007                         interrupt-names = "error",
2008                                         "ch0", "ch1", "ch2", "ch3",
2009                                         "ch4", "ch5", "ch6", "ch7",
2010                                         "ch8", "ch9", "ch10", "ch11",
2011                                         "ch12", "ch13", "ch14", "ch15";
2012                         clocks = <&cpg CPG_MOD 502>;
2013                         clock-names = "fck";
2014                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2015                         resets = <&cpg 502>;
2016                         #dma-cells = <1>;
2017                         dma-channels = <16>;
2018                         iommus = <&ipmmu_mp0 0>, <&ipmmu_mp0 1>,
2019                                <&ipmmu_mp0 2>, <&ipmmu_mp0 3>,
2020                                <&ipmmu_mp0 4>, <&ipmmu_mp0 5>,
2021                                <&ipmmu_mp0 6>, <&ipmmu_mp0 7>,
2022                                <&ipmmu_mp0 8>, <&ipmmu_mp0 9>,
2023                                <&ipmmu_mp0 10>, <&ipmmu_mp0 11>,
2024                                <&ipmmu_mp0 12>, <&ipmmu_mp0 13>,
2025                                <&ipmmu_mp0 14>, <&ipmmu_mp0 15>;
2026                 };
2027
2028                 audma1: dma-controller@ec720000 {
2029                         compatible = "renesas,dmac-r8a7795",
2030                                      "renesas,rcar-dmac";
2031                         reg = <0 0xec720000 0 0x10000>;
2032                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
2033                                       GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
2034                                       GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
2035                                       GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
2036                                       GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
2037                                       GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
2038                                       GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
2039                                       GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
2040                                       GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
2041                                       GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
2042                                       GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
2043                                       GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
2044                                       GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
2045                                       GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
2046                                       GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
2047                                       GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
2048                                       GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
2049                         interrupt-names = "error",
2050                                         "ch0", "ch1", "ch2", "ch3",
2051                                         "ch4", "ch5", "ch6", "ch7",
2052                                         "ch8", "ch9", "ch10", "ch11",
2053                                         "ch12", "ch13", "ch14", "ch15";
2054                         clocks = <&cpg CPG_MOD 501>;
2055                         clock-names = "fck";
2056                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2057                         resets = <&cpg 501>;
2058                         #dma-cells = <1>;
2059                         dma-channels = <16>;
2060                         iommus = <&ipmmu_mp0 16>, <&ipmmu_mp0 17>,
2061                                <&ipmmu_mp0 18>, <&ipmmu_mp0 19>,
2062                                <&ipmmu_mp0 20>, <&ipmmu_mp0 21>,
2063                                <&ipmmu_mp0 22>, <&ipmmu_mp0 23>,
2064                                <&ipmmu_mp0 24>, <&ipmmu_mp0 25>,
2065                                <&ipmmu_mp0 26>, <&ipmmu_mp0 27>,
2066                                <&ipmmu_mp0 28>, <&ipmmu_mp0 29>,
2067                                <&ipmmu_mp0 30>, <&ipmmu_mp0 31>;
2068                 };
2069
2070                 xhci0: usb@ee000000 {
2071                         compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
2072                         reg = <0 0xee000000 0 0xc00>;
2073                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
2074                         clocks = <&cpg CPG_MOD 328>;
2075                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2076                         resets = <&cpg 328>;
2077                         status = "disabled";
2078                 };
2079
2080                 usb3_peri0: usb@ee020000 {
2081                         compatible = "renesas,r8a7795-usb3-peri",
2082                                      "renesas,rcar-gen3-usb3-peri";
2083                         reg = <0 0xee020000 0 0x400>;
2084                         interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
2085                         clocks = <&cpg CPG_MOD 328>;
2086                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2087                         resets = <&cpg 328>;
2088                         status = "disabled";
2089                 };
2090
2091                 ohci0: usb@ee080000 {
2092                         compatible = "generic-ohci";
2093                         reg = <0 0xee080000 0 0x100>;
2094                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2095                         clocks = <&cpg CPG_MOD 703>;
2096                         phys = <&usb2_phy0>;
2097                         phy-names = "usb";
2098                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2099                         resets = <&cpg 703>;
2100                         status = "disabled";
2101                 };
2102
2103                 ohci1: usb@ee0a0000 {
2104                         compatible = "generic-ohci";
2105                         reg = <0 0xee0a0000 0 0x100>;
2106                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2107                         clocks = <&cpg CPG_MOD 702>;
2108                         phys = <&usb2_phy1>;
2109                         phy-names = "usb";
2110                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2111                         resets = <&cpg 702>;
2112                         status = "disabled";
2113                 };
2114
2115                 ohci2: usb@ee0c0000 {
2116                         compatible = "generic-ohci";
2117                         reg = <0 0xee0c0000 0 0x100>;
2118                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
2119                         clocks = <&cpg CPG_MOD 701>;
2120                         phys = <&usb2_phy2>;
2121                         phy-names = "usb";
2122                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2123                         resets = <&cpg 701>;
2124                         status = "disabled";
2125                 };
2126
2127                 ohci3: usb@ee0e0000 {
2128                         compatible = "generic-ohci";
2129                         reg = <0 0xee0e0000 0 0x100>;
2130                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
2131                         clocks = <&cpg CPG_MOD 700>;
2132                         phys = <&usb2_phy3>;
2133                         phy-names = "usb";
2134                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2135                         resets = <&cpg 700>;
2136                         status = "disabled";
2137                 };
2138
2139                 ehci0: usb@ee080100 {
2140                         compatible = "generic-ehci";
2141                         reg = <0 0xee080100 0 0x100>;
2142                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2143                         clocks = <&cpg CPG_MOD 703>;
2144                         phys = <&usb2_phy0>;
2145                         phy-names = "usb";
2146                         companion = <&ohci0>;
2147                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2148                         resets = <&cpg 703>;
2149                         status = "disabled";
2150                 };
2151
2152                 ehci1: usb@ee0a0100 {
2153                         compatible = "generic-ehci";
2154                         reg = <0 0xee0a0100 0 0x100>;
2155                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2156                         clocks = <&cpg CPG_MOD 702>;
2157                         phys = <&usb2_phy1>;
2158                         phy-names = "usb";
2159                         companion = <&ohci1>;
2160                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2161                         resets = <&cpg 702>;
2162                         status = "disabled";
2163                 };
2164
2165                 ehci2: usb@ee0c0100 {
2166                         compatible = "generic-ehci";
2167                         reg = <0 0xee0c0100 0 0x100>;
2168                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
2169                         clocks = <&cpg CPG_MOD 701>;
2170                         phys = <&usb2_phy2>;
2171                         phy-names = "usb";
2172                         companion = <&ohci2>;
2173                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2174                         resets = <&cpg 701>;
2175                         status = "disabled";
2176                 };
2177
2178                 ehci3: usb@ee0e0100 {
2179                         compatible = "generic-ehci";
2180                         reg = <0 0xee0e0100 0 0x100>;
2181                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
2182                         clocks = <&cpg CPG_MOD 700>;
2183                         phys = <&usb2_phy3>;
2184                         phy-names = "usb";
2185                         companion = <&ohci3>;
2186                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2187                         resets = <&cpg 700>;
2188                         status = "disabled";
2189                 };
2190
2191                 usb2_phy0: usb-phy@ee080200 {
2192                         compatible = "renesas,usb2-phy-r8a7795",
2193                                      "renesas,rcar-gen3-usb2-phy";
2194                         reg = <0 0xee080200 0 0x700>;
2195                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2196                         clocks = <&cpg CPG_MOD 703>;
2197                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2198                         resets = <&cpg 703>;
2199                         #phy-cells = <0>;
2200                         status = "disabled";
2201                 };
2202
2203                 usb2_phy1: usb-phy@ee0a0200 {
2204                         compatible = "renesas,usb2-phy-r8a7795",
2205                                      "renesas,rcar-gen3-usb2-phy";
2206                         reg = <0 0xee0a0200 0 0x700>;
2207                         clocks = <&cpg CPG_MOD 702>;
2208                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2209                         resets = <&cpg 702>;
2210                         #phy-cells = <0>;
2211                         status = "disabled";
2212                 };
2213
2214                 usb2_phy2: usb-phy@ee0c0200 {
2215                         compatible = "renesas,usb2-phy-r8a7795",
2216                                      "renesas,rcar-gen3-usb2-phy";
2217                         reg = <0 0xee0c0200 0 0x700>;
2218                         clocks = <&cpg CPG_MOD 701>;
2219                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2220                         resets = <&cpg 701>;
2221                         #phy-cells = <0>;
2222                         status = "disabled";
2223                 };
2224
2225                 usb2_phy3: usb-phy@ee0e0200 {
2226                         compatible = "renesas,usb2-phy-r8a7795",
2227                                      "renesas,rcar-gen3-usb2-phy";
2228                         reg = <0 0xee0e0200 0 0x700>;
2229                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
2230                         clocks = <&cpg CPG_MOD 700>;
2231                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2232                         resets = <&cpg 700>;
2233                         #phy-cells = <0>;
2234                         status = "disabled";
2235                 };
2236
2237                 sdhi0: sd@ee100000 {
2238                         compatible = "renesas,sdhi-r8a7795",
2239                                      "renesas,rcar-gen3-sdhi";
2240                         reg = <0 0xee100000 0 0x2000>;
2241                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2242                         clocks = <&cpg CPG_MOD 314>;
2243                         max-frequency = <200000000>;
2244                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2245                         resets = <&cpg 314>;
2246                         status = "disabled";
2247                 };
2248
2249                 sdhi1: sd@ee120000 {
2250                         compatible = "renesas,sdhi-r8a7795",
2251                                      "renesas,rcar-gen3-sdhi";
2252                         reg = <0 0xee120000 0 0x2000>;
2253                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2254                         clocks = <&cpg CPG_MOD 313>;
2255                         max-frequency = <200000000>;
2256                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2257                         resets = <&cpg 313>;
2258                         status = "disabled";
2259                 };
2260
2261                 sdhi2: sd@ee140000 {
2262                         compatible = "renesas,sdhi-r8a7795",
2263                                      "renesas,rcar-gen3-sdhi";
2264                         reg = <0 0xee140000 0 0x2000>;
2265                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2266                         clocks = <&cpg CPG_MOD 312>;
2267                         max-frequency = <200000000>;
2268                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2269                         resets = <&cpg 312>;
2270                         status = "disabled";
2271                 };
2272
2273                 sdhi3: sd@ee160000 {
2274                         compatible = "renesas,sdhi-r8a7795",
2275                                      "renesas,rcar-gen3-sdhi";
2276                         reg = <0 0xee160000 0 0x2000>;
2277                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2278                         clocks = <&cpg CPG_MOD 311>;
2279                         max-frequency = <200000000>;
2280                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2281                         resets = <&cpg 311>;
2282                         status = "disabled";
2283                 };
2284
2285                 sata: sata@ee300000 {
2286                         compatible = "renesas,sata-r8a7795",
2287                                      "renesas,rcar-gen3-sata";
2288                         reg = <0 0xee300000 0 0x200000>;
2289                         interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
2290                         clocks = <&cpg CPG_MOD 815>;
2291                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2292                         resets = <&cpg 815>;
2293                         status = "disabled";
2294                         iommus = <&ipmmu_hc 2>;
2295                 };
2296
2297                 gic: interrupt-controller@f1010000 {
2298                         compatible = "arm,gic-400";
2299                         #interrupt-cells = <3>;
2300                         #address-cells = <0>;
2301                         interrupt-controller;
2302                         reg = <0x0 0xf1010000 0 0x1000>,
2303                               <0x0 0xf1020000 0 0x20000>,
2304                               <0x0 0xf1040000 0 0x20000>,
2305                               <0x0 0xf1060000 0 0x20000>;
2306                         interrupts = <GIC_PPI 9
2307                                         (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
2308                         clocks = <&cpg CPG_MOD 408>;
2309                         clock-names = "clk";
2310                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2311                         resets = <&cpg 408>;
2312                 };
2313
2314                 pciec0: pcie@fe000000 {
2315                         compatible = "renesas,pcie-r8a7795",
2316                                      "renesas,pcie-rcar-gen3";
2317                         reg = <0 0xfe000000 0 0x80000>;
2318                         #address-cells = <3>;
2319                         #size-cells = <2>;
2320                         bus-range = <0x00 0xff>;
2321                         device_type = "pci";
2322                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
2323                                 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
2324                                 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
2325                                 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2326                         /* Map all possible DDR as inbound ranges */
2327                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
2328                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2329                                 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2330                                 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2331                         #interrupt-cells = <1>;
2332                         interrupt-map-mask = <0 0 0 0>;
2333                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2334                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2335                         clock-names = "pcie", "pcie_bus";
2336                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2337                         resets = <&cpg 319>;
2338                         status = "disabled";
2339                 };
2340
2341                 pciec1: pcie@ee800000 {
2342                         compatible = "renesas,pcie-r8a7795",
2343                                      "renesas,pcie-rcar-gen3";
2344                         reg = <0 0xee800000 0 0x80000>;
2345                         #address-cells = <3>;
2346                         #size-cells = <2>;
2347                         bus-range = <0x00 0xff>;
2348                         device_type = "pci";
2349                         ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
2350                                 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
2351                                 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
2352                                 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2353                         /* Map all possible DDR as inbound ranges */
2354                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
2355                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2356                                 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2357                                 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2358                         #interrupt-cells = <1>;
2359                         interrupt-map-mask = <0 0 0 0>;
2360                         interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2361                         clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2362                         clock-names = "pcie", "pcie_bus";
2363                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2364                         resets = <&cpg 318>;
2365                         status = "disabled";
2366                 };
2367
2368                 imr-lx4@fe860000 {
2369                         compatible = "renesas,r8a7795-imr-lx4",
2370                                      "renesas,imr-lx4";
2371                         reg = <0 0xfe860000 0 0x2000>;
2372                         interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
2373                         clocks = <&cpg CPG_MOD 823>;
2374                         power-domains = <&sysc R8A7795_PD_A3VC>;
2375                         resets = <&cpg 823>;
2376                 };
2377
2378                 imr-lx4@fe870000 {
2379                         compatible = "renesas,r8a7795-imr-lx4",
2380                                      "renesas,imr-lx4";
2381                         reg = <0 0xfe870000 0 0x2000>;
2382                         interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
2383                         clocks = <&cpg CPG_MOD 822>;
2384                         power-domains = <&sysc R8A7795_PD_A3VC>;
2385                         resets = <&cpg 822>;
2386                 };
2387
2388                 imr-lx4@fe880000 {
2389                         compatible = "renesas,r8a7795-imr-lx4",
2390                                      "renesas,imr-lx4";
2391                         reg = <0 0xfe880000 0 0x2000>;
2392                         interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
2393                         clocks = <&cpg CPG_MOD 821>;
2394                         power-domains = <&sysc R8A7795_PD_A3VC>;
2395                         resets = <&cpg 821>;
2396                 };
2397
2398                 imr-lx4@fe890000 {
2399                         compatible = "renesas,r8a7795-imr-lx4",
2400                                      "renesas,imr-lx4";
2401                         reg = <0 0xfe890000 0 0x2000>;
2402                         interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
2403                         clocks = <&cpg CPG_MOD 820>;
2404                         power-domains = <&sysc R8A7795_PD_A3VC>;
2405                         resets = <&cpg 820>;
2406                 };
2407
2408                 fdp1@fe940000 {
2409                         compatible = "renesas,fdp1";
2410                         reg = <0 0xfe940000 0 0x2400>;
2411                         interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2412                         clocks = <&cpg CPG_MOD 119>;
2413                         power-domains = <&sysc R8A7795_PD_A3VP>;
2414                         resets = <&cpg 119>;
2415                         renesas,fcp = <&fcpf0>;
2416                 };
2417
2418                 fdp1@fe944000 {
2419                         compatible = "renesas,fdp1";
2420                         reg = <0 0xfe944000 0 0x2400>;
2421                         interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
2422                         clocks = <&cpg CPG_MOD 118>;
2423                         power-domains = <&sysc R8A7795_PD_A3VP>;
2424                         resets = <&cpg 118>;
2425                         renesas,fcp = <&fcpf1>;
2426                 };
2427
2428                 fcpf0: fcp@fe950000 {
2429                         compatible = "renesas,fcpf";
2430                         reg = <0 0xfe950000 0 0x200>;
2431                         clocks = <&cpg CPG_MOD 615>;
2432                         power-domains = <&sysc R8A7795_PD_A3VP>;
2433                         resets = <&cpg 615>;
2434                         iommus = <&ipmmu_vp0 0>;
2435                 };
2436
2437                 fcpf1: fcp@fe951000 {
2438                         compatible = "renesas,fcpf";
2439                         reg = <0 0xfe951000 0 0x200>;
2440                         clocks = <&cpg CPG_MOD 614>;
2441                         power-domains = <&sysc R8A7795_PD_A3VP>;
2442                         resets = <&cpg 614>;
2443                         iommus = <&ipmmu_vp1 1>;
2444                 };
2445
2446                 fcpvb0: fcp@fe96f000 {
2447                         compatible = "renesas,fcpv";
2448                         reg = <0 0xfe96f000 0 0x200>;
2449                         clocks = <&cpg CPG_MOD 607>;
2450                         power-domains = <&sysc R8A7795_PD_A3VP>;
2451                         resets = <&cpg 607>;
2452                         iommus = <&ipmmu_vp0 5>;
2453                 };
2454
2455                 fcpvb1: fcp@fe92f000 {
2456                         compatible = "renesas,fcpv";
2457                         reg = <0 0xfe92f000 0 0x200>;
2458                         clocks = <&cpg CPG_MOD 606>;
2459                         power-domains = <&sysc R8A7795_PD_A3VP>;
2460                         resets = <&cpg 606>;
2461                         iommus = <&ipmmu_vp1 7>;
2462                 };
2463
2464                 fcpvi0: fcp@fe9af000 {
2465                         compatible = "renesas,fcpv";
2466                         reg = <0 0xfe9af000 0 0x200>;
2467                         clocks = <&cpg CPG_MOD 611>;
2468                         power-domains = <&sysc R8A7795_PD_A3VP>;
2469                         resets = <&cpg 611>;
2470                         iommus = <&ipmmu_vp0 8>;
2471                 };
2472
2473                 fcpvi1: fcp@fe9bf000 {
2474                         compatible = "renesas,fcpv";
2475                         reg = <0 0xfe9bf000 0 0x200>;
2476                         clocks = <&cpg CPG_MOD 610>;
2477                         power-domains = <&sysc R8A7795_PD_A3VP>;
2478                         resets = <&cpg 610>;
2479                         iommus = <&ipmmu_vp1 9>;
2480                 };
2481
2482                 fcpvd0: fcp@fea27000 {
2483                         compatible = "renesas,fcpv";
2484                         reg = <0 0xfea27000 0 0x200>;
2485                         clocks = <&cpg CPG_MOD 603>;
2486                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2487                         resets = <&cpg 603>;
2488                         iommus = <&ipmmu_vi0 8>;
2489                 };
2490
2491                 fcpvd1: fcp@fea2f000 {
2492                         compatible = "renesas,fcpv";
2493                         reg = <0 0xfea2f000 0 0x200>;
2494                         clocks = <&cpg CPG_MOD 602>;
2495                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2496                         resets = <&cpg 602>;
2497                         iommus = <&ipmmu_vi0 9>;
2498                 };
2499
2500                 fcpvd2: fcp@fea37000 {
2501                         compatible = "renesas,fcpv";
2502                         reg = <0 0xfea37000 0 0x200>;
2503                         clocks = <&cpg CPG_MOD 601>;
2504                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2505                         resets = <&cpg 601>;
2506                         iommus = <&ipmmu_vi1 10>;
2507                 };
2508
2509                 vspbd: vsp@fe960000 {
2510                         compatible = "renesas,vsp2";
2511                         reg = <0 0xfe960000 0 0x8000>;
2512                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2513                         clocks = <&cpg CPG_MOD 626>;
2514                         power-domains = <&sysc R8A7795_PD_A3VP>;
2515                         resets = <&cpg 626>;
2516
2517                         renesas,fcp = <&fcpvb0>;
2518                 };
2519
2520                 vspbc: vsp@fe920000 {
2521                         compatible = "renesas,vsp2";
2522                         reg = <0 0xfe920000 0 0x8000>;
2523                         interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
2524                         clocks = <&cpg CPG_MOD 624>;
2525                         power-domains = <&sysc R8A7795_PD_A3VP>;
2526                         resets = <&cpg 624>;
2527
2528                         renesas,fcp = <&fcpvb1>;
2529                 };
2530
2531                 vspd0: vsp@fea20000 {
2532                         compatible = "renesas,vsp2";
2533                         reg = <0 0xfea20000 0 0x8000>;
2534                         interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2535                         clocks = <&cpg CPG_MOD 623>;
2536                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2537                         resets = <&cpg 623>;
2538
2539                         renesas,fcp = <&fcpvd0>;
2540                 };
2541
2542                 vspd1: vsp@fea28000 {
2543                         compatible = "renesas,vsp2";
2544                         reg = <0 0xfea28000 0 0x8000>;
2545                         interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2546                         clocks = <&cpg CPG_MOD 622>;
2547                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2548                         resets = <&cpg 622>;
2549
2550                         renesas,fcp = <&fcpvd1>;
2551                 };
2552
2553                 vspd2: vsp@fea30000 {
2554                         compatible = "renesas,vsp2";
2555                         reg = <0 0xfea30000 0 0x8000>;
2556                         interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
2557                         clocks = <&cpg CPG_MOD 621>;
2558                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2559                         resets = <&cpg 621>;
2560
2561                         renesas,fcp = <&fcpvd2>;
2562                 };
2563
2564                 vspi0: vsp@fe9a0000 {
2565                         compatible = "renesas,vsp2";
2566                         reg = <0 0xfe9a0000 0 0x8000>;
2567                         interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2568                         clocks = <&cpg CPG_MOD 631>;
2569                         power-domains = <&sysc R8A7795_PD_A3VP>;
2570                         resets = <&cpg 631>;
2571
2572                         renesas,fcp = <&fcpvi0>;
2573                 };
2574
2575                 vspi1: vsp@fe9b0000 {
2576                         compatible = "renesas,vsp2";
2577                         reg = <0 0xfe9b0000 0 0x8000>;
2578                         interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
2579                         clocks = <&cpg CPG_MOD 630>;
2580                         power-domains = <&sysc R8A7795_PD_A3VP>;
2581                         resets = <&cpg 630>;
2582
2583                         renesas,fcp = <&fcpvi1>;
2584                 };
2585
2586                 csi20: csi2@fea80000 {
2587                         compatible = "renesas,r8a7795-csi2";
2588                         reg = <0 0xfea80000 0 0x10000>;
2589                         interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
2590                         clocks = <&cpg CPG_MOD 714>;
2591                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2592                         resets = <&cpg 714>;
2593                         status = "disabled";
2594
2595                         ports {
2596                                 #address-cells = <1>;
2597                                 #size-cells = <0>;
2598
2599                                 port@1 {
2600                                         #address-cells = <1>;
2601                                         #size-cells = <0>;
2602
2603                                         reg = <1>;
2604
2605                                         csi20vin0: endpoint@0 {
2606                                                 reg = <0>;
2607                                                 remote-endpoint = <&vin0csi20>;
2608                                         };
2609                                         csi20vin1: endpoint@1 {
2610                                                 reg = <1>;
2611                                                 remote-endpoint = <&vin1csi20>;
2612                                         };
2613                                         csi20vin2: endpoint@2 {
2614                                                 reg = <2>;
2615                                                 remote-endpoint = <&vin2csi20>;
2616                                         };
2617                                         csi20vin3: endpoint@3 {
2618                                                 reg = <3>;
2619                                                 remote-endpoint = <&vin3csi20>;
2620                                         };
2621                                         csi20vin4: endpoint@4 {
2622                                                 reg = <4>;
2623                                                 remote-endpoint = <&vin4csi20>;
2624                                         };
2625                                         csi20vin5: endpoint@5 {
2626                                                 reg = <5>;
2627                                                 remote-endpoint = <&vin5csi20>;
2628                                         };
2629                                         csi20vin6: endpoint@6 {
2630                                                 reg = <6>;
2631                                                 remote-endpoint = <&vin6csi20>;
2632                                         };
2633                                         csi20vin7: endpoint@7 {
2634                                                 reg = <7>;
2635                                                 remote-endpoint = <&vin7csi20>;
2636                                         };
2637                                 };
2638                         };
2639                 };
2640
2641                 csi40: csi2@feaa0000 {
2642                         compatible = "renesas,r8a7795-csi2";
2643                         reg = <0 0xfeaa0000 0 0x10000>;
2644                         interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
2645                         clocks = <&cpg CPG_MOD 716>;
2646                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2647                         resets = <&cpg 716>;
2648                         status = "disabled";
2649
2650                         ports {
2651                                 #address-cells = <1>;
2652                                 #size-cells = <0>;
2653
2654                                 port@1 {
2655                                         #address-cells = <1>;
2656                                         #size-cells = <0>;
2657
2658                                         reg = <1>;
2659
2660                                         csi40vin0: endpoint@0 {
2661                                                 reg = <0>;
2662                                                 remote-endpoint = <&vin0csi40>;
2663                                         };
2664                                         csi40vin1: endpoint@1 {
2665                                                 reg = <1>;
2666                                                 remote-endpoint = <&vin1csi40>;
2667                                         };
2668                                         csi40vin2: endpoint@2 {
2669                                                 reg = <2>;
2670                                                 remote-endpoint = <&vin2csi40>;
2671                                         };
2672                                         csi40vin3: endpoint@3 {
2673                                                 reg = <3>;
2674                                                 remote-endpoint = <&vin3csi40>;
2675                                         };
2676                                 };
2677                         };
2678                 };
2679
2680                 csi41: csi2@feab0000 {
2681                         compatible = "renesas,r8a7795-csi2";
2682                         reg = <0 0xfeab0000 0 0x10000>;
2683                         interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
2684                         clocks = <&cpg CPG_MOD 715>;
2685                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2686                         resets = <&cpg 715>;
2687                         status = "disabled";
2688
2689                         ports {
2690                                 #address-cells = <1>;
2691                                 #size-cells = <0>;
2692
2693                                 port@1 {
2694                                         #address-cells = <1>;
2695                                         #size-cells = <0>;
2696
2697                                         reg = <1>;
2698
2699                                         csi41vin4: endpoint@0 {
2700                                                 reg = <0>;
2701                                                 remote-endpoint = <&vin4csi41>;
2702                                         };
2703                                         csi41vin5: endpoint@1 {
2704                                                 reg = <1>;
2705                                                 remote-endpoint = <&vin5csi41>;
2706                                         };
2707                                         csi41vin6: endpoint@2 {
2708                                                 reg = <2>;
2709                                                 remote-endpoint = <&vin6csi41>;
2710                                         };
2711                                         csi41vin7: endpoint@3 {
2712                                                 reg = <3>;
2713                                                 remote-endpoint = <&vin7csi41>;
2714                                         };
2715                                 };
2716                         };
2717                 };
2718
2719                 hdmi0: hdmi@fead0000 {
2720                         compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
2721                         reg = <0 0xfead0000 0 0x10000>;
2722                         interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2723                         clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7795_CLK_HDMI>;
2724                         clock-names = "iahb", "isfr";
2725                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2726                         resets = <&cpg 729>;
2727                         status = "disabled";
2728
2729                         ports {
2730                                 #address-cells = <1>;
2731                                 #size-cells = <0>;
2732                                 port@0 {
2733                                         reg = <0>;
2734                                         dw_hdmi0_in: endpoint {
2735                                                 remote-endpoint = <&du_out_hdmi0>;
2736                                         };
2737                                 };
2738                                 port@1 {
2739                                         reg = <1>;
2740                                 };
2741                                 port@2 {
2742                                         /* HDMI sound */
2743                                         reg = <2>;
2744                                 };
2745                         };
2746                 };
2747
2748                 hdmi1: hdmi@feae0000 {
2749                         compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
2750                         reg = <0 0xfeae0000 0 0x10000>;
2751                         interrupts = <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>;
2752                         clocks = <&cpg CPG_MOD 728>, <&cpg CPG_CORE R8A7795_CLK_HDMI>;
2753                         clock-names = "iahb", "isfr";
2754                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2755                         resets = <&cpg 728>;
2756                         status = "disabled";
2757
2758                         ports {
2759                                 #address-cells = <1>;
2760                                 #size-cells = <0>;
2761                                 port@0 {
2762                                         reg = <0>;
2763                                         dw_hdmi1_in: endpoint {
2764                                                 remote-endpoint = <&du_out_hdmi1>;
2765                                         };
2766                                 };
2767                                 port@1 {
2768                                         reg = <1>;
2769                                 };
2770                                 port@2 {
2771                                         /* HDMI sound */
2772                                         reg = <2>;
2773                                 };
2774                         };
2775                 };
2776
2777                 du: display@feb00000 {
2778                         compatible = "renesas,du-r8a7795";
2779                         reg = <0 0xfeb00000 0 0x80000>,
2780                               <0 0xfeb90000 0 0x14>;
2781                         reg-names = "du", "lvds.0";
2782                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2783                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2784                                      <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
2785                                      <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
2786                         clocks = <&cpg CPG_MOD 724>,
2787                                  <&cpg CPG_MOD 723>,
2788                                  <&cpg CPG_MOD 722>,
2789                                  <&cpg CPG_MOD 721>,
2790                                  <&cpg CPG_MOD 727>;
2791                         clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0";
2792                         vsps = <&vspd0 0 &vspd1 0 &vspd2 0 &vspd0 1>;
2793                         status = "disabled";
2794
2795                         ports {
2796                                 #address-cells = <1>;
2797                                 #size-cells = <0>;
2798
2799                                 port@0 {
2800                                         reg = <0>;
2801                                         du_out_rgb: endpoint {
2802                                         };
2803                                 };
2804                                 port@1 {
2805                                         reg = <1>;
2806                                         du_out_hdmi0: endpoint {
2807                                                 remote-endpoint = <&dw_hdmi0_in>;
2808                                         };
2809                                 };
2810                                 port@2 {
2811                                         reg = <2>;
2812                                         du_out_hdmi1: endpoint {
2813                                                 remote-endpoint = <&dw_hdmi1_in>;
2814                                         };
2815                                 };
2816                                 port@3 {
2817                                         reg = <3>;
2818                                         du_out_lvds0: endpoint {
2819                                         };
2820                                 };
2821                         };
2822                 };
2823
2824                 prr: chipid@fff00044 {
2825                         compatible = "renesas,prr";
2826                         reg = <0 0xfff00044 0 4>;
2827                 };
2828         };
2829
2830         thermal-zones {
2831                 sensor_thermal1: sensor-thermal1 {
2832                         polling-delay-passive = <250>;
2833                         polling-delay = <1000>;
2834                         thermal-sensors = <&tsc 0>;
2835
2836                         trips {
2837                                 sensor1_passive: sensor1-passive {
2838                                         temperature = <95000>;
2839                                         hysteresis = <1000>;
2840                                         type = "passive";
2841                                 };
2842                                 sensor1_crit: sensor1-crit {
2843                                         temperature = <120000>;
2844                                         hysteresis = <1000>;
2845                                         type = "critical";
2846                                 };
2847                         };
2848
2849                         cooling-maps {
2850                                 map0 {
2851                                         trip = <&sensor1_passive>;
2852                                         cooling-device = <&a57_0 4 4>;
2853                                 };
2854                         };
2855                 };
2856
2857                 sensor_thermal2: sensor-thermal2 {
2858                         polling-delay-passive = <250>;
2859                         polling-delay = <1000>;
2860                         thermal-sensors = <&tsc 1>;
2861
2862                         trips {
2863                                 sensor2_passive: sensor2-passive {
2864                                         temperature = <95000>;
2865                                         hysteresis = <1000>;
2866                                         type = "passive";
2867                                 };
2868                                 sensor2_crit: sensor2-crit {
2869                                         temperature = <120000>;
2870                                         hysteresis = <1000>;
2871                                         type = "critical";
2872                                 };
2873                         };
2874
2875                         cooling-maps {
2876                                 map0 {
2877                                         trip = <&sensor2_passive>;
2878                                         cooling-device = <&a57_0 4 4>;
2879                                 };
2880                         };
2881                 };
2882
2883                 sensor_thermal3: sensor-thermal3 {
2884                         polling-delay-passive = <250>;
2885                         polling-delay = <1000>;
2886                         thermal-sensors = <&tsc 2>;
2887
2888                         trips {
2889                                 sensor3_passive: sensor3-passive {
2890                                         temperature = <95000>;
2891                                         hysteresis = <1000>;
2892                                         type = "passive";
2893                                 };
2894                                 sensor3_crit: sensor3-crit {
2895                                         temperature = <120000>;
2896                                         hysteresis = <1000>;
2897                                         type = "critical";
2898                                 };
2899                         };
2900
2901                         cooling-maps {
2902                                 map0 {
2903                                         trip = <&sensor3_passive>;
2904                                         cooling-device = <&a57_0 4 4>;
2905                                 };
2906                         };
2907                 };
2908         };
2909
2910         timer {
2911                 compatible = "arm,armv8-timer";
2912                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
2913                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
2914                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
2915                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
2916         };
2917
2918         /* External USB clocks - can be overridden by the board */
2919         usb3s0_clk: usb3s0 {
2920                 compatible = "fixed-clock";
2921                 #clock-cells = <0>;
2922                 clock-frequency = <0>;
2923         };
2924
2925         usb_extal_clk: usb_extal {
2926                 compatible = "fixed-clock";
2927                 #clock-cells = <0>;
2928                 clock-frequency = <0>;
2929         };
2930 };