1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 #include <dt-bindings/interrupt-controller/irq.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/phy/phy.h>
6 #include <dt-bindings/soc/bcm-pmb.h>
11 interrupt-parent = <&gic>;
21 stdout-path = "serial0:115200n8";
30 compatible = "brcm,brahma-b53";
32 enable-method = "spin-table";
33 cpu-release-addr = <0x0 0xfff8>;
34 next-level-cache = <&l2>;
39 compatible = "brcm,brahma-b53";
41 enable-method = "spin-table";
42 cpu-release-addr = <0x0 0xfff8>;
43 next-level-cache = <&l2>;
48 compatible = "brcm,brahma-b53";
50 enable-method = "spin-table";
51 cpu-release-addr = <0x0 0xfff8>;
52 next-level-cache = <&l2>;
57 compatible = "brcm,brahma-b53";
59 enable-method = "spin-table";
60 cpu-release-addr = <0x0 0xfff8>;
61 next-level-cache = <&l2>;
70 compatible = "simple-bus";
73 ranges = <0x00 0x00 0x81000000 0x4000>;
75 gic: interrupt-controller@1000 {
76 compatible = "arm,gic-400";
77 #interrupt-cells = <3>;
80 reg = <0x1000 0x1000>,
86 compatible = "arm,armv8-timer";
87 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
88 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
89 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
90 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
94 compatible = "arm,cortex-a53-pmu";
95 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
96 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
97 <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
98 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
99 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
103 periph_clk: periph_clk {
104 compatible = "fixed-clock";
106 clock-frequency = <50000000>;
107 clock-output-names = "periph";
112 compatible = "simple-bus";
113 #address-cells = <1>;
115 ranges = <0x00 0x00 0x80000000 0x281000>;
117 enet: ethernet@2000 {
118 compatible = "brcm,bcm4908-enet";
119 reg = <0x2000 0x1000>;
121 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
122 <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
123 interrupt-names = "rx", "tx";
126 usb_phy: usb-phy@c200 {
127 compatible = "brcm,bcm4908-usb-phy";
128 reg = <0xc200 0x100>;
130 power-domains = <&pmb BCM_PMB_HOST_USB>;
139 compatible = "generic-ehci";
140 reg = <0xc300 0x100>;
141 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
142 phys = <&usb_phy PHY_TYPE_USB2>;
147 compatible = "generic-ohci";
148 reg = <0xc400 0x100>;
149 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
150 phys = <&usb_phy PHY_TYPE_USB2>;
155 compatible = "generic-xhci";
156 reg = <0xd000 0x8c8>;
157 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
158 phys = <&usb_phy PHY_TYPE_USB3>;
163 compatible = "simple-bus";
165 #address-cells = <1>;
166 ranges = <0 0x80000 0x50000>;
169 compatible = "brcm,bcm4908-switch";
176 reg-names = "core", "reg", "intrl2_0",
177 "intrl2_1", "fcb", "acb";
178 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
179 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
181 brcm,num-rgmii-ports = <2>;
183 #address-cells = <1>;
187 #address-cells = <1>;
192 phy-mode = "internal";
193 phy-handle = <&phy8>;
198 phy-mode = "internal";
199 phy-handle = <&phy9>;
204 phy-mode = "internal";
205 phy-handle = <&phy10>;
210 phy-mode = "internal";
211 phy-handle = <&phy11>;
216 phy-mode = "internal";
228 compatible = "brcm,unimac-mdio";
232 #address-cells = <1>;
234 phy8: ethernet-phy@8 {
238 phy9: ethernet-phy@9 {
242 phy10: ethernet-phy@a {
246 phy11: ethernet-phy@b {
250 phy12: ethernet-phy@c {
256 procmon: syscon@280000 {
257 compatible = "simple-bus";
258 reg = <0x280000 0x1000>;
261 #address-cells = <1>;
264 pmb: power-controller@2800c0 {
265 compatible = "brcm,bcm4908-pmb";
266 reg = <0x2800c0 0x40>;
267 #power-domain-cells = <1>;
273 compatible = "simple-bus";
274 #address-cells = <1>;
276 ranges = <0x00 0x00 0xff800000 0x3000>;
279 compatible = "brcm,bcm4908-twd", "simple-mfd", "syscon";
281 ranges = <0x0 0x400 0x4c>;
283 #address-cells = <1>;
287 compatible = "brcm,bcm6345-wdt";
292 gpio0: gpio-controller@500 {
293 compatible = "brcm,bcm6345-gpio";
294 reg-names = "dirout", "dat";
295 reg = <0x500 0x28>, <0x528 0x28>;
302 compatible = "brcm,bcm4908-pinctrl";
305 pins_led_0_a: led_0-a-pins {
307 groups = "led_0_grp_a";
310 pins_led_1_a: led_1-a-pins {
312 groups = "led_1_grp_a";
315 pins_led_2_a: led_2-a-pins {
317 groups = "led_2_grp_a";
320 pins_led_3_a: led_3-a-pins {
322 groups = "led_3_grp_a";
325 pins_led_4_a: led_4-a-pins {
327 groups = "led_4_grp_a";
330 pins_led_5_a: led_5-a-pins {
332 groups = "led_5_grp_a";
335 pins_led_6_a: led_6-a-pins {
337 groups = "led_6_grp_a";
340 pins_led_7_a: led_7-a-pins {
342 groups = "led_7_grp_a";
345 pins_led_8_a: led_8-a-pins {
347 groups = "led_8_grp_a";
350 pins_led_9_a: led_9-a-pins {
352 groups = "led_9_grp_a";
355 pins_led_21_a: led_21-a-pins {
357 groups = "led_21_grp_a";
360 pins_led_22_a: led_22-a-pins {
362 groups = "led_22_grp_a";
365 pins_led_26_a: led_26-a-pins {
367 groups = "led_26_grp_a";
370 pins_led_27_a: led_27-a-pins {
372 groups = "led_27_grp_a";
375 pins_led_28_a: led_28-a-pins {
377 groups = "led_28_grp_a";
380 pins_led_29_a: led_29-a-pins {
382 groups = "led_29_grp_a";
385 pins_led_30_a: led_30-a-pins {
387 groups = "led_30_grp_a";
390 pins_hs_uart: hs_uart-pins {
391 function = "hs_uart";
392 groups = "hs_uart_grp";
395 pins_i2c_a: i2c-a-pins {
397 groups = "i2c_grp_a";
400 pins_i2c_b: i2c-b-pins {
402 groups = "i2c_grp_b";
410 pins_nand_ctrl: nand_ctrl-pins {
411 function = "nand_ctrl";
412 groups = "nand_ctrl_grp";
415 pins_nand_data: nand_data-pins {
416 function = "nand_data";
417 groups = "nand_data_grp";
420 pins_emmc_ctrl: emmc_ctrl-pins {
421 function = "emmc_ctrl";
422 groups = "emmc_ctrl_grp";
425 pins_usb0_pwr: usb0_pwr-pins {
426 function = "usb0_pwr";
427 groups = "usb0_pwr_grp";
430 pins_usb1_pwr: usb1_pwr-pins {
431 function = "usb1_pwr";
432 groups = "usb1_pwr_grp";
437 compatible = "brcm,bcm6345-uart";
439 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
440 clocks = <&periph_clk>;
441 clock-names = "refclk";
445 nand-controller@1800 {
446 #address-cells = <1>;
448 compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand";
449 reg = <0x1800 0x600>, <0x2000 0x10>;
450 reg-names = "nand", "nand-int-base";
451 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
452 interrupt-names = "nand";
456 compatible = "brcm,nandcs";
462 compatible = "brcm,brcmper-i2c";
464 clock-frequency = <97500>;
465 pinctrl-names = "default";
466 pinctrl-0 = <&pins_i2c_a>;
471 compatible = "brcm,misc", "simple-mfd";
474 #address-cells = <1>;
476 ranges = <0x00 0x2600 0xe4>;
478 reset-controller@2644 {
479 compatible = "brcm,bcm4908-misc-pcie-reset";
487 compatible = "syscon-reboot";