2 * sh7367 processor support
4 * Copyright (C) 2010 Magnus Damm
5 * Copyright (C) 2008 Yoshihiro Shimoda
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/interrupt.h>
23 #include <linux/irq.h>
24 #include <linux/platform_device.h>
25 #include <linux/uio_driver.h>
26 #include <linux/delay.h>
27 #include <linux/input.h>
29 #include <linux/serial_sci.h>
30 #include <linux/sh_timer.h>
31 #include <mach/hardware.h>
32 #include <mach/common.h>
33 #include <mach/irqs.h>
34 #include <asm/mach-types.h>
35 #include <asm/mach/arch.h>
36 #include <asm/mach/map.h>
37 #include <asm/mach/time.h>
39 static struct map_desc sh7367_io_desc[] __initdata = {
40 /* create a 1:1 entity map for 0xe6xxxxxx
41 * used by CPGA, INTC and PFC.
44 .virtual = 0xe6000000,
45 .pfn = __phys_to_pfn(0xe6000000),
47 .type = MT_DEVICE_NONSHARED
51 void __init sh7367_map_io(void)
53 iotable_init(sh7367_io_desc, ARRAY_SIZE(sh7367_io_desc));
57 static struct plat_sci_port scif0_platform_data = {
58 .mapbase = 0xe6c40000,
59 .flags = UPF_BOOT_AUTOCONF,
60 .scscr = SCSCR_RE | SCSCR_TE,
61 .scbrr_algo_id = SCBRR_ALGO_4,
63 .irqs = { evt2irq(0xc00), evt2irq(0xc00),
64 evt2irq(0xc00), evt2irq(0xc00) },
67 static struct platform_device scif0_device = {
71 .platform_data = &scif0_platform_data,
76 static struct plat_sci_port scif1_platform_data = {
77 .mapbase = 0xe6c50000,
78 .flags = UPF_BOOT_AUTOCONF,
79 .scscr = SCSCR_RE | SCSCR_TE,
80 .scbrr_algo_id = SCBRR_ALGO_4,
82 .irqs = { evt2irq(0xc20), evt2irq(0xc20),
83 evt2irq(0xc20), evt2irq(0xc20) },
86 static struct platform_device scif1_device = {
90 .platform_data = &scif1_platform_data,
95 static struct plat_sci_port scif2_platform_data = {
96 .mapbase = 0xe6c60000,
97 .flags = UPF_BOOT_AUTOCONF,
98 .scscr = SCSCR_RE | SCSCR_TE,
99 .scbrr_algo_id = SCBRR_ALGO_4,
101 .irqs = { evt2irq(0xc40), evt2irq(0xc40),
102 evt2irq(0xc40), evt2irq(0xc40) },
105 static struct platform_device scif2_device = {
109 .platform_data = &scif2_platform_data,
114 static struct plat_sci_port scif3_platform_data = {
115 .mapbase = 0xe6c70000,
116 .flags = UPF_BOOT_AUTOCONF,
117 .scscr = SCSCR_RE | SCSCR_TE,
118 .scbrr_algo_id = SCBRR_ALGO_4,
120 .irqs = { evt2irq(0xc60), evt2irq(0xc60),
121 evt2irq(0xc60), evt2irq(0xc60) },
124 static struct platform_device scif3_device = {
128 .platform_data = &scif3_platform_data,
133 static struct plat_sci_port scif4_platform_data = {
134 .mapbase = 0xe6c80000,
135 .flags = UPF_BOOT_AUTOCONF,
136 .scscr = SCSCR_RE | SCSCR_TE,
137 .scbrr_algo_id = SCBRR_ALGO_4,
139 .irqs = { evt2irq(0xd20), evt2irq(0xd20),
140 evt2irq(0xd20), evt2irq(0xd20) },
143 static struct platform_device scif4_device = {
147 .platform_data = &scif4_platform_data,
152 static struct plat_sci_port scif5_platform_data = {
153 .mapbase = 0xe6cb0000,
154 .flags = UPF_BOOT_AUTOCONF,
155 .scscr = SCSCR_RE | SCSCR_TE,
156 .scbrr_algo_id = SCBRR_ALGO_4,
158 .irqs = { evt2irq(0xd40), evt2irq(0xd40),
159 evt2irq(0xd40), evt2irq(0xd40) },
162 static struct platform_device scif5_device = {
166 .platform_data = &scif5_platform_data,
171 static struct plat_sci_port scif6_platform_data = {
172 .mapbase = 0xe6c30000,
173 .flags = UPF_BOOT_AUTOCONF,
174 .scscr = SCSCR_RE | SCSCR_TE,
175 .scbrr_algo_id = SCBRR_ALGO_4,
177 .irqs = { evt2irq(0xd60), evt2irq(0xd60),
178 evt2irq(0xd60), evt2irq(0xd60) },
181 static struct platform_device scif6_device = {
185 .platform_data = &scif6_platform_data,
189 static struct sh_timer_config cmt10_platform_data = {
191 .channel_offset = 0x10,
193 .clockevent_rating = 125,
194 .clocksource_rating = 125,
197 static struct resource cmt10_resources[] = {
202 .flags = IORESOURCE_MEM,
205 .start = evt2irq(0xb00), /* CMT1_CMT10 */
206 .flags = IORESOURCE_IRQ,
210 static struct platform_device cmt10_device = {
214 .platform_data = &cmt10_platform_data,
216 .resource = cmt10_resources,
217 .num_resources = ARRAY_SIZE(cmt10_resources),
221 static struct uio_info vpu_platform_data = {
224 .irq = intcs_evt2irq(0x980),
227 static struct resource vpu_resources[] = {
232 .flags = IORESOURCE_MEM,
236 static struct platform_device vpu_device = {
237 .name = "uio_pdrv_genirq",
240 .platform_data = &vpu_platform_data,
242 .resource = vpu_resources,
243 .num_resources = ARRAY_SIZE(vpu_resources),
247 static struct uio_info veu0_platform_data = {
250 .irq = intcs_evt2irq(0x700),
253 static struct resource veu0_resources[] = {
258 .flags = IORESOURCE_MEM,
262 static struct platform_device veu0_device = {
263 .name = "uio_pdrv_genirq",
266 .platform_data = &veu0_platform_data,
268 .resource = veu0_resources,
269 .num_resources = ARRAY_SIZE(veu0_resources),
273 static struct uio_info veu1_platform_data = {
276 .irq = intcs_evt2irq(0x720),
279 static struct resource veu1_resources[] = {
284 .flags = IORESOURCE_MEM,
288 static struct platform_device veu1_device = {
289 .name = "uio_pdrv_genirq",
292 .platform_data = &veu1_platform_data,
294 .resource = veu1_resources,
295 .num_resources = ARRAY_SIZE(veu1_resources),
299 static struct uio_info veu2_platform_data = {
302 .irq = intcs_evt2irq(0x740),
305 static struct resource veu2_resources[] = {
310 .flags = IORESOURCE_MEM,
314 static struct platform_device veu2_device = {
315 .name = "uio_pdrv_genirq",
318 .platform_data = &veu2_platform_data,
320 .resource = veu2_resources,
321 .num_resources = ARRAY_SIZE(veu2_resources),
325 static struct uio_info veu3_platform_data = {
328 .irq = intcs_evt2irq(0x760),
331 static struct resource veu3_resources[] = {
336 .flags = IORESOURCE_MEM,
340 static struct platform_device veu3_device = {
341 .name = "uio_pdrv_genirq",
344 .platform_data = &veu3_platform_data,
346 .resource = veu3_resources,
347 .num_resources = ARRAY_SIZE(veu3_resources),
351 static struct uio_info veu2h_platform_data = {
354 .irq = intcs_evt2irq(0x520),
357 static struct resource veu2h_resources[] = {
362 .flags = IORESOURCE_MEM,
366 static struct platform_device veu2h_device = {
367 .name = "uio_pdrv_genirq",
370 .platform_data = &veu2h_platform_data,
372 .resource = veu2h_resources,
373 .num_resources = ARRAY_SIZE(veu2h_resources),
377 static struct uio_info jpu_platform_data = {
380 .irq = intcs_evt2irq(0x560),
383 static struct resource jpu_resources[] = {
388 .flags = IORESOURCE_MEM,
392 static struct platform_device jpu_device = {
393 .name = "uio_pdrv_genirq",
396 .platform_data = &jpu_platform_data,
398 .resource = jpu_resources,
399 .num_resources = ARRAY_SIZE(jpu_resources),
403 static struct uio_info spu1_platform_data = {
406 .irq = evt2irq(0xfc0),
409 static struct resource spu1_resources[] = {
414 .flags = IORESOURCE_MEM,
418 static struct platform_device spu1_device = {
419 .name = "uio_pdrv_genirq",
422 .platform_data = &spu1_platform_data,
424 .resource = spu1_resources,
425 .num_resources = ARRAY_SIZE(spu1_resources),
428 static struct platform_device *sh7367_early_devices[] __initdata = {
439 static struct platform_device *sh7367_devices[] __initdata = {
450 void __init sh7367_add_standard_devices(void)
452 platform_add_devices(sh7367_early_devices,
453 ARRAY_SIZE(sh7367_early_devices));
455 platform_add_devices(sh7367_devices,
456 ARRAY_SIZE(sh7367_devices));
459 static void __init sh7367_earlytimer_init(void)
462 shmobile_earlytimer_init();
465 #define SYMSTPCR2 0xe6158048
466 #define SYMSTPCR2_CMT1 (1 << 29)
468 void __init sh7367_add_early_devices(void)
470 /* enable clock to CMT1 */
471 __raw_writel(__raw_readl(SYMSTPCR2) & ~SYMSTPCR2_CMT1, SYMSTPCR2);
473 early_platform_add_devices(sh7367_early_devices,
474 ARRAY_SIZE(sh7367_early_devices));
476 /* setup early console here as well */
477 shmobile_setup_console();
479 /* override timer setup with soc-specific code */
480 shmobile_timer.init = sh7367_earlytimer_init;