arch/arm/mach-s3c24xx/dma-s3c2410.c

   1 /* linux/arch/arm/mach-s3c2410/dma.c
   2  *
   3  * Copyright (c) 2006 Simtec Electronics
   4  *      Ben Dooks <ben@simtec.co.uk>
   5  *
   6  * S3C2410 DMA selection
   7  *
   8  * http://armlinux.simtec.co.uk/
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13 */
  14
  15 #include <linux/kernel.h>
  16 #include <linux/init.h>
  17 #include <linux/device.h>
  18 #include <linux/serial_core.h>
  19
  20 #include <mach/map.h>
  21 #include <mach/dma.h>
  22
  23 #include <plat/cpu.h>
  24 #include <plat/dma-s3c24xx.h>
  25
  26 #include <plat/regs-serial.h>
  27 #include <mach/regs-gpio.h>
  28 #include <plat/regs-ac97.h>
  29 #include <plat/regs-dma.h>
  30 #include <mach/regs-lcd.h>
  31 #include <mach/regs-sdi.h>
  32 #include <plat/regs-iis.h>
  33 #include <plat/regs-spi.h>
  34
  35 static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings[] = {
  36         [DMACH_XD0] = {
  37                 .name           = "xdreq0",
  38                 .channels[0]    = S3C2410_DCON_CH0_XDREQ0 | DMA_CH_VALID,
  39         },
  40         [DMACH_XD1] = {
  41                 .name           = "xdreq1",
  42                 .channels[1]    = S3C2410_DCON_CH1_XDREQ1 | DMA_CH_VALID,
  43         },
  44         [DMACH_SDI] = {
  45                 .name           = "sdi",
  46                 .channels[0]    = S3C2410_DCON_CH0_SDI | DMA_CH_VALID,
  47                 .channels[2]    = S3C2410_DCON_CH2_SDI | DMA_CH_VALID,
  48                 .channels[3]    = S3C2410_DCON_CH3_SDI | DMA_CH_VALID,
  49         },
  50         [DMACH_SPI0] = {
  51                 .name           = "spi0",
  52                 .channels[1]    = S3C2410_DCON_CH1_SPI | DMA_CH_VALID,
  53         },
  54         [DMACH_SPI1] = {
  55                 .name           = "spi1",
  56                 .channels[3]    = S3C2410_DCON_CH3_SPI | DMA_CH_VALID,
  57         },
  58         [DMACH_UART0] = {
  59                 .name           = "uart0",
  60                 .channels[0]    = S3C2410_DCON_CH0_UART0 | DMA_CH_VALID,
  61         },
  62         [DMACH_UART1] = {
  63                 .name           = "uart1",
  64                 .channels[1]    = S3C2410_DCON_CH1_UART1 | DMA_CH_VALID,
  65         },
  66         [DMACH_UART2] = {
  67                 .name           = "uart2",
  68                 .channels[3]    = S3C2410_DCON_CH3_UART2 | DMA_CH_VALID,
  69         },
  70         [DMACH_TIMER] = {
  71                 .name           = "timer",
  72                 .channels[0]    = S3C2410_DCON_CH0_TIMER | DMA_CH_VALID,
  73                 .channels[2]    = S3C2410_DCON_CH2_TIMER | DMA_CH_VALID,
  74                 .channels[3]    = S3C2410_DCON_CH3_TIMER | DMA_CH_VALID,
  75         },
  76         [DMACH_I2S_IN] = {
  77                 .name           = "i2s-sdi",
  78                 .channels[1]    = S3C2410_DCON_CH1_I2SSDI | DMA_CH_VALID,
  79                 .channels[2]    = S3C2410_DCON_CH2_I2SSDI | DMA_CH_VALID,
  80         },
  81         [DMACH_I2S_OUT] = {
  82                 .name           = "i2s-sdo",
  83                 .channels[2]    = S3C2410_DCON_CH2_I2SSDO | DMA_CH_VALID,
  84         },
  85         [DMACH_USB_EP1] = {
  86                 .name           = "usb-ep1",
  87                 .channels[0]    = S3C2410_DCON_CH0_USBEP1 | DMA_CH_VALID,
  88         },
  89         [DMACH_USB_EP2] = {
  90                 .name           = "usb-ep2",
  91                 .channels[1]    = S3C2410_DCON_CH1_USBEP2 | DMA_CH_VALID,
  92         },
  93         [DMACH_USB_EP3] = {
  94                 .name           = "usb-ep3",
  95                 .channels[2]    = S3C2410_DCON_CH2_USBEP3 | DMA_CH_VALID,
  96         },
  97         [DMACH_USB_EP4] = {
  98                 .name           = "usb-ep4",
  99                 .channels[3]    =S3C2410_DCON_CH3_USBEP4 | DMA_CH_VALID,
 100         },
 101 };
 102
 103 static void s3c2410_dma_select(struct s3c2410_dma_chan *chan,
 104                                struct s3c24xx_dma_map *map)
 105 {
 106         chan->dcon = map->channels[chan->number] & ~DMA_CH_VALID;
 107 }
 108
 109 static struct s3c24xx_dma_selection __initdata s3c2410_dma_sel = {
 110         .select         = s3c2410_dma_select,
 111         .dcon_mask      = 7 << 24,
 112         .map            = s3c2410_dma_mappings,
 113         .map_size       = ARRAY_SIZE(s3c2410_dma_mappings),
 114 };
 115
 116 static struct s3c24xx_dma_order __initdata s3c2410_dma_order = {
 117         .channels       = {
 118                 [DMACH_SDI]     = {
 119                         .list   = {
 120                                 [0]     = 3 | DMA_CH_VALID,
 121                                 [1]     = 2 | DMA_CH_VALID,
 122                                 [2]     = 0 | DMA_CH_VALID,
 123                         },
 124                 },
 125                 [DMACH_I2S_IN]  = {
 126                         .list   = {
 127                                 [0]     = 1 | DMA_CH_VALID,
 128                                 [1]     = 2 | DMA_CH_VALID,
 129                         },
 130                 },
 131         },
 132 };
 133
 134 static int __init s3c2410_dma_add(struct device *dev,
 135                                   struct subsys_interface *sif)
 136 {
 137         s3c2410_dma_init();
 138         s3c24xx_dma_order_set(&s3c2410_dma_order);
 139         return s3c24xx_dma_init_map(&s3c2410_dma_sel);
 140 }
 141
 142 #if defined(CONFIG_CPU_S3C2410)
 143 static struct subsys_interface s3c2410_dma_interface = {
 144         .name           = "s3c2410_dma",
 145         .subsys         = &s3c2410_subsys,
 146         .add_dev        = s3c2410_dma_add,
 147 };
 148
 149 static int __init s3c2410_dma_drvinit(void)
 150 {
 151         return subsys_interface_register(&s3c2410_dma_interface);
 152 }
 153
 154 arch_initcall(s3c2410_dma_drvinit);
 155
 156 static struct subsys_interface s3c2410a_dma_interface = {
 157         .name           = "s3c2410a_dma",
 158         .subsys         = &s3c2410a_subsys,
 159         .add_dev        = s3c2410_dma_add,
 160 };
 161
 162 static int __init s3c2410a_dma_drvinit(void)
 163 {
 164         return subsys_interface_register(&s3c2410a_dma_interface);
 165 }
 166
 167 arch_initcall(s3c2410a_dma_drvinit);
 168 #endif
 169
 170 #if defined(CONFIG_CPU_S3C2442)
 171 /* S3C2442 DMA contains the same selection table as the S3C2410 */
 172 static struct subsys_interface s3c2442_dma_interface = {
 173         .name           = "s3c2442_dma",
 174         .subsys         = &s3c2442_subsys,
 175         .add_dev        = s3c2410_dma_add,
 176 };
 177
 178 static int __init s3c2442_dma_drvinit(void)
 179 {
 180         return subsys_interface_register(&s3c2442_dma_interface);
 181 }
 182
 183 arch_initcall(s3c2442_dma_drvinit);
 184 #endif
 185