arch/arm/mach-omap2/hsmmc.c

   1 /*
   2  * linux/arch/arm/mach-omap2/hsmmc.c
   3  *
   4  * Copyright (C) 2007-2008 Texas Instruments
   5  * Copyright (C) 2008 Nokia Corporation
   6  * Author: Texas Instruments
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12 #include <linux/kernel.h>
  13 #include <linux/slab.h>
  14 #include <linux/string.h>
  15 #include <linux/delay.h>
  16 #include <linux/gpio.h>
  17 #include <linux/mmc/host.h>
  18 #include <linux/platform_data/gpio-omap.h>
  19 #include <linux/platform_data/hsmmc-omap.h>
  20
  21 #include "soc.h"
  22 #include "omap_device.h"
  23 #include "omap-pm.h"
  24
  25 #include "hsmmc.h"
  26 #include "control.h"
  27
  28 #if IS_ENABLED(CONFIG_MMC_OMAP_HS)
  29
  30 static u16 control_pbias_offset;
  31 static u16 control_devconf1_offset;
  32
  33 #define HSMMC_NAME_LEN  9
  34
  35 static void omap_hsmmc1_before_set_reg(struct device *dev,
  36                                        int power_on, int vdd)
  37 {
  38         u32 reg, prog_io;
  39         struct omap_hsmmc_platform_data *mmc = dev->platform_data;
  40
  41         if (mmc->remux)
  42                 mmc->remux(dev, power_on);
  43
  44         /*
  45          * Assume we power both OMAP VMMC1 (for CMD, CLK, DAT0..3) and the
  46          * card with Vcc regulator (from twl4030 or whatever).  OMAP has both
  47          * 1.8V and 3.0V modes, controlled by the PBIAS register.
  48          *
  49          * In 8-bit modes, OMAP VMMC1A (for DAT4..7) needs a supply, which
  50          * is most naturally TWL VSIM; those pins also use PBIAS.
  51          *
  52          * FIXME handle VMMC1A as needed ...
  53          */
  54         if (power_on) {
  55                 if (cpu_is_omap2430()) {
  56                         reg = omap_ctrl_readl(OMAP243X_CONTROL_DEVCONF1);
  57                         if ((1 << vdd) >= MMC_VDD_30_31)
  58                                 reg |= OMAP243X_MMC1_ACTIVE_OVERWRITE;
  59                         else
  60                                 reg &= ~OMAP243X_MMC1_ACTIVE_OVERWRITE;
  61                         omap_ctrl_writel(reg, OMAP243X_CONTROL_DEVCONF1);
  62                 }
  63
  64                 if (mmc->internal_clock) {
  65                         reg = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
  66                         reg |= OMAP2_MMCSDIO1ADPCLKISEL;
  67                         omap_ctrl_writel(reg, OMAP2_CONTROL_DEVCONF0);
  68                 }
  69
  70                 reg = omap_ctrl_readl(control_pbias_offset);
  71                 if (cpu_is_omap3630()) {
  72                         /* Set MMC I/O to 52MHz */
  73                         prog_io = omap_ctrl_readl(OMAP343X_CONTROL_PROG_IO1);
  74                         prog_io |= OMAP3630_PRG_SDMMC1_SPEEDCTRL;
  75                         omap_ctrl_writel(prog_io, OMAP343X_CONTROL_PROG_IO1);
  76                 } else {
  77                         reg |= OMAP2_PBIASSPEEDCTRL0;
  78                 }
  79                 reg &= ~OMAP2_PBIASLITEPWRDNZ0;
  80                 omap_ctrl_writel(reg, control_pbias_offset);
  81         } else {
  82                 reg = omap_ctrl_readl(control_pbias_offset);
  83                 reg &= ~OMAP2_PBIASLITEPWRDNZ0;
  84                 omap_ctrl_writel(reg, control_pbias_offset);
  85         }
  86 }
  87
  88 static void omap_hsmmc1_after_set_reg(struct device *dev, int power_on, int vdd)
  89 {
  90         u32 reg;
  91
  92         /* 100ms delay required for PBIAS configuration */
  93         msleep(100);
  94
  95         if (power_on) {
  96                 reg = omap_ctrl_readl(control_pbias_offset);
  97                 reg |= (OMAP2_PBIASLITEPWRDNZ0 | OMAP2_PBIASSPEEDCTRL0);
  98                 if ((1 << vdd) <= MMC_VDD_165_195)
  99                         reg &= ~OMAP2_PBIASLITEVMODE0;
 100                 else
 101                         reg |= OMAP2_PBIASLITEVMODE0;
 102                 omap_ctrl_writel(reg, control_pbias_offset);
 103         } else {
 104                 reg = omap_ctrl_readl(control_pbias_offset);
 105                 reg |= (OMAP2_PBIASSPEEDCTRL0 | OMAP2_PBIASLITEPWRDNZ0 |
 106                         OMAP2_PBIASLITEVMODE0);
 107                 omap_ctrl_writel(reg, control_pbias_offset);
 108         }
 109 }
 110
 111 static void hsmmc2_select_input_clk_src(struct omap_hsmmc_platform_data *mmc)
 112 {
 113         u32 reg;
 114
 115         reg = omap_ctrl_readl(control_devconf1_offset);
 116         if (mmc->internal_clock)
 117                 reg |= OMAP2_MMCSDIO2ADPCLKISEL;
 118         else
 119                 reg &= ~OMAP2_MMCSDIO2ADPCLKISEL;
 120         omap_ctrl_writel(reg, control_devconf1_offset);
 121 }
 122
 123 static void hsmmc2_before_set_reg(struct device *dev, int power_on, int vdd)
 124 {
 125         struct omap_hsmmc_platform_data *mmc = dev->platform_data;
 126
 127         if (mmc->remux)
 128                 mmc->remux(dev, power_on);
 129
 130         if (power_on)
 131                 hsmmc2_select_input_clk_src(mmc);
 132 }
 133
 134 static int am35x_hsmmc2_set_power(struct device *dev, int power_on, int vdd)
 135 {
 136         struct omap_hsmmc_platform_data *mmc = dev->platform_data;
 137
 138         if (power_on)
 139                 hsmmc2_select_input_clk_src(mmc);
 140
 141         return 0;
 142 }
 143
 144 static int nop_mmc_set_power(struct device *dev, int power_on, int vdd)
 145 {
 146         return 0;
 147 }
 148
 149 static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
 150                                         struct omap_hsmmc_platform_data *mmc)
 151 {
 152         char *hc_name;
 153
 154         hc_name = kzalloc(sizeof(char) * (HSMMC_NAME_LEN + 1), GFP_KERNEL);
 155         if (!hc_name) {
 156                 pr_err("Cannot allocate memory for controller slot name\n");
 157                 kfree(hc_name);
 158                 return -ENOMEM;
 159         }
 160
 161         if (c->name)
 162                 strncpy(hc_name, c->name, HSMMC_NAME_LEN);
 163         else
 164                 snprintf(hc_name, (HSMMC_NAME_LEN + 1), "mmc%islot%i",
 165                                                                 c->mmc, 1);
 166         mmc->name = hc_name;
 167         mmc->caps = c->caps;
 168         mmc->internal_clock = !c->ext_clock;
 169         mmc->reg_offset = 0;
 170
 171         if (c->cover_only) {
 172                 /* detect if mobile phone cover removed */
 173                 mmc->gpio_cd = -EINVAL;
 174                 mmc->gpio_cod = c->gpio_cd;
 175         } else {
 176                 /* card detect pin on the mmc socket itself */
 177                 mmc->gpio_cd = c->gpio_cd;
 178                 mmc->gpio_cod = -EINVAL;
 179         }
 180         mmc->gpio_wp = c->gpio_wp;
 181
 182         mmc->remux = c->remux;
 183         mmc->init_card = c->init_card;
 184
 185         if (c->nonremovable)
 186                 mmc->nonremovable = 1;
 187
 188         /*
 189          * NOTE:  MMC slots should have a Vcc regulator set up.
 190          * This may be from a TWL4030-family chip, another
 191          * controllable regulator, or a fixed supply.
 192          *
 193          * temporary HACK: ocr_mask instead of fixed supply
 194          */
 195         if (soc_is_am35xx())
 196                 mmc->ocr_mask = MMC_VDD_165_195 |
 197                                          MMC_VDD_26_27 |
 198                                          MMC_VDD_27_28 |
 199                                          MMC_VDD_29_30 |
 200                                          MMC_VDD_30_31 |
 201                                          MMC_VDD_31_32;
 202         else
 203                 mmc->ocr_mask = c->ocr_mask;
 204
 205         if (!soc_is_am35xx())
 206                 mmc->features |= HSMMC_HAS_PBIAS;
 207
 208         switch (c->mmc) {
 209         case 1:
 210                 if (mmc->features & HSMMC_HAS_PBIAS) {
 211                         /* on-chip level shifting via PBIAS0/PBIAS1 */
 212                         mmc->before_set_reg =
 213                                         omap_hsmmc1_before_set_reg;
 214                         mmc->after_set_reg =
 215                                         omap_hsmmc1_after_set_reg;
 216                 }
 217
 218                 if (soc_is_am35xx())
 219                         mmc->set_power = nop_mmc_set_power;
 220
 221                 /* OMAP3630 HSMMC1 supports only 4-bit */
 222                 if (cpu_is_omap3630() &&
 223                                 (c->caps & MMC_CAP_8_BIT_DATA)) {
 224                         c->caps &= ~MMC_CAP_8_BIT_DATA;
 225                         c->caps |= MMC_CAP_4_BIT_DATA;
 226                         mmc->caps = c->caps;
 227                 }
 228                 break;
 229         case 2:
 230                 if (soc_is_am35xx())
 231                         mmc->set_power = am35x_hsmmc2_set_power;
 232
 233                 if (c->ext_clock)
 234                         c->transceiver = 1;
 235                 if (c->transceiver && (c->caps & MMC_CAP_8_BIT_DATA)) {
 236                         c->caps &= ~MMC_CAP_8_BIT_DATA;
 237                         c->caps |= MMC_CAP_4_BIT_DATA;
 238                 }
 239                 if (mmc->features & HSMMC_HAS_PBIAS) {
 240                         /* off-chip level shifting, or none */
 241                         mmc->before_set_reg = hsmmc2_before_set_reg;
 242                         mmc->after_set_reg = NULL;
 243                 }
 244                 break;
 245         case 3:
 246         case 4:
 247         case 5:
 248                 mmc->before_set_reg = NULL;
 249                 mmc->after_set_reg = NULL;
 250                 break;
 251         default:
 252                 pr_err("MMC%d configuration not supported!\n", c->mmc);
 253                 kfree(hc_name);
 254                 return -ENODEV;
 255         }
 256         return 0;
 257 }
 258
 259 static int omap_hsmmc_done;
 260
 261 void omap_hsmmc_late_init(struct omap2_hsmmc_info *c)
 262 {
 263         struct platform_device *pdev;
 264         struct omap_hsmmc_platform_data *mmc_pdata;
 265         int res;
 266
 267         if (omap_hsmmc_done != 1)
 268                 return;
 269
 270         omap_hsmmc_done++;
 271
 272         for (; c->mmc; c++) {
 273                 if (!c->deferred)
 274                         continue;
 275
 276                 pdev = c->pdev;
 277                 if (!pdev)
 278                         continue;
 279
 280                 mmc_pdata = pdev->dev.platform_data;
 281                 if (!mmc_pdata)
 282                         continue;
 283
 284                 if (c->cover_only) {
 285                         /* detect if mobile phone cover removed */
 286                         mmc_pdata->gpio_cd = -EINVAL;
 287                         mmc_pdata->gpio_cod = c->gpio_cd;
 288                 } else {
 289                         /* card detect pin on the mmc socket itself */
 290                         mmc_pdata->gpio_cd = c->gpio_cd;
 291                         mmc_pdata->gpio_cod = -EINVAL;
 292                 }
 293                 mmc_pdata->gpio_wp = c->gpio_wp;
 294
 295                 res = omap_device_register(pdev);
 296                 if (res)
 297                         pr_err("Could not late init MMC %s\n",
 298                                c->name);
 299         }
 300 }
 301
 302 #define MAX_OMAP_MMC_HWMOD_NAME_LEN             16
 303
 304 static void __init omap_hsmmc_init_one(struct omap2_hsmmc_info *hsmmcinfo,
 305                                         int ctrl_nr)
 306 {
 307         struct omap_hwmod *oh;
 308         struct omap_hwmod *ohs[1];
 309         struct omap_device *od;
 310         struct platform_device *pdev;
 311         char oh_name[MAX_OMAP_MMC_HWMOD_NAME_LEN];
 312         struct omap_hsmmc_platform_data *mmc_data;
 313         struct omap_hsmmc_dev_attr *mmc_dev_attr;
 314         char *name;
 315         int res;
 316
 317         mmc_data = kzalloc(sizeof(*mmc_data), GFP_KERNEL);
 318         if (!mmc_data) {
 319                 pr_err("Cannot allocate memory for mmc device!\n");
 320                 return;
 321         }
 322
 323         res = omap_hsmmc_pdata_init(hsmmcinfo, mmc_data);
 324         if (res < 0)
 325                 goto free_mmc;
 326
 327         name = "omap_hsmmc";
 328         res = snprintf(oh_name, MAX_OMAP_MMC_HWMOD_NAME_LEN,
 329                      "mmc%d", ctrl_nr);
 330         WARN(res >= MAX_OMAP_MMC_HWMOD_NAME_LEN,
 331              "String buffer overflow in MMC%d device setup\n", ctrl_nr);
 332
 333         oh = omap_hwmod_lookup(oh_name);
 334         if (!oh) {
 335                 pr_err("Could not look up %s\n", oh_name);
 336                 goto free_name;
 337         }
 338         ohs[0] = oh;
 339         if (oh->dev_attr != NULL) {
 340                 mmc_dev_attr = oh->dev_attr;
 341                 mmc_data->controller_flags = mmc_dev_attr->flags;
 342                 /*
 343                  * erratum 2.1.1.128 doesn't apply if board has
 344                  * a transceiver is attached
 345                  */
 346                 if (hsmmcinfo->transceiver)
 347                         mmc_data->controller_flags &=
 348                                 ~OMAP_HSMMC_BROKEN_MULTIBLOCK_READ;
 349         }
 350
 351         pdev = platform_device_alloc(name, ctrl_nr - 1);
 352         if (!pdev) {
 353                 pr_err("Could not allocate pdev for %s\n", name);
 354                 goto free_name;
 355         }
 356         dev_set_name(&pdev->dev, "%s.%d", pdev->name, pdev->id);
 357
 358         od = omap_device_alloc(pdev, ohs, 1);
 359         if (IS_ERR(od)) {
 360                 pr_err("Could not allocate od for %s\n", name);
 361                 goto put_pdev;
 362         }
 363
 364         res = platform_device_add_data(pdev, mmc_data,
 365                               sizeof(struct omap_hsmmc_platform_data));
 366         if (res) {
 367                 pr_err("Could not add pdata for %s\n", name);
 368                 goto put_pdev;
 369         }
 370
 371         hsmmcinfo->pdev = pdev;
 372
 373         if (hsmmcinfo->deferred)
 374                 goto free_mmc;
 375
 376         res = omap_device_register(pdev);
 377         if (res) {
 378                 pr_err("Could not register od for %s\n", name);
 379                 goto free_od;
 380         }
 381
 382         goto free_mmc;
 383
 384 free_od:
 385         omap_device_delete(od);
 386
 387 put_pdev:
 388         platform_device_put(pdev);
 389
 390 free_name:
 391         kfree(mmc_data->name);
 392
 393 free_mmc:
 394         kfree(mmc_data);
 395 }
 396
 397 void __init omap_hsmmc_init(struct omap2_hsmmc_info *controllers)
 398 {
 399         if (omap_hsmmc_done)
 400                 return;
 401
 402         omap_hsmmc_done = 1;
 403
 404         if (cpu_is_omap2430()) {
 405                 control_pbias_offset = OMAP243X_CONTROL_PBIAS_LITE;
 406                 control_devconf1_offset = OMAP243X_CONTROL_DEVCONF1;
 407         } else {
 408                 control_pbias_offset = OMAP343X_CONTROL_PBIAS_LITE;
 409                 control_devconf1_offset = OMAP343X_CONTROL_DEVCONF1;
 410         }
 411
 412         for (; controllers->mmc; controllers++)
 413                 omap_hsmmc_init_one(controllers, controllers->mmc);
 414
 415 }
 416
 417 #endif