2 * arch/arm/mach-kirkwood/common.c
4 * Core functions for Marvell Kirkwood SoCs
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/platform_device.h>
14 #include <linux/serial_8250.h>
15 #include <linux/mbus.h>
16 #include <linux/mv643xx_eth.h>
17 #include <linux/mv643xx_i2c.h>
18 #include <linux/ata_platform.h>
19 #include <linux/mtd/nand.h>
20 #include <linux/spi/orion_spi.h>
23 #include <asm/timex.h>
24 #include <asm/mach/map.h>
25 #include <asm/mach/time.h>
26 #include <mach/kirkwood.h>
27 #include <mach/bridge-regs.h>
28 #include <plat/audio.h>
29 #include <plat/cache-feroceon-l2.h>
30 #include <plat/ehci-orion.h>
31 #include <plat/mvsdio.h>
32 #include <plat/mv_xor.h>
33 #include <plat/orion_nand.h>
34 #include <plat/orion_wdt.h>
35 #include <plat/time.h>
38 /*****************************************************************************
40 ****************************************************************************/
41 static struct map_desc kirkwood_io_desc[] __initdata = {
43 .virtual = KIRKWOOD_PCIE_IO_VIRT_BASE,
44 .pfn = __phys_to_pfn(KIRKWOOD_PCIE_IO_PHYS_BASE),
45 .length = KIRKWOOD_PCIE_IO_SIZE,
48 .virtual = KIRKWOOD_REGS_VIRT_BASE,
49 .pfn = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE),
50 .length = KIRKWOOD_REGS_SIZE,
55 void __init kirkwood_map_io(void)
57 iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
61 * Default clock control bits. Any bit _not_ set in this variable
62 * will be cleared from the hardware after platform devices have been
63 * registered. Some reserved bits must be set to 1.
65 unsigned int kirkwood_clk_ctrl = CGC_DUNIT | CGC_RESERVED;
68 /*****************************************************************************
70 ****************************************************************************/
71 static struct orion_ehci_data kirkwood_ehci_data = {
72 .dram = &kirkwood_mbus_dram_info,
73 .phy_version = EHCI_PHY_NA,
76 static u64 ehci_dmamask = 0xffffffffUL;
79 /*****************************************************************************
81 ****************************************************************************/
82 static struct resource kirkwood_ehci_resources[] = {
84 .start = USB_PHYS_BASE,
85 .end = USB_PHYS_BASE + 0x0fff,
86 .flags = IORESOURCE_MEM,
88 .start = IRQ_KIRKWOOD_USB,
89 .end = IRQ_KIRKWOOD_USB,
90 .flags = IORESOURCE_IRQ,
94 static struct platform_device kirkwood_ehci = {
98 .dma_mask = &ehci_dmamask,
99 .coherent_dma_mask = 0xffffffff,
100 .platform_data = &kirkwood_ehci_data,
102 .resource = kirkwood_ehci_resources,
103 .num_resources = ARRAY_SIZE(kirkwood_ehci_resources),
106 void __init kirkwood_ehci_init(void)
108 kirkwood_clk_ctrl |= CGC_USB0;
109 platform_device_register(&kirkwood_ehci);
113 /*****************************************************************************
115 ****************************************************************************/
116 struct mv643xx_eth_shared_platform_data kirkwood_ge00_shared_data = {
117 .dram = &kirkwood_mbus_dram_info,
120 static struct resource kirkwood_ge00_shared_resources[] = {
123 .start = GE00_PHYS_BASE + 0x2000,
124 .end = GE00_PHYS_BASE + 0x3fff,
125 .flags = IORESOURCE_MEM,
127 .name = "ge00 err irq",
128 .start = IRQ_KIRKWOOD_GE00_ERR,
129 .end = IRQ_KIRKWOOD_GE00_ERR,
130 .flags = IORESOURCE_IRQ,
134 static struct platform_device kirkwood_ge00_shared = {
135 .name = MV643XX_ETH_SHARED_NAME,
138 .platform_data = &kirkwood_ge00_shared_data,
140 .num_resources = ARRAY_SIZE(kirkwood_ge00_shared_resources),
141 .resource = kirkwood_ge00_shared_resources,
144 static struct resource kirkwood_ge00_resources[] = {
147 .start = IRQ_KIRKWOOD_GE00_SUM,
148 .end = IRQ_KIRKWOOD_GE00_SUM,
149 .flags = IORESOURCE_IRQ,
153 static struct platform_device kirkwood_ge00 = {
154 .name = MV643XX_ETH_NAME,
157 .resource = kirkwood_ge00_resources,
159 .coherent_dma_mask = 0xffffffff,
163 void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
165 kirkwood_clk_ctrl |= CGC_GE0;
166 eth_data->shared = &kirkwood_ge00_shared;
167 kirkwood_ge00.dev.platform_data = eth_data;
169 platform_device_register(&kirkwood_ge00_shared);
170 platform_device_register(&kirkwood_ge00);
174 /*****************************************************************************
176 ****************************************************************************/
177 struct mv643xx_eth_shared_platform_data kirkwood_ge01_shared_data = {
178 .dram = &kirkwood_mbus_dram_info,
179 .shared_smi = &kirkwood_ge00_shared,
182 static struct resource kirkwood_ge01_shared_resources[] = {
185 .start = GE01_PHYS_BASE + 0x2000,
186 .end = GE01_PHYS_BASE + 0x3fff,
187 .flags = IORESOURCE_MEM,
189 .name = "ge01 err irq",
190 .start = IRQ_KIRKWOOD_GE01_ERR,
191 .end = IRQ_KIRKWOOD_GE01_ERR,
192 .flags = IORESOURCE_IRQ,
196 static struct platform_device kirkwood_ge01_shared = {
197 .name = MV643XX_ETH_SHARED_NAME,
200 .platform_data = &kirkwood_ge01_shared_data,
202 .num_resources = ARRAY_SIZE(kirkwood_ge01_shared_resources),
203 .resource = kirkwood_ge01_shared_resources,
206 static struct resource kirkwood_ge01_resources[] = {
209 .start = IRQ_KIRKWOOD_GE01_SUM,
210 .end = IRQ_KIRKWOOD_GE01_SUM,
211 .flags = IORESOURCE_IRQ,
215 static struct platform_device kirkwood_ge01 = {
216 .name = MV643XX_ETH_NAME,
219 .resource = kirkwood_ge01_resources,
221 .coherent_dma_mask = 0xffffffff,
225 void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
227 kirkwood_clk_ctrl |= CGC_GE1;
228 eth_data->shared = &kirkwood_ge01_shared;
229 kirkwood_ge01.dev.platform_data = eth_data;
231 platform_device_register(&kirkwood_ge01_shared);
232 platform_device_register(&kirkwood_ge01);
236 /*****************************************************************************
238 ****************************************************************************/
239 static struct resource kirkwood_switch_resources[] = {
243 .flags = IORESOURCE_IRQ,
247 static struct platform_device kirkwood_switch_device = {
251 .resource = kirkwood_switch_resources,
254 void __init kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq)
259 kirkwood_switch_resources[0].start = irq;
260 kirkwood_switch_resources[0].end = irq;
261 kirkwood_switch_device.num_resources = 1;
264 d->netdev = &kirkwood_ge00.dev;
265 for (i = 0; i < d->nr_chips; i++)
266 d->chip[i].mii_bus = &kirkwood_ge00_shared.dev;
267 kirkwood_switch_device.dev.platform_data = d;
269 platform_device_register(&kirkwood_switch_device);
273 /*****************************************************************************
275 ****************************************************************************/
276 static struct resource kirkwood_nand_resource = {
277 .flags = IORESOURCE_MEM,
278 .start = KIRKWOOD_NAND_MEM_PHYS_BASE,
279 .end = KIRKWOOD_NAND_MEM_PHYS_BASE +
280 KIRKWOOD_NAND_MEM_SIZE - 1,
283 static struct orion_nand_data kirkwood_nand_data = {
289 static struct platform_device kirkwood_nand_flash = {
290 .name = "orion_nand",
293 .platform_data = &kirkwood_nand_data,
295 .resource = &kirkwood_nand_resource,
299 void __init kirkwood_nand_init(struct mtd_partition *parts, int nr_parts,
302 kirkwood_clk_ctrl |= CGC_RUNIT;
303 kirkwood_nand_data.parts = parts;
304 kirkwood_nand_data.nr_parts = nr_parts;
305 kirkwood_nand_data.chip_delay = chip_delay;
306 platform_device_register(&kirkwood_nand_flash);
309 void __init kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts,
310 int (*dev_ready)(struct mtd_info *))
312 kirkwood_clk_ctrl |= CGC_RUNIT;
313 kirkwood_nand_data.parts = parts;
314 kirkwood_nand_data.nr_parts = nr_parts;
315 kirkwood_nand_data.dev_ready = dev_ready;
316 platform_device_register(&kirkwood_nand_flash);
319 /*****************************************************************************
321 ****************************************************************************/
322 static struct resource kirkwood_rtc_resource = {
323 .start = RTC_PHYS_BASE,
324 .end = RTC_PHYS_BASE + SZ_16 - 1,
325 .flags = IORESOURCE_MEM,
328 static void __init kirkwood_rtc_init(void)
330 platform_device_register_simple("rtc-mv", -1, &kirkwood_rtc_resource, 1);
334 /*****************************************************************************
336 ****************************************************************************/
337 static struct resource kirkwood_sata_resources[] = {
340 .start = SATA_PHYS_BASE,
341 .end = SATA_PHYS_BASE + 0x5000 - 1,
342 .flags = IORESOURCE_MEM,
345 .start = IRQ_KIRKWOOD_SATA,
346 .end = IRQ_KIRKWOOD_SATA,
347 .flags = IORESOURCE_IRQ,
351 static struct platform_device kirkwood_sata = {
355 .coherent_dma_mask = 0xffffffff,
357 .num_resources = ARRAY_SIZE(kirkwood_sata_resources),
358 .resource = kirkwood_sata_resources,
361 void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
363 kirkwood_clk_ctrl |= CGC_SATA0;
364 if (sata_data->n_ports > 1)
365 kirkwood_clk_ctrl |= CGC_SATA1;
366 sata_data->dram = &kirkwood_mbus_dram_info;
367 kirkwood_sata.dev.platform_data = sata_data;
368 platform_device_register(&kirkwood_sata);
372 /*****************************************************************************
374 ****************************************************************************/
375 static struct resource mvsdio_resources[] = {
377 .start = SDIO_PHYS_BASE,
378 .end = SDIO_PHYS_BASE + SZ_1K - 1,
379 .flags = IORESOURCE_MEM,
382 .start = IRQ_KIRKWOOD_SDIO,
383 .end = IRQ_KIRKWOOD_SDIO,
384 .flags = IORESOURCE_IRQ,
388 static u64 mvsdio_dmamask = 0xffffffffUL;
390 static struct platform_device kirkwood_sdio = {
394 .dma_mask = &mvsdio_dmamask,
395 .coherent_dma_mask = 0xffffffff,
397 .num_resources = ARRAY_SIZE(mvsdio_resources),
398 .resource = mvsdio_resources,
401 void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)
405 kirkwood_pcie_id(&dev, &rev);
406 if (rev == 0) /* catch all Kirkwood Z0's */
407 mvsdio_data->clock = 100000000;
409 mvsdio_data->clock = 200000000;
410 mvsdio_data->dram = &kirkwood_mbus_dram_info;
411 kirkwood_clk_ctrl |= CGC_SDIO;
412 kirkwood_sdio.dev.platform_data = mvsdio_data;
413 platform_device_register(&kirkwood_sdio);
417 /*****************************************************************************
419 ****************************************************************************/
420 static struct orion_spi_info kirkwood_spi_plat_data = {
423 static struct resource kirkwood_spi_resources[] = {
425 .start = SPI_PHYS_BASE,
426 .end = SPI_PHYS_BASE + SZ_512 - 1,
427 .flags = IORESOURCE_MEM,
431 static struct platform_device kirkwood_spi = {
434 .resource = kirkwood_spi_resources,
436 .platform_data = &kirkwood_spi_plat_data,
438 .num_resources = ARRAY_SIZE(kirkwood_spi_resources),
441 void __init kirkwood_spi_init()
443 kirkwood_clk_ctrl |= CGC_RUNIT;
444 platform_device_register(&kirkwood_spi);
448 /*****************************************************************************
450 ****************************************************************************/
451 static struct mv64xxx_i2c_pdata kirkwood_i2c_pdata = {
452 .freq_m = 8, /* assumes 166 MHz TCLK */
454 .timeout = 1000, /* Default timeout of 1 second */
457 static struct resource kirkwood_i2c_resources[] = {
459 .start = I2C_PHYS_BASE,
460 .end = I2C_PHYS_BASE + 0x1f,
461 .flags = IORESOURCE_MEM,
463 .start = IRQ_KIRKWOOD_TWSI,
464 .end = IRQ_KIRKWOOD_TWSI,
465 .flags = IORESOURCE_IRQ,
469 static struct platform_device kirkwood_i2c = {
470 .name = MV64XXX_I2C_CTLR_NAME,
472 .num_resources = ARRAY_SIZE(kirkwood_i2c_resources),
473 .resource = kirkwood_i2c_resources,
475 .platform_data = &kirkwood_i2c_pdata,
479 void __init kirkwood_i2c_init(void)
481 platform_device_register(&kirkwood_i2c);
485 /*****************************************************************************
487 ****************************************************************************/
488 static struct plat_serial8250_port kirkwood_uart0_data[] = {
490 .mapbase = UART0_PHYS_BASE,
491 .membase = (char *)UART0_VIRT_BASE,
492 .irq = IRQ_KIRKWOOD_UART_0,
493 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
501 static struct resource kirkwood_uart0_resources[] = {
503 .start = UART0_PHYS_BASE,
504 .end = UART0_PHYS_BASE + 0xff,
505 .flags = IORESOURCE_MEM,
507 .start = IRQ_KIRKWOOD_UART_0,
508 .end = IRQ_KIRKWOOD_UART_0,
509 .flags = IORESOURCE_IRQ,
513 static struct platform_device kirkwood_uart0 = {
514 .name = "serial8250",
517 .platform_data = kirkwood_uart0_data,
519 .resource = kirkwood_uart0_resources,
520 .num_resources = ARRAY_SIZE(kirkwood_uart0_resources),
523 void __init kirkwood_uart0_init(void)
525 platform_device_register(&kirkwood_uart0);
529 /*****************************************************************************
531 ****************************************************************************/
532 static struct plat_serial8250_port kirkwood_uart1_data[] = {
534 .mapbase = UART1_PHYS_BASE,
535 .membase = (char *)UART1_VIRT_BASE,
536 .irq = IRQ_KIRKWOOD_UART_1,
537 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
545 static struct resource kirkwood_uart1_resources[] = {
547 .start = UART1_PHYS_BASE,
548 .end = UART1_PHYS_BASE + 0xff,
549 .flags = IORESOURCE_MEM,
551 .start = IRQ_KIRKWOOD_UART_1,
552 .end = IRQ_KIRKWOOD_UART_1,
553 .flags = IORESOURCE_IRQ,
557 static struct platform_device kirkwood_uart1 = {
558 .name = "serial8250",
561 .platform_data = kirkwood_uart1_data,
563 .resource = kirkwood_uart1_resources,
564 .num_resources = ARRAY_SIZE(kirkwood_uart1_resources),
567 void __init kirkwood_uart1_init(void)
569 platform_device_register(&kirkwood_uart1);
573 /*****************************************************************************
574 * Cryptographic Engines and Security Accelerator (CESA)
575 ****************************************************************************/
577 static struct resource kirkwood_crypto_res[] = {
580 .start = CRYPTO_PHYS_BASE,
581 .end = CRYPTO_PHYS_BASE + 0xffff,
582 .flags = IORESOURCE_MEM,
585 .start = KIRKWOOD_SRAM_PHYS_BASE,
586 .end = KIRKWOOD_SRAM_PHYS_BASE + KIRKWOOD_SRAM_SIZE - 1,
587 .flags = IORESOURCE_MEM,
589 .name = "crypto interrupt",
590 .start = IRQ_KIRKWOOD_CRYPTO,
591 .end = IRQ_KIRKWOOD_CRYPTO,
592 .flags = IORESOURCE_IRQ,
596 static struct platform_device kirkwood_crypto_device = {
599 .num_resources = ARRAY_SIZE(kirkwood_crypto_res),
600 .resource = kirkwood_crypto_res,
603 void __init kirkwood_crypto_init(void)
605 kirkwood_clk_ctrl |= CGC_CRYPTO;
606 platform_device_register(&kirkwood_crypto_device);
610 /*****************************************************************************
612 ****************************************************************************/
613 static struct mv_xor_platform_shared_data kirkwood_xor_shared_data = {
614 .dram = &kirkwood_mbus_dram_info,
617 static u64 kirkwood_xor_dmamask = DMA_BIT_MASK(32);
620 /*****************************************************************************
622 ****************************************************************************/
623 static struct resource kirkwood_xor0_shared_resources[] = {
626 .start = XOR0_PHYS_BASE,
627 .end = XOR0_PHYS_BASE + 0xff,
628 .flags = IORESOURCE_MEM,
630 .name = "xor 0 high",
631 .start = XOR0_HIGH_PHYS_BASE,
632 .end = XOR0_HIGH_PHYS_BASE + 0xff,
633 .flags = IORESOURCE_MEM,
637 static struct platform_device kirkwood_xor0_shared = {
638 .name = MV_XOR_SHARED_NAME,
641 .platform_data = &kirkwood_xor_shared_data,
643 .num_resources = ARRAY_SIZE(kirkwood_xor0_shared_resources),
644 .resource = kirkwood_xor0_shared_resources,
647 static struct resource kirkwood_xor00_resources[] = {
649 .start = IRQ_KIRKWOOD_XOR_00,
650 .end = IRQ_KIRKWOOD_XOR_00,
651 .flags = IORESOURCE_IRQ,
655 static struct mv_xor_platform_data kirkwood_xor00_data = {
656 .shared = &kirkwood_xor0_shared,
658 .pool_size = PAGE_SIZE,
661 static struct platform_device kirkwood_xor00_channel = {
664 .num_resources = ARRAY_SIZE(kirkwood_xor00_resources),
665 .resource = kirkwood_xor00_resources,
667 .dma_mask = &kirkwood_xor_dmamask,
668 .coherent_dma_mask = DMA_BIT_MASK(64),
669 .platform_data = &kirkwood_xor00_data,
673 static struct resource kirkwood_xor01_resources[] = {
675 .start = IRQ_KIRKWOOD_XOR_01,
676 .end = IRQ_KIRKWOOD_XOR_01,
677 .flags = IORESOURCE_IRQ,
681 static struct mv_xor_platform_data kirkwood_xor01_data = {
682 .shared = &kirkwood_xor0_shared,
684 .pool_size = PAGE_SIZE,
687 static struct platform_device kirkwood_xor01_channel = {
690 .num_resources = ARRAY_SIZE(kirkwood_xor01_resources),
691 .resource = kirkwood_xor01_resources,
693 .dma_mask = &kirkwood_xor_dmamask,
694 .coherent_dma_mask = DMA_BIT_MASK(64),
695 .platform_data = &kirkwood_xor01_data,
699 static void __init kirkwood_xor0_init(void)
701 kirkwood_clk_ctrl |= CGC_XOR0;
702 platform_device_register(&kirkwood_xor0_shared);
705 * two engines can't do memset simultaneously, this limitation
706 * satisfied by removing memset support from one of the engines.
708 dma_cap_set(DMA_MEMCPY, kirkwood_xor00_data.cap_mask);
709 dma_cap_set(DMA_XOR, kirkwood_xor00_data.cap_mask);
710 platform_device_register(&kirkwood_xor00_channel);
712 dma_cap_set(DMA_MEMCPY, kirkwood_xor01_data.cap_mask);
713 dma_cap_set(DMA_MEMSET, kirkwood_xor01_data.cap_mask);
714 dma_cap_set(DMA_XOR, kirkwood_xor01_data.cap_mask);
715 platform_device_register(&kirkwood_xor01_channel);
719 /*****************************************************************************
721 ****************************************************************************/
722 static struct resource kirkwood_xor1_shared_resources[] = {
725 .start = XOR1_PHYS_BASE,
726 .end = XOR1_PHYS_BASE + 0xff,
727 .flags = IORESOURCE_MEM,
729 .name = "xor 1 high",
730 .start = XOR1_HIGH_PHYS_BASE,
731 .end = XOR1_HIGH_PHYS_BASE + 0xff,
732 .flags = IORESOURCE_MEM,
736 static struct platform_device kirkwood_xor1_shared = {
737 .name = MV_XOR_SHARED_NAME,
740 .platform_data = &kirkwood_xor_shared_data,
742 .num_resources = ARRAY_SIZE(kirkwood_xor1_shared_resources),
743 .resource = kirkwood_xor1_shared_resources,
746 static struct resource kirkwood_xor10_resources[] = {
748 .start = IRQ_KIRKWOOD_XOR_10,
749 .end = IRQ_KIRKWOOD_XOR_10,
750 .flags = IORESOURCE_IRQ,
754 static struct mv_xor_platform_data kirkwood_xor10_data = {
755 .shared = &kirkwood_xor1_shared,
757 .pool_size = PAGE_SIZE,
760 static struct platform_device kirkwood_xor10_channel = {
763 .num_resources = ARRAY_SIZE(kirkwood_xor10_resources),
764 .resource = kirkwood_xor10_resources,
766 .dma_mask = &kirkwood_xor_dmamask,
767 .coherent_dma_mask = DMA_BIT_MASK(64),
768 .platform_data = &kirkwood_xor10_data,
772 static struct resource kirkwood_xor11_resources[] = {
774 .start = IRQ_KIRKWOOD_XOR_11,
775 .end = IRQ_KIRKWOOD_XOR_11,
776 .flags = IORESOURCE_IRQ,
780 static struct mv_xor_platform_data kirkwood_xor11_data = {
781 .shared = &kirkwood_xor1_shared,
783 .pool_size = PAGE_SIZE,
786 static struct platform_device kirkwood_xor11_channel = {
789 .num_resources = ARRAY_SIZE(kirkwood_xor11_resources),
790 .resource = kirkwood_xor11_resources,
792 .dma_mask = &kirkwood_xor_dmamask,
793 .coherent_dma_mask = DMA_BIT_MASK(64),
794 .platform_data = &kirkwood_xor11_data,
798 static void __init kirkwood_xor1_init(void)
800 kirkwood_clk_ctrl |= CGC_XOR1;
801 platform_device_register(&kirkwood_xor1_shared);
804 * two engines can't do memset simultaneously, this limitation
805 * satisfied by removing memset support from one of the engines.
807 dma_cap_set(DMA_MEMCPY, kirkwood_xor10_data.cap_mask);
808 dma_cap_set(DMA_XOR, kirkwood_xor10_data.cap_mask);
809 platform_device_register(&kirkwood_xor10_channel);
811 dma_cap_set(DMA_MEMCPY, kirkwood_xor11_data.cap_mask);
812 dma_cap_set(DMA_MEMSET, kirkwood_xor11_data.cap_mask);
813 dma_cap_set(DMA_XOR, kirkwood_xor11_data.cap_mask);
814 platform_device_register(&kirkwood_xor11_channel);
818 /*****************************************************************************
820 ****************************************************************************/
821 static struct orion_wdt_platform_data kirkwood_wdt_data = {
825 static struct platform_device kirkwood_wdt_device = {
829 .platform_data = &kirkwood_wdt_data,
834 static void __init kirkwood_wdt_init(void)
836 kirkwood_wdt_data.tclk = kirkwood_tclk;
837 platform_device_register(&kirkwood_wdt_device);
841 /*****************************************************************************
843 ****************************************************************************/
846 int __init kirkwood_find_tclk(void)
850 kirkwood_pcie_id(&dev, &rev);
851 if (dev == MV88F6281_DEV_ID && (rev == MV88F6281_REV_A0 ||
852 rev == MV88F6281_REV_A1))
858 static void __init kirkwood_timer_init(void)
860 kirkwood_tclk = kirkwood_find_tclk();
861 orion_time_init(IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
864 struct sys_timer kirkwood_timer = {
865 .init = kirkwood_timer_init,
868 /*****************************************************************************
870 ****************************************************************************/
871 static struct resource kirkwood_i2s_resources[] = {
873 .start = AUDIO_PHYS_BASE,
874 .end = AUDIO_PHYS_BASE + SZ_16K - 1,
875 .flags = IORESOURCE_MEM,
878 .start = IRQ_KIRKWOOD_I2S,
879 .end = IRQ_KIRKWOOD_I2S,
880 .flags = IORESOURCE_IRQ,
884 static struct kirkwood_asoc_platform_data kirkwood_i2s_data = {
885 .dram = &kirkwood_mbus_dram_info,
889 static struct platform_device kirkwood_i2s_device = {
890 .name = "kirkwood-i2s",
892 .num_resources = ARRAY_SIZE(kirkwood_i2s_resources),
893 .resource = kirkwood_i2s_resources,
895 .platform_data = &kirkwood_i2s_data,
899 static struct platform_device kirkwood_pcm_device = {
900 .name = "kirkwood-pcm",
904 void __init kirkwood_audio_init(void)
906 kirkwood_clk_ctrl |= CGC_AUDIO;
907 platform_device_register(&kirkwood_i2s_device);
908 platform_device_register(&kirkwood_pcm_device);
911 /*****************************************************************************
913 ****************************************************************************/
915 * Identify device ID and revision.
917 static char * __init kirkwood_id(void)
921 kirkwood_pcie_id(&dev, &rev);
923 if (dev == MV88F6281_DEV_ID) {
924 if (rev == MV88F6281_REV_Z0)
925 return "MV88F6281-Z0";
926 else if (rev == MV88F6281_REV_A0)
927 return "MV88F6281-A0";
928 else if (rev == MV88F6281_REV_A1)
929 return "MV88F6281-A1";
931 return "MV88F6281-Rev-Unsupported";
932 } else if (dev == MV88F6192_DEV_ID) {
933 if (rev == MV88F6192_REV_Z0)
934 return "MV88F6192-Z0";
935 else if (rev == MV88F6192_REV_A0)
936 return "MV88F6192-A0";
938 return "MV88F6192-Rev-Unsupported";
939 } else if (dev == MV88F6180_DEV_ID) {
940 if (rev == MV88F6180_REV_A0)
941 return "MV88F6180-Rev-A0";
943 return "MV88F6180-Rev-Unsupported";
945 return "Device-Unknown";
949 static void __init kirkwood_l2_init(void)
951 #ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
952 writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
955 writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
960 void __init kirkwood_init(void)
962 printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n",
963 kirkwood_id(), kirkwood_tclk);
964 kirkwood_ge00_shared_data.t_clk = kirkwood_tclk;
965 kirkwood_ge01_shared_data.t_clk = kirkwood_tclk;
966 kirkwood_spi_plat_data.tclk = kirkwood_tclk;
967 kirkwood_uart0_data[0].uartclk = kirkwood_tclk;
968 kirkwood_uart1_data[0].uartclk = kirkwood_tclk;
969 kirkwood_i2s_data.tclk = kirkwood_tclk;
972 * Disable propagation of mbus errors to the CPU local bus,
973 * as this causes mbus errors (which can occur for example
974 * for PCI aborts) to throw CPU aborts, which we're not set
977 writel(readl(CPU_CONFIG) & ~CPU_CONFIG_ERROR_PROP, CPU_CONFIG);
979 kirkwood_setup_cpu_mbus();
981 #ifdef CONFIG_CACHE_FEROCEON_L2
985 /* internal devices that every board has */
988 kirkwood_xor0_init();
989 kirkwood_xor1_init();
990 kirkwood_crypto_init();
993 static int __init kirkwood_clock_gate(void)
995 unsigned int curr = readl(CLOCK_GATING_CTRL);
997 printk(KERN_DEBUG "Gating clock of unused units\n");
998 printk(KERN_DEBUG "before: 0x%08x\n", curr);
1000 /* Make sure those units are accessible */
1001 writel(curr | CGC_SATA0 | CGC_SATA1 | CGC_PEX0, CLOCK_GATING_CTRL);
1003 /* For SATA: first shutdown the phy */
1004 if (!(kirkwood_clk_ctrl & CGC_SATA0)) {
1005 /* Disable PLL and IVREF */
1006 writel(readl(SATA0_PHY_MODE_2) & ~0xf, SATA0_PHY_MODE_2);
1008 writel(readl(SATA0_IF_CTRL) | 0x200, SATA0_IF_CTRL);
1010 if (!(kirkwood_clk_ctrl & CGC_SATA1)) {
1011 /* Disable PLL and IVREF */
1012 writel(readl(SATA1_PHY_MODE_2) & ~0xf, SATA1_PHY_MODE_2);
1014 writel(readl(SATA1_IF_CTRL) | 0x200, SATA1_IF_CTRL);
1017 /* For PCIe: first shutdown the phy */
1018 if (!(kirkwood_clk_ctrl & CGC_PEX0)) {
1019 writel(readl(PCIE_LINK_CTRL) | 0x10, PCIE_LINK_CTRL);
1021 if (readl(PCIE_STATUS) & 0x1)
1023 writel(readl(PCIE_LINK_CTRL) & ~0x10, PCIE_LINK_CTRL);
1026 /* Now gate clock the required units */
1027 writel(kirkwood_clk_ctrl, CLOCK_GATING_CTRL);
1028 printk(KERN_DEBUG " after: 0x%08x\n", readl(CLOCK_GATING_CTRL));
1032 late_initcall(kirkwood_clock_gate);