2 * TI DaVinci DM646X EVM board
4 * Derived from: arch/arm/mach-davinci/board-evm.c
5 * Copyright (C) 2006 Texas Instruments.
7 * (C) 2007-2008, MontaVista Software, Inc.
9 * This file is licensed under the terms of the GNU General Public License
10 * version 2. This program is licensed "as is" without any warranty of any
11 * kind, whether express or implied.
15 /**************************************************************************
17 **************************************************************************/
19 #include <linux/kernel.h>
20 #include <linux/init.h>
21 #include <linux/leds.h>
22 #include <linux/gpio.h>
23 #include <linux/platform_device.h>
24 #include <linux/i2c.h>
25 #include <linux/platform_data/at24.h>
26 #include <linux/platform_data/pcf857x.h>
28 #include <media/i2c/tvp514x.h>
29 #include <media/i2c/adv7343.h>
31 #include <linux/mtd/mtd.h>
32 #include <linux/mtd/rawnand.h>
33 #include <linux/mtd/partitions.h>
34 #include <linux/clk.h>
35 #include <linux/export.h>
36 #include <linux/platform_data/gpio-davinci.h>
37 #include <linux/platform_data/i2c-davinci.h>
38 #include <linux/platform_data/mtd-davinci.h>
39 #include <linux/platform_data/mtd-davinci-aemif.h>
41 #include <asm/mach-types.h>
42 #include <asm/mach/arch.h>
44 #include <mach/common.h>
45 #include <mach/irqs.h>
46 #include <mach/serial.h>
50 #define NAND_BLOCK_SIZE SZ_128K
52 /* Note: We are setting first partition as 'bootloader' constituting UBL, U-Boot
53 * and U-Boot environment this avoids dependency on any particular combination
54 * of UBL, U-Boot or flashing tools etc.
56 static struct mtd_partition davinci_nand_partitions[] = {
58 /* UBL, U-Boot with environment */
60 .offset = MTDPART_OFS_APPEND,
61 .size = 16 * NAND_BLOCK_SIZE,
62 .mask_flags = MTD_WRITEABLE, /* force read-only */
65 .offset = MTDPART_OFS_APPEND,
70 .offset = MTDPART_OFS_APPEND,
71 .size = MTDPART_SIZ_FULL,
76 static struct davinci_aemif_timing dm6467tevm_nandflash_timing = {
86 static struct davinci_nand_pdata davinci_nand_data = {
90 .parts = davinci_nand_partitions,
91 .nr_parts = ARRAY_SIZE(davinci_nand_partitions),
92 .ecc_mode = NAND_ECC_HW,
97 static struct resource davinci_nand_resources[] = {
99 .start = DM646X_ASYNC_EMIF_CS2_SPACE_BASE,
100 .end = DM646X_ASYNC_EMIF_CS2_SPACE_BASE + SZ_32M - 1,
101 .flags = IORESOURCE_MEM,
103 .start = DM646X_ASYNC_EMIF_CONTROL_BASE,
104 .end = DM646X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
105 .flags = IORESOURCE_MEM,
109 static struct platform_device davinci_nand_device = {
110 .name = "davinci_nand",
113 .num_resources = ARRAY_SIZE(davinci_nand_resources),
114 .resource = davinci_nand_resources,
117 .platform_data = &davinci_nand_data,
121 #define HAS_ATA (IS_ENABLED(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
122 IS_ENABLED(CONFIG_PATA_BK3710))
125 /* CPLD Register 0 bits to control ATA */
126 #define DM646X_EVM_ATA_RST BIT(0)
127 #define DM646X_EVM_ATA_PWD BIT(1)
129 /* CPLD Register 0 Client: used for I/O Control */
130 static int cpld_reg0_probe(struct i2c_client *client,
131 const struct i2c_device_id *id)
135 struct i2c_msg msg[2] = {
137 .addr = client->addr,
143 .addr = client->addr,
150 /* Clear ATA_RSTn and ATA_PWD bits to enable ATA operation. */
151 i2c_transfer(client->adapter, msg, 1);
152 data &= ~(DM646X_EVM_ATA_RST | DM646X_EVM_ATA_PWD);
153 i2c_transfer(client->adapter, msg + 1, 1);
159 static const struct i2c_device_id cpld_reg_ids[] = {
164 static struct i2c_driver dm6467evm_cpld_driver = {
165 .driver.name = "cpld_reg0",
166 .id_table = cpld_reg_ids,
167 .probe = cpld_reg0_probe,
172 static struct gpio_led evm_leds[] = {
173 { .name = "DS1", .active_low = 1, },
174 { .name = "DS2", .active_low = 1, },
175 { .name = "DS3", .active_low = 1, },
176 { .name = "DS4", .active_low = 1, },
179 static const struct gpio_led_platform_data evm_led_data = {
180 .num_leds = ARRAY_SIZE(evm_leds),
184 static struct platform_device *evm_led_dev;
186 static int evm_led_setup(struct i2c_client *client, int gpio,
187 unsigned int ngpio, void *c)
189 struct gpio_led *leds = evm_leds;
197 evm_led_dev = platform_device_alloc("leds-gpio", 0);
198 platform_device_add_data(evm_led_dev, &evm_led_data,
199 sizeof(evm_led_data));
201 evm_led_dev->dev.parent = &client->dev;
202 status = platform_device_add(evm_led_dev);
204 platform_device_put(evm_led_dev);
210 static int evm_led_teardown(struct i2c_client *client, int gpio,
211 unsigned ngpio, void *c)
214 platform_device_unregister(evm_led_dev);
220 static int evm_sw_gpio[4] = { -EINVAL, -EINVAL, -EINVAL, -EINVAL };
222 static int evm_sw_setup(struct i2c_client *client, int gpio,
223 unsigned ngpio, void *c)
229 for (i = 0; i < 4; ++i) {
230 snprintf(label, 10, "user_sw%d", i);
231 status = gpio_request(gpio, label);
234 evm_sw_gpio[i] = gpio++;
236 status = gpio_direction_input(evm_sw_gpio[i]);
238 gpio_free(evm_sw_gpio[i]);
239 evm_sw_gpio[i] = -EINVAL;
243 status = gpio_export(evm_sw_gpio[i], 0);
245 gpio_free(evm_sw_gpio[i]);
246 evm_sw_gpio[i] = -EINVAL;
252 for (i = 0; i < 4; ++i) {
253 if (evm_sw_gpio[i] != -EINVAL) {
254 gpio_free(evm_sw_gpio[i]);
255 evm_sw_gpio[i] = -EINVAL;
261 static int evm_sw_teardown(struct i2c_client *client, int gpio,
262 unsigned ngpio, void *c)
266 for (i = 0; i < 4; ++i) {
267 if (evm_sw_gpio[i] != -EINVAL) {
268 gpio_unexport(evm_sw_gpio[i]);
269 gpio_free(evm_sw_gpio[i]);
270 evm_sw_gpio[i] = -EINVAL;
276 static int evm_pcf_setup(struct i2c_client *client, int gpio,
277 unsigned int ngpio, void *c)
284 status = evm_sw_setup(client, gpio, 4, c);
288 return evm_led_setup(client, gpio+4, 4, c);
291 static int evm_pcf_teardown(struct i2c_client *client, int gpio,
292 unsigned int ngpio, void *c)
296 evm_sw_teardown(client, gpio, 4, c);
297 evm_led_teardown(client, gpio+4, 4, c);
302 static struct pcf857x_platform_data pcf_data = {
303 .gpio_base = DAVINCI_N_GPIO+1,
304 .setup = evm_pcf_setup,
305 .teardown = evm_pcf_teardown,
308 /* Most of this EEPROM is unused, but U-Boot uses some data:
309 * - 0x7f00, 6 bytes Ethernet Address
310 * - ... newer boards may have more
313 static struct at24_platform_data eeprom_info = {
314 .byte_len = (256*1024) / 8,
316 .flags = AT24_FLAG_ADDR16,
317 .setup = davinci_get_mac_addr,
318 .context = (void *)0x7f00,
322 static u8 dm646x_iis_serializer_direction[] = {
323 TX_MODE, RX_MODE, INACTIVE_MODE, INACTIVE_MODE,
326 static u8 dm646x_dit_serializer_direction[] = {
330 static struct snd_platform_data dm646x_evm_snd_data[] = {
332 .tx_dma_offset = 0x400,
333 .rx_dma_offset = 0x400,
334 .op_mode = DAVINCI_MCASP_IIS_MODE,
335 .num_serializer = ARRAY_SIZE(dm646x_iis_serializer_direction),
337 .serial_dir = dm646x_iis_serializer_direction,
338 .asp_chan_q = EVENTQ_0,
341 .tx_dma_offset = 0x400,
343 .op_mode = DAVINCI_MCASP_DIT_MODE,
344 .num_serializer = ARRAY_SIZE(dm646x_dit_serializer_direction),
346 .serial_dir = dm646x_dit_serializer_direction,
347 .asp_chan_q = EVENTQ_0,
352 static struct i2c_client *cpld_client;
354 static int cpld_video_probe(struct i2c_client *client,
355 const struct i2c_device_id *id)
357 cpld_client = client;
361 static int cpld_video_remove(struct i2c_client *client)
367 static const struct i2c_device_id cpld_video_id[] = {
372 static struct i2c_driver cpld_video_driver = {
374 .name = "cpld_video",
376 .probe = cpld_video_probe,
377 .remove = cpld_video_remove,
378 .id_table = cpld_video_id,
381 static void evm_init_cpld(void)
383 i2c_add_driver(&cpld_video_driver);
386 static struct i2c_board_info __initdata i2c_info[] = {
388 I2C_BOARD_INFO("24c256", 0x50),
389 .platform_data = &eeprom_info,
392 I2C_BOARD_INFO("pcf8574a", 0x38),
393 .platform_data = &pcf_data,
396 I2C_BOARD_INFO("cpld_reg0", 0x3a),
399 I2C_BOARD_INFO("tlv320aic33", 0x18),
402 I2C_BOARD_INFO("cpld_video", 0x3b),
406 static struct davinci_i2c_platform_data i2c_pdata = {
407 .bus_freq = 100 /* kHz */,
408 .bus_delay = 0 /* usec */,
411 #define VCH2CLK_MASK (BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8))
412 #define VCH2CLK_SYSCLK8 (BIT(9))
413 #define VCH2CLK_AUXCLK (BIT(9) | BIT(8))
414 #define VCH3CLK_MASK (BIT_MASK(14) | BIT_MASK(13) | BIT_MASK(12))
415 #define VCH3CLK_SYSCLK8 (BIT(13))
416 #define VCH3CLK_AUXCLK (BIT(14) | BIT(13))
418 #define VIDCH2CLK (BIT(10))
419 #define VIDCH3CLK (BIT(11))
420 #define VIDCH1CLK (BIT(4))
421 #define TVP7002_INPUT (BIT(4))
422 #define TVP5147_INPUT (~BIT(4))
423 #define VPIF_INPUT_ONE_CHANNEL (BIT(5))
424 #define VPIF_INPUT_TWO_CHANNEL (~BIT(5))
425 #define TVP5147_CH0 "tvp514x-0"
426 #define TVP5147_CH1 "tvp514x-1"
428 /* spin lock for updating above registers */
429 static spinlock_t vpif_reg_lock;
431 static int set_vpif_clock(int mux_mode, int hd)
441 /* disable the clock */
442 spin_lock_irqsave(&vpif_reg_lock, flags);
443 value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
444 value |= (VIDCH3CLK | VIDCH2CLK);
445 __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
446 spin_unlock_irqrestore(&vpif_reg_lock, flags);
448 val = i2c_smbus_read_byte(cpld_client);
457 err = i2c_smbus_write_byte(cpld_client, val);
461 value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
462 value &= ~(VCH2CLK_MASK);
463 value &= ~(VCH3CLK_MASK);
466 value |= (VCH2CLK_SYSCLK8 | VCH3CLK_SYSCLK8);
468 value |= (VCH2CLK_AUXCLK | VCH3CLK_AUXCLK);
470 __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
472 spin_lock_irqsave(&vpif_reg_lock, flags);
473 value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
474 /* enable the clock */
475 value &= ~(VIDCH3CLK | VIDCH2CLK);
476 __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
477 spin_unlock_irqrestore(&vpif_reg_lock, flags);
482 static struct vpif_subdev_info dm646x_vpif_subdev[] = {
486 I2C_BOARD_INFO("adv7343", 0x2a),
492 I2C_BOARD_INFO("ths7303", 0x2c),
497 static const struct vpif_output dm6467_ch0_outputs[] = {
502 .type = V4L2_OUTPUT_TYPE_ANALOG,
503 .capabilities = V4L2_OUT_CAP_STD,
506 .subdev_name = "adv7343",
507 .output_route = ADV7343_COMPOSITE_ID,
513 .type = V4L2_OUTPUT_TYPE_ANALOG,
514 .capabilities = V4L2_OUT_CAP_DV_TIMINGS,
516 .subdev_name = "adv7343",
517 .output_route = ADV7343_COMPONENT_ID,
523 .type = V4L2_OUTPUT_TYPE_ANALOG,
524 .capabilities = V4L2_OUT_CAP_STD,
527 .subdev_name = "adv7343",
528 .output_route = ADV7343_SVIDEO_ID,
532 static struct vpif_display_config dm646x_vpif_display_config = {
533 .set_clock = set_vpif_clock,
534 .subdevinfo = dm646x_vpif_subdev,
535 .subdev_count = ARRAY_SIZE(dm646x_vpif_subdev),
538 .outputs = dm6467_ch0_outputs,
539 .output_count = ARRAY_SIZE(dm6467_ch0_outputs),
541 .card_name = "DM646x EVM Video Display",
545 * setup_vpif_input_path()
546 * @channel: channel id (0 - CH0, 1 - CH1)
547 * @sub_dev_name: ptr sub device name
549 * This will set vpif input to capture data from tvp514x or
552 static int setup_vpif_input_path(int channel, const char *sub_dev_name)
557 /* for channel 1, we don't do anything */
564 val = i2c_smbus_read_byte(cpld_client);
568 if (!strcmp(sub_dev_name, TVP5147_CH0) ||
569 !strcmp(sub_dev_name, TVP5147_CH1))
570 val &= TVP5147_INPUT;
572 val |= TVP7002_INPUT;
574 err = i2c_smbus_write_byte(cpld_client, val);
581 * setup_vpif_input_channel_mode()
582 * @mux_mode: mux mode. 0 - 1 channel or (1) - 2 channel
584 * This will setup input mode to one channel (TVP7002) or 2 channel (TVP5147)
586 static int setup_vpif_input_channel_mode(int mux_mode)
596 val = i2c_smbus_read_byte(cpld_client);
600 spin_lock_irqsave(&vpif_reg_lock, flags);
601 value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
603 val &= VPIF_INPUT_TWO_CHANNEL;
606 val |= VPIF_INPUT_ONE_CHANNEL;
609 __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
610 spin_unlock_irqrestore(&vpif_reg_lock, flags);
612 err = i2c_smbus_write_byte(cpld_client, val);
619 static struct tvp514x_platform_data tvp5146_pdata = {
625 #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
627 static struct vpif_subdev_info vpif_capture_sdev_info[] = {
631 I2C_BOARD_INFO("tvp5146", 0x5d),
632 .platform_data = &tvp5146_pdata,
638 I2C_BOARD_INFO("tvp5146", 0x5c),
639 .platform_data = &tvp5146_pdata,
644 static struct vpif_input dm6467_ch0_inputs[] = {
649 .type = V4L2_INPUT_TYPE_CAMERA,
650 .capabilities = V4L2_IN_CAP_STD,
651 .std = TVP514X_STD_ALL,
653 .subdev_name = TVP5147_CH0,
654 .input_route = INPUT_CVBS_VI2B,
655 .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
659 static struct vpif_input dm6467_ch1_inputs[] = {
664 .type = V4L2_INPUT_TYPE_CAMERA,
665 .capabilities = V4L2_IN_CAP_STD,
666 .std = TVP514X_STD_ALL,
668 .subdev_name = TVP5147_CH1,
669 .input_route = INPUT_SVIDEO_VI2C_VI1C,
670 .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
674 static struct vpif_capture_config dm646x_vpif_capture_cfg = {
675 .setup_input_path = setup_vpif_input_path,
676 .setup_input_channel_mode = setup_vpif_input_channel_mode,
677 .subdev_info = vpif_capture_sdev_info,
678 .subdev_count = ARRAY_SIZE(vpif_capture_sdev_info),
681 .inputs = dm6467_ch0_inputs,
682 .input_count = ARRAY_SIZE(dm6467_ch0_inputs),
684 .if_type = VPIF_IF_BT656,
691 .inputs = dm6467_ch1_inputs,
692 .input_count = ARRAY_SIZE(dm6467_ch1_inputs),
694 .if_type = VPIF_IF_BT656,
700 .card_name = "DM646x EVM Video Capture",
703 static void __init evm_init_video(void)
705 spin_lock_init(&vpif_reg_lock);
707 dm646x_setup_vpif(&dm646x_vpif_display_config,
708 &dm646x_vpif_capture_cfg);
711 static void __init evm_init_i2c(void)
713 davinci_init_i2c(&i2c_pdata);
714 i2c_add_driver(&dm6467evm_cpld_driver);
715 i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
721 #define DM646X_REF_FREQ 27000000
722 #define DM646X_AUX_FREQ 24000000
723 #define DM6467T_EVM_REF_FREQ 33000000
725 static void __init davinci_map_io(void)
730 static void __init dm646x_evm_init_time(void)
732 dm646x_init_time(DM646X_REF_FREQ, DM646X_AUX_FREQ);
735 static void __init dm6467t_evm_init_time(void)
737 dm646x_init_time(DM6467T_EVM_REF_FREQ, DM646X_AUX_FREQ);
740 #define DM646X_EVM_PHY_ID "davinci_mdio-0:01"
742 * The following EDMA channels/slots are not being used by drivers (for
743 * example: Timer, GPIO, UART events etc) on dm646x, hence they are being
744 * reserved for codecs on the DSP side.
746 static const s16 dm646x_dma_rsv_chans[][2] = {
747 /* (offset, number) */
756 static const s16 dm646x_dma_rsv_slots[][2] = {
757 /* (offset, number) */
767 static struct edma_rsv_info dm646x_edma_rsv[] = {
769 .rsv_chans = dm646x_dma_rsv_chans,
770 .rsv_slots = dm646x_dma_rsv_slots,
774 static __init void evm_init(void)
777 struct davinci_soc_info *soc_info = &davinci_soc_info;
779 ret = dm646x_gpio_register();
781 pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
787 davinci_serial_init(dm646x_serial_device);
788 dm646x_init_mcasp0(&dm646x_evm_snd_data[0]);
789 dm646x_init_mcasp1(&dm646x_evm_snd_data[1]);
791 if (machine_is_davinci_dm6467tevm())
792 davinci_nand_data.timing = &dm6467tevm_nandflash_timing;
794 platform_device_register(&davinci_nand_device);
796 if (davinci_aemif_setup(&davinci_nand_device))
797 pr_warn("%s: Cannot configure AEMIF.\n", __func__);
799 dm646x_init_edma(dm646x_edma_rsv);
804 soc_info->emac_pdata->phy_id = DM646X_EVM_PHY_ID;
807 MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
808 .atag_offset = 0x100,
809 .map_io = davinci_map_io,
810 .init_irq = davinci_irq_init,
811 .init_time = dm646x_evm_init_time,
812 .init_machine = evm_init,
813 .init_late = davinci_init_late,
814 .dma_zone_size = SZ_128M,
817 MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
818 .atag_offset = 0x100,
819 .map_io = davinci_map_io,
820 .init_irq = davinci_irq_init,
821 .init_time = dm6467t_evm_init_time,
822 .init_machine = evm_init,
823 .init_late = davinci_init_late,
824 .dma_zone_size = SZ_128M,