arch/arm/boot/dts/vf610-cosmic.dts

   1 /*
   2  * Copyright 2013 Freescale Semiconductor, Inc.
   3  * Copyright 2013 Linaro Limited
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; either version 2 of the License, or
   8  * (at your option) any later version.
   9  */
  10
  11 /dts-v1/;
  12 #include "vf610.dtsi"
  13
  14 / {
  15         model = "PHYTEC Cosmic/Cosmic+ Board";
  16         compatible = "phytec,vf610-cosmic", "fsl,vf610";
  17
  18         chosen {
  19                 bootargs = "console=ttyLP1,115200";
  20         };
  21
  22         memory {
  23                 reg = <0x80000000 0x10000000>;
  24         };
  25
  26         clocks {
  27                 enet_ext {
  28                         compatible = "fixed-clock";
  29                         #clock-cells = <0>;
  30                         clock-frequency = <50000000>;
  31                 };
  32         };
  33
  34 };
  35
  36 &fec1 {
  37         phy-mode = "rmii";
  38         pinctrl-names = "default";
  39         pinctrl-0 = <&pinctrl_fec1>;
  40         status = "okay";
  41 };
  42
  43 &iomuxc {
  44         vf610-cosmic {
  45                 pinctrl_fec1: fec1grp {
  46                         fsl,pins = <
  47                                 VF610_PAD_PTC9__ENET_RMII1_MDC          0x30d2
  48                                 VF610_PAD_PTC10__ENET_RMII1_MDIO        0x30d3
  49                                 VF610_PAD_PTC11__ENET_RMII1_CRS         0x30d1
  50                                 VF610_PAD_PTC12__ENET_RMII_RXD1         0x30d1
  51                                 VF610_PAD_PTC13__ENET_RMII1_RXD0        0x30d1
  52                                 VF610_PAD_PTC14__ENET_RMII1_RXER        0x30d1
  53                                 VF610_PAD_PTC15__ENET_RMII1_TXD1        0x30d2
  54                                 VF610_PAD_PTC16__ENET_RMII1_TXD0        0x30d2
  55                                 VF610_PAD_PTC17__ENET_RMII1_TXEN        0x30d2
  56                         >;
  57                 };
  58
  59                 pinctrl_uart1: uart1grp {
  60                         fsl,pins = <
  61                                 VF610_PAD_PTB4__UART1_TX                0x21a2
  62                                 VF610_PAD_PTB5__UART1_RX                0x21a1
  63                         >;
  64                 };
  65         };
  66 };
  67
  68 &uart1 {
  69         pinctrl-names = "default";
  70         pinctrl-0 = <&pinctrl_uart1>;
  71         status = "okay";
  72 };