arch/arm/boot/dts/tegra114-roth.dts

   1 /dts-v1/;
   2
   3 #include <dt-bindings/input/input.h>
   4 #include "tegra114.dtsi"
   5
   6 / {
   7         model = "NVIDIA SHIELD";
   8         compatible = "nvidia,roth", "nvidia,tegra114";
   9
  10         chosen {
  11                 /* SHIELD's bootloader's arguments need to be overridden */
  12                 bootargs = "console=ttyS0,115200n8 console=tty1 gpt fbcon=rotate:1";
  13                 /* SHIELD's bootloader will place initrd at this address */
  14                 linux,initrd-start = <0x82000000>;
  15                 linux,initrd-end = <0x82800000>;
  16         };
  17
  18         firmware {
  19                 trusted-foundations {
  20                         compatible = "tlm,trusted-foundations";
  21                         tlm,version-major = <2>;
  22                         tlm,version-minor = <8>;
  23                 };
  24         };
  25
  26         memory {
  27                 /* memory >= 0x79600000 is reserved for firmware usage */
  28                 reg = <0x80000000 0x79600000>;
  29         };
  30
  31         pinmux@70000868 {
  32                 pinctrl-names = "default";
  33                 pinctrl-0 = <&state_default>;
  34
  35                 state_default: pinmux {
  36                         clk1_out_pw4 {
  37                                 nvidia,pins = "clk1_out_pw4";
  38                                 nvidia,function = "extperiph1";
  39                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  40                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  41                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  42                         };
  43                         dap1_din_pn1 {
  44                                 nvidia,pins = "dap1_din_pn1";
  45                                 nvidia,function = "i2s0";
  46                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  47                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
  48                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  49                         };
  50                         dap1_dout_pn2 {
  51                                 nvidia,pins = "dap1_dout_pn2",
  52                                                 "dap1_fs_pn0",
  53                                                 "dap1_sclk_pn3";
  54                                 nvidia,function = "i2s0";
  55                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  56                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  57                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  58                         };
  59                         dap2_din_pa4 {
  60                                 nvidia,pins = "dap2_din_pa4";
  61                                 nvidia,function = "i2s1";
  62                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  63                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
  64                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  65                         };
  66                         dap2_dout_pa5 {
  67                                 nvidia,pins = "dap2_dout_pa5",
  68                                                 "dap2_fs_pa2",
  69                                                 "dap2_sclk_pa3";
  70                                 nvidia,function = "i2s1";
  71                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  72                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  73                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  74                         };
  75                         dap4_din_pp5 {
  76                                 nvidia,pins = "dap4_din_pp5",
  77                                                 "dap4_dout_pp6",
  78                                                 "dap4_fs_pp4",
  79                                                 "dap4_sclk_pp7";
  80                                 nvidia,function = "i2s3";
  81                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  82                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  83                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  84                         };
  85                         dvfs_pwm_px0 {
  86                                 nvidia,pins = "dvfs_pwm_px0",
  87                                                 "dvfs_clk_px2";
  88                                 nvidia,function = "cldvfs";
  89                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  90                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  91                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  92                         };
  93                         ulpi_clk_py0 {
  94                                 nvidia,pins = "ulpi_clk_py0",
  95                                                 "ulpi_data0_po1",
  96                                                 "ulpi_data1_po2",
  97                                                 "ulpi_data2_po3",
  98                                                 "ulpi_data3_po4",
  99                                                 "ulpi_data4_po5",
 100                                                 "ulpi_data5_po6",
 101                                                 "ulpi_data6_po7",
 102                                                 "ulpi_data7_po0";
 103                                 nvidia,function = "ulpi";
 104                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 105                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 106                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 107                         };
 108                         ulpi_dir_py1 {
 109                                 nvidia,pins = "ulpi_dir_py1",
 110                                                 "ulpi_nxt_py2";
 111                                 nvidia,function = "ulpi";
 112                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 113                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 114                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 115                         };
 116                         ulpi_stp_py3 {
 117                                 nvidia,pins = "ulpi_stp_py3";
 118                                 nvidia,function = "ulpi";
 119                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 120                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 121                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 122                         };
 123                         cam_i2c_scl_pbb1 {
 124                                 nvidia,pins = "cam_i2c_scl_pbb1",
 125                                                 "cam_i2c_sda_pbb2";
 126                                 nvidia,function = "i2c3";
 127                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 128                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 129                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 130                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 131                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 132                         };
 133                         cam_mclk_pcc0 {
 134                                 nvidia,pins = "cam_mclk_pcc0",
 135                                                 "pbb0";
 136                                 nvidia,function = "vi_alt3";
 137                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 138                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 139                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 140                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 141                         };
 142                         pbb4 {
 143                                 nvidia,pins = "pbb4";
 144                                 nvidia,function = "vgp4";
 145                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 146                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 147                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 148                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 149                         };
 150                         gen2_i2c_scl_pt5 {
 151                                 nvidia,pins = "gen2_i2c_scl_pt5",
 152                                                 "gen2_i2c_sda_pt6";
 153                                 nvidia,function = "i2c2";
 154                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 155                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 156                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 157                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 158                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 159                         };
 160                         gmi_a16_pj7 {
 161                                 nvidia,pins = "gmi_a16_pj7",
 162                                                 "gmi_a19_pk7";
 163                                 nvidia,function = "uartd";
 164                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 165                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 166                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 167                         };
 168                         gmi_a17_pb0 {
 169                                 nvidia,pins = "gmi_a17_pb0",
 170                                                 "gmi_a18_pb1";
 171                                 nvidia,function = "uartd";
 172                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 173                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 174                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 175                         };
 176                         gmi_ad5_pg5 {
 177                                 nvidia,pins = "gmi_ad5_pg5",
 178                                                 "gmi_wr_n_pi0";
 179                                 nvidia,function = "spi4";
 180                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 181                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 182                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 183                         };
 184                         gmi_ad6_pg6 {
 185                                 nvidia,pins = "gmi_ad6_pg6",
 186                                                 "gmi_ad7_pg7";
 187                                 nvidia,function = "spi4";
 188                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 189                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 190                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 191                         };
 192                         gmi_ad12_ph4 {
 193                                 nvidia,pins = "gmi_ad12_ph4";
 194                                 nvidia,function = "rsvd4";
 195                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 196                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 197                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 198                         };
 199                         gmi_cs6_n_pi13 {
 200                                 nvidia,pins = "gmi_cs6_n_pi3";
 201                                 nvidia,function = "nand";
 202                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 203                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 204                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 205                         };
 206                         gmi_ad9_ph1 {
 207                                 nvidia,pins = "gmi_ad9_ph1";
 208                                 nvidia,function = "pwm1";
 209                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 210                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 211                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 212                         };
 213                         gmi_cs1_n_pj2 {
 214                                 nvidia,pins = "gmi_cs1_n_pj2",
 215                                                 "gmi_oe_n_pi1";
 216                                 nvidia,function = "soc";
 217                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 218                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 219                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 220                         };
 221                         gmi_rst_n_pi4 {
 222                                 nvidia,pins = "gmi_rst_n_pi4";
 223                                 nvidia,function = "gmi";
 224                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 225                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 226                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 227                         };
 228                         gmi_iordy_pi5 {
 229                                 nvidia,pins = "gmi_iordy_pi5";
 230                                 nvidia,function = "gmi";
 231                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 232                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 233                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 234                         };
 235                         clk2_out_pw5 {
 236                                 nvidia,pins = "clk2_out_pw5";
 237                                 nvidia,function = "extperiph2";
 238                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 239                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 240                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 241                         };
 242                         sdmmc1_clk_pz0 {
 243                                 nvidia,pins = "sdmmc1_clk_pz0";
 244                                 nvidia,function = "sdmmc1";
 245                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 246                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 247                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 248                         };
 249                         sdmmc1_cmd_pz1 {
 250                                 nvidia,pins = "sdmmc1_cmd_pz1",
 251                                                 "sdmmc1_dat0_py7",
 252                                                 "sdmmc1_dat1_py6",
 253                                                 "sdmmc1_dat2_py5",
 254                                                 "sdmmc1_dat3_py4";
 255                                 nvidia,function = "sdmmc1";
 256                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 257                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 258                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 259                         };
 260                         sdmmc3_clk_pa6 {
 261                                 nvidia,pins = "sdmmc3_clk_pa6";
 262                                 nvidia,function = "sdmmc3";
 263                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 264                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 265                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 266                         };
 267                         sdmmc3_cmd_pa7 {
 268                                 nvidia,pins = "sdmmc3_cmd_pa7",
 269                                                 "sdmmc3_dat0_pb7",
 270                                                 "sdmmc3_dat1_pb6",
 271                                                 "sdmmc3_dat2_pb5",
 272                                                 "sdmmc3_dat3_pb4",
 273                                                 "sdmmc3_cd_n_pv2",
 274                                                 "sdmmc3_clk_lb_out_pee4",
 275                                                 "sdmmc3_clk_lb_in_pee5";
 276                                 nvidia,function = "sdmmc3";
 277                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 278                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 279                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 280                         };
 281                         kb_col4_pq4 {
 282                                 nvidia,pins = "kb_col4_pq4";
 283                                 nvidia,function = "sdmmc3";
 284                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 285                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 286                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 287                         };
 288                         sdmmc4_clk_pcc4 {
 289                                 nvidia,pins = "sdmmc4_clk_pcc4";
 290                                 nvidia,function = "sdmmc4";
 291                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 292                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 293                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 294                         };
 295                         sdmmc4_cmd_pt7 {
 296                                 nvidia,pins = "sdmmc4_cmd_pt7",
 297                                                 "sdmmc4_dat0_paa0",
 298                                                 "sdmmc4_dat1_paa1",
 299                                                 "sdmmc4_dat2_paa2",
 300                                                 "sdmmc4_dat3_paa3",
 301                                                 "sdmmc4_dat4_paa4",
 302                                                 "sdmmc4_dat5_paa5",
 303                                                 "sdmmc4_dat6_paa6",
 304                                                 "sdmmc4_dat7_paa7";
 305                                 nvidia,function = "sdmmc4";
 306                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 307                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 308                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 309                         };
 310                         clk_32k_out_pa0 {
 311                                 nvidia,pins = "clk_32k_out_pa0";
 312                                 nvidia,function = "blink";
 313                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 314                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 315                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 316                         };
 317                         kb_col0_pq0 {
 318                                 nvidia,pins = "kb_col0_pq0",
 319                                                 "kb_col1_pq1",
 320                                                 "kb_col2_pq2",
 321                                                 "kb_row0_pr0",
 322                                                 "kb_row1_pr1",
 323                                                 "kb_row2_pr2",
 324                                                 "kb_row8_ps0";
 325                                 nvidia,function = "kbc";
 326                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 327                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 328                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 329                         };
 330                         kb_row7_pr7 {
 331                                 nvidia,pins = "kb_row7_pr7";
 332                                 nvidia,function = "rsvd2";
 333                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 334                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 335                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 336                         };
 337                         kb_row10_ps2 {
 338                                 nvidia,pins = "kb_row10_ps2";
 339                                 nvidia,function = "uarta";
 340                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 341                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 342                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 343                         };
 344                         kb_row9_ps1 {
 345                                 nvidia,pins = "kb_row9_ps1";
 346                                 nvidia,function = "uarta";
 347                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 348                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 349                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 350                         };
 351                         pwr_i2c_scl_pz6 {
 352                                 nvidia,pins = "pwr_i2c_scl_pz6",
 353                                                 "pwr_i2c_sda_pz7";
 354                                 nvidia,function = "i2cpwr";
 355                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 356                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 357                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 358                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 359                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 360                         };
 361                         sys_clk_req_pz5 {
 362                                 nvidia,pins = "sys_clk_req_pz5";
 363                                 nvidia,function = "sysclk";
 364                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 365                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 366                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 367                         };
 368                         core_pwr_req {
 369                                 nvidia,pins = "core_pwr_req";
 370                                 nvidia,function = "pwron";
 371                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 372                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 373                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 374                         };
 375                         cpu_pwr_req {
 376                                 nvidia,pins = "cpu_pwr_req";
 377                                 nvidia,function = "cpu";
 378                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 379                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 380                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 381                         };
 382                         pwr_int_n {
 383                                 nvidia,pins = "pwr_int_n";
 384                                 nvidia,function = "pmi";
 385                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 386                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 387                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 388                         };
 389                         reset_out_n {
 390                                 nvidia,pins = "reset_out_n";
 391                                 nvidia,function = "reset_out_n";
 392                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 393                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 394                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 395                         };
 396                         clk3_out_pee0 {
 397                                 nvidia,pins = "clk3_out_pee0";
 398                                 nvidia,function = "extperiph3";
 399                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 400                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 401                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 402                         };
 403                         gen1_i2c_scl_pc4 {
 404                                 nvidia,pins = "gen1_i2c_scl_pc4",
 405                                                 "gen1_i2c_sda_pc5";
 406                                 nvidia,function = "i2c1";
 407                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 408                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 409                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 410                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 411                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 412                         };
 413                         uart2_cts_n_pj5 {
 414                                 nvidia,pins = "uart2_cts_n_pj5";
 415                                 nvidia,function = "uartb";
 416                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 417                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 418                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 419                         };
 420                         uart2_rts_n_pj6 {
 421                                 nvidia,pins = "uart2_rts_n_pj6";
 422                                 nvidia,function = "uartb";
 423                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 424                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 425                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 426                         };
 427                         uart2_rxd_pc3 {
 428                                 nvidia,pins = "uart2_rxd_pc3";
 429                                 nvidia,function = "irda";
 430                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 431                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 432                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 433                         };
 434                         uart2_txd_pc2 {
 435                                 nvidia,pins = "uart2_txd_pc2";
 436                                 nvidia,function = "irda";
 437                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 438                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 439                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 440                         };
 441                         uart3_cts_n_pa1 {
 442                                 nvidia,pins = "uart3_cts_n_pa1",
 443                                                 "uart3_rxd_pw7";
 444                                 nvidia,function = "uartc";
 445                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 446                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 447                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 448                         };
 449                         uart3_rts_n_pc0 {
 450                                 nvidia,pins = "uart3_rts_n_pc0",
 451                                                 "uart3_txd_pw6";
 452                                 nvidia,function = "uartc";
 453                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 454                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 455                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 456                         };
 457                         owr {
 458                                 nvidia,pins = "owr";
 459                                 nvidia,function = "owr";
 460                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 461                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 462                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 463                         };
 464                         hdmi_cec_pee3 {
 465                                 nvidia,pins = "hdmi_cec_pee3";
 466                                 nvidia,function = "cec";
 467                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 468                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 469                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 470                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 471                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 472                         };
 473                         ddc_scl_pv4 {
 474                                 nvidia,pins = "ddc_scl_pv4",
 475                                                 "ddc_sda_pv5";
 476                                 nvidia,function = "i2c4";
 477                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 478                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 479                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 480                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 481                                 nvidia,rcv-sel = <TEGRA_PIN_ENABLE>;
 482                         };
 483                         spdif_in_pk6 {
 484                                 nvidia,pins = "spdif_in_pk6";
 485                                 nvidia,function = "usb";
 486                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 487                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 488                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 489                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 490                         };
 491                         usb_vbus_en0_pn4 {
 492                                 nvidia,pins = "usb_vbus_en0_pn4";
 493                                 nvidia,function = "usb";
 494                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 495                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 496                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 497                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 498                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 499                         };
 500                         gpio_x6_aud_px6 {
 501                                 nvidia,pins = "gpio_x6_aud_px6";
 502                                 nvidia,function = "spi6";
 503                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 504                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 505                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 506                         };
 507                         gpio_x1_aud_px1 {
 508                                 nvidia,pins = "gpio_x1_aud_px1";
 509                                 nvidia,function = "rsvd2";
 510                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 511                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 512                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 513                         };
 514                         gpio_x7_aud_px7 {
 515                                 nvidia,pins = "gpio_x7_aud_px7";
 516                                 nvidia,function = "rsvd1";
 517                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 518                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 519                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 520                         };
 521                         gmi_adv_n_pk0 {
 522                                 nvidia,pins = "gmi_adv_n_pk0";
 523                                 nvidia,function = "gmi";
 524                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 525                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 526                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 527                         };
 528                         gmi_cs0_n_pj0 {
 529                                 nvidia,pins = "gmi_cs0_n_pj0";
 530                                 nvidia,function = "gmi";
 531                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 532                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 533                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 534                         };
 535                         pu3 {
 536                                 nvidia,pins = "pu3";
 537                                 nvidia,function = "pwm0";
 538                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 539                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 540                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 541                         };
 542                         gpio_x4_aud_px4 {
 543                                 nvidia,pins = "gpio_x4_aud_px4",
 544                                                 "gpio_x5_aud_px5";
 545                                 nvidia,function = "rsvd1";
 546                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 547                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 548                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 549                         };
 550                         gpio_x3_aud_px3 {
 551                                 nvidia,pins = "gpio_x3_aud_px3";
 552                                 nvidia,function = "rsvd4";
 553                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 554                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 555                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 556                         };
 557                         gpio_w2_aud_pw2 {
 558                                 nvidia,pins = "gpio_w2_aud_pw2";
 559                                 nvidia,function = "rsvd2";
 560                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 561                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 562                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 563                         };
 564                         gpio_w3_aud_pw3 {
 565                                 nvidia,pins = "gpio_w3_aud_pw3";
 566                                 nvidia,function = "spi6";
 567                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 568                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 569                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 570                         };
 571                         dap3_fs_pp0 {
 572                                 nvidia,pins = "dap3_fs_pp0",
 573                                                 "dap3_din_pp1",
 574                                                 "dap3_dout_pp2",
 575                                                 "dap3_sclk_pp3";
 576                                 nvidia,function = "i2s2";
 577                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 578                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 579                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 580                         };
 581                         pv0 {
 582                                 nvidia,pins = "pv0";
 583                                 nvidia,function = "rsvd4";
 584                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 585                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 586                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 587                         };
 588                         pv1 {
 589                                 nvidia,pins = "pv1";
 590                                 nvidia,function = "rsvd1";
 591                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 592                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 593                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 594                         };
 595                         pbb3 {
 596                                 nvidia,pins = "pbb3",
 597                                                 "pbb5",
 598                                                 "pbb6",
 599                                                 "pbb7";
 600                                 nvidia,function = "rsvd4";
 601                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 602                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 603                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 604                         };
 605                         pcc1 {
 606                                 nvidia,pins = "pcc1",
 607                                                 "pcc2";
 608                                 nvidia,function = "rsvd4";
 609                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 610                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 611                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 612                         };
 613                         gmi_ad0_pg0 {
 614                                 nvidia,pins = "gmi_ad0_pg0",
 615                                                 "gmi_ad1_pg1";
 616                                 nvidia,function = "gmi";
 617                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 618                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 619                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 620                         };
 621                         gmi_ad10_ph2 {
 622                                 nvidia,pins = "gmi_ad10_ph2",
 623                                                 "gmi_ad12_ph4",
 624                                                 "gmi_ad15_ph7",
 625                                                 "gmi_cs3_n_pk4";
 626                                 nvidia,function = "gmi";
 627                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 628                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 629                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 630                         };
 631                         gmi_ad11_ph3 {
 632                                 nvidia,pins = "gmi_ad11_ph3",
 633                                                 "gmi_ad13_ph5",
 634                                                 "gmi_ad8_ph0",
 635                                                 "gmi_clk_pk1",
 636                                                 "gmi_cs2_n_pk3";
 637                                 nvidia,function = "gmi";
 638                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 639                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 640                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 641                         };
 642                         gmi_ad14_ph6 {
 643                                 nvidia,pins = "gmi_ad14_ph6",
 644                                                 "gmi_cs0_n_pj0",
 645                                                 "gmi_cs4_n_pk2",
 646                                                 "gmi_cs7_n_pi6",
 647                                                 "gmi_dqs_p_pj3",
 648                                                 "gmi_wp_n_pc7";
 649                                 nvidia,function = "gmi";
 650                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 651                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 652                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 653                         };
 654                         gmi_ad2_pg2 {
 655                                 nvidia,pins = "gmi_ad2_pg2",
 656                                                 "gmi_ad3_pg3";
 657                                 nvidia,function = "gmi";
 658                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 659                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 660                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 661                         };
 662                         sdmmc1_wp_n_pv3 {
 663                                 nvidia,pins = "sdmmc1_wp_n_pv3";
 664                                 nvidia,function = "spi4";
 665                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 666                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 667                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 668                         };
 669                         clk2_req_pcc5 {
 670                                 nvidia,pins = "clk2_req_pcc5";
 671                                 nvidia,function = "rsvd4";
 672                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 673                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 674                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 675                         };
 676                         kb_col3_pq3 {
 677                                 nvidia,pins = "kb_col3_pq3";
 678                                 nvidia,function = "pwm2";
 679                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 680                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 681                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 682                         };
 683                         kb_col5_pq5 {
 684                                 nvidia,pins = "kb_col5_pq5";
 685                                 nvidia,function = "kbc";
 686                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 687                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 688                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 689                         };
 690                         kb_col6_pq6 {
 691                                 nvidia,pins = "kb_col6_pq6",
 692                                                 "kb_col7_pq7";
 693                                 nvidia,function = "kbc";
 694                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 695                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 696                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 697                         };
 698                         kb_row3_pr3 {
 699                                 nvidia,pins = "kb_row3_pr3",
 700                                                 "kb_row4_pr4",
 701                                                 "kb_row6_pr6";
 702                                 nvidia,function = "kbc";
 703                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 704                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 705                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 706                         };
 707                         clk3_req_pee1 {
 708                                 nvidia,pins = "clk3_req_pee1";
 709                                 nvidia,function = "rsvd4";
 710                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 711                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 712                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 713                         };
 714                         pu2 {
 715                                 nvidia,pins = "pu2";
 716                                 nvidia,function = "rsvd1";
 717                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 718                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 719                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 720                         };
 721                         hdmi_int_pn7 {
 722                                 nvidia,pins = "hdmi_int_pn7";
 723                                 nvidia,function = "rsvd1";
 724                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 725                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 726                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 727                         };
 728
 729                         drive_sdio1 {
 730                                 nvidia,pins = "drive_sdio1";
 731                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
 732                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
 733                                 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
 734                                 nvidia,pull-down-strength = <36>;
 735                                 nvidia,pull-up-strength = <20>;
 736                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOW>;
 737                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOW>;
 738                         };
 739                         drive_sdio3 {
 740                                 nvidia,pins = "drive_sdio3";
 741                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
 742                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
 743                                 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
 744                                 nvidia,pull-down-strength = <36>;
 745                                 nvidia,pull-up-strength = <20>;
 746                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 747                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 748                         };
 749                         drive_gma {
 750                                 nvidia,pins = "drive_gma";
 751                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
 752                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
 753                                 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
 754                                 nvidia,pull-down-strength = <2>;
 755                                 nvidia,pull-up-strength = <2>;
 756                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 757                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 758                                 nvidia,drive-type = <1>;
 759                         };
 760                 };
 761         };
 762
 763         /* Usable on reworked devices only */
 764         serial@70006300 {
 765                 status = "okay";
 766         };
 767
 768         pwm@7000a000 {
 769                 status = "okay";
 770         };
 771
 772         i2c@7000d000 {
 773                 status = "okay";
 774                 clock-frequency = <400000>;
 775
 776                 regulator@43 {
 777                         compatible = "ti,tps51632";
 778                         reg = <0x43>;
 779                         regulator-name = "vdd-cpu";
 780                         regulator-min-microvolt = <500000>;
 781                         regulator-max-microvolt = <1520000>;
 782                         regulator-always-on;
 783                         regulator-boot-on;
 784                 };
 785
 786                 palmas: pmic@58 {
 787                         compatible = "ti,palmas";
 788                         reg = <0x58>;
 789                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_LOW>;
 790
 791                         #interrupt-cells = <2>;
 792                         interrupt-controller;
 793
 794                         ti,system-power-controller;
 795
 796                         palmas_gpio: gpio {
 797                                 compatible = "ti,palmas-gpio";
 798                                 gpio-controller;
 799                                 #gpio-cells = <2>;
 800                         };
 801
 802                         pmic {
 803                                 compatible = "ti,tps65913-pmic", "ti,palmas-pmic";
 804
 805                                 regulators {
 806                                         smps12 {
 807                                                 regulator-name = "vdd-ddr";
 808                                                 regulator-min-microvolt = <1200000>;
 809                                                 regulator-max-microvolt = <1500000>;
 810                                                 regulator-always-on;
 811                                                 regulator-boot-on;
 812                                         };
 813
 814                                         vdd_1v8: smps3 {
 815                                                 regulator-name = "vdd-1v8";
 816                                                 regulator-min-microvolt = <1800000>;
 817                                                 regulator-max-microvolt = <1800000>;
 818                                                 regulator-always-on;
 819                                                 regulator-boot-on;
 820                                         };
 821
 822                                         smps457 {
 823                                                 regulator-name = "vdd-soc";
 824                                                 regulator-min-microvolt = <900000>;
 825                                                 regulator-max-microvolt = <1400000>;
 826                                                 regulator-always-on;
 827                                                 regulator-boot-on;
 828                                         };
 829
 830                                         smps8 {
 831                                                 regulator-name = "avdd-pll-1v05";
 832                                                 regulator-min-microvolt = <1050000>;
 833                                                 regulator-max-microvolt = <1050000>;
 834                                                 regulator-always-on;
 835                                                 regulator-boot-on;
 836                                         };
 837
 838                                         smps9 {
 839                                                 regulator-name = "vdd-2v85-emmc";
 840                                                 regulator-min-microvolt = <2800000>;
 841                                                 regulator-max-microvolt = <2800000>;
 842                                                 regulator-always-on;
 843                                         };
 844
 845                                         smps10_out1 {
 846                                                 regulator-name = "vdd-fan";
 847                                                 regulator-min-microvolt = <5000000>;
 848                                                 regulator-max-microvolt = <5000000>;
 849                                                 regulator-always-on;
 850                                                 regulator-boot-on;
 851                                         };
 852
 853                                         smps10_out2 {
 854                                                 regulator-name = "vdd-5v0-sys";
 855                                                 regulator-min-microvolt = <5000000>;
 856                                                 regulator-max-microvolt = <5000000>;
 857                                                 regulator-always-on;
 858                                                 regulator-boot-on;
 859                                         };
 860
 861                                         ldo2 {
 862                                                 regulator-name = "vdd-2v8-display";
 863                                                 regulator-min-microvolt = <2800000>;
 864                                                 regulator-max-microvolt = <2800000>;
 865                                                 regulator-boot-on;
 866                                         };
 867
 868                                         ldo3 {
 869                                                 regulator-name = "avdd-1v2";
 870                                                 regulator-min-microvolt = <1200000>;
 871                                                 regulator-max-microvolt = <1200000>;
 872                                                 regulator-always-on;
 873                                                 regulator-boot-on;
 874                                         };
 875
 876                                         ldo4 {
 877                                                 regulator-name = "vpp-fuse";
 878                                                 regulator-min-microvolt = <1800000>;
 879                                                 regulator-max-microvolt = <1800000>;
 880                                         };
 881
 882                                         ldo5 {
 883                                                 regulator-name = "avdd-hdmi-pll";
 884                                                 regulator-min-microvolt = <1200000>;
 885                                                 regulator-max-microvolt = <1200000>;
 886                                         };
 887
 888                                         ldo6 {
 889                                                 regulator-name = "vdd-sensor-2v8";
 890                                                 regulator-min-microvolt = <2850000>;
 891                                                 regulator-max-microvolt = <2850000>;
 892                                         };
 893
 894                                         ldo8 {
 895                                                 regulator-name = "vdd-rtc";
 896                                                 regulator-min-microvolt = <1100000>;
 897                                                 regulator-max-microvolt = <1100000>;
 898                                                 regulator-always-on;
 899                                                 regulator-boot-on;
 900                                                 ti,enable-ldo8-tracking;
 901                                         };
 902
 903                                         vddio_sdmmc3: ldo9 {
 904                                                 regulator-name = "vddio-sdmmc3";
 905                                                 regulator-min-microvolt = <1800000>;
 906                                                 regulator-max-microvolt = <3300000>;
 907                                                 regulator-always-on;
 908                                                 regulator-boot-on;
 909                                         };
 910
 911                                         ldousb {
 912                                                 regulator-name = "avdd-usb-hdmi";
 913                                                 regulator-min-microvolt = <3300000>;
 914                                                 regulator-max-microvolt = <3300000>;
 915                                                 regulator-always-on;
 916                                                 regulator-boot-on;
 917                                         };
 918
 919                                         vdd_3v3_sys: regen1 {
 920                                                 regulator-name = "rail-3v3";
 921                                                 regulator-max-microvolt = <3300000>;
 922                                                 regulator-always-on;
 923                                                 regulator-boot-on;
 924                                         };
 925
 926                                         regen2 {
 927                                                 regulator-name = "rail-5v0";
 928                                                 regulator-max-microvolt = <5000000>;
 929                                                 regulator-always-on;
 930                                                 regulator-boot-on;
 931                                         };
 932
 933                                 };
 934                         };
 935
 936                         rtc {
 937                                 compatible = "ti,palmas-rtc";
 938                                 interrupt-parent = <&palmas>;
 939                                 interrupts = <8 0>;
 940                         };
 941
 942                 };
 943         };
 944
 945         pmc@7000e400 {
 946                 nvidia,invert-interrupt;
 947         };
 948
 949         /* SD card */
 950         sdhci@78000400 {
 951                 status = "okay";
 952                 bus-width = <4>;
 953                 vmmc-supply = <&vddio_sdmmc3>;
 954                 cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
 955                 power-gpios = <&gpio TEGRA_GPIO(H, 0) GPIO_ACTIVE_HIGH>;
 956         };
 957
 958         /* eMMC */
 959         sdhci@78000600 {
 960                 status = "okay";
 961                 bus-width = <8>;
 962                 vmmc-supply = <&vdd_1v8>;
 963                 non-removable;
 964         };
 965
 966         /* External USB port (must be powered) */
 967         usb@7d000000 {
 968                 status = "okay";
 969         };
 970
 971         usb-phy@7d000000 {
 972                 status = "okay";
 973                 nvidia,xcvr-setup = <7>;
 974                 nvidia,xcvr-lsfslew = <2>;
 975                 nvidia,xcvr-lsrslew = <2>;
 976                 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 977                 /* Should be changed to "otg" once we have vbus_supply */
 978                 /* As of now, USB devices need to be powered externally */
 979                 dr_mode = "host";
 980         };
 981
 982         /* SHIELD controller */
 983         usb@7d008000 {
 984                 status = "okay";
 985         };
 986
 987         usb-phy@7d008000 {
 988                 status = "okay";
 989                 nvidia,xcvr-setup = <7>;
 990                 nvidia,xcvr-lsfslew = <2>;
 991                 nvidia,xcvr-lsrslew = <2>;
 992         };
 993
 994         backlight: backlight {
 995                 compatible = "pwm-backlight";
 996                 pwms = <&pwm 1 40000>;
 997
 998                 brightness-levels = <0 4 8 16 32 64 128 255>;
 999                 default-brightness-level = <6>;
1000
1001                 power-supply = <&lcd_bl_en>;
1002                 enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
1003         };
1004
1005         clocks {
1006                 compatible = "simple-bus";
1007                 #address-cells = <1>;
1008                 #size-cells = <0>;
1009
1010                 clk32k_in: clock {
1011                         compatible = "fixed-clock";
1012                         reg=<0>;
1013                         #clock-cells = <0>;
1014                         clock-frequency = <32768>;
1015                 };
1016         };
1017
1018         gpio-keys {
1019                 compatible = "gpio-keys";
1020
1021                 back {
1022                         label = "Back";
1023                         gpios = <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_LOW>;
1024                         linux,code = <KEY_BACK>;
1025                 };
1026
1027                 home {
1028                         label = "Home";
1029                         gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>;
1030                         linux,code = <KEY_HOME>;
1031                 };
1032
1033                 power {
1034                         label = "Power";
1035                         gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
1036                         linux,code = <KEY_POWER>;
1037                         gpio-key,wakeup;
1038                 };
1039         };
1040
1041         regulators {
1042                 compatible = "simple-bus";
1043                 #address-cells = <1>;
1044                 #size-cells = <0>;
1045
1046                 lcd_bl_en: regulator@0 {
1047                         compatible = "regulator-fixed";
1048                         reg = <0>;
1049                         regulator-name = "lcd_bl_en";
1050                         regulator-min-microvolt = <5000000>;
1051                         regulator-max-microvolt = <5000000>;
1052                         regulator-boot-on;
1053                 };
1054
1055                 regulator@1 {
1056                         compatible = "regulator-fixed";
1057                         reg = <1>;
1058                         regulator-name = "vdd_lcd_1v8";
1059                         regulator-min-microvolt = <1800000>;
1060                         regulator-max-microvolt = <1800000>;
1061                         vin-supply = <&vdd_1v8>;
1062                         enable-active-high;
1063                         gpio = <&gpio TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
1064                         regulator-boot-on;
1065                 };
1066
1067                 regulator@2 {
1068                         compatible = "regulator-fixed";
1069                         reg = <2>;
1070                         regulator-name = "vdd_1v8_ts";
1071                         regulator-min-microvolt = <1800000>;
1072                         regulator-max-microvolt = <1800000>;
1073                         gpio = <&gpio TEGRA_GPIO(K, 3) GPIO_ACTIVE_LOW>;
1074                         regulator-boot-on;
1075                 };
1076
1077                 regulator@3 {
1078                         compatible = "regulator-fixed";
1079                         reg = <3>;
1080                         regulator-name = "vdd_3v3_ts";
1081                         regulator-min-microvolt = <3300000>;
1082                         regulator-max-microvolt = <3300000>;
1083                         enable-active-high;
1084                         gpio = <&gpio TEGRA_GPIO(H, 5) GPIO_ACTIVE_HIGH>;
1085                         regulator-boot-on;
1086                 };
1087
1088                 regulator@4 {
1089                         compatible = "regulator-fixed";
1090                         reg = <4>;
1091                         regulator-name = "vdd_1v8_com";
1092                         regulator-min-microvolt = <1800000>;
1093                         regulator-max-microvolt = <1800000>;
1094                         vin-supply = <&vdd_1v8>;
1095                         enable-active-high;
1096                         gpio = <&gpio TEGRA_GPIO(X, 1) GPIO_ACTIVE_HIGH>;
1097                         regulator-boot-on;
1098                 };
1099
1100                 regulator@5 {
1101                         compatible = "regulator-fixed";
1102                         reg = <5>;
1103                         regulator-name = "vdd_3v3_com";
1104                         regulator-min-microvolt = <3300000>;
1105                         regulator-max-microvolt = <3300000>;
1106                         vin-supply = <&vdd_3v3_sys>;
1107                         enable-active-high;
1108                         gpio = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_HIGH>;
1109                         regulator-always-on;
1110                         regulator-boot-on;
1111                 };
1112         };
1113 };