arch/arm/boot/dts/r8a7743.dtsi

   1 /*
   2  * Device Tree Source for the r8a7743 SoC
   3  *
   4  * Copyright (C) 2016-2017 Cogent Embedded Inc.
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2. This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/interrupt-controller/irq.h>
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13 #include <dt-bindings/clock/r8a7743-cpg-mssr.h>
  14 #include <dt-bindings/power/r8a7743-sysc.h>
  15
  16 / {
  17         compatible = "renesas,r8a7743";
  18         #address-cells = <2>;
  19         #size-cells = <2>;
  20
  21         cpus {
  22                 #address-cells = <1>;
  23                 #size-cells = <0>;
  24
  25                 cpu0: cpu@0 {
  26                         device_type = "cpu";
  27                         compatible = "arm,cortex-a15";
  28                         reg = <0>;
  29                         clock-frequency = <1500000000>;
  30                         clocks = <&cpg CPG_CORE R8A7743_CLK_Z>;
  31                         power-domains = <&sysc R8A7743_PD_CA15_CPU0>;
  32                         next-level-cache = <&L2_CA15>;
  33                 };
  34
  35                 L2_CA15: cache-controller-0 {
  36                         compatible = "cache";
  37                         cache-unified;
  38                         cache-level = <2>;
  39                         power-domains = <&sysc R8A7743_PD_CA15_SCU>;
  40                 };
  41         };
  42
  43         soc {
  44                 compatible = "simple-bus";
  45                 interrupt-parent = <&gic>;
  46
  47                 #address-cells = <2>;
  48                 #size-cells = <2>;
  49                 ranges;
  50
  51                 gic: interrupt-controller@f1001000 {
  52                         compatible = "arm,gic-400";
  53                         #interrupt-cells = <3>;
  54                         #address-cells = <0>;
  55                         interrupt-controller;
  56                         reg = <0 0xf1001000 0 0x1000>,
  57                               <0 0xf1002000 0 0x2000>,
  58                               <0 0xf1004000 0 0x2000>,
  59                               <0 0xf1006000 0 0x2000>;
  60                         interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
  61                                                  IRQ_TYPE_LEVEL_HIGH)>;
  62                         clocks = <&cpg CPG_MOD 408>;
  63                         clock-names = "clk";
  64                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
  65                         resets = <&cpg 408>;
  66                 };
  67
  68                 gpio0: gpio@e6050000 {
  69                         compatible = "renesas,gpio-r8a7743",
  70                                      "renesas,gpio-rcar";
  71                         reg = <0 0xe6050000 0 0x50>;
  72                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
  73                         #gpio-cells = <2>;
  74                         gpio-controller;
  75                         gpio-ranges = <&pfc 0 0 32>;
  76                         #interrupt-cells = <2>;
  77                         interrupt-controller;
  78                         clocks = <&cpg CPG_MOD 912>;
  79                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
  80                         resets = <&cpg 912>;
  81                 };
  82
  83                 gpio1: gpio@e6051000 {
  84                         compatible = "renesas,gpio-r8a7743",
  85                                      "renesas,gpio-rcar";
  86                         reg = <0 0xe6051000 0 0x50>;
  87                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
  88                         #gpio-cells = <2>;
  89                         gpio-controller;
  90                         gpio-ranges = <&pfc 0 32 26>;
  91                         #interrupt-cells = <2>;
  92                         interrupt-controller;
  93                         clocks = <&cpg CPG_MOD 911>;
  94                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
  95                         resets = <&cpg 911>;
  96                 };
  97
  98                 gpio2: gpio@e6052000 {
  99                         compatible = "renesas,gpio-r8a7743",
 100                                      "renesas,gpio-rcar";
 101                         reg = <0 0xe6052000 0 0x50>;
 102                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 103                         #gpio-cells = <2>;
 104                         gpio-controller;
 105                         gpio-ranges = <&pfc 0 64 32>;
 106                         #interrupt-cells = <2>;
 107                         interrupt-controller;
 108                         clocks = <&cpg CPG_MOD 910>;
 109                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 110                         resets = <&cpg 910>;
 111                 };
 112
 113                 gpio3: gpio@e6053000 {
 114                         compatible = "renesas,gpio-r8a7743",
 115                                      "renesas,gpio-rcar";
 116                         reg = <0 0xe6053000 0 0x50>;
 117                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 118                         #gpio-cells = <2>;
 119                         gpio-controller;
 120                         gpio-ranges = <&pfc 0 96 32>;
 121                         #interrupt-cells = <2>;
 122                         interrupt-controller;
 123                         clocks = <&cpg CPG_MOD 909>;
 124                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 125                         resets = <&cpg 909>;
 126                 };
 127
 128                 gpio4: gpio@e6054000 {
 129                         compatible = "renesas,gpio-r8a7743",
 130                                      "renesas,gpio-rcar";
 131                         reg = <0 0xe6054000 0 0x50>;
 132                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 133                         #gpio-cells = <2>;
 134                         gpio-controller;
 135                         gpio-ranges = <&pfc 0 128 32>;
 136                         #interrupt-cells = <2>;
 137                         interrupt-controller;
 138                         clocks = <&cpg CPG_MOD 908>;
 139                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 140                         resets = <&cpg 908>;
 141                 };
 142
 143                 gpio5: gpio@e6055000 {
 144                         compatible = "renesas,gpio-r8a7743",
 145                                      "renesas,gpio-rcar";
 146                         reg = <0 0xe6055000 0 0x50>;
 147                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 148                         #gpio-cells = <2>;
 149                         gpio-controller;
 150                         gpio-ranges = <&pfc 0 160 32>;
 151                         #interrupt-cells = <2>;
 152                         interrupt-controller;
 153                         clocks = <&cpg CPG_MOD 907>;
 154                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 155                         resets = <&cpg 907>;
 156                 };
 157
 158                 gpio6: gpio@e6055400 {
 159                         compatible = "renesas,gpio-r8a7743",
 160                                      "renesas,gpio-rcar";
 161                         reg = <0 0xe6055400 0 0x50>;
 162                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 163                         #gpio-cells = <2>;
 164                         gpio-controller;
 165                         gpio-ranges = <&pfc 0 192 32>;
 166                         #interrupt-cells = <2>;
 167                         interrupt-controller;
 168                         clocks = <&cpg CPG_MOD 905>;
 169                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 170                         resets = <&cpg 905>;
 171                 };
 172
 173                 gpio7: gpio@e6055800 {
 174                         compatible = "renesas,gpio-r8a7743",
 175                                      "renesas,gpio-rcar";
 176                         reg = <0 0xe6055800 0 0x50>;
 177                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 178                         #gpio-cells = <2>;
 179                         gpio-controller;
 180                         gpio-ranges = <&pfc 0 224 26>;
 181                         #interrupt-cells = <2>;
 182                         interrupt-controller;
 183                         clocks = <&cpg CPG_MOD 904>;
 184                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 185                         resets = <&cpg 904>;
 186                 };
 187
 188                 irqc: interrupt-controller@e61c0000 {
 189                         compatible = "renesas,irqc-r8a7743", "renesas,irqc";
 190                         #interrupt-cells = <2>;
 191                         interrupt-controller;
 192                         reg = <0 0xe61c0000 0 0x200>;
 193                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 194                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 195                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 196                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
 197                                      <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 198                                      <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 199                                      <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
 200                                      <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
 201                                      <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
 202                                      <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 203                         clocks = <&cpg CPG_MOD 407>;
 204                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 205                         resets = <&cpg 407>;
 206                 };
 207
 208                 timer {
 209                         compatible = "arm,armv7-timer";
 210                         interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
 211                                                   IRQ_TYPE_LEVEL_LOW)>,
 212                                      <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) |
 213                                                   IRQ_TYPE_LEVEL_LOW)>,
 214                                      <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) |
 215                                                   IRQ_TYPE_LEVEL_LOW)>,
 216                                      <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) |
 217                                                   IRQ_TYPE_LEVEL_LOW)>;
 218                 };
 219
 220                 cpg: clock-controller@e6150000 {
 221                         compatible = "renesas,r8a7743-cpg-mssr";
 222                         reg = <0 0xe6150000 0 0x1000>;
 223                         clocks = <&extal_clk>, <&usb_extal_clk>;
 224                         clock-names = "extal", "usb_extal";
 225                         #clock-cells = <2>;
 226                         #power-domain-cells = <0>;
 227                         #reset-cells = <1>;
 228                 };
 229
 230                 prr: chipid@ff000044 {
 231                         compatible = "renesas,prr";
 232                         reg = <0 0xff000044 0 4>;
 233                 };
 234
 235                 rst: reset-controller@e6160000 {
 236                         compatible = "renesas,r8a7743-rst";
 237                         reg = <0 0xe6160000 0 0x100>;
 238                 };
 239
 240                 sysc: system-controller@e6180000 {
 241                         compatible = "renesas,r8a7743-sysc";
 242                         reg = <0 0xe6180000 0 0x200>;
 243                         #power-domain-cells = <1>;
 244                 };
 245
 246                 pfc: pin-controller@e6060000 {
 247                         compatible = "renesas,pfc-r8a7743";
 248                         reg = <0 0xe6060000 0 0x250>;
 249                 };
 250
 251                 dmac0: dma-controller@e6700000 {
 252                         compatible = "renesas,dmac-r8a7743",
 253                                      "renesas,rcar-dmac";
 254                         reg = <0 0xe6700000 0 0x20000>;
 255                         interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
 256                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 257                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 258                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 259                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 260                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 261                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 262                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 263                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 264                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 265                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 266                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 267                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 268                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 269                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 270                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
 271                         interrupt-names = "error",
 272                                         "ch0", "ch1", "ch2", "ch3",
 273                                         "ch4", "ch5", "ch6", "ch7",
 274                                         "ch8", "ch9", "ch10", "ch11",
 275                                         "ch12", "ch13", "ch14";
 276                         clocks = <&cpg CPG_MOD 219>;
 277                         clock-names = "fck";
 278                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 279                         resets = <&cpg 219>;
 280                         #dma-cells = <1>;
 281                         dma-channels = <15>;
 282                 };
 283
 284                 dmac1: dma-controller@e6720000 {
 285                         compatible = "renesas,dmac-r8a7743",
 286                                      "renesas,rcar-dmac";
 287                         reg = <0 0xe6720000 0 0x20000>;
 288                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 289                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 290                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 291                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 292                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 293                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 294                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 295                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 296                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 297                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 298                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 299                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 300                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 301                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 302                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 303                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
 304                         interrupt-names = "error",
 305                                         "ch0", "ch1", "ch2", "ch3",
 306                                         "ch4", "ch5", "ch6", "ch7",
 307                                         "ch8", "ch9", "ch10", "ch11",
 308                                         "ch12", "ch13", "ch14";
 309                         clocks = <&cpg CPG_MOD 218>;
 310                         clock-names = "fck";
 311                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 312                         resets = <&cpg 218>;
 313                         #dma-cells = <1>;
 314                         dma-channels = <15>;
 315                 };
 316
 317                 scifa0: serial@e6c40000 {
 318                         compatible = "renesas,scifa-r8a7743",
 319                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 320                         reg = <0 0xe6c40000 0 0x40>;
 321                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 322                         clocks = <&cpg CPG_MOD 204>;
 323                         clock-names = "fck";
 324                         dmas = <&dmac0 0x21>, <&dmac0 0x22>,
 325                                <&dmac1 0x21>, <&dmac1 0x22>;
 326                         dma-names = "tx", "rx", "tx", "rx";
 327                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 328                         resets = <&cpg 204>;
 329                         status = "disabled";
 330                 };
 331
 332                 scifa1: serial@e6c50000 {
 333                         compatible = "renesas,scifa-r8a7743",
 334                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 335                         reg = <0 0xe6c50000 0 0x40>;
 336                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 337                         clocks = <&cpg CPG_MOD 203>;
 338                         clock-names = "fck";
 339                         dmas = <&dmac0 0x25>, <&dmac0 0x26>,
 340                                <&dmac1 0x25>, <&dmac1 0x26>;
 341                         dma-names = "tx", "rx", "tx", "rx";
 342                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 343                         resets = <&cpg 203>;
 344                         status = "disabled";
 345                 };
 346
 347                 scifa2: serial@e6c60000 {
 348                         compatible = "renesas,scifa-r8a7743",
 349                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 350                         reg = <0 0xe6c60000 0 0x40>;
 351                         interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
 352                         clocks = <&cpg CPG_MOD 202>;
 353                         clock-names = "fck";
 354                         dmas = <&dmac0 0x27>, <&dmac0 0x28>,
 355                                <&dmac1 0x27>, <&dmac1 0x28>;
 356                         dma-names = "tx", "rx", "tx", "rx";
 357                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 358                         resets = <&cpg 202>;
 359                         status = "disabled";
 360                 };
 361
 362                 scifa3: serial@e6c70000 {
 363                         compatible = "renesas,scifa-r8a7743",
 364                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 365                         reg = <0 0xe6c70000 0 0x40>;
 366                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
 367                         clocks = <&cpg CPG_MOD 1106>;
 368                         clock-names = "fck";
 369                         dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
 370                                <&dmac1 0x1b>, <&dmac1 0x1c>;
 371                         dma-names = "tx", "rx", "tx", "rx";
 372                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 373                         resets = <&cpg 1106>;
 374                         status = "disabled";
 375                 };
 376
 377                 scifa4: serial@e6c78000 {
 378                         compatible = "renesas,scifa-r8a7743",
 379                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 380                         reg = <0 0xe6c78000 0 0x40>;
 381                         interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 382                         clocks = <&cpg CPG_MOD 1107>;
 383                         clock-names = "fck";
 384                         dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
 385                                <&dmac1 0x1f>, <&dmac1 0x20>;
 386                         dma-names = "tx", "rx", "tx", "rx";
 387                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 388                         resets = <&cpg 1107>;
 389                         status = "disabled";
 390                 };
 391
 392                 scifa5: serial@e6c80000 {
 393                         compatible = "renesas,scifa-r8a7743",
 394                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 395                         reg = <0 0xe6c80000 0 0x40>;
 396                         interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
 397                         clocks = <&cpg CPG_MOD 1108>;
 398                         clock-names = "fck";
 399                         dmas = <&dmac0 0x23>, <&dmac0 0x24>,
 400                                <&dmac1 0x23>, <&dmac1 0x24>;
 401                         dma-names = "tx", "rx", "tx", "rx";
 402                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 403                         resets = <&cpg 1108>;
 404                         status = "disabled";
 405                 };
 406
 407                 scifb0: serial@e6c20000 {
 408                         compatible = "renesas,scifb-r8a7743",
 409                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 410                         reg = <0 0xe6c20000 0 0x100>;
 411                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
 412                         clocks = <&cpg CPG_MOD 206>;
 413                         clock-names = "fck";
 414                         dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
 415                                <&dmac1 0x3d>, <&dmac1 0x3e>;
 416                         dma-names = "tx", "rx", "tx", "rx";
 417                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 418                         resets = <&cpg 206>;
 419                         status = "disabled";
 420                 };
 421
 422                 scifb1: serial@e6c30000 {
 423                         compatible = "renesas,scifb-r8a7743",
 424                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 425                         reg = <0 0xe6c30000 0 0x100>;
 426                         interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
 427                         clocks = <&cpg CPG_MOD 207>;
 428                         clock-names = "fck";
 429                         dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
 430                                <&dmac1 0x19>, <&dmac1 0x1a>;
 431                         dma-names = "tx", "rx", "tx", "rx";
 432                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 433                         resets = <&cpg 207>;
 434                         status = "disabled";
 435                 };
 436
 437                 scifb2: serial@e6ce0000 {
 438                         compatible = "renesas,scifb-r8a7743",
 439                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 440                         reg = <0 0xe6ce0000 0 0x100>;
 441                         interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
 442                         clocks = <&cpg CPG_MOD 216>;
 443                         clock-names = "fck";
 444                         dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
 445                                <&dmac1 0x1d>, <&dmac1 0x1e>;
 446                         dma-names = "tx", "rx", "tx", "rx";
 447                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 448                         resets = <&cpg 216>;
 449                         status = "disabled";
 450                 };
 451
 452                 scif0: serial@e6e60000 {
 453                         compatible = "renesas,scif-r8a7743",
 454                                      "renesas,rcar-gen2-scif", "renesas,scif";
 455                         reg = <0 0xe6e60000 0 0x40>;
 456                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 457                         clocks = <&cpg CPG_MOD 721>,
 458                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 459                         clock-names = "fck", "brg_int", "scif_clk";
 460                         dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
 461                                <&dmac1 0x29>, <&dmac1 0x2a>;
 462                         dma-names = "tx", "rx", "tx", "rx";
 463                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 464                         resets = <&cpg 721>;
 465                         status = "disabled";
 466                 };
 467
 468                 scif1: serial@e6e68000 {
 469                         compatible = "renesas,scif-r8a7743",
 470                                      "renesas,rcar-gen2-scif", "renesas,scif";
 471                         reg = <0 0xe6e68000 0 0x40>;
 472                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 473                         clocks = <&cpg CPG_MOD 720>,
 474                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 475                         clock-names = "fck", "brg_int", "scif_clk";
 476                         dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
 477                                <&dmac1 0x2d>, <&dmac1 0x2e>;
 478                         dma-names = "tx", "rx", "tx", "rx";
 479                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 480                         resets = <&cpg 720>;
 481                         status = "disabled";
 482                 };
 483
 484                 scif2: serial@e6e58000 {
 485                         compatible = "renesas,scif-r8a7743",
 486                                      "renesas,rcar-gen2-scif", "renesas,scif";
 487                         reg = <0 0xe6e58000 0 0x40>;
 488                         interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
 489                         clocks = <&cpg CPG_MOD 719>,
 490                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 491                         clock-names = "fck", "brg_int", "scif_clk";
 492                         dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
 493                                <&dmac1 0x2b>, <&dmac1 0x2c>;
 494                         dma-names = "tx", "rx", "tx", "rx";
 495                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 496                         resets = <&cpg 719>;
 497                         status = "disabled";
 498                 };
 499
 500                 scif3: serial@e6ea8000 {
 501                         compatible = "renesas,scif-r8a7743",
 502                                      "renesas,rcar-gen2-scif", "renesas,scif";
 503                         reg = <0 0xe6ea8000 0 0x40>;
 504                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 505                         clocks = <&cpg CPG_MOD 718>,
 506                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 507                         clock-names = "fck", "brg_int", "scif_clk";
 508                         dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
 509                                <&dmac1 0x2f>, <&dmac1 0x30>;
 510                         dma-names = "tx", "rx", "tx", "rx";
 511                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 512                         resets = <&cpg 718>;
 513                         status = "disabled";
 514                 };
 515
 516                 scif4: serial@e6ee0000 {
 517                         compatible = "renesas,scif-r8a7743",
 518                                      "renesas,rcar-gen2-scif", "renesas,scif";
 519                         reg = <0 0xe6ee0000 0 0x40>;
 520                         interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 521                         clocks = <&cpg CPG_MOD 715>,
 522                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 523                         clock-names = "fck", "brg_int", "scif_clk";
 524                         dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
 525                                <&dmac1 0xfb>, <&dmac1 0xfc>;
 526                         dma-names = "tx", "rx", "tx", "rx";
 527                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 528                         resets = <&cpg 715>;
 529                         status = "disabled";
 530                 };
 531
 532                 scif5: serial@e6ee8000 {
 533                         compatible = "renesas,scif-r8a7743",
 534                                      "renesas,rcar-gen2-scif", "renesas,scif";
 535                         reg = <0 0xe6ee8000 0 0x40>;
 536                         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 537                         clocks = <&cpg CPG_MOD 714>,
 538                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 539                         clock-names = "fck", "brg_int", "scif_clk";
 540                         dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
 541                                <&dmac1 0xfd>, <&dmac1 0xfe>;
 542                         dma-names = "tx", "rx", "tx", "rx";
 543                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 544                         resets = <&cpg 714>;
 545                         status = "disabled";
 546                 };
 547
 548                 hscif0: serial@e62c0000 {
 549                         compatible = "renesas,hscif-r8a7743",
 550                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 551                         reg = <0 0xe62c0000 0 0x60>;
 552                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 553                         clocks = <&cpg CPG_MOD 717>,
 554                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 555                         clock-names = "fck", "brg_int", "scif_clk";
 556                         dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
 557                                <&dmac1 0x39>, <&dmac1 0x3a>;
 558                         dma-names = "tx", "rx", "tx", "rx";
 559                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 560                         resets = <&cpg 717>;
 561                         status = "disabled";
 562                 };
 563
 564                 hscif1: serial@e62c8000 {
 565                         compatible = "renesas,hscif-r8a7743",
 566                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 567                         reg = <0 0xe62c8000 0 0x60>;
 568                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 569                         clocks = <&cpg CPG_MOD 716>,
 570                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 571                         clock-names = "fck", "brg_int", "scif_clk";
 572                         dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
 573                                <&dmac1 0x4d>, <&dmac1 0x4e>;
 574                         dma-names = "tx", "rx", "tx", "rx";
 575                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 576                         resets = <&cpg 716>;
 577                         status = "disabled";
 578                 };
 579
 580                 hscif2: serial@e62d0000 {
 581                         compatible = "renesas,hscif-r8a7743",
 582                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 583                         reg = <0 0xe62d0000 0 0x60>;
 584                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 585                         clocks = <&cpg CPG_MOD 713>,
 586                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 587                         clock-names = "fck", "brg_int", "scif_clk";
 588                         dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
 589                                <&dmac1 0x3b>, <&dmac1 0x3c>;
 590                         dma-names = "tx", "rx", "tx", "rx";
 591                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 592                         resets = <&cpg 713>;
 593                         status = "disabled";
 594                 };
 595
 596                 icram2: sram@e6300000 {
 597                         compatible = "mmio-sram";
 598                         reg = <0 0xe6300000 0 0x40000>;
 599                 };
 600
 601                 icram0: sram@e63a0000 {
 602                         compatible = "mmio-sram";
 603                         reg = <0 0xe63a0000 0 0x12000>;
 604                 };
 605
 606                 icram1: sram@e63c0000 {
 607                         compatible = "mmio-sram";
 608                         reg = <0 0xe63c0000 0 0x1000>;
 609                         #address-cells = <1>;
 610                         #size-cells = <1>;
 611                         ranges = <0 0 0xe63c0000 0x1000>;
 612
 613                         smp-sram@0 {
 614                                 compatible = "renesas,smp-sram";
 615                                 reg = <0 0x10>;
 616                         };
 617                 };
 618
 619                 ether: ethernet@ee700000 {
 620                         compatible = "renesas,ether-r8a7743";
 621                         reg = <0 0xee700000 0 0x400>;
 622                         interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
 623                         clocks = <&cpg CPG_MOD 813>;
 624                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 625                         resets = <&cpg 813>;
 626                         phy-mode = "rmii";
 627                         #address-cells = <1>;
 628                         #size-cells = <0>;
 629                         status = "disabled";
 630                 };
 631
 632                 avb: ethernet@e6800000 {
 633                         compatible = "renesas,etheravb-r8a7743",
 634                                      "renesas,etheravb-rcar-gen2";
 635                         reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
 636                         interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
 637                         clocks = <&cpg CPG_MOD 812>;
 638                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 639                         resets = <&cpg 812>;
 640                         #address-cells = <1>;
 641                         #size-cells = <0>;
 642                         status = "disabled";
 643                 };
 644
 645                 mmcif0: mmc@ee200000 {
 646                         compatible = "renesas,mmcif-r8a7743",
 647                                      "renesas,sh-mmcif";
 648                         reg = <0 0xee200000 0 0x80>;
 649                         interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
 650                         clocks = <&cpg CPG_MOD 315>;
 651                         dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
 652                                <&dmac1 0xd1>, <&dmac1 0xd2>;
 653                         dma-names = "tx", "rx", "tx", "rx";
 654                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 655                         resets = <&cpg 315>;
 656                         reg-io-width = <4>;
 657                         max-frequency = <97500000>;
 658                         status = "disabled";
 659                 };
 660         };
 661
 662         /* External root clock */
 663         extal_clk: extal {
 664                 compatible = "fixed-clock";
 665                 #clock-cells = <0>;
 666                 /* This value must be overridden by the board. */
 667                 clock-frequency = <0>;
 668         };
 669
 670         /* External USB clock - can be overridden by the board */
 671         usb_extal_clk: usb_extal {
 672                 compatible = "fixed-clock";
 673                 #clock-cells = <0>;
 674                 clock-frequency = <48000000>;
 675         };
 676
 677         /* External SCIF clock */
 678         scif_clk: scif {
 679                 compatible = "fixed-clock";
 680                 #clock-cells = <0>;
 681                 /* This value must be overridden by the board. */
 682                 clock-frequency = <0>;
 683         };
 684 };