arch/arm/boot/dts/meson8b.dtsi

   1 /*
   2  * Copyright 2015 Endless Mobile, Inc.
   3  * Author: Carlo Caione <carlo@endlessm.com>
   4  *
   5  * This file is dual-licensed: you can use it either under the terms
   6  * of the GPL or the X11 license, at your option. Note that this dual
   7  * licensing only applies to this file, and not this project as a
   8  * whole.
   9  *
  10  *  a) This library is free software; you can redistribute it and/or
  11  *     modify it under the terms of the GNU General Public License as
  12  *     published by the Free Software Foundation; either version 2 of the
  13  *     License, or (at your option) any later version.
  14  *
  15  *     This library is distributed in the hope that it will be useful,
  16  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  *     GNU General Public License for more details.
  19  *
  20  *     You should have received a copy of the GNU General Public License
  21  *     along with this program. If not, see <http://www.gnu.org/licenses/>.
  22  *
  23  * Or, alternatively,
  24  *
  25  *  b) Permission is hereby granted, free of charge, to any person
  26  *     obtaining a copy of this software and associated documentation
  27  *     files (the "Software"), to deal in the Software without
  28  *     restriction, including without limitation the rights to use,
  29  *     copy, modify, merge, publish, distribute, sublicense, and/or
  30  *     sell copies of the Software, and to permit persons to whom the
  31  *     Software is furnished to do so, subject to the following
  32  *     conditions:
  33  *
  34  *     The above copyright notice and this permission notice shall be
  35  *     included in all copies or substantial portions of the Software.
  36  *
  37  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  38  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  39  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  40  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  41  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  42  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  43  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  44  *     OTHER DEALINGS IN THE SOFTWARE.
  45  */
  46
  47 #include <dt-bindings/clock/meson8b-clkc.h>
  48 #include <dt-bindings/gpio/meson8b-gpio.h>
  49 #include <dt-bindings/reset/amlogic,meson8b-reset.h>
  50 #include "meson.dtsi"
  51
  52 / {
  53         cpus {
  54                 #address-cells = <1>;
  55                 #size-cells = <0>;
  56
  57                 cpu@200 {
  58                         device_type = "cpu";
  59                         compatible = "arm,cortex-a5";
  60                         next-level-cache = <&L2>;
  61                         reg = <0x200>;
  62                 };
  63
  64                 cpu@201 {
  65                         device_type = "cpu";
  66                         compatible = "arm,cortex-a5";
  67                         next-level-cache = <&L2>;
  68                         reg = <0x201>;
  69                 };
  70
  71                 cpu@202 {
  72                         device_type = "cpu";
  73                         compatible = "arm,cortex-a5";
  74                         next-level-cache = <&L2>;
  75                         reg = <0x202>;
  76                 };
  77
  78                 cpu@203 {
  79                         device_type = "cpu";
  80                         compatible = "arm,cortex-a5";
  81                         next-level-cache = <&L2>;
  82                         reg = <0x203>;
  83                 };
  84         };
  85 }; /* end of / */
  86
  87 &aobus {
  88         pinctrl_aobus: pinctrl@84 {
  89                 compatible = "amlogic,meson8b-aobus-pinctrl";
  90                 reg = <0x84 0xc>;
  91                 #address-cells = <1>;
  92                 #size-cells = <1>;
  93                 ranges;
  94
  95                 gpio_ao: ao-bank@14 {
  96                         reg = <0x14 0x4>,
  97                                 <0x2c 0x4>,
  98                                 <0x24 0x8>;
  99                         reg-names = "mux", "pull", "gpio";
 100                         gpio-controller;
 101                         #gpio-cells = <2>;
 102                         gpio-ranges = <&pinctrl_aobus 0 130 16>;
 103                 };
 104
 105                 uart_ao_a_pins: uart_ao_a {
 106                         mux {
 107                                 groups = "uart_tx_ao_a", "uart_rx_ao_a";
 108                                 function = "uart_ao";
 109                         };
 110                 };
 111         };
 112 };
 113
 114 &cbus {
 115         clkc: clock-controller@4000 {
 116                 #clock-cells = <1>;
 117                 compatible = "amlogic,meson8b-clkc";
 118                 reg = <0x8000 0x4>, <0x4000 0x460>;
 119         };
 120
 121         reset: reset-controller@4404 {
 122                 compatible = "amlogic,meson8b-reset";
 123                 reg = <0x4404 0x20>;
 124                 #reset-cells = <1>;
 125         };
 126
 127         pwm_ab: pwm@8550 {
 128                 compatible = "amlogic,meson8b-pwm";
 129                 reg = <0x8550 0x10>;
 130                 #pwm-cells = <3>;
 131                 status = "disabled";
 132         };
 133
 134         pwm_cd: pwm@8650 {
 135                 compatible = "amlogic,meson8b-pwm";
 136                 reg = <0x8650 0x10>;
 137                 #pwm-cells = <3>;
 138                 status = "disabled";
 139         };
 140
 141         pwm_ef: pwm@86c0 {
 142                 compatible = "amlogic,meson8b-pwm";
 143                 reg = <0x86c0 0x10>;
 144                 #pwm-cells = <3>;
 145                 status = "disabled";
 146         };
 147
 148         wdt: watchdog@9900 {
 149                 compatible = "amlogic,meson8b-wdt";
 150                 reg = <0x9900 0x8>;
 151                 interrupts = <0 0 1>;
 152         };
 153
 154         pinctrl_cbus: pinctrl@9880 {
 155                 compatible = "amlogic,meson8b-cbus-pinctrl";
 156                 reg = <0x9880 0x10>;
 157                 #address-cells = <1>;
 158                 #size-cells = <1>;
 159                 ranges;
 160
 161                 gpio: banks@80b0 {
 162                         reg = <0x80b0 0x28>,
 163                                 <0x80e8 0x18>,
 164                                 <0x8120 0x18>,
 165                                 <0x8030 0x38>;
 166                         reg-names = "mux", "pull", "pull-enable", "gpio";
 167                         gpio-controller;
 168                         #gpio-cells = <2>;
 169                         gpio-ranges = <&pinctrl_cbus 0 0 130>;
 170                 };
 171         };
 172 };
 173
 174 &L2 {
 175         arm,data-latency = <3 3 3>;
 176         arm,tag-latency = <2 2 2>;
 177         arm,filter-ranges = <0x100000 0xc0000000>;
 178 };
 179
 180 &uart_AO {
 181         clocks = <&clkc CLKID_CLK81>;
 182 };
 183
 184 &uart_A {
 185         clocks = <&clkc CLKID_CLK81>;
 186 };
 187
 188 &uart_B {
 189         clocks = <&clkc CLKID_CLK81>;
 190 };
 191
 192 &uart_C {
 193         clocks = <&clkc CLKID_CLK81>;
 194 };