arch/arm/boot/dts/imx6ull.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
   2 //
   3 // Copyright 2016 Freescale Semiconductor, Inc.
   4
   5 #include "imx6ul.dtsi"
   6 #include "imx6ull-pinfunc.h"
   7 #include "imx6ull-pinfunc-snvs.h"
   8
   9 /* Delete UART8 in AIPS-1 (i.MX6UL specific) */
  10 /delete-node/ &uart8;
  11 /* Delete CAAM node in AIPS-2 (i.MX6UL specific) */
  12 /delete-node/ &crypto;
  13
  14 &cpu0 {
  15         operating-points = <
  16                 /* kHz  uV */
  17                 900000  1275000
  18                 792000  1225000
  19                 528000  1175000
  20                 396000  1025000
  21                 198000  950000
  22         >;
  23         fsl,soc-operating-points = <
  24                 /* KHz  uV */
  25                 900000  1250000
  26                 792000  1175000
  27                 528000  1175000
  28                 396000  1175000
  29                 198000  1175000
  30         >;
  31 };
  32
  33 / {
  34         soc {
  35                 aips3: aips-bus@2200000 {
  36                         compatible = "fsl,aips-bus", "simple-bus";
  37                         #address-cells = <1>;
  38                         #size-cells = <1>;
  39                         reg = <0x02200000 0x100000>;
  40                         ranges;
  41
  42                         dcp: crypto@2280000 {
  43                                 compatible = "fsl,imx6ull-dcp", "fsl,imx28-dcp";
  44                                 reg = <0x02280000 0x4000>;
  45                                 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
  46                                              <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
  47                                              <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
  48                                 clocks = <&clks IMX6ULL_CLK_DCP_CLK>;
  49                                 clock-names = "dcp";
  50                         };
  51
  52                         iomuxc_snvs: iomuxc-snvs@2290000 {
  53                                 compatible = "fsl,imx6ull-iomuxc-snvs";
  54                                 reg = <0x02290000 0x4000>;
  55                         };
  56
  57                         uart8: serial@2288000 {
  58                                 compatible = "fsl,imx6ul-uart",
  59                                              "fsl,imx6q-uart";
  60                                 reg = <0x02288000 0x4000>;
  61                                 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
  62                                 clocks = <&clks IMX6UL_CLK_UART8_IPG>,
  63                                          <&clks IMX6UL_CLK_UART8_SERIAL>;
  64                                 clock-names = "ipg", "per";
  65                                 status = "disabled";
  66                         };
  67                 };
  68         };
  69 };