arch/arm/boot/dts/imx6ull-jozacp.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 /*
   3  * Copyright (c) 2020 Protonic Holland
   4  * Copyright (c) 2020 Oleksij Rempel <kernel@pengutronix.de>, Pengutronix
   5  */
   6
   7 /dts-v1/;
   8
   9 #include <dt-bindings/gpio/gpio.h>
  10 #include <dt-bindings/leds/common.h>
  11 #include "imx6ull.dtsi"
  12
  13 / {
  14         model = "JOZ Access Point";
  15         compatible = "joz,jozacp", "fsl,imx6ull";
  16
  17         chosen {
  18                 stdout-path = &uart1;
  19         };
  20
  21         /* On board name LED_RGB1 */
  22         led-controller-1 {
  23                 compatible = "pwm-leds";
  24
  25                 led-0 {
  26                         color = <LED_COLOR_ID_RED>;
  27                         function = LED_FUNCTION_INDICATOR;
  28                         function-enumerator = <0>;
  29                         pwms = <&pwm1 0 10000000 0>;
  30                         max-brightness = <255>;
  31                 };
  32
  33                 led-1 {
  34                         color = <LED_COLOR_ID_GREEN>;
  35                         function = LED_FUNCTION_INDICATOR;
  36                         function-enumerator = <1>;
  37                         pwms = <&pwm3 0 10000000 0>;
  38                         max-brightness = <255>;
  39                 };
  40
  41                 led-2 {
  42                         color = <LED_COLOR_ID_BLUE>;
  43                         function = LED_FUNCTION_INDICATOR;
  44                         function-enumerator = <2>;
  45                         pwms = <&pwm5 0 10000000 0>;
  46                         max-brightness = <255>;
  47                         linux,default-trigger = "heartbeat";
  48                 };
  49         };
  50
  51         /* On board name LED_RGB2 */
  52         led-controller-2 {
  53                 compatible = "pwm-leds";
  54
  55                 led-3 {
  56                         color = <LED_COLOR_ID_RED>;
  57                         function = LED_FUNCTION_INDICATOR;
  58                         function-enumerator = <3>;
  59                         pwms = <&pwm2 0 10000000 0>;
  60                         max-brightness = <255>;
  61                 };
  62
  63                 led-4 {
  64                         color = <LED_COLOR_ID_GREEN>;
  65                         function = LED_FUNCTION_INDICATOR;
  66                         function-enumerator = <4>;
  67                         pwms = <&pwm4 0 10000000 0>;
  68                         max-brightness = <255>;
  69                 };
  70
  71                 led-5 {
  72                         color = <LED_COLOR_ID_BLUE>;
  73                         function = LED_FUNCTION_INDICATOR;
  74                         function-enumerator = <5>;
  75                         pwms = <&pwm6 0 10000000 0>;
  76                         max-brightness = <255>;
  77                 };
  78         };
  79
  80         reg_3v3: regulator-3v3 {
  81                 compatible = "regulator-fixed";
  82                 regulator-name = "3v3";
  83                 regulator-min-microvolt = <3300000>;
  84                 regulator-max-microvolt = <3300000>;
  85                 vin-supply = <&reg_5v0>;
  86         };
  87
  88         reg_5v0: regulator-5v0 {
  89                 compatible = "regulator-fixed";
  90                 regulator-name = "5v0";
  91                 regulator-min-microvolt = <5000000>;
  92                 regulator-max-microvolt = <5000000>;
  93         };
  94
  95         reg_vbus: regulator-vbus {
  96                 compatible = "regulator-fixed";
  97                 pinctrl-names = "default";
  98                 pinctrl-0 = <&pinctrl_vbus>;
  99                 regulator-name = "vbus";
 100                 regulator-min-microvolt = <5000000>;
 101                 regulator-max-microvolt = <5000000>;
 102                 vin-supply = <&reg_5v0>;
 103                 gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
 104                 enable-active-high;
 105         };
 106
 107         usdhc2_wifi_pwrseq: usdhc2-wifi-pwrseq {
 108                 compatible = "mmc-pwrseq-simple";
 109                 pinctrl-names = "default";
 110                 pinctrl-0 = <&pinctrl_wifi_npd>;
 111                 reset-gpios = <&gpio4 25 GPIO_ACTIVE_LOW>;
 112         };
 113 };
 114
 115 &can1 {
 116         pinctrl-names = "default";
 117         pinctrl-0 = <&pinctrl_can1>;
 118         status = "okay";
 119 };
 120
 121 &cpu0 {
 122         clock-frequency = <792000000>;
 123 };
 124
 125 &fec1 {
 126         pinctrl-names = "default";
 127         pinctrl-0 = <&pinctrl_enet1>;
 128         phy-mode = "rmii";
 129         phy-handle = <&ethphy0>;
 130         status = "okay";
 131
 132         mdio {
 133                 #address-cells = <1>;
 134                 #size-cells = <0>;
 135
 136                 ethphy0: ethernet-phy@0 {
 137                         reg = <0>;
 138                         clocks = <&clks IMX6UL_CLK_ENET_REF>;
 139                         clock-names = "rmii-ref";
 140                         interrupts-extended = <&gpio1 29 IRQ_TYPE_LEVEL_LOW>;
 141                         reset-gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
 142                         reset-assert-us = <10000>;
 143                         reset-deassert-us = <300>;
 144                 };
 145         };
 146 };
 147
 148 &i2c1 {
 149         pinctrl-names = "default";
 150         pinctrl-0 = <&pinctrl_i2c1>;
 151         clock-frequency = <100000>;
 152         status = "okay";
 153 };
 154
 155 &i2c2 {
 156         pinctrl-names = "default";
 157         pinctrl-0 = <&pinctrl_i2c2>;
 158         clock-frequency = <100000>;
 159         status = "okay";
 160
 161         rtc@51 {
 162                 compatible = "nxp,pcf8563";
 163                 reg = <0x51>;
 164         };
 165 };
 166
 167 &pwm1 {
 168         pinctrl-names = "default";
 169         pinctrl-0 = <&pinctrl_pwm1>;
 170         status = "okay";
 171 };
 172
 173 &pwm2 {
 174         pinctrl-names = "default";
 175         pinctrl-0 = <&pinctrl_pwm2>;
 176         status = "okay";
 177 };
 178
 179 &pwm3 {
 180         pinctrl-names = "default";
 181         pinctrl-0 = <&pinctrl_pwm3>;
 182         status = "okay";
 183 };
 184
 185 &pwm4 {
 186         pinctrl-names = "default";
 187         pinctrl-0 = <&pinctrl_pwm4>;
 188         status = "okay";
 189 };
 190
 191 &pwm5 {
 192         pinctrl-names = "default";
 193         pinctrl-0 = <&pinctrl_pwm5>;
 194         status = "okay";
 195 };
 196
 197 &pwm6 {
 198         pinctrl-names = "default";
 199         pinctrl-0 = <&pinctrl_pwm6>;
 200         status = "okay";
 201 };
 202
 203 &snvs_rtc {
 204         status = "disabled";
 205 };
 206
 207 &uart1 {
 208         pinctrl-names = "default";
 209         pinctrl-0 = <&pinctrl_uart1>;
 210         status = "okay";
 211 };
 212
 213 &uart4 {
 214         pinctrl-names = "default";
 215         pinctrl-0 = <&pinctrl_uart4>;
 216         dtr-gpios = <&gpio3 4 GPIO_ACTIVE_LOW>;
 217         uart-has-rtscts;
 218         status = "okay";
 219 };
 220
 221 &usbotg1 {
 222         pinctrl-names = "default";
 223         pinctrl-0 = <&pinctrl_usbotg1>;
 224         vbus-supply = <&reg_vbus>;
 225         dr_mode = "host";
 226         over-current-active-low;
 227         status = "okay";
 228 };
 229
 230 &usdhc1 {
 231         pinctrl-names = "default";
 232         pinctrl-0 = <&pinctrl_usdhc1>;
 233         vmmc-supply = <&reg_3v3>;
 234         bus-width = <8>;
 235         no-1-8-v;
 236         non-removable;
 237         cap-mmc-hw-reset;
 238         no-sd;
 239         no-sdio;
 240         status = "okay";
 241 };
 242
 243 &usdhc2 {
 244         pinctrl-names = "default";
 245         pinctrl-0 = <&pinctrl_usdhc2>;
 246         mmc-pwrseq = <&usdhc2_wifi_pwrseq>;
 247         bus-width = <4>;
 248         no-1-8-v;
 249         no-mmc;
 250         no-sd;
 251         non-removable;
 252         #address-cells = <1>;
 253         #size-cells = <0>;
 254         status = "okay";
 255
 256         wifi@1 {
 257                 compatible = "brcm,bcm4329-fmac";
 258                 reg = <1>;
 259         };
 260 };
 261
 262 &iomuxc {
 263         pinctrl-names = "default";
 264         pinctrl-0 = <&pinctrl_hog>;
 265
 266         pinctrl_can1: can1grp {
 267                 fsl,pins = <
 268                         MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX      0x1b0b0
 269                         MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX      0x1b0b0
 270                 >;
 271         };
 272
 273         pinctrl_enet1: enet1grp {
 274                 fsl,pins = <
 275                         MX6UL_PAD_GPIO1_IO07__ENET1_MDC  0x1b0b0
 276                         MX6UL_PAD_GPIO1_IO06__ENET1_MDIO        0x1b0b0
 277                         MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN      0x1b0b0
 278                         MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER      0x1b0b0
 279                         MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
 280                         MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
 281                         MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN      0x1b0b0
 282                         MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
 283                         MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
 284                         MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1  0x4001b031
 285
 286                         MX6UL_PAD_UART4_TX_DATA__GPIO1_IO28     0x038b0
 287                         MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29     0x170b0
 288                 >;
 289         };
 290
 291         pinctrl_hog: hoggrp {
 292                 fsl,pins = <
 293                         /* HW Revision */
 294                         MX6UL_PAD_ENET2_RX_DATA0__GPIO2_IO08    0x1b0b0
 295                         MX6UL_PAD_ENET2_RX_DATA1__GPIO2_IO09    0x1b0b0
 296                         MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10       0x1b0b0
 297
 298                         /* HW ID */
 299                         MX6UL_PAD_ENET2_TX_DATA0__GPIO2_IO11    0x1b0b0
 300                         MX6UL_PAD_ENET2_TX_DATA1__GPIO2_IO12    0x1b0b0
 301                         MX6UL_PAD_ENET2_TX_EN__GPIO2_IO13       0x1b0b0
 302                         MX6UL_PAD_ENET2_TX_CLK__GPIO2_IO14      0x1b0b0
 303                         MX6UL_PAD_ENET2_RX_ER__GPIO2_IO15       0x1b0b0
 304
 305                         /* Digital inputs */
 306                         MX6UL_PAD_GPIO1_IO03__GPIO1_IO03        0x11000
 307                         MX6UL_PAD_GPIO1_IO04__GPIO1_IO04        0x11000
 308                         MX6UL_PAD_GPIO1_IO05__GPIO1_IO05        0x11000
 309                         MX6UL_PAD_GPIO1_IO08__GPIO1_IO08        0x11000
 310                         MX6UL_PAD_GPIO1_IO09__GPIO1_IO09        0x11000
 311
 312                         /* Isolated outputs */
 313                         MX6UL_PAD_UART2_TX_DATA__GPIO1_IO20     0x01020
 314                         MX6UL_PAD_UART2_RX_DATA__GPIO1_IO21     0x01020
 315                         MX6UL_PAD_UART2_RTS_B__GPIO1_IO23       0x01020
 316                         MX6UL_PAD_UART3_TX_DATA__GPIO1_IO24     0x01020
 317                         MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25     0x01020
 318                 >;
 319         };
 320
 321         pinctrl_i2c1: i2c1grp {
 322                 fsl,pins = <
 323                         MX6UL_PAD_CSI_MCLK__I2C1_SDA            0x4001f8b1
 324                         MX6UL_PAD_CSI_PIXCLK__I2C1_SCL          0x4001f8b1
 325                 >;
 326         };
 327
 328         pinctrl_i2c2: i2c2grp {
 329                 fsl,pins = <
 330                         MX6UL_PAD_UART5_RX_DATA__I2C2_SDA       0x4001f8b1
 331                         MX6UL_PAD_UART5_TX_DATA__I2C2_SCL       0x4001f8b1
 332                 >;
 333         };
 334
 335         pinctrl_pwm1: pwm1grp {
 336                 fsl,pins = <
 337                         MX6UL_PAD_LCD_DATA00__PWM1_OUT          0x01010
 338                 >;
 339         };
 340
 341         pinctrl_pwm2: pwm2grp {
 342                 fsl,pins = <
 343                         MX6UL_PAD_LCD_DATA01__PWM2_OUT          0x01010
 344                 >;
 345         };
 346
 347         pinctrl_pwm3: pwm3grp {
 348                 fsl,pins = <
 349                         MX6UL_PAD_LCD_DATA02__PWM3_OUT          0x01010
 350                 >;
 351         };
 352
 353         pinctrl_pwm4: pwm4grp {
 354                 fsl,pins = <
 355                         MX6UL_PAD_LCD_DATA03__PWM4_OUT          0x01010
 356                 >;
 357         };
 358
 359         pinctrl_pwm5: pwm5grp {
 360                 fsl,pins = <
 361                         MX6UL_PAD_LCD_DATA18__PWM5_OUT          0x01010
 362                 >;
 363         };
 364
 365         pinctrl_pwm6: pwm6grp {
 366                 fsl,pins = <
 367                         MX6UL_PAD_LCD_DATA19__PWM6_OUT          0x01010
 368                 >;
 369         };
 370
 371         pinctrl_uart1: uart1grp {
 372                 fsl,pins = <
 373                         MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX   0x1b0b1
 374                         MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX   0x1b0b1
 375                 >;
 376         };
 377
 378         pinctrl_uart4: uart4grp {
 379                 fsl,pins = <
 380                         MX6UL_PAD_LCD_CLK__UART4_DCE_TX         0x1b0b0
 381                         MX6UL_PAD_LCD_ENABLE__UART4_DCE_RX      0x1b0b0
 382                         MX6UL_PAD_LCD_HSYNC__UART4_DCE_CTS      0x1b0b0
 383                         MX6UL_PAD_LCD_VSYNC__UART4_DCE_RTS      0x1b0b0
 384                         MX6UL_PAD_LCD_RESET__GPIO3_IO04         0x1b0b0
 385                 >;
 386         };
 387
 388         pinctrl_usbotg1: usbotg1grp {
 389                 fsl,pins = <
 390                         MX6UL_PAD_GPIO1_IO01__USB_OTG1_OC       0x1b0b0
 391                 >;
 392         };
 393
 394         pinctrl_usdhc1: usdhc1grp {
 395                 fsl,pins = <
 396                         MX6UL_PAD_NAND_WP_B__USDHC1_RESET_B     0x17099
 397                         MX6UL_PAD_SD1_CMD__USDHC1_CMD           0x1f099
 398                         MX6UL_PAD_SD1_CLK__USDHC1_CLK           0x10099
 399                         MX6UL_PAD_SD1_DATA0__USDHC1_DATA0       0x17099
 400                         MX6UL_PAD_SD1_DATA1__USDHC1_DATA1       0x17099
 401                         MX6UL_PAD_SD1_DATA2__USDHC1_DATA2       0x17099
 402                         MX6UL_PAD_SD1_DATA3__USDHC1_DATA3       0x17099
 403                         MX6UL_PAD_NAND_READY_B__USDHC1_DATA4    0x17099
 404                         MX6UL_PAD_NAND_CE0_B__USDHC1_DATA5      0x17099
 405                         MX6UL_PAD_NAND_CE1_B__USDHC1_DATA6      0x17099
 406                         MX6UL_PAD_NAND_CLE__USDHC1_DATA7        0x17099
 407                 >;
 408         };
 409
 410         pinctrl_usdhc2: usdhc2grp {
 411                 fsl,pins = <
 412                         MX6UL_PAD_CSI_VSYNC__USDHC2_CLK         0x100b9
 413                         MX6UL_PAD_CSI_HSYNC__USDHC2_CMD         0x170b9
 414                         MX6UL_PAD_CSI_DATA00__USDHC2_DATA0      0x170b9
 415                         MX6UL_PAD_CSI_DATA01__USDHC2_DATA1      0x170b9
 416                         MX6UL_PAD_CSI_DATA02__USDHC2_DATA2      0x170b9
 417                         MX6UL_PAD_CSI_DATA03__USDHC2_DATA3      0x170b9
 418                 >;
 419         };
 420
 421         pinctrl_vbus: vbus0grp {
 422                 fsl,pins = <
 423                         MX6UL_PAD_GPIO1_IO02__GPIO1_IO02        0x030b0
 424                 >;
 425         };
 426
 427         pinctrl_wifi_npd: wifigrp {
 428                 fsl,pins = <
 429                         /* WL_REG_ON */
 430                         MX6UL_PAD_CSI_DATA04__GPIO4_IO25        0x03020
 431                 >;
 432         };
 433 };
 434
 435 &iomuxc_snvs {
 436         pinctrl-names = "default";
 437         pinctrl-0 = <&pinctrl_snvs_hog>;
 438
 439         pinctrl_snvs_hog: snvs-hog-grp {
 440                 fsl,pins = <
 441                         /* Digital outputs */
 442                         MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02     0x00020
 443                         MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03     0x00020
 444                         MX6ULL_PAD_SNVS_TAMPER4__GPIO5_IO04     0x00020
 445                         MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05     0x00020
 446                         MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06     0x00020
 447
 448                         /* Digital outputs fault feedback */
 449                         MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00     0x17000
 450                         MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01     0x17000
 451                         MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07     0x17000
 452                         MX6ULL_PAD_SNVS_TAMPER8__GPIO5_IO08     0x17000
 453                         MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09     0x17000
 454                 >;
 455         };
 456 };