Merge tag 'v4.20' into next
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / imx31-lite.dts
1 // SPDX-License-Identifier: GPL-2.0+
2 //
3 // Copyright (C) 2016-2018 Vladimir Zapolskiy <vz@mleia.com>
4
5 /dts-v1/;
6
7 #include "imx31.dtsi"
8
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11
12 / {
13         model = "LogicPD i.MX31 Lite";
14         compatible = "logicpd,imx31-lite", "fsl,imx31";
15
16         chosen {
17                 stdout-path = &uart1;
18         };
19
20         memory@80000000 {
21                 reg = <0x80000000 0x8000000>;
22         };
23
24         leds {
25                 compatible = "gpio-leds";
26
27                 led0 {
28                         gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
29                 };
30
31                 led1 {
32                         gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
33                 };
34         };
35 };
36
37 &ata {
38         status = "okay";
39 };
40
41 &nfc {
42         nand-bus-width = <8>;
43         nand-ecc-mode = "hw";
44         nand-on-flash-bbt;
45         status = "okay";
46 };
47
48 &sdhci1 {
49         bus-width = <4>;
50         cd-gpios = <&gpio2 11 GPIO_ACTIVE_HIGH>;
51         wp-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
52         status = "okay";
53 };
54
55 &spi2 {
56         status = "okay";
57
58         pmic@0 {
59                 compatible = "fsl,mc13783";
60                 reg = <0>;
61                 spi-cs-high;
62                 spi-max-frequency = <1000000>;
63                 interrupt-parent = <&gpio1>;
64                 interrupts = <3 IRQ_TYPE_EDGE_RISING>;
65
66                 fsl,mc13xxx-uses-adc;
67                 fsl,mc13xxx-uses-rtc;
68
69                 regulators {
70                         sw1a {          /* QVCC */
71                                 regulator-min-microvolt = <1200000>;
72                                 regulator-max-microvolt = <1500000>;
73                                 regulator-always-on;
74                                 regulator-boot-on;
75                         };
76
77                         sw1b {          /* QVCC */
78                                 regulator-min-microvolt = <1200000>;
79                                 regulator-max-microvolt = <1500000>;
80                                 regulator-always-on;
81                                 regulator-boot-on;
82                         };
83
84                         sw2a {          /* 1.8V_DDR, NVCC2, NVCC21 and NVCC22 */
85                                 regulator-min-microvolt = <1800000>;
86                                 regulator-max-microvolt = <1800000>;
87                                 regulator-always-on;
88                                 regulator-boot-on;
89                         };
90
91                         sw2b {          /* NVCC10 */
92                                 regulator-min-microvolt = <1800000>;
93                                 regulator-max-microvolt = <1800000>;
94                                 regulator-always-on;
95                                 regulator-boot-on;
96                         };
97
98                         violo {         /* NVCC1 and NVCC7 */
99                                 regulator-min-microvolt = <1800000>;
100                                 regulator-max-microvolt = <1800000>;
101                                 regulator-always-on;
102                                 regulator-boot-on;
103                         };
104
105                         viohi {         /* VIOHI */
106                                 regulator-min-microvolt = <2775000>;
107                                 regulator-max-microvolt = <2775000>;
108                                 regulator-always-on;
109                                 regulator-boot-on;
110                         };
111
112                         vaudio {        /* VAUDIO */
113                                 regulator-min-microvolt = <2775000>;
114                                 regulator-max-microvolt = <2775000>;
115                         };
116
117                         vcam {          /* NVCC4 */
118                                 regulator-min-microvolt = <2800000>;
119                                 regulator-max-microvolt = <2800000>;
120                         };
121
122                         vgen {          /* NVCC5 / NVCC8 and NVCC6 / NVCC9 */
123                                 regulator-min-microvolt = <2775000>;
124                                 regulator-max-microvolt = <2775000>;
125                                 regulator-always-on;
126                                 regulator-boot-on;
127                         };
128
129                         vmmc2 {         /* NVCC3 */
130                                 regulator-min-microvolt = <1600000>;
131                                 regulator-max-microvolt = <3000000>;
132                                 regulator-always-on;
133                                 regulator-boot-on;
134                         };
135                 };
136         };
137 };
138
139 &uart1 {
140         uart-has-rtscts;
141         status = "okay";
142 };
143
144 /* Routed to the extension board */
145 &uart2 {
146         uart-has-rtscts;
147         status = "okay";
148 };
149
150 /* Routed to the extension board */
151 &uart3 {
152         uart-has-rtscts;
153         status = "okay";
154 };
155
156 &weim {
157         status = "okay";
158
159         nor@0,0 {
160                 compatible = "cfi-flash";
161                 reg = <0 0x0 0x200000>;
162                 bank-width = <2>;
163                 linux,mtd-name = "physmap-flash.0";
164                 fsl,weim-cs-timing = <0x0000cf03 0xa0330d01 0x00220800>;
165         };
166
167         ethernet@4,0 {
168                 compatible = "smsc,lan9117", "smsc,lan9115";
169                 reg = <4 0x0 0x100>;
170                 interrupt-parent = <&gpio1>;
171                 interrupts = <26 IRQ_TYPE_EDGE_FALLING>;
172                 phy-mode = "mii";
173                 reg-io-width = <2>;
174                 smsc,irq-push-pull;
175                 fsl,weim-cs-timing = <0x00008701 0x04000541 0x00010000>;
176         };
177 };