2 * Hisilicon Ltd. HiP04 SoC
4 * Copyright (C) 2013-2014 Hisilicon Ltd.
5 * Copyright (C) 2013-2014 Linaro Ltd.
7 * Author: Haojian Zhuang <haojian.zhuang@linaro.org>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
15 /* memory bus is 64-bit */
24 compatible = "hisilicon,hip04-bootwrapper";
25 boot-method = <0x10c00000 0x10000>, <0xe0000100 0x1000>;
92 compatible = "arm,cortex-a15";
97 compatible = "arm,cortex-a15";
102 compatible = "arm,cortex-a15";
107 compatible = "arm,cortex-a15";
112 compatible = "arm,cortex-a15";
117 compatible = "arm,cortex-a15";
122 compatible = "arm,cortex-a15";
127 compatible = "arm,cortex-a15";
132 compatible = "arm,cortex-a15";
137 compatible = "arm,cortex-a15";
142 compatible = "arm,cortex-a15";
147 compatible = "arm,cortex-a15";
152 compatible = "arm,cortex-a15";
157 compatible = "arm,cortex-a15";
162 compatible = "arm,cortex-a15";
167 compatible = "arm,cortex-a15";
173 compatible = "arm,armv7-timer";
174 interrupt-parent = <&gic>;
175 interrupts = <1 13 0xf08>,
183 compatible = "fixed-clock";
184 clock-frequency = <50000000>;
189 compatible = "fixed-clock";
190 clock-frequency = <168000000>;
195 compatible = "fixed-clock";
196 clock-frequency = <375000000>;
200 /* It's a 32-bit SoC. */
201 #address-cells = <1>;
203 compatible = "simple-bus";
204 interrupt-parent = <&gic>;
205 ranges = <0 0 0xe0000000 0x10000000>;
207 gic: interrupt-controller@c01000 {
208 compatible = "hisilicon,hip04-intc";
209 #interrupt-cells = <3>;
210 #address-cells = <0>;
211 interrupt-controller;
212 interrupts = <1 9 0xf04>;
214 reg = <0xc01000 0x1000>, <0xc02000 0x1000>,
215 <0xc04000 0x2000>, <0xc06000 0x2000>;
219 compatible = "hisilicon,sysctrl";
220 reg = <0x3e00000 0x00100000>;
224 compatible = "hisilicon,hip04-fabric";
225 reg = <0x302a000 0x1000>;
228 dual_timer0: dual_timer@3000000 {
229 compatible = "arm,sp804", "arm,primecell";
230 reg = <0x3000000 0x1000>;
231 interrupts = <0 224 4>;
232 clocks = <&clk_50m>, <&clk_50m>;
233 clock-names = "apb_pclk";
237 compatible = "arm,cortex-a15-pmu";
238 interrupts = <0 64 4>,
256 uart0: uart@4007000 {
257 compatible = "snps,dw-apb-uart";
258 reg = <0x4007000 0x1000>;
259 interrupts = <0 381 4>;
260 clocks = <&clk_168m>;
261 clock-names = "uartclk";
266 sata0: sata@a000000 {
267 compatible = "hisilicon,hisi-ahci";
268 reg = <0xa000000 0x1000000>;
269 interrupts = <0 372 4>;
275 compatible = "arm,coresight-etb10", "arm,primecell";
276 reg = <0 0xe3c42000 0 0x1000>;
278 clocks = <&clk_375m>;
279 clock-names = "apb_pclk";
282 etb0_in_port: endpoint@0 {
283 remote-endpoint = <&replicator0_out_port0>;
290 compatible = "arm,coresight-etb10", "arm,primecell";
291 reg = <0 0xe3c82000 0 0x1000>;
293 clocks = <&clk_375m>;
294 clock-names = "apb_pclk";
297 etb1_in_port: endpoint@0 {
298 remote-endpoint = <&replicator1_out_port0>;
305 compatible = "arm,coresight-etb10", "arm,primecell";
306 reg = <0 0xe3cc2000 0 0x1000>;
308 clocks = <&clk_375m>;
309 clock-names = "apb_pclk";
312 etb2_in_port: endpoint@0 {
313 remote-endpoint = <&replicator2_out_port0>;
320 compatible = "arm,coresight-etb10", "arm,primecell";
321 reg = <0 0xe3d02000 0 0x1000>;
323 clocks = <&clk_375m>;
324 clock-names = "apb_pclk";
327 etb3_in_port: endpoint@0 {
328 remote-endpoint = <&replicator3_out_port0>;
335 compatible = "arm,coresight-tpiu", "arm,primecell";
336 reg = <0 0xe3c05000 0 0x1000>;
338 clocks = <&clk_375m>;
339 clock-names = "apb_pclk";
342 tpiu_in_port: endpoint@0 {
343 remote-endpoint = <&funnel4_out_port0>;
350 /* non-configurable replicators don't show up on the
351 * AMBA bus. As such no need to add "arm,primecell".
353 compatible = "arm,coresight-replicator";
356 #address-cells = <1>;
359 /* replicator output ports */
362 replicator0_out_port0: endpoint {
363 remote-endpoint = <&etb0_in_port>;
369 replicator0_out_port1: endpoint {
370 remote-endpoint = <&funnel4_in_port0>;
377 replicator0_in_port0: endpoint {
378 remote-endpoint = <&funnel0_out_port0>;
385 /* non-configurable replicators don't show up on the
386 * AMBA bus. As such no need to add "arm,primecell".
388 compatible = "arm,coresight-replicator";
391 #address-cells = <1>;
394 /* replicator output ports */
397 replicator1_out_port0: endpoint {
398 remote-endpoint = <&etb1_in_port>;
404 replicator1_out_port1: endpoint {
405 remote-endpoint = <&funnel4_in_port1>;
412 replicator1_in_port0: endpoint {
413 remote-endpoint = <&funnel1_out_port0>;
420 /* non-configurable replicators don't show up on the
421 * AMBA bus. As such no need to add "arm,primecell".
423 compatible = "arm,coresight-replicator";
426 #address-cells = <1>;
431 replicator2_out_port0: endpoint {
432 remote-endpoint = <&etb2_in_port>;
438 replicator2_out_port1: endpoint {
439 remote-endpoint = <&funnel4_in_port2>;
446 replicator2_in_port0: endpoint {
447 remote-endpoint = <&funnel2_out_port0>;
454 /* non-configurable replicators don't show up on the
455 * AMBA bus. As such no need to add "arm,primecell".
457 compatible = "arm,coresight-replicator";
460 #address-cells = <1>;
465 replicator3_out_port0: endpoint {
466 remote-endpoint = <&etb3_in_port>;
472 replicator3_out_port1: endpoint {
473 remote-endpoint = <&funnel4_in_port3>;
480 replicator3_in_port0: endpoint {
481 remote-endpoint = <&funnel3_out_port0>;
488 compatible = "arm,coresight-funnel", "arm,primecell";
489 reg = <0 0xe3c41000 0 0x1000>;
491 clocks = <&clk_375m>;
492 clock-names = "apb_pclk";
495 funnel0_out_port0: endpoint {
497 <&replicator0_in_port0>;
503 #address-cells = <1>;
508 funnel0_in_port0: endpoint {
509 remote-endpoint = <&ptm0_out_port>;
515 funnel0_in_port1: endpoint {
516 remote-endpoint = <&ptm1_out_port>;
522 funnel0_in_port2: endpoint {
523 remote-endpoint = <&ptm2_out_port>;
529 funnel0_in_port3: endpoint {
530 remote-endpoint = <&ptm3_out_port>;
537 compatible = "arm,coresight-funnel", "arm,primecell";
538 reg = <0 0xe3c81000 0 0x1000>;
540 clocks = <&clk_375m>;
541 clock-names = "apb_pclk";
544 funnel1_out_port0: endpoint {
546 <&replicator1_in_port0>;
552 #address-cells = <1>;
557 funnel1_in_port0: endpoint {
558 remote-endpoint = <&ptm4_out_port>;
564 funnel1_in_port1: endpoint {
565 remote-endpoint = <&ptm5_out_port>;
571 funnel1_in_port2: endpoint {
572 remote-endpoint = <&ptm6_out_port>;
578 funnel1_in_port3: endpoint {
579 remote-endpoint = <&ptm7_out_port>;
586 compatible = "arm,coresight-funnel", "arm,primecell";
587 reg = <0 0xe3cc1000 0 0x1000>;
589 clocks = <&clk_375m>;
590 clock-names = "apb_pclk";
593 funnel2_out_port0: endpoint {
595 <&replicator2_in_port0>;
601 #address-cells = <1>;
606 funnel2_in_port0: endpoint {
607 remote-endpoint = <&ptm8_out_port>;
613 funnel2_in_port1: endpoint {
614 remote-endpoint = <&ptm9_out_port>;
620 funnel2_in_port2: endpoint {
621 remote-endpoint = <&ptm10_out_port>;
627 funnel2_in_port3: endpoint {
628 remote-endpoint = <&ptm11_out_port>;
635 compatible = "arm,coresight-funnel", "arm,primecell";
636 reg = <0 0xe3d01000 0 0x1000>;
638 clocks = <&clk_375m>;
639 clock-names = "apb_pclk";
642 funnel3_out_port0: endpoint {
644 <&replicator3_in_port0>;
650 #address-cells = <1>;
655 funnel3_in_port0: endpoint {
656 remote-endpoint = <&ptm12_out_port>;
662 funnel3_in_port1: endpoint {
663 remote-endpoint = <&ptm13_out_port>;
669 funnel3_in_port2: endpoint {
670 remote-endpoint = <&ptm14_out_port>;
676 funnel3_in_port3: endpoint {
677 remote-endpoint = <&ptm15_out_port>;
684 compatible = "arm,coresight-funnel", "arm,primecell";
685 reg = <0 0xe3c04000 0 0x1000>;
687 clocks = <&clk_375m>;
688 clock-names = "apb_pclk";
691 funnel4_out_port0: endpoint {
692 remote-endpoint = <&tpiu_in_port>;
698 #address-cells = <1>;
703 funnel4_in_port0: endpoint {
705 <&replicator0_out_port1>;
711 funnel4_in_port1: endpoint {
713 <&replicator1_out_port1>;
719 funnel4_in_port2: endpoint {
721 <&replicator2_out_port1>;
727 funnel4_in_port3: endpoint {
729 <&replicator3_out_port1>;
736 compatible = "arm,coresight-etm3x", "arm,primecell";
737 reg = <0 0xe3c7c000 0 0x1000>;
739 clocks = <&clk_375m>;
740 clock-names = "apb_pclk";
744 ptm0_out_port: endpoint {
745 remote-endpoint = <&funnel0_in_port0>;
752 compatible = "arm,coresight-etm3x", "arm,primecell";
753 reg = <0 0xe3c7d000 0 0x1000>;
755 clocks = <&clk_375m>;
756 clock-names = "apb_pclk";
760 ptm1_out_port: endpoint {
761 remote-endpoint = <&funnel0_in_port1>;
768 compatible = "arm,coresight-etm3x", "arm,primecell";
769 reg = <0 0xe3c7e000 0 0x1000>;
771 clocks = <&clk_375m>;
772 clock-names = "apb_pclk";
776 ptm2_out_port: endpoint {
777 remote-endpoint = <&funnel0_in_port2>;
784 compatible = "arm,coresight-etm3x", "arm,primecell";
785 reg = <0 0xe3c7f000 0 0x1000>;
787 clocks = <&clk_375m>;
788 clock-names = "apb_pclk";
792 ptm3_out_port: endpoint {
793 remote-endpoint = <&funnel0_in_port3>;
800 compatible = "arm,coresight-etm3x", "arm,primecell";
801 reg = <0 0xe3cbc000 0 0x1000>;
803 clocks = <&clk_375m>;
804 clock-names = "apb_pclk";
808 ptm4_out_port: endpoint {
809 remote-endpoint = <&funnel1_in_port0>;
816 compatible = "arm,coresight-etm3x", "arm,primecell";
817 reg = <0 0xe3cbd000 0 0x1000>;
819 clocks = <&clk_375m>;
820 clock-names = "apb_pclk";
824 ptm5_out_port: endpoint {
825 remote-endpoint = <&funnel1_in_port1>;
832 compatible = "arm,coresight-etm3x", "arm,primecell";
833 reg = <0 0xe3cbe000 0 0x1000>;
835 clocks = <&clk_375m>;
836 clock-names = "apb_pclk";
840 ptm6_out_port: endpoint {
841 remote-endpoint = <&funnel1_in_port2>;
848 compatible = "arm,coresight-etm3x", "arm,primecell";
849 reg = <0 0xe3cbf000 0 0x1000>;
851 clocks = <&clk_375m>;
852 clock-names = "apb_pclk";
856 ptm7_out_port: endpoint {
857 remote-endpoint = <&funnel1_in_port3>;
864 compatible = "arm,coresight-etm3x", "arm,primecell";
865 reg = <0 0xe3cfc000 0 0x1000>;
867 clocks = <&clk_375m>;
868 clock-names = "apb_pclk";
872 ptm8_out_port: endpoint {
873 remote-endpoint = <&funnel2_in_port0>;
880 compatible = "arm,coresight-etm3x", "arm,primecell";
881 reg = <0 0xe3cfd000 0 0x1000>;
882 clocks = <&clk_375m>;
883 clock-names = "apb_pclk";
887 ptm9_out_port: endpoint {
888 remote-endpoint = <&funnel2_in_port1>;
895 compatible = "arm,coresight-etm3x", "arm,primecell";
896 reg = <0 0xe3cfe000 0 0x1000>;
898 clocks = <&clk_375m>;
899 clock-names = "apb_pclk";
903 ptm10_out_port: endpoint {
904 remote-endpoint = <&funnel2_in_port2>;
911 compatible = "arm,coresight-etm3x", "arm,primecell";
912 reg = <0 0xe3cff000 0 0x1000>;
914 clocks = <&clk_375m>;
915 clock-names = "apb_pclk";
919 ptm11_out_port: endpoint {
920 remote-endpoint = <&funnel2_in_port3>;
927 compatible = "arm,coresight-etm3x", "arm,primecell";
928 reg = <0 0xe3d3c000 0 0x1000>;
930 clocks = <&clk_375m>;
931 clock-names = "apb_pclk";
935 ptm12_out_port: endpoint {
936 remote-endpoint = <&funnel3_in_port0>;
943 compatible = "arm,coresight-etm3x", "arm,primecell";
944 reg = <0 0xe3d3d000 0 0x1000>;
946 clocks = <&clk_375m>;
947 clock-names = "apb_pclk";
951 ptm13_out_port: endpoint {
952 remote-endpoint = <&funnel3_in_port1>;
959 compatible = "arm,coresight-etm3x", "arm,primecell";
960 reg = <0 0xe3d3e000 0 0x1000>;
962 clocks = <&clk_375m>;
963 clock-names = "apb_pclk";
967 ptm14_out_port: endpoint {
968 remote-endpoint = <&funnel3_in_port2>;
975 compatible = "arm,coresight-etm3x", "arm,primecell";
976 reg = <0 0xe3d3f000 0 0x1000>;
978 clocks = <&clk_375m>;
979 clock-names = "apb_pclk";
983 ptm15_out_port: endpoint {
984 remote-endpoint = <&funnel3_in_port3>;