arch/arm/boot/dts/exynos5422-odroidxu4.dts

   1 /*
   2  * Hardkernel Odroid XU4 board device tree source
   3  *
   4  * Copyright (c) 2015 Krzysztof Kozlowski
   5  * Copyright (c) 2014 Collabora Ltd.
   6  * Copyright (c) 2013-2015 Samsung Electronics Co., Ltd.
   7  *              http://www.samsung.com
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12 */
  13
  14 /dts-v1/;
  15 #include <dt-bindings/sound/samsung-i2s.h>
  16 #include "exynos5422-odroidxu3-common.dtsi"
  17
  18 / {
  19         model = "Hardkernel Odroid XU4";
  20         compatible = "hardkernel,odroid-xu4", "samsung,exynos5800", \
  21                      "samsung,exynos5";
  22
  23         pwmleds {
  24                 compatible = "pwm-leds";
  25
  26                 blueled {
  27                         label = "blue:heartbeat";
  28                         pwms = <&pwm 2 2000000 0>;
  29                         pwm-names = "pwm2";
  30                         max_brightness = <255>;
  31                         linux,default-trigger = "heartbeat";
  32                 };
  33         };
  34
  35         sound: sound {
  36                 compatible = "samsung,odroid-xu3-audio";
  37                 model = "Odroid-XU4";
  38
  39                 assigned-clocks = <&i2s0 CLK_I2S_RCLK_SRC>,
  40                                 <&clock CLK_MOUT_EPLL>,
  41                                 <&clock CLK_MOUT_MAU_EPLL>,
  42                                 <&clock CLK_MOUT_USER_MAU_EPLL>,
  43                                 <&clock_audss EXYNOS_MOUT_AUDSS>,
  44                                 <&clock_audss EXYNOS_MOUT_I2S>,
  45                                 <&clock_audss EXYNOS_DOUT_SRP>,
  46                                 <&clock_audss EXYNOS_DOUT_AUD_BUS>,
  47                                 <&clock_audss EXYNOS_DOUT_I2S>;
  48
  49                 assigned-clock-parents = <&clock_audss EXYNOS_SCLK_I2S>,
  50                                 <&clock CLK_FOUT_EPLL>,
  51                                 <&clock CLK_MOUT_EPLL>,
  52                                 <&clock CLK_MOUT_MAU_EPLL>,
  53                                 <&clock CLK_MAU_EPLL>,
  54                                 <&clock_audss EXYNOS_MOUT_AUDSS>;
  55
  56                 assigned-clock-rates = <0>,
  57                                 <0>,
  58                                 <0>,
  59                                 <0>,
  60                                 <0>,
  61                                 <0>,
  62                                 <196608001>,
  63                                 <(196608002 / 2)>,
  64                                 <196608000>;
  65
  66                 cpu {
  67                         sound-dai = <&i2s0 0>;
  68                 };
  69
  70                 codec {
  71                         sound-dai = <&hdmi>;
  72                 };
  73         };
  74 };
  75
  76 &clock_audss {
  77         assigned-clocks = <&clock_audss EXYNOS_DOUT_SRP>,
  78                           <&clock CLK_FOUT_EPLL>;
  79         assigned-clock-rates = <(196608000 / 256)>,
  80                                <196608000>;
  81 };
  82
  83 &i2s0 {
  84         status = "okay";
  85 };
  86
  87 &pwm {
  88         /*
  89          * PWM 0 -- fan
  90          * PWM 2 -- Blue LED
  91          */
  92         pinctrl-0 = <&pwm0_out &pwm2_out>;
  93         pinctrl-names = "default";
  94         samsung,pwm-outputs = <0>, <2>;
  95         status = "okay";
  96 };
  97
  98 &usbdrd_dwc3_1 {
  99         dr_mode = "host";
 100 };