2 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
3 * applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
4 * AT91SAM9X25, AT91SAM9X35 SoC
6 * Copyright (C) 2012 Atmel,
7 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
9 * Licensed under GPLv2 or later.
12 #include "skeleton.dtsi"
13 #include <dt-bindings/dma/at91.h>
14 #include <dt-bindings/pinctrl/at91.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/clock/at91.h>
20 model = "Atmel AT91SAM9x5 family SoC";
21 compatible = "atmel,at91sam9x5";
22 interrupt-parent = <&aic>;
46 compatible = "arm,arm926ej-s";
52 reg = <0x20000000 0x10000000>;
56 slow_xtal: slow_xtal {
57 compatible = "fixed-clock";
59 clock-frequency = <0>;
62 main_xtal: main_xtal {
63 compatible = "fixed-clock";
65 clock-frequency = <0>;
68 adc_op_clk: adc_op_clk{
69 compatible = "fixed-clock";
71 clock-frequency = <1000000>;
76 compatible = "mmio-sram";
77 reg = <0x00300000 0x8000>;
81 compatible = "simple-bus";
87 compatible = "simple-bus";
92 aic: interrupt-controller@fffff000 {
93 #interrupt-cells = <3>;
94 compatible = "atmel,at91rm9200-aic";
96 reg = <0xfffff000 0x200>;
97 atmel,external-irqs = <31>;
100 matrix: matrix@ffffde00 {
101 compatible = "atmel,at91sam9x5-matrix", "syscon";
102 reg = <0xffffde00 0x100>;
105 pmecc: ecc-engine@ffffe000 {
106 compatible = "atmel,at91sam9g45-pmecc";
107 reg = <0xffffe000 0x600>,
111 ramc0: ramc@ffffe800 {
112 compatible = "atmel,at91sam9g45-ddramc";
113 reg = <0xffffe800 0x200>;
114 clocks = <&pmc PMC_TYPE_SYSTEM 2>;
115 clock-names = "ddrck";
119 compatible = "atmel,at91sam9260-smc", "syscon";
120 reg = <0xffffea00 0x200>;
124 compatible = "atmel,at91sam9x5-pmc", "syscon";
125 reg = <0xfffffc00 0x200>;
126 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
128 clocks = <&clk32k>, <&main_xtal>;
129 clock-names = "slow_clk", "main_xtal";
132 reset_controller: rstc@fffffe00 {
133 compatible = "atmel,at91sam9g45-rstc";
134 reg = <0xfffffe00 0x10>;
138 shutdown_controller: shdwc@fffffe10 {
139 compatible = "atmel,at91sam9x5-shdwc";
140 reg = <0xfffffe10 0x10>;
144 pit: timer@fffffe30 {
145 compatible = "atmel,at91sam9260-pit";
146 reg = <0xfffffe30 0xf>;
147 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
148 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
152 compatible = "atmel,at91sam9x5-sckc";
153 reg = <0xfffffe50 0x4>;
156 compatible = "atmel,at91sam9x5-clk-slow-osc";
158 clocks = <&slow_xtal>;
161 slow_rc_osc: slow_rc_osc {
162 compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
164 clock-frequency = <32768>;
165 clock-accuracy = <50000000>;
169 compatible = "atmel,at91sam9x5-clk-slow";
171 clocks = <&slow_rc_osc>, <&slow_osc>;
175 tcb0: timer@f8008000 {
176 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
177 #address-cells = <1>;
179 reg = <0xf8008000 0x100>;
180 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
181 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>;
182 clock-names = "t0_clk", "slow_clk";
185 tcb1: timer@f800c000 {
186 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
187 #address-cells = <1>;
189 reg = <0xf800c000 0x100>;
190 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
191 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>;
192 clock-names = "t0_clk", "slow_clk";
195 dma0: dma-controller@ffffec00 {
196 compatible = "atmel,at91sam9g45-dma";
197 reg = <0xffffec00 0x200>;
198 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
200 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
201 clock-names = "dma_clk";
204 dma1: dma-controller@ffffee00 {
205 compatible = "atmel,at91sam9g45-dma";
206 reg = <0xffffee00 0x200>;
207 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
209 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
210 clock-names = "dma_clk";
213 pinctrl: pinctrl@fffff400 {
214 #address-cells = <1>;
216 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
217 ranges = <0xfffff400 0xfffff400 0x800>;
219 /* shared pinctrl settings */
221 pinctrl_dbgu: dbgu-0 {
223 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
224 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
229 pinctrl_ebi_data_0_7: ebi-data-lsb-0 {
231 <AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE
232 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE
233 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE
234 AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE
235 AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE
236 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE
237 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE
238 AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
241 pinctrl_ebi_data_8_15: ebi-data-msb-0 {
243 <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE
244 AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE
245 AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE
246 AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE
247 AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE
248 AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE
249 AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE
250 AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
253 pinctrl_ebi_addr_nand: ebi-addr-0 {
255 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE
256 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;
261 pinctrl_usart0: usart0-0 {
263 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE
264 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
267 pinctrl_usart0_rts: usart0_rts-0 {
269 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A */
272 pinctrl_usart0_cts: usart0_cts-0 {
274 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA3 periph A */
277 pinctrl_usart0_sck: usart0_sck-0 {
279 <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */
284 pinctrl_usart1: usart1-0 {
286 <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE
287 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
290 pinctrl_usart1_rts: usart1_rts-0 {
292 <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC27 periph C */
295 pinctrl_usart1_cts: usart1_cts-0 {
297 <AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C */
300 pinctrl_usart1_sck: usart1_sck-0 {
302 <AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC29 periph C */
307 pinctrl_usart2: usart2-0 {
309 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE
310 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
313 pinctrl_usart2_rts: usart2_rts-0 {
315 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
318 pinctrl_usart2_cts: usart2_cts-0 {
320 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
323 pinctrl_usart2_sck: usart2_sck-0 {
325 <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */
330 pinctrl_uart0: uart0-0 {
332 <AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC8 periph C */
333 AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>; /* PC9 periph C with pullup */
338 pinctrl_uart1: uart1-0 {
340 <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC16 periph C */
341 AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>; /* PC17 periph C with pullup */
346 pinctrl_nand_oe_we: nand-oe-we-0 {
348 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE
349 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
352 pinctrl_nand_rb: nand-rb-0 {
354 <AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
357 pinctrl_nand_cs: nand-cs-0 {
359 <AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
364 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
366 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
367 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
368 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA15 periph A with pullup */
371 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
373 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
374 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
375 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
380 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
382 <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA13 periph B */
383 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA12 periph B with pullup */
384 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA11 periph B with pullup */
387 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
389 <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA2 periph B with pullup */
390 AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA3 periph B with pullup */
391 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA4 periph B with pullup */
396 pinctrl_ssc0_tx: ssc0_tx-0 {
398 <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
399 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
400 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */
403 pinctrl_ssc0_rx: ssc0_rx-0 {
405 <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
406 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
407 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
412 pinctrl_spi0: spi0-0 {
414 <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A SPI0_MISO pin */
415 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A SPI0_MOSI pin */
416 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */
421 pinctrl_spi1: spi1-0 {
423 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA21 periph B SPI1_MISO pin */
424 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B SPI1_MOSI pin */
425 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */
430 pinctrl_i2c0: i2c0-0 {
432 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A I2C0 data */
433 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A I2C0 clock */
438 pinctrl_i2c1: i2c1-0 {
440 <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC0 periph C I2C1 data */
441 AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC1 periph C I2C1 clock */
446 pinctrl_i2c2: i2c2-0 {
448 <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B I2C2 data */
449 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B I2C2 clock */
454 pinctrl_i2c_gpio0: i2c_gpio0-0 {
456 <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA30 gpio multidrive I2C0 data */
457 AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PA31 gpio multidrive I2C0 clock */
462 pinctrl_i2c_gpio1: i2c_gpio1-0 {
464 <AT91_PIOC 0 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PC0 gpio multidrive I2C1 data */
465 AT91_PIOC 1 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PC1 gpio multidrive I2C1 clock */
470 pinctrl_i2c_gpio2: i2c_gpio2-0 {
472 <AT91_PIOB 4 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PB4 gpio multidrive I2C2 data */
473 AT91_PIOB 5 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PB5 gpio multidrive I2C2 clock */
478 pinctrl_pwm0_pwm0_0: pwm0_pwm0-0 {
480 <AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
482 pinctrl_pwm0_pwm0_1: pwm0_pwm0-1 {
484 <AT91_PIOC 10 AT91_PERIPH_C AT91_PINCTRL_NONE>;
486 pinctrl_pwm0_pwm0_2: pwm0_pwm0-2 {
488 <AT91_PIOC 18 AT91_PERIPH_C AT91_PINCTRL_NONE>;
491 pinctrl_pwm0_pwm1_0: pwm0_pwm1-0 {
493 <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>;
495 pinctrl_pwm0_pwm1_1: pwm0_pwm1-1 {
497 <AT91_PIOC 11 AT91_PERIPH_C AT91_PINCTRL_NONE>;
499 pinctrl_pwm0_pwm1_2: pwm0_pwm1-2 {
501 <AT91_PIOC 19 AT91_PERIPH_C AT91_PINCTRL_NONE>;
504 pinctrl_pwm0_pwm2_0: pwm0_pwm2-0 {
506 <AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
508 pinctrl_pwm0_pwm2_1: pwm0_pwm2-1 {
510 <AT91_PIOC 20 AT91_PERIPH_C AT91_PINCTRL_NONE>;
513 pinctrl_pwm0_pwm3_0: pwm0_pwm3-0 {
515 <AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
517 pinctrl_pwm0_pwm3_1: pwm0_pwm3-1 {
519 <AT91_PIOC 21 AT91_PERIPH_C AT91_PINCTRL_NONE>;
524 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
525 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
528 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
529 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
532 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
533 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
536 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
537 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
540 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
541 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
544 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
545 atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
548 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
549 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
552 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
553 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
556 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
557 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
562 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
563 atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>;
566 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
567 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;
570 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
571 atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>;
574 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
575 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>;
578 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
579 atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;
582 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
583 atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>;
586 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
587 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;
590 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
591 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;
594 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
595 atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>;
599 pioA: gpio@fffff400 {
600 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
601 reg = <0xfffff400 0x200>;
602 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
605 interrupt-controller;
606 #interrupt-cells = <2>;
607 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
610 pioB: gpio@fffff600 {
611 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
612 reg = <0xfffff600 0x200>;
613 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
617 interrupt-controller;
618 #interrupt-cells = <2>;
619 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
622 pioC: gpio@fffff800 {
623 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
624 reg = <0xfffff800 0x200>;
625 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
628 interrupt-controller;
629 #interrupt-cells = <2>;
630 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
633 pioD: gpio@fffffa00 {
634 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
635 reg = <0xfffffa00 0x200>;
636 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
640 interrupt-controller;
641 #interrupt-cells = <2>;
642 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
647 compatible = "atmel,at91sam9g45-ssc";
648 reg = <0xf0010000 0x4000>;
649 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
650 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(13)>,
651 <&dma0 1 AT91_DMA_CFG_PER_ID(14)>;
652 dma-names = "tx", "rx";
653 pinctrl-names = "default";
654 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
655 clocks = <&pmc PMC_TYPE_PERIPHERAL 28>;
656 clock-names = "pclk";
661 compatible = "atmel,hsmci";
662 reg = <0xf0008000 0x600>;
663 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
664 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>;
666 pinctrl-names = "default";
667 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
668 clock-names = "mci_clk";
669 #address-cells = <1>;
675 compatible = "atmel,hsmci";
676 reg = <0xf000c000 0x600>;
677 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
678 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>;
680 pinctrl-names = "default";
681 clocks = <&pmc PMC_TYPE_PERIPHERAL 26>;
682 clock-names = "mci_clk";
683 #address-cells = <1>;
688 dbgu: serial@fffff200 {
689 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
690 reg = <0xfffff200 0x200>;
691 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
692 pinctrl-names = "default";
693 pinctrl-0 = <&pinctrl_dbgu>;
694 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(8)>,
695 <&dma1 1 (AT91_DMA_CFG_PER_ID(9) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
696 dma-names = "tx", "rx";
697 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
698 clock-names = "usart";
702 usart0: serial@f801c000 {
703 compatible = "atmel,at91sam9260-usart";
704 reg = <0xf801c000 0x200>;
705 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
706 pinctrl-names = "default";
707 pinctrl-0 = <&pinctrl_usart0>;
708 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(3)>,
709 <&dma0 1 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
710 dma-names = "tx", "rx";
711 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
712 clock-names = "usart";
716 usart1: serial@f8020000 {
717 compatible = "atmel,at91sam9260-usart";
718 reg = <0xf8020000 0x200>;
719 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
720 pinctrl-names = "default";
721 pinctrl-0 = <&pinctrl_usart1>;
722 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(5)>,
723 <&dma0 1 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
724 dma-names = "tx", "rx";
725 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
726 clock-names = "usart";
730 usart2: serial@f8024000 {
731 compatible = "atmel,at91sam9260-usart";
732 reg = <0xf8024000 0x200>;
733 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
734 pinctrl-names = "default";
735 pinctrl-0 = <&pinctrl_usart2>;
736 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(12)>,
737 <&dma1 1 (AT91_DMA_CFG_PER_ID(13) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
738 dma-names = "tx", "rx";
739 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
740 clock-names = "usart";
745 compatible = "atmel,at91sam9x5-i2c";
746 reg = <0xf8010000 0x100>;
747 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
748 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(7)>,
749 <&dma0 1 AT91_DMA_CFG_PER_ID(8)>;
750 dma-names = "tx", "rx";
751 #address-cells = <1>;
753 pinctrl-names = "default";
754 pinctrl-0 = <&pinctrl_i2c0>;
755 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
760 compatible = "atmel,at91sam9x5-i2c";
761 reg = <0xf8014000 0x100>;
762 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
763 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(5)>,
764 <&dma1 1 AT91_DMA_CFG_PER_ID(6)>;
765 dma-names = "tx", "rx";
766 #address-cells = <1>;
768 pinctrl-names = "default";
769 pinctrl-0 = <&pinctrl_i2c1>;
770 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
775 compatible = "atmel,at91sam9x5-i2c";
776 reg = <0xf8018000 0x100>;
777 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
778 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(9)>,
779 <&dma0 1 AT91_DMA_CFG_PER_ID(10)>;
780 dma-names = "tx", "rx";
781 #address-cells = <1>;
783 pinctrl-names = "default";
784 pinctrl-0 = <&pinctrl_i2c2>;
785 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
789 uart0: serial@f8040000 {
790 compatible = "atmel,at91sam9260-usart";
791 reg = <0xf8040000 0x200>;
792 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
793 pinctrl-names = "default";
794 pinctrl-0 = <&pinctrl_uart0>;
795 clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
796 clock-names = "usart";
800 uart1: serial@f8044000 {
801 compatible = "atmel,at91sam9260-usart";
802 reg = <0xf8044000 0x200>;
803 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
804 pinctrl-names = "default";
805 pinctrl-0 = <&pinctrl_uart1>;
806 clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
807 clock-names = "usart";
812 #address-cells = <1>;
814 compatible = "atmel,at91sam9x5-adc";
815 reg = <0xf804c000 0x100>;
816 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
817 clocks = <&pmc PMC_TYPE_PERIPHERAL 19>,
819 clock-names = "adc_clk", "adc_op_clk";
820 atmel,adc-use-external-triggers;
821 atmel,adc-channels-used = <0xffff>;
822 atmel,adc-vref = <3300>;
823 atmel,adc-startup-time = <40>;
824 atmel,adc-sample-hold-time = <11>;
825 atmel,adc-res = <8 10>;
826 atmel,adc-res-names = "lowres", "highres";
827 atmel,adc-use-res = "highres";
830 trigger-name = "external-rising";
831 trigger-value = <0x1>;
836 trigger-name = "external-falling";
837 trigger-value = <0x2>;
842 trigger-name = "external-any";
843 trigger-value = <0x3>;
848 trigger-name = "continuous";
849 trigger-value = <0x6>;
854 #address-cells = <1>;
856 compatible = "atmel,at91rm9200-spi";
857 reg = <0xf0000000 0x100>;
858 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
859 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(1)>,
860 <&dma0 1 AT91_DMA_CFG_PER_ID(2)>;
861 dma-names = "tx", "rx";
862 pinctrl-names = "default";
863 pinctrl-0 = <&pinctrl_spi0>;
864 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
865 clock-names = "spi_clk";
870 #address-cells = <1>;
872 compatible = "atmel,at91rm9200-spi";
873 reg = <0xf0004000 0x100>;
874 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
875 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(1)>,
876 <&dma1 1 AT91_DMA_CFG_PER_ID(2)>;
877 dma-names = "tx", "rx";
878 pinctrl-names = "default";
879 pinctrl-0 = <&pinctrl_spi1>;
880 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
881 clock-names = "spi_clk";
885 usb2: gadget@f803c000 {
886 #address-cells = <1>;
888 compatible = "atmel,at91sam9g45-udc";
889 reg = <0x00500000 0x80000
891 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
892 clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 23>;
893 clock-names = "hclk", "pclk";
898 atmel,fifo-size = <64>;
899 atmel,nb-banks = <1>;
904 atmel,fifo-size = <1024>;
905 atmel,nb-banks = <2>;
912 atmel,fifo-size = <1024>;
913 atmel,nb-banks = <2>;
920 atmel,fifo-size = <1024>;
921 atmel,nb-banks = <3>;
927 atmel,fifo-size = <1024>;
928 atmel,nb-banks = <3>;
934 atmel,fifo-size = <1024>;
935 atmel,nb-banks = <3>;
942 atmel,fifo-size = <1024>;
943 atmel,nb-banks = <3>;
949 watchdog: watchdog@fffffe40 {
950 compatible = "atmel,at91sam9260-wdt";
951 reg = <0xfffffe40 0x10>;
952 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
954 atmel,watchdog-type = "hardware";
955 atmel,reset-type = "all";
961 compatible = "atmel,at91sam9x5-rtc";
962 reg = <0xfffffeb0 0x40>;
963 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
969 compatible = "atmel,at91sam9rl-pwm";
970 reg = <0xf8034000 0x300>;
971 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
972 clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
979 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
980 reg = <0x00600000 0x100000>;
981 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
982 clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 6>;
983 clock-names = "ohci_clk", "hclk", "uhpck";
988 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
989 reg = <0x00700000 0x100000>;
990 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
991 clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 22>;
992 clock-names = "usb_clk", "ehci_clk";
997 compatible = "atmel,at91sam9x5-ebi";
998 #address-cells = <2>;
1001 atmel,matrix = <&matrix>;
1002 reg = <0x10000000 0x60000000>;
1003 ranges = <0x0 0x0 0x10000000 0x10000000
1004 0x1 0x0 0x20000000 0x10000000
1005 0x2 0x0 0x30000000 0x10000000
1006 0x3 0x0 0x40000000 0x10000000
1007 0x4 0x0 0x50000000 0x10000000
1008 0x5 0x0 0x60000000 0x10000000>;
1009 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
1010 status = "disabled";
1012 nand_controller: nand-controller {
1013 compatible = "atmel,at91sam9g45-nand-controller";
1014 ecc-engine = <&pmecc>;
1015 #address-cells = <2>;
1018 status = "disabled";
1024 compatible = "i2c-gpio";
1025 gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
1026 &pioA 31 GPIO_ACTIVE_HIGH /* scl */
1028 i2c-gpio,sda-open-drain;
1029 i2c-gpio,scl-open-drain;
1030 i2c-gpio,delay-us = <2>; /* ~100 kHz */
1031 #address-cells = <1>;
1033 pinctrl-names = "default";
1034 pinctrl-0 = <&pinctrl_i2c_gpio0>;
1035 status = "disabled";
1039 compatible = "i2c-gpio";
1040 gpios = <&pioC 0 GPIO_ACTIVE_HIGH /* sda */
1041 &pioC 1 GPIO_ACTIVE_HIGH /* scl */
1043 i2c-gpio,sda-open-drain;
1044 i2c-gpio,scl-open-drain;
1045 i2c-gpio,delay-us = <2>; /* ~100 kHz */
1046 #address-cells = <1>;
1048 pinctrl-names = "default";
1049 pinctrl-0 = <&pinctrl_i2c_gpio1>;
1050 status = "disabled";
1054 compatible = "i2c-gpio";
1055 gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
1056 &pioB 5 GPIO_ACTIVE_HIGH /* scl */
1058 i2c-gpio,sda-open-drain;
1059 i2c-gpio,scl-open-drain;
1060 i2c-gpio,delay-us = <2>; /* ~100 kHz */
1061 #address-cells = <1>;
1063 pinctrl-names = "default";
1064 pinctrl-0 = <&pinctrl_i2c_gpio2>;
1065 status = "disabled";