2 * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC
4 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
6 * Licensed under GPLv2 only.
9 #include "skeleton.dtsi"
10 #include <dt-bindings/pinctrl/at91.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/clock/at91.h>
16 model = "Atmel AT91SAM9263 family SoC";
17 compatible = "atmel,at91sam9263";
18 interrupt-parent = <&aic>;
42 compatible = "arm,arm926ej-s";
48 reg = <0x20000000 0x08000000>;
52 main_xtal: main_xtal {
53 compatible = "fixed-clock";
55 clock-frequency = <0>;
58 slow_xtal: slow_xtal {
59 compatible = "fixed-clock";
61 clock-frequency = <0>;
66 compatible = "mmio-sram";
67 reg = <0x00300000 0x14000>;
71 compatible = "mmio-sram";
72 reg = <0x00500000 0x4000>;
76 compatible = "simple-bus";
82 compatible = "simple-bus";
87 aic: interrupt-controller@fffff000 {
88 #interrupt-cells = <3>;
89 compatible = "atmel,at91rm9200-aic";
91 reg = <0xfffff000 0x200>;
92 atmel,external-irqs = <30 31>;
96 compatible = "atmel,at91sam9263-pmc", "syscon";
97 reg = <0xfffffc00 0x100>;
98 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
100 clocks = <&slow_xtal>, <&main_xtal>;
101 clock-names = "slow_xtal", "main_xtal";
104 ramc0: ramc@ffffe200 {
105 compatible = "atmel,at91sam9260-sdramc";
106 reg = <0xffffe200 0x200>;
110 compatible = "atmel,at91sam9260-smc", "syscon";
111 reg = <0xffffe400 0x200>;
114 ramc1: ramc@ffffe800 {
115 compatible = "atmel,at91sam9260-sdramc";
116 reg = <0xffffe800 0x200>;
120 compatible = "atmel,at91sam9260-smc", "syscon";
121 reg = <0xffffea00 0x200>;
124 matrix: matrix@ffffec00 {
125 compatible = "atmel,at91sam9263-matrix", "syscon";
126 reg = <0xffffec00 0x200>;
129 pit: timer@fffffd30 {
130 compatible = "atmel,at91sam9260-pit";
131 reg = <0xfffffd30 0xf>;
132 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
133 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
136 tcb0: timer@fff7c000 {
137 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
138 #address-cells = <1>;
140 reg = <0xfff7c000 0x100>;
141 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
142 clocks = <&pmc PMC_TYPE_PERIPHERAL 19>, <&slow_xtal>;
143 clock-names = "t0_clk", "slow_clk";
147 compatible = "atmel,at91sam9260-rstc";
148 reg = <0xfffffd00 0x10>;
149 clocks = <&slow_xtal>;
153 compatible = "atmel,at91sam9260-shdwc";
154 reg = <0xfffffd10 0x10>;
155 clocks = <&slow_xtal>;
159 #address-cells = <1>;
161 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
162 ranges = <0xfffff200 0xfffff200 0xa00>;
166 0xfffffffb 0xffffe07f /* pioA */
167 0x0007ffff 0x39072fff /* pioB */
168 0xffffffff 0x3ffffff8 /* pioC */
169 0xfffffbff 0xffffffff /* pioD */
170 0xffe00fff 0xfbfcff00 /* pioE */
173 /* shared pinctrl settings */
175 pinctrl_dbgu: dbgu-0 {
177 <AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
178 AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
183 pinctrl_usart0: usart0-0 {
185 <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE
186 AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
189 pinctrl_usart0_rts: usart0_rts-0 {
191 <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA28 periph A */
194 pinctrl_usart0_cts: usart0_cts-0 {
196 <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA29 periph A */
201 pinctrl_usart1: usart1-0 {
203 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE
204 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
207 pinctrl_usart1_rts: usart1_rts-0 {
209 <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD7 periph B */
212 pinctrl_usart1_cts: usart1_cts-0 {
214 <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD8 periph B */
219 pinctrl_usart2: usart2-0 {
221 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE
222 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
225 pinctrl_usart2_rts: usart2_rts-0 {
227 <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD5 periph B */
230 pinctrl_usart2_cts: usart2_cts-0 {
232 <AT91_PIOD 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD6 periph B */
237 pinctrl_nand_rb: nand-rb-0 {
239 <AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
242 pinctrl_nand_cs: nand-cs-0 {
244 <AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
249 pinctrl_macb_rmii: macb_rmii-0 {
251 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */
252 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */
253 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */
254 AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */
255 AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */
256 AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */
257 AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */
258 AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */
259 AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */
260 AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */
263 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
265 <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */
266 AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */
267 AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC22 periph B */
268 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC23 periph B */
269 AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC24 periph B */
270 AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */
271 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */
272 AT91_PIOE 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE22 periph B */
277 pinctrl_mmc0_clk: mmc0_clk-0 {
279 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA12 periph A */
282 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
284 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
285 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA0 periph A with pullup */
288 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
290 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */
291 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */
292 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */
295 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
297 <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
298 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA17 periph A with pullup */
301 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
303 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
304 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
305 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
310 pinctrl_mmc1_clk: mmc1_clk-0 {
312 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */
315 pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 {
317 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
318 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA8 periph A with pullup */
321 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
323 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */
324 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */
325 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */
328 pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 {
330 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA21 periph A with pullup */
331 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA22 periph A with pullup */
334 pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 {
336 <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA23 periph A with pullup */
337 AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */
338 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA25 periph A with pullup */
343 pinctrl_ssc0_tx: ssc0_tx-0 {
345 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB0 periph B */
346 AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB1 periph B */
347 AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */
350 pinctrl_ssc0_rx: ssc0_rx-0 {
352 <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B */
353 AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B */
354 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B */
359 pinctrl_ssc1_tx: ssc1_tx-0 {
361 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
362 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
363 AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
366 pinctrl_ssc1_rx: ssc1_rx-0 {
368 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
369 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */
370 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
375 pinctrl_spi0: spi0-0 {
377 <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA0 periph B SPI0_MISO pin */
378 AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA1 periph B SPI0_MOSI pin */
379 AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA2 periph B SPI0_SPCK pin */
384 pinctrl_spi1: spi1-0 {
386 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A SPI1_MISO pin */
387 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A SPI1_MOSI pin */
388 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A SPI1_SPCK pin */
393 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
394 atmel,pins = <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
397 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
398 atmel,pins = <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
401 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
402 atmel,pins = <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
405 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
406 atmel,pins = <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
409 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
410 atmel,pins = <AT91_PIOE 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
413 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
414 atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
417 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
418 atmel,pins = <AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
421 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
422 atmel,pins = <AT91_PIOE 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
425 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
426 atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
433 <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC1 periph A */
434 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC2 periph A */
435 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC3 periph A */
436 AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB9 periph B */
437 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 periph A */
438 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 periph A */
439 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 periph A */
440 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC9 periph A */
441 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC10 periph A */
442 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC11 periph A */
443 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC14 periph A */
444 AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC15 periph A */
445 AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A */
446 AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC12 periph B */
447 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC18 periph A */
448 AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A */
449 AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A */
450 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A */
451 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC24 periph A */
452 AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC17 periph B */
453 AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC26 periph A */
454 AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC27 periph A */
459 pinctrl_can_rx_tx: can_rx_tx {
461 <AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* CANRX, conflicts with IRQ0 */
462 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* CANTX, conflicts with PCK0 */
467 pinctrl_ac97: ac97-0 {
469 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A AC97FS pin */
470 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A AC97CK pin */
471 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A AC97TX pin */
472 AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A AC97RX pin */
476 pioA: gpio@fffff200 {
477 compatible = "atmel,at91rm9200-gpio";
478 reg = <0xfffff200 0x200>;
479 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
482 interrupt-controller;
483 #interrupt-cells = <2>;
484 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
487 pioB: gpio@fffff400 {
488 compatible = "atmel,at91rm9200-gpio";
489 reg = <0xfffff400 0x200>;
490 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
493 interrupt-controller;
494 #interrupt-cells = <2>;
495 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
498 pioC: gpio@fffff600 {
499 compatible = "atmel,at91rm9200-gpio";
500 reg = <0xfffff600 0x200>;
501 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
504 interrupt-controller;
505 #interrupt-cells = <2>;
506 clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
509 pioD: gpio@fffff800 {
510 compatible = "atmel,at91rm9200-gpio";
511 reg = <0xfffff800 0x200>;
512 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
515 interrupt-controller;
516 #interrupt-cells = <2>;
517 clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
520 pioE: gpio@fffffa00 {
521 compatible = "atmel,at91rm9200-gpio";
522 reg = <0xfffffa00 0x200>;
523 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
526 interrupt-controller;
527 #interrupt-cells = <2>;
528 clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
532 dbgu: serial@ffffee00 {
533 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
534 reg = <0xffffee00 0x200>;
535 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
536 pinctrl-names = "default";
537 pinctrl-0 = <&pinctrl_dbgu>;
538 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
539 clock-names = "usart";
543 usart0: serial@fff8c000 {
544 compatible = "atmel,at91sam9260-usart";
545 reg = <0xfff8c000 0x200>;
546 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
549 pinctrl-names = "default";
550 pinctrl-0 = <&pinctrl_usart0>;
551 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
552 clock-names = "usart";
556 usart1: serial@fff90000 {
557 compatible = "atmel,at91sam9260-usart";
558 reg = <0xfff90000 0x200>;
559 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
562 pinctrl-names = "default";
563 pinctrl-0 = <&pinctrl_usart1>;
564 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
565 clock-names = "usart";
569 usart2: serial@fff94000 {
570 compatible = "atmel,at91sam9260-usart";
571 reg = <0xfff94000 0x200>;
572 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
575 pinctrl-names = "default";
576 pinctrl-0 = <&pinctrl_usart2>;
577 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
578 clock-names = "usart";
583 compatible = "atmel,at91rm9200-ssc";
584 reg = <0xfff98000 0x4000>;
585 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
586 pinctrl-names = "default";
587 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
588 clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
589 clock-names = "pclk";
594 compatible = "atmel,at91rm9200-ssc";
595 reg = <0xfff9c000 0x4000>;
596 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
597 pinctrl-names = "default";
598 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
599 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>;
600 clock-names = "pclk";
604 ac97: sound@fffa0000 {
605 compatible = "atmel,at91sam9263-ac97c";
606 reg = <0xfffa0000 0x4000>;
607 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 5>;
608 pinctrl-names = "default";
609 pinctrl-0 = <&pinctrl_ac97>;
610 clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
611 clock-names = "ac97_clk";
615 macb0: ethernet@fffbc000 {
616 compatible = "cdns,at91sam9260-macb", "cdns,macb";
617 reg = <0xfffbc000 0x100>;
618 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
619 pinctrl-names = "default";
620 pinctrl-0 = <&pinctrl_macb_rmii>;
621 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>, <&pmc PMC_TYPE_PERIPHERAL 21>;
622 clock-names = "hclk", "pclk";
626 usb1: gadget@fff78000 {
627 compatible = "atmel,at91sam9263-udc";
628 reg = <0xfff78000 0x4000>;
629 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>;
630 clocks = <&pmc PMC_TYPE_PERIPHERAL 24>, <&pmc PMC_TYPE_SYSTEM 7>;
631 clock-names = "pclk", "hclk";
636 compatible = "atmel,at91sam9260-i2c";
637 reg = <0xfff88000 0x100>;
638 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
639 #address-cells = <1>;
641 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
646 compatible = "atmel,hsmci";
647 reg = <0xfff80000 0x600>;
648 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
649 pinctrl-names = "default";
650 #address-cells = <1>;
652 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
653 clock-names = "mci_clk";
658 compatible = "atmel,hsmci";
659 reg = <0xfff84000 0x600>;
660 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
661 pinctrl-names = "default";
662 #address-cells = <1>;
664 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
665 clock-names = "mci_clk";
670 compatible = "atmel,at91sam9260-wdt";
671 reg = <0xfffffd40 0x10>;
672 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
673 clocks = <&slow_xtal>;
674 atmel,watchdog-type = "hardware";
675 atmel,reset-type = "all";
681 #address-cells = <1>;
683 compatible = "atmel,at91rm9200-spi";
684 reg = <0xfffa4000 0x200>;
685 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
686 pinctrl-names = "default";
687 pinctrl-0 = <&pinctrl_spi0>;
688 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
689 clock-names = "spi_clk";
694 #address-cells = <1>;
696 compatible = "atmel,at91rm9200-spi";
697 reg = <0xfffa8000 0x200>;
698 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 3>;
699 pinctrl-names = "default";
700 pinctrl-0 = <&pinctrl_spi1>;
701 clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
702 clock-names = "spi_clk";
707 compatible = "atmel,at91sam9rl-pwm";
708 reg = <0xfffb8000 0x300>;
709 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 4>;
711 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
712 clock-names = "pwm_clk";
717 compatible = "atmel,at91sam9263-can";
718 reg = <0xfffac000 0x300>;
719 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
720 pinctrl-names = "default";
721 pinctrl-0 = <&pinctrl_can_rx_tx>;
722 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
723 clock-names = "can_clk";
727 compatible = "atmel,at91sam9260-rtt";
728 reg = <0xfffffd20 0x10>;
729 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
730 clocks = <&slow_xtal>;
735 compatible = "atmel,at91sam9260-rtt";
736 reg = <0xfffffd50 0x10>;
737 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
738 clocks = <&slow_xtal>;
742 gpbr: syscon@fffffd60 {
743 compatible = "atmel,at91sam9260-gpbr", "syscon";
744 reg = <0xfffffd60 0x50>;
750 compatible = "atmel,at91sam9263-lcdc";
751 reg = <0x00700000 0x1000>;
752 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 3>;
753 pinctrl-names = "default";
754 pinctrl-0 = <&pinctrl_fb>;
755 clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&pmc PMC_TYPE_PERIPHERAL 26>;
756 clock-names = "lcdc_clk", "hclk";
761 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
762 reg = <0x00a00000 0x100000>;
763 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 2>;
764 clocks = <&pmc PMC_TYPE_PERIPHERAL 29>, <&pmc PMC_TYPE_PERIPHERAL 29>, <&pmc PMC_TYPE_SYSTEM 6>;
765 clock-names = "ohci_clk", "hclk", "uhpck";
770 compatible = "atmel,at91sam9263-ebi0";
771 #address-cells = <2>;
774 atmel,matrix = <&matrix>;
775 reg = <0x10000000 0x80000000>;
776 ranges = <0x0 0x0 0x10000000 0x10000000
777 0x1 0x0 0x20000000 0x10000000
778 0x2 0x0 0x30000000 0x10000000
779 0x3 0x0 0x40000000 0x10000000
780 0x4 0x0 0x50000000 0x10000000
781 0x5 0x0 0x60000000 0x10000000>;
782 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
785 nand_controller0: nand-controller {
786 compatible = "atmel,at91sam9260-nand-controller";
787 #address-cells = <2>;
795 compatible = "atmel,at91sam9263-ebi1";
796 #address-cells = <2>;
799 atmel,matrix = <&matrix>;
800 reg = <0x80000000 0x20000000>;
801 ranges = <0x0 0x0 0x80000000 0x10000000
802 0x1 0x0 0x90000000 0x10000000>;
803 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
806 nand_controller1: nand-controller {
807 compatible = "atmel,at91sam9260-nand-controller";
808 #address-cells = <2>;
817 compatible = "i2c-gpio";
818 gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
819 &pioB 5 GPIO_ACTIVE_HIGH /* scl */
821 i2c-gpio,sda-open-drain;
822 i2c-gpio,scl-open-drain;
823 i2c-gpio,delay-us = <2>; /* ~100 kHz */
824 #address-cells = <1>;