2 * Device Tree Source for AM4372 SoC
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include "skeleton.dtsi"
17 compatible = "ti,am4372", "ti,am43";
18 interrupt-parent = <&gic>;
26 ethernet0 = &cpsw_emac0;
27 ethernet1 = &cpsw_emac1;
34 compatible = "arm,cortex-a9";
38 clocks = <&dpll_mpu_ck>;
41 clock-latency = <300000>; /* From omap-cpufreq driver */
45 gic: interrupt-controller@48241000 {
46 compatible = "arm,cortex-a9-gic";
48 #interrupt-cells = <3>;
49 reg = <0x48241000 0x1000>,
53 l2-cache-controller@48242000 {
54 compatible = "arm,pl310-cache";
55 reg = <0x48242000 0x1000>;
60 am43xx_pinmux: pinmux@44e10800 {
61 compatible = "pinctrl-single";
62 reg = <0x44e10800 0x31c>;
65 pinctrl-single,register-width = <32>;
66 pinctrl-single,function-mask = <0xffffffff>;
70 compatible = "simple-bus";
74 ti,hwmods = "l3_main";
77 compatible = "ti,am4-prcm";
78 reg = <0x44df0000 0x11000>;
85 prcm_clockdomains: clockdomains {
90 compatible = "ti,am4-scrm";
91 reg = <0x44e10000 0x2000>;
98 scrm_clockdomains: clockdomains {
102 edma: edma@49000000 {
103 compatible = "ti,edma3";
104 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
105 reg = <0x49000000 0x10000>,
107 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
108 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
109 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
112 ti,edma-regions = <4>;
113 ti,edma-slots = <256>;
116 uart0: serial@44e09000 {
117 compatible = "ti,am4372-uart","ti,omap2-uart";
118 reg = <0x44e09000 0x2000>;
119 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
123 uart1: serial@48022000 {
124 compatible = "ti,am4372-uart","ti,omap2-uart";
125 reg = <0x48022000 0x2000>;
126 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
131 uart2: serial@48024000 {
132 compatible = "ti,am4372-uart","ti,omap2-uart";
133 reg = <0x48024000 0x2000>;
134 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
139 uart3: serial@481a6000 {
140 compatible = "ti,am4372-uart","ti,omap2-uart";
141 reg = <0x481a6000 0x2000>;
142 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
147 uart4: serial@481a8000 {
148 compatible = "ti,am4372-uart","ti,omap2-uart";
149 reg = <0x481a8000 0x2000>;
150 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
155 uart5: serial@481aa000 {
156 compatible = "ti,am4372-uart","ti,omap2-uart";
157 reg = <0x481aa000 0x2000>;
158 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
163 mailbox: mailbox@480C8000 {
164 compatible = "ti,omap4-mailbox";
165 reg = <0x480C8000 0x200>;
166 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
167 ti,hwmods = "mailbox";
168 ti,mbox-num-users = <4>;
169 ti,mbox-num-fifos = <8>;
170 ti,mbox-names = "wkup_m3";
171 ti,mbox-data = <0 0 0 0>;
175 timer1: timer@44e31000 {
176 compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms";
177 reg = <0x44e31000 0x400>;
178 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
180 ti,hwmods = "timer1";
183 timer2: timer@48040000 {
184 compatible = "ti,am4372-timer","ti,am335x-timer";
185 reg = <0x48040000 0x400>;
186 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
187 ti,hwmods = "timer2";
190 timer3: timer@48042000 {
191 compatible = "ti,am4372-timer","ti,am335x-timer";
192 reg = <0x48042000 0x400>;
193 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
194 ti,hwmods = "timer3";
198 timer4: timer@48044000 {
199 compatible = "ti,am4372-timer","ti,am335x-timer";
200 reg = <0x48044000 0x400>;
201 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
203 ti,hwmods = "timer4";
207 timer5: timer@48046000 {
208 compatible = "ti,am4372-timer","ti,am335x-timer";
209 reg = <0x48046000 0x400>;
210 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
212 ti,hwmods = "timer5";
216 timer6: timer@48048000 {
217 compatible = "ti,am4372-timer","ti,am335x-timer";
218 reg = <0x48048000 0x400>;
219 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
221 ti,hwmods = "timer6";
225 timer7: timer@4804a000 {
226 compatible = "ti,am4372-timer","ti,am335x-timer";
227 reg = <0x4804a000 0x400>;
228 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
230 ti,hwmods = "timer7";
234 timer8: timer@481c1000 {
235 compatible = "ti,am4372-timer","ti,am335x-timer";
236 reg = <0x481c1000 0x400>;
237 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
238 ti,hwmods = "timer8";
242 timer9: timer@4833d000 {
243 compatible = "ti,am4372-timer","ti,am335x-timer";
244 reg = <0x4833d000 0x400>;
245 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
246 ti,hwmods = "timer9";
250 timer10: timer@4833f000 {
251 compatible = "ti,am4372-timer","ti,am335x-timer";
252 reg = <0x4833f000 0x400>;
253 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
254 ti,hwmods = "timer10";
258 timer11: timer@48341000 {
259 compatible = "ti,am4372-timer","ti,am335x-timer";
260 reg = <0x48341000 0x400>;
261 interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
262 ti,hwmods = "timer11";
266 counter32k: counter@44e86000 {
267 compatible = "ti,am4372-counter32k","ti,omap-counter32k";
268 reg = <0x44e86000 0x40>;
269 ti,hwmods = "counter_32k";
273 compatible = "ti,am4372-rtc","ti,da830-rtc";
274 reg = <0x44e3e000 0x1000>;
275 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH
276 GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
282 compatible = "ti,am4372-wdt","ti,omap3-wdt";
283 reg = <0x44e35000 0x1000>;
284 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
285 ti,hwmods = "wd_timer2";
288 gpio0: gpio@44e07000 {
289 compatible = "ti,am4372-gpio","ti,omap4-gpio";
290 reg = <0x44e07000 0x1000>;
291 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
294 interrupt-controller;
295 #interrupt-cells = <2>;
300 gpio1: gpio@4804c000 {
301 compatible = "ti,am4372-gpio","ti,omap4-gpio";
302 reg = <0x4804c000 0x1000>;
303 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
306 interrupt-controller;
307 #interrupt-cells = <2>;
312 gpio2: gpio@481ac000 {
313 compatible = "ti,am4372-gpio","ti,omap4-gpio";
314 reg = <0x481ac000 0x1000>;
315 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
318 interrupt-controller;
319 #interrupt-cells = <2>;
324 gpio3: gpio@481ae000 {
325 compatible = "ti,am4372-gpio","ti,omap4-gpio";
326 reg = <0x481ae000 0x1000>;
327 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
330 interrupt-controller;
331 #interrupt-cells = <2>;
336 gpio4: gpio@48320000 {
337 compatible = "ti,am4372-gpio","ti,omap4-gpio";
338 reg = <0x48320000 0x1000>;
339 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
342 interrupt-controller;
343 #interrupt-cells = <2>;
348 gpio5: gpio@48322000 {
349 compatible = "ti,am4372-gpio","ti,omap4-gpio";
350 reg = <0x48322000 0x1000>;
351 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
354 interrupt-controller;
355 #interrupt-cells = <2>;
360 hwspinlock: spinlock@480ca000 {
361 compatible = "ti,omap4-hwspinlock";
362 reg = <0x480ca000 0x1000>;
363 ti,hwmods = "spinlock";
368 compatible = "ti,am4372-i2c","ti,omap4-i2c";
369 reg = <0x44e0b000 0x1000>;
370 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
372 #address-cells = <1>;
378 compatible = "ti,am4372-i2c","ti,omap4-i2c";
379 reg = <0x4802a000 0x1000>;
380 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
382 #address-cells = <1>;
388 compatible = "ti,am4372-i2c","ti,omap4-i2c";
389 reg = <0x4819c000 0x1000>;
390 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
392 #address-cells = <1>;
398 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
399 reg = <0x48030000 0x400>;
400 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
402 #address-cells = <1>;
408 compatible = "ti,omap4-hsmmc";
409 reg = <0x48060000 0x1000>;
412 ti,needs-special-reset;
415 dma-names = "tx", "rx";
416 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
421 compatible = "ti,omap4-hsmmc";
422 reg = <0x481d8000 0x1000>;
424 ti,needs-special-reset;
427 dma-names = "tx", "rx";
428 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
433 compatible = "ti,omap4-hsmmc";
434 reg = <0x47810000 0x1000>;
436 ti,needs-special-reset;
437 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
442 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
443 reg = <0x481a0000 0x400>;
444 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
446 #address-cells = <1>;
452 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
453 reg = <0x481a2000 0x400>;
454 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
456 #address-cells = <1>;
462 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
463 reg = <0x481a4000 0x400>;
464 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
466 #address-cells = <1>;
472 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
473 reg = <0x48345000 0x400>;
474 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
476 #address-cells = <1>;
481 mac: ethernet@4a100000 {
482 compatible = "ti,am4372-cpsw","ti,cpsw";
483 reg = <0x4a100000 0x800
485 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH
486 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH
487 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH
488 GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
489 #address-cells = <1>;
491 ti,hwmods = "cpgmac0";
493 cpdma_channels = <8>;
494 ale_entries = <1024>;
495 bd_ram_size = <0x2000>;
498 mac_control = <0x20>;
501 cpts_clock_mult = <0x80000000>;
502 cpts_clock_shift = <29>;
505 davinci_mdio: mdio@4a101000 {
506 compatible = "ti,am4372-mdio","ti,davinci_mdio";
507 reg = <0x4a101000 0x100>;
508 #address-cells = <1>;
510 ti,hwmods = "davinci_mdio";
511 bus_freq = <1000000>;
515 cpsw_emac0: slave@4a100200 {
516 /* Filled in by U-Boot */
517 mac-address = [ 00 00 00 00 00 00 ];
520 cpsw_emac1: slave@4a100300 {
521 /* Filled in by U-Boot */
522 mac-address = [ 00 00 00 00 00 00 ];
526 epwmss0: epwmss@48300000 {
527 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
528 reg = <0x48300000 0x10>;
529 #address-cells = <1>;
532 ti,hwmods = "epwmss0";
535 ecap0: ecap@48300100 {
536 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
538 reg = <0x48300100 0x80>;
543 ehrpwm0: ehrpwm@48300200 {
544 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
546 reg = <0x48300200 0x80>;
547 ti,hwmods = "ehrpwm0";
552 epwmss1: epwmss@48302000 {
553 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
554 reg = <0x48302000 0x10>;
555 #address-cells = <1>;
558 ti,hwmods = "epwmss1";
561 ecap1: ecap@48302100 {
562 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
564 reg = <0x48302100 0x80>;
569 ehrpwm1: ehrpwm@48302200 {
570 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
572 reg = <0x48302200 0x80>;
573 ti,hwmods = "ehrpwm1";
578 epwmss2: epwmss@48304000 {
579 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
580 reg = <0x48304000 0x10>;
581 #address-cells = <1>;
584 ti,hwmods = "epwmss2";
587 ecap2: ecap@48304100 {
588 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
590 reg = <0x48304100 0x80>;
595 ehrpwm2: ehrpwm@48304200 {
596 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
598 reg = <0x48304200 0x80>;
599 ti,hwmods = "ehrpwm2";
604 epwmss3: epwmss@48306000 {
605 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
606 reg = <0x48306000 0x10>;
607 #address-cells = <1>;
610 ti,hwmods = "epwmss3";
613 ehrpwm3: ehrpwm@48306200 {
614 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
616 reg = <0x48306200 0x80>;
617 ti,hwmods = "ehrpwm3";
622 epwmss4: epwmss@48308000 {
623 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
624 reg = <0x48308000 0x10>;
625 #address-cells = <1>;
628 ti,hwmods = "epwmss4";
631 ehrpwm4: ehrpwm@48308200 {
632 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
634 reg = <0x48308200 0x80>;
635 ti,hwmods = "ehrpwm4";
640 epwmss5: epwmss@4830a000 {
641 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
642 reg = <0x4830a000 0x10>;
643 #address-cells = <1>;
646 ti,hwmods = "epwmss5";
649 ehrpwm5: ehrpwm@4830a200 {
650 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
652 reg = <0x4830a200 0x80>;
653 ti,hwmods = "ehrpwm5";
658 sham: sham@53100000 {
659 compatible = "ti,omap5-sham";
661 reg = <0x53100000 0x300>;
664 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
668 compatible = "ti,omap4-aes";
670 reg = <0x53501000 0xa0>;
671 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
674 dma-names = "tx", "rx";
678 compatible = "ti,omap4-des";
680 reg = <0x53701000 0xa0>;
681 interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
684 dma-names = "tx", "rx";
687 mcasp0: mcasp@48038000 {
688 compatible = "ti,am33xx-mcasp-audio";
689 ti,hwmods = "mcasp0";
690 reg = <0x48038000 0x2000>,
691 <0x46000000 0x400000>;
692 reg-names = "mpu", "dat";
693 interrupts = <80>, <81>;
694 interrupts-names = "tx", "rx";
698 dma-names = "tx", "rx";
701 mcasp1: mcasp@4803C000 {
702 compatible = "ti,am33xx-mcasp-audio";
703 ti,hwmods = "mcasp1";
704 reg = <0x4803C000 0x2000>,
705 <0x46400000 0x400000>;
706 reg-names = "mpu", "dat";
707 interrupts = <82>, <83>;
708 interrupts-names = "tx", "rx";
712 dma-names = "tx", "rx";
716 compatible = "ti,am3352-elm";
717 reg = <0x48080000 0x2000>;
718 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
720 clocks = <&l4ls_gclk>;
725 gpmc: gpmc@50000000 {
726 compatible = "ti,am3352-gpmc";
728 clocks = <&l3s_gclk>;
730 reg = <0x50000000 0x2000>;
731 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
733 gpmc,num-waitpins = <2>;
734 #address-cells = <2>;
741 /include/ "am43xx-clocks.dtsi"