1 // SPDX-License-Identifier: GPL-2.0-only
3 * Device Tree Source for AM33xx clock data
5 * Copyright (C) 2013 Texas Instruments, Inc.
8 sys_clkin_ck: clock-sys-clkin-22@40 {
10 compatible = "ti,mux-clock";
11 clock-output-names = "sys_clkin_ck";
12 clocks = <&virt_19200000_ck>, <&virt_24000000_ck>, <&virt_25000000_ck>, <&virt_26000000_ck>;
17 adc_tsc_fck: clock-adc-tsc-fck {
19 compatible = "fixed-factor-clock";
20 clock-output-names = "adc_tsc_fck";
21 clocks = <&sys_clkin_ck>;
26 dcan0_fck: clock-dcan0-fck {
28 compatible = "fixed-factor-clock";
29 clock-output-names = "dcan0_fck";
30 clocks = <&sys_clkin_ck>;
35 dcan1_fck: clock-dcan1-fck {
37 compatible = "fixed-factor-clock";
38 clock-output-names = "dcan1_fck";
39 clocks = <&sys_clkin_ck>;
44 mcasp0_fck: clock-mcasp0-fck {
46 compatible = "fixed-factor-clock";
47 clock-output-names = "mcasp0_fck";
48 clocks = <&sys_clkin_ck>;
53 mcasp1_fck: clock-mcasp1-fck {
55 compatible = "fixed-factor-clock";
56 clock-output-names = "mcasp1_fck";
57 clocks = <&sys_clkin_ck>;
62 smartreflex0_fck: clock-smartreflex0-fck {
64 compatible = "fixed-factor-clock";
65 clock-output-names = "smartreflex0_fck";
66 clocks = <&sys_clkin_ck>;
71 smartreflex1_fck: clock-smartreflex1-fck {
73 compatible = "fixed-factor-clock";
74 clock-output-names = "smartreflex1_fck";
75 clocks = <&sys_clkin_ck>;
80 sha0_fck: clock-sha0-fck {
82 compatible = "fixed-factor-clock";
83 clock-output-names = "sha0_fck";
84 clocks = <&sys_clkin_ck>;
89 aes0_fck: clock-aes0-fck {
91 compatible = "fixed-factor-clock";
92 clock-output-names = "aes0_fck";
93 clocks = <&sys_clkin_ck>;
98 rng_fck: clock-rng-fck {
100 compatible = "fixed-factor-clock";
101 clock-output-names = "rng_fck";
102 clocks = <&sys_clkin_ck>;
108 compatible = "ti,clksel";
111 #address-cells = <0>;
113 ehrpwm0_tbclk: clock-ehrpwm0-tbclk {
115 compatible = "ti,gate-clock";
116 clock-output-names = "ehrpwm0_tbclk";
117 clocks = <&l4ls_gclk>;
121 ehrpwm1_tbclk: clock-ehrpwm1-tbclk {
123 compatible = "ti,gate-clock";
124 clock-output-names = "ehrpwm1_tbclk";
125 clocks = <&l4ls_gclk>;
129 ehrpwm2_tbclk: clock-ehrpwm2-tbclk {
131 compatible = "ti,gate-clock";
132 clock-output-names = "ehrpwm2_tbclk";
133 clocks = <&l4ls_gclk>;
139 clk_32768_ck: clock-clk-32768 {
141 compatible = "fixed-clock";
142 clock-output-names = "clk_32768_ck";
143 clock-frequency = <32768>;
146 clk_rc32k_ck: clock-clk-rc32k {
148 compatible = "fixed-clock";
149 clock-output-names = "clk_rc32k_ck";
150 clock-frequency = <32000>;
153 virt_19200000_ck: clock-virt-19200000 {
155 compatible = "fixed-clock";
156 clock-output-names = "virt_19200000_ck";
157 clock-frequency = <19200000>;
160 virt_24000000_ck: clock-virt-24000000 {
162 compatible = "fixed-clock";
163 clock-output-names = "virt_24000000_ck";
164 clock-frequency = <24000000>;
167 virt_25000000_ck: clock-virt-25000000 {
169 compatible = "fixed-clock";
170 clock-output-names = "virt_25000000_ck";
171 clock-frequency = <25000000>;
174 virt_26000000_ck: clock-virt-26000000 {
176 compatible = "fixed-clock";
177 clock-output-names = "virt_26000000_ck";
178 clock-frequency = <26000000>;
181 tclkin_ck: clock-tclkin {
183 compatible = "fixed-clock";
184 clock-output-names = "tclkin_ck";
185 clock-frequency = <12000000>;
188 dpll_core_ck: clock@490 {
190 compatible = "ti,am3-dpll-core-clock";
191 clock-output-names = "dpll_core_ck";
192 clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
193 reg = <0x0490>, <0x045c>, <0x0468>, <0x0460>, <0x0464>;
196 dpll_core_x2_ck: clock-dpll-core-x2 {
198 compatible = "ti,am3-dpll-x2-clock";
199 clock-output-names = "dpll_core_x2_ck";
200 clocks = <&dpll_core_ck>;
203 dpll_core_m4_ck: clock-dpll-core-m4@480 {
205 compatible = "ti,divider-clock";
206 clock-output-names = "dpll_core_m4_ck";
207 clocks = <&dpll_core_x2_ck>;
210 ti,index-starts-at-one;
213 dpll_core_m5_ck: clock-dpll-core-m5@484 {
215 compatible = "ti,divider-clock";
216 clock-output-names = "dpll_core_m5_ck";
217 clocks = <&dpll_core_x2_ck>;
220 ti,index-starts-at-one;
223 dpll_core_m6_ck: clock-dpll-core-m6@4d8 {
225 compatible = "ti,divider-clock";
226 clock-output-names = "dpll_core_m6_ck";
227 clocks = <&dpll_core_x2_ck>;
230 ti,index-starts-at-one;
233 dpll_mpu_ck: clock@488 {
235 compatible = "ti,am3-dpll-clock";
236 clock-output-names = "dpll_mpu_ck";
237 clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
238 reg = <0x0488>, <0x0420>, <0x042c>, <0x0424>, <0x0428>;
241 dpll_mpu_m2_ck: clock-dpll-mpu-m2@4a8 {
243 compatible = "ti,divider-clock";
244 clock-output-names = "dpll_mpu_m2_ck";
245 clocks = <&dpll_mpu_ck>;
248 ti,index-starts-at-one;
251 dpll_ddr_ck: clock@494 {
253 compatible = "ti,am3-dpll-no-gate-clock";
254 clock-output-names = "dpll_ddr_ck";
255 clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
256 reg = <0x0494>, <0x0434>, <0x0440>, <0x0438>, <0x043c>;
259 dpll_ddr_m2_ck: clock-dpll-ddr-m2@4a0 {
261 compatible = "ti,divider-clock";
262 clock-output-names = "dpll_ddr_m2_ck";
263 clocks = <&dpll_ddr_ck>;
266 ti,index-starts-at-one;
269 dpll_ddr_m2_div2_ck: clock-dpll-ddr-m2-div2 {
271 compatible = "fixed-factor-clock";
272 clock-output-names = "dpll_ddr_m2_div2_ck";
273 clocks = <&dpll_ddr_m2_ck>;
278 dpll_disp_ck: clock@498 {
280 compatible = "ti,am3-dpll-no-gate-clock";
281 clock-output-names = "dpll_disp_ck";
282 clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
283 reg = <0x0498>, <0x0448>, <0x0454>, <0x044c>, <0x0450>;
286 dpll_disp_m2_ck: clock-dpll-disp-m2@4a4 {
288 compatible = "ti,divider-clock";
289 clock-output-names = "dpll_disp_m2_ck";
290 clocks = <&dpll_disp_ck>;
293 ti,index-starts-at-one;
297 dpll_per_ck: clock@48c {
299 compatible = "ti,am3-dpll-no-gate-j-type-clock";
300 clock-output-names = "dpll_per_ck";
301 clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
302 reg = <0x048c>, <0x0470>, <0x049c>, <0x0474>, <0x0478>;
305 dpll_per_m2_ck: clock-dpll-per-m2@4ac {
307 compatible = "ti,divider-clock";
308 clock-output-names = "dpll_per_m2_ck";
309 clocks = <&dpll_per_ck>;
312 ti,index-starts-at-one;
315 dpll_per_m2_div4_wkupdm_ck: clock-dpll-per-m2-div4-wkupdm {
317 compatible = "fixed-factor-clock";
318 clock-output-names = "dpll_per_m2_div4_wkupdm_ck";
319 clocks = <&dpll_per_m2_ck>;
324 dpll_per_m2_div4_ck: clock-dpll-per-m2-div4 {
326 compatible = "fixed-factor-clock";
327 clock-output-names = "dpll_per_m2_div4_ck";
328 clocks = <&dpll_per_m2_ck>;
333 clk_24mhz: clock-clk-24mhz {
335 compatible = "fixed-factor-clock";
336 clock-output-names = "clk_24mhz";
337 clocks = <&dpll_per_m2_ck>;
342 clkdiv32k_ck: clock-clkdiv32k {
344 compatible = "fixed-factor-clock";
345 clock-output-names = "clkdiv32k_ck";
346 clocks = <&clk_24mhz>;
351 l3_gclk: clock-l3-gclk {
353 compatible = "fixed-factor-clock";
354 clock-output-names = "l3_gclk";
355 clocks = <&dpll_core_m4_ck>;
360 pruss_ocp_gclk: clock-pruss-ocp-gclk@530 {
362 compatible = "ti,mux-clock";
363 clock-output-names = "pruss_ocp_gclk";
364 clocks = <&l3_gclk>, <&dpll_disp_m2_ck>;
368 mmu_fck: clock-mmu-fck-1@914 {
370 compatible = "ti,gate-clock";
371 clock-output-names = "mmu_fck";
372 clocks = <&dpll_core_m4_ck>;
377 timer1_fck: clock-timer1-fck@528 {
379 compatible = "ti,mux-clock";
380 clock-output-names = "timer1_fck";
381 clocks = <&sys_clkin_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>, <&tclkin_ck>, <&clk_rc32k_ck>, <&clk_32768_ck>;
385 timer2_fck: clock-timer2-fck@508 {
387 compatible = "ti,mux-clock";
388 clock-output-names = "timer2_fck";
389 clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
393 timer3_fck: clock-timer3-fck@50c {
395 compatible = "ti,mux-clock";
396 clock-output-names = "timer3_fck";
397 clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
401 timer4_fck: clock-timer4-fck@510 {
403 compatible = "ti,mux-clock";
404 clock-output-names = "timer4_fck";
405 clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
409 timer5_fck: clock-timer5-fck@518 {
411 compatible = "ti,mux-clock";
412 clock-output-names = "timer5_fck";
413 clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
417 timer6_fck: clock-timer6-fck@51c {
419 compatible = "ti,mux-clock";
420 clock-output-names = "timer6_fck";
421 clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
425 timer7_fck: clock-timer7-fck@504 {
427 compatible = "ti,mux-clock";
428 clock-output-names = "timer7_fck";
429 clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
433 usbotg_fck: clock-usbotg-fck-8@47c {
435 compatible = "ti,gate-clock";
436 clock-output-names = "usbotg_fck";
437 clocks = <&dpll_per_ck>;
442 dpll_core_m4_div2_ck: clock-dpll-core-m4-div2 {
444 compatible = "fixed-factor-clock";
445 clock-output-names = "dpll_core_m4_div2_ck";
446 clocks = <&dpll_core_m4_ck>;
451 ieee5000_fck: clock-ieee5000-fck-1@e4 {
453 compatible = "ti,gate-clock";
454 clock-output-names = "ieee5000_fck";
455 clocks = <&dpll_core_m4_div2_ck>;
460 wdt1_fck: clock-wdt1-fck@538 {
462 compatible = "ti,mux-clock";
463 clock-output-names = "wdt1_fck";
464 clocks = <&clk_rc32k_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
468 l4_rtc_gclk: clock-l4-rtc-gclk {
470 compatible = "fixed-factor-clock";
471 clock-output-names = "l4_rtc_gclk";
472 clocks = <&dpll_core_m4_ck>;
477 l4hs_gclk: clock-l4hs-gclk {
479 compatible = "fixed-factor-clock";
480 clock-output-names = "l4hs_gclk";
481 clocks = <&dpll_core_m4_ck>;
486 l3s_gclk: clock-l3s-gclk {
488 compatible = "fixed-factor-clock";
489 clock-output-names = "l3s_gclk";
490 clocks = <&dpll_core_m4_div2_ck>;
495 l4fw_gclk: clock-l4fw-gclk {
497 compatible = "fixed-factor-clock";
498 clock-output-names = "l4fw_gclk";
499 clocks = <&dpll_core_m4_div2_ck>;
504 l4ls_gclk: clock-l4ls-gclk {
506 compatible = "fixed-factor-clock";
507 clock-output-names = "l4ls_gclk";
508 clocks = <&dpll_core_m4_div2_ck>;
513 sysclk_div_ck: clock-sysclk-div {
515 compatible = "fixed-factor-clock";
516 clock-output-names = "sysclk_div_ck";
517 clocks = <&dpll_core_m4_ck>;
522 cpsw_125mhz_gclk: clock-cpsw-125mhz-gclk {
524 compatible = "fixed-factor-clock";
525 clock-output-names = "cpsw_125mhz_gclk";
526 clocks = <&dpll_core_m5_ck>;
531 cpsw_cpts_rft_clk: clock-cpsw-cpts-rft@520 {
533 compatible = "ti,mux-clock";
534 clock-output-names = "cpsw_cpts_rft_clk";
535 clocks = <&dpll_core_m5_ck>, <&dpll_core_m4_ck>;
539 gpio0_dbclk_mux_ck: clock-gpio0-dbclk-mux@53c {
541 compatible = "ti,mux-clock";
542 clock-output-names = "gpio0_dbclk_mux_ck";
543 clocks = <&clk_rc32k_ck>, <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
547 lcd_gclk: clock-lcd-gclk@534 {
549 compatible = "ti,mux-clock";
550 clock-output-names = "lcd_gclk";
551 clocks = <&dpll_disp_m2_ck>, <&dpll_core_m5_ck>, <&dpll_per_m2_ck>;
558 compatible = "fixed-factor-clock";
559 clock-output-names = "mmc_clk";
560 clocks = <&dpll_per_m2_ck>;
566 compatible = "ti,clksel";
569 #address-cells = <0>;
571 gfx_fclk_clksel_ck: clock-gfx-fclk-clksel {
573 compatible = "ti,mux-clock";
574 clock-output-names = "gfx_fclk_clksel_ck";
575 clocks = <&dpll_core_m4_ck>, <&dpll_per_m2_ck>;
579 gfx_fck_div_ck: clock-gfx-fck-div {
581 compatible = "ti,divider-clock";
582 clock-output-names = "gfx_fck_div_ck";
583 clocks = <&gfx_fclk_clksel_ck>;
589 compatible = "ti,clksel";
592 #address-cells = <0>;
594 sysclkout_pre_ck: clock-sysclkout-pre {
596 compatible = "ti,mux-clock";
597 clock-output-names = "sysclkout_pre_ck";
598 clocks = <&clk_32768_ck>, <&l3_gclk>, <&dpll_ddr_m2_ck>, <&dpll_per_m2_ck>, <&lcd_gclk>;
601 clkout2_div_ck: clock-clkout2-div {
603 compatible = "ti,divider-clock";
604 clock-output-names = "clkout2_div_ck";
605 clocks = <&sysclkout_pre_ck>;
610 clkout2_ck: clock-clkout2 {
612 compatible = "ti,gate-clock";
613 clock-output-names = "clkout2_ck";
614 clocks = <&clkout2_div_ck>;
622 compatible = "ti,omap4-cm";
623 clock-output-names = "per_cm";
625 #address-cells = <1>;
627 ranges = <0 0x0 0x400>;
629 l4ls_clkctrl: clock@38 {
630 compatible = "ti,clkctrl";
631 clock-output-names = "l4ls_clkctrl";
632 reg = <0x38 0x2c>, <0x6c 0x28>, <0xac 0xc>, <0xc0 0x1c>, <0xec 0xc>, <0x10c 0x8>, <0x130 0x4>;
636 l3s_clkctrl: clock@1c {
637 compatible = "ti,clkctrl";
638 clock-output-names = "l3s_clkctrl";
639 reg = <0x1c 0x4>, <0x30 0x8>, <0x68 0x4>, <0xf8 0x4>;
643 l3_clkctrl: clock@24 {
644 compatible = "ti,clkctrl";
645 clock-output-names = "l3_clkctrl";
646 reg = <0x24 0xc>, <0x94 0x10>, <0xbc 0x4>, <0xdc 0x8>, <0xfc 0x8>;
650 l4hs_clkctrl: clock@120 {
651 compatible = "ti,clkctrl";
652 clock-output-names = "l4hs_clkctrl";
657 pruss_ocp_clkctrl: clock@e8 {
658 compatible = "ti,clkctrl";
659 clock-output-names = "pruss_ocp_clkctrl";
664 cpsw_125mhz_clkctrl: clock@0 {
665 compatible = "ti,clkctrl";
666 clock-output-names = "cpsw_125mhz_clkctrl";
671 lcdc_clkctrl: clock@18 {
672 compatible = "ti,clkctrl";
673 clock-output-names = "lcdc_clkctrl";
678 clk_24mhz_clkctrl: clock@14c {
679 compatible = "ti,clkctrl";
680 clock-output-names = "clk_24mhz_clkctrl";
687 compatible = "ti,omap4-cm";
688 clock-output-names = "wkup_cm";
690 #address-cells = <1>;
692 ranges = <0 0x400 0x100>;
694 l4_wkup_clkctrl: clock@0 {
695 compatible = "ti,clkctrl";
696 clock-output-names = "l4_wkup_clkctrl";
697 reg = <0x0 0x10>, <0xb4 0x24>;
701 l3_aon_clkctrl: clock@14 {
702 compatible = "ti,clkctrl";
703 clock-output-names = "l3_aon_clkctrl";
708 l4_wkup_aon_clkctrl: clock@b0 {
709 compatible = "ti,clkctrl";
710 clock-output-names = "l4_wkup_aon_clkctrl";
717 compatible = "ti,omap4-cm";
718 clock-output-names = "mpu_cm";
720 #address-cells = <1>;
722 ranges = <0 0x600 0x100>;
724 mpu_clkctrl: clock@0 {
725 compatible = "ti,clkctrl";
726 clock-output-names = "mpu_clkctrl";
732 l4_rtc_cm: clock@800 {
733 compatible = "ti,omap4-cm";
734 clock-output-names = "l4_rtc_cm";
736 #address-cells = <1>;
738 ranges = <0 0x800 0x100>;
740 l4_rtc_clkctrl: clock@0 {
741 compatible = "ti,clkctrl";
742 clock-output-names = "l4_rtc_clkctrl";
748 gfx_l3_cm: clock@900 {
749 compatible = "ti,omap4-cm";
750 clock-output-names = "gfx_l3_cm";
752 #address-cells = <1>;
754 ranges = <0 0x900 0x100>;
756 gfx_l3_clkctrl: clock@0 {
757 compatible = "ti,clkctrl";
758 clock-output-names = "gfx_l3_clkctrl";
764 l4_cefuse_cm: clock@a00 {
765 compatible = "ti,omap4-cm";
766 clock-output-names = "l4_cefuse_cm";
768 #address-cells = <1>;
770 ranges = <0 0xa00 0x100>;
772 l4_cefuse_clkctrl: clock@0 {
773 compatible = "ti,clkctrl";
774 clock-output-names = "l4_cefuse_clkctrl";