2 * Copyright (C) 2017 MOXA Inc. - https://www.moxa.com/
4 * Author: SZ Lin (林上智) <sz.lin@moxa.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
13 #include "am33xx.dtsi"
16 model = "Moxa UC-8100-ME-T";
17 compatible = "moxa,uc-8100-me-t", "ti,am33xx";
21 cpu0-supply = <&vdd1_reg>;
26 device_type = "memory";
27 reg = <0x80000000 0x20000000>; /* 512 MB */
30 vbat: vbat-regulator {
31 compatible = "regulator-fixed";
34 /* Power supply provides a fixed 3.3V @3A */
35 vmmcsd_fixed: vmmcsd-regulator {
36 compatible = "regulator-fixed";
37 regulator-name = "vmmcsd_fixed";
38 regulator-min-microvolt = <3300000>;
39 regulator-max-microvolt = <3300000>;
44 compatible = "gpio-leds";
46 label = "uc8100me:CEL1";
47 gpios = <&gpio_xten 8 0>;
48 default-state = "off";
52 label = "uc8100me:CEL2";
53 gpios = <&gpio_xten 9 0>;
54 default-state = "off";
58 label = "uc8100me:CEL3";
59 gpios = <&gpio_xten 10 0>;
60 default-state = "off";
64 label = "uc8100me:DIA1";
65 gpios = <&gpio_xten 11 0>;
66 default-state = "off";
69 label = "uc8100me:DIA2";
70 gpios = <&gpio_xten 12 0>;
71 default-state = "off";
74 label = "uc8100me:DIA3";
75 gpios = <&gpio_xten 13 0>;
76 default-state = "off";
79 label = "uc8100me:SD";
80 gpios = <&gpio_xten 14 0>;
81 default-state = "off";
84 label = "uc8100me:USB";
85 gpios = <&gpio_xten 15 0>;
86 default-state = "off";
89 label = "uc8100me:USER";
90 gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
91 default-state = "off";
95 buttons: push_button {
96 compatible = "gpio-keys";
102 pinctrl-names = "default";
103 pinctrl-0 = <&minipcie_pins>;
105 minipcie_pins: pinmux_minipcie {
106 pinctrl-single,pins = <
107 AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_pclk.gpio2_24 */
108 AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_ac_bias_en.gpio2_25 */
109 AM33XX_IOPAD(0x8e0, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_vsync.gpio2_22 Power off PIN*/
113 push_button_pins: pinmux_push_button {
114 pinctrl-single,pins = <
115 AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE7) /* mcasp0_ahcklx.gpio3_21 */
119 i2c0_pins: pinmux_i2c0_pins {
120 pinctrl-single,pins = <
121 AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
122 AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
127 i2c1_pins: pinmux_i2c1_pins {
128 pinctrl-single,pins = <
129 AM33XX_IOPAD(0x968, PIN_INPUT_PULLUP | MUX_MODE3) /* uart0_ctsn.i2c1_sda */
130 AM33XX_IOPAD(0x96c, PIN_INPUT_PULLUP | MUX_MODE3) /* uart0_rtsn.i2c1_scl */
134 uart0_pins: pinmux_uart0_pins {
135 pinctrl-single,pins = <
136 AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
137 AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
141 uart1_pins: pinmux_uart1_pins {
142 pinctrl-single,pins = <
143 AM33XX_IOPAD(0x978, PIN_INPUT | MUX_MODE0) /* uart1_ctsn.uart1_ctsn */
144 AM33XX_IOPAD(0x97C, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_rtsn.uart1_rtsn */
145 AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */
146 AM33XX_IOPAD(0x984, PIN_OUTPUT | MUX_MODE0) /* uart1_txd.uart1_txd */
150 uart2_pins: pinmux_uart2_pins {
151 pinctrl-single,pins = <
152 AM33XX_IOPAD(0x8d8, PIN_INPUT | MUX_MODE6) /* lcd_data14.uart5_ctsn */
153 AM33XX_IOPAD(0x8dc, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* lcd_data15.uart5_rtsn */
154 AM33XX_IOPAD(0x8c4, PIN_INPUT_PULLUP | MUX_MODE4) /* lcd_data9.uart5_rxd */
155 AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE4) /* lcd_data8.uart5_txd */
159 cpsw_default: cpsw_default {
160 pinctrl-single,pins = <
162 AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs_dv */
163 AM33XX_IOPAD(0x910, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxerr.rmii1_rxerr */
164 AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txen.rmii1_txen */
165 AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd1.rmii1_txd1 */
166 AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd0.rmii1_txd0 */
167 AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxd1.rmii1_rxd1 */
168 AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxd0.rmii1_rxd0 */
169 AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mii1_refclk.rmii1_refclk */
172 AM33XX_IOPAD(0x870, PIN_INPUT_PULLDOWN | MUX_MODE3) /* rmii2_crs_dv */
173 AM33XX_IOPAD(0x874, PIN_INPUT_PULLDOWN | MUX_MODE3) /* rmii2_rxer */
174 AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* rmii2_txen */
175 AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* rmii2_td1 */
176 AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* rmii2_td0 */
177 AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE3) /* rmii2_rd1 */
178 AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE3) /* rmii2_rd0 */
179 AM33XX_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE1) /* rmii2_refclk */
184 davinci_mdio_default: davinci_mdio_default {
185 pinctrl-single,pins = <
187 AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
188 AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
192 mmc0_pins_default: pinmux_mmc0_pins {
193 pinctrl-single,pins = <
194 AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3 */
195 AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2 */
196 AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1 */
197 AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0 */
198 AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk */
199 AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd */
200 AM33XX_IOPAD(0x990, PIN_INPUT_PULLUP | MUX_MODE7) /* mcasp0_aclkx.gpio3_14 */
201 AM33XX_IOPAD(0x9a0, PIN_INPUT_PULLUP | MUX_MODE7) /* mcasp0_aclkx.gpio3_18 */
205 mmc2_pins_default: pinmux_mmc2_pins {
206 pinctrl-single,pins = <
208 AM33XX_IOPAD(0x830, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad12.mmc2_dat0 */
209 AM33XX_IOPAD(0x834, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad13.mmc2_dat1 */
210 AM33XX_IOPAD(0x838, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad14.mmc2_dat2 */
211 AM33XX_IOPAD(0x83c, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad15.mmc2_dat3 */
212 AM33XX_IOPAD(0x820, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad8.mmc2_dat4 */
213 AM33XX_IOPAD(0x824, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad9.mmc2_dat5 */
214 AM33XX_IOPAD(0x828, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad10.mmc2_dat6 */
215 AM33XX_IOPAD(0x82c, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad11.mmc2_dat7 */
216 AM33XX_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_csn3.mmc2_cmd */
217 AM33XX_IOPAD(0x88c, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_clk.mmc2_clk */
221 spi0_pins: pinmux_spi0 {
222 pinctrl-single,pins = <
223 AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_sclk.spi0_sclk */
224 AM33XX_IOPAD(0x95C, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_cs0.spi0_cs0 */
225 AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d0.spi0_d0 */
226 AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d1.spi0_d1 */
235 pinctrl-names = "default";
236 pinctrl-0 = <&uart0_pins>;
242 pinctrl-names = "default";
243 pinctrl-0 = <&uart1_pins>;
249 pinctrl-names = "default";
250 pinctrl-0 = <&uart2_pins>;
254 pinctrl-names = "default";
255 pinctrl-0 = <&i2c0_pins>;
258 clock-frequency = <400000>;
261 compatible = "infineon,slb9645tt";
266 compatible = "ti,tps65910";
271 compatible = "atmel,24c16";
276 rtc_wdt: rtc_wdt@68 {
277 compatible = "dallas,ds1374";
283 pinctrl-names = "default";
284 pinctrl-0 = <&i2c1_pins>;
287 clock-frequency = <400000>;
288 gpio_xten: gpio_xten@27 {
289 compatible = "nxp,pca9535";
326 #include "tps65910.dtsi"
329 vcc1-supply = <&vbat>;
330 vcc2-supply = <&vbat>;
331 vcc3-supply = <&vbat>;
332 vcc4-supply = <&vbat>;
333 vcc5-supply = <&vbat>;
334 vcc6-supply = <&vbat>;
335 vcc7-supply = <&vbat>;
336 vccio-supply = <&vbat>;
339 vrtc_reg: regulator@0 {
343 vio_reg: regulator@1 {
347 vdd1_reg: regulator@2 {
348 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
349 regulator-name = "vdd_mpu";
350 regulator-min-microvolt = <912500>;
351 regulator-max-microvolt = <1378000>;
356 vdd2_reg: regulator@3 {
357 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
358 regulator-name = "vdd_core";
359 regulator-min-microvolt = <912500>;
360 regulator-max-microvolt = <1150000>;
365 vdd3_reg: regulator@4 {
369 vdig1_reg: regulator@5 {
373 vdig2_reg: regulator@6 {
377 vpll_reg: regulator@7 {
381 vdac_reg: regulator@8 {
385 vaux1_reg: regulator@9 {
389 vaux2_reg: regulator@10 {
393 vaux33_reg: regulator@11 {
397 vmmc_reg: regulator@12 {
398 compatible = "regulator-fixed";
399 regulator-name = "vmmc_reg";
400 regulator-min-microvolt = <3300000>;
401 regulator-max-microvolt = <3300000>;
409 regulator-name = "vbat";
410 regulator-min-microvolt = <5000000>;
411 regulator-max-microvolt = <5000000>;
415 pinctrl-names = "default";
416 pinctrl-0 = <&cpsw_default>;
422 pinctrl-names = "default";
423 pinctrl-0 = <&davinci_mdio_default>;
426 ethphy0: ethernet-phy@4 {
430 ethphy1: ethernet-phy@5 {
437 phy-handle = <ðphy0>;
439 dual_emac_res_vlan = <1>;
444 phy-handle = <ðphy1>;
446 dual_emac_res_vlan = <2>;
462 pinctrl-names = "default";
463 vmmc-supply = <&vmmcsd_fixed>;
465 pinctrl-0 = <&mmc0_pins_default>;
466 cd-gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
467 wp-gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
472 dmas = <&edma_xbar 12 0 1
474 dma-names = "tx", "rx";
475 pinctrl-names = "default";
476 vmmc-supply = <&vmmcsd_fixed>;
478 pinctrl-0 = <&mmc2_pins_default>;
484 pinctrl-names = "default";
485 pinctrl-0 = <&push_button_pins>;
486 #address-cells = <1>;
490 label = "push_button";
491 linux,code = <0x100>;
492 gpios = <&gpio3 21 GPIO_ACTIVE_LOW>;
499 pinctrl-names = "default";
500 pinctrl-0 = <&spi0_pins>;
503 compatible = "mx25l6405d";
504 spi-max-frequency = <40000000>;
509 #address-cells = <1>;
512 /* reg : The partition's offset and size within the mtd bank. */
520 reg = <0x80000 0x100000>;
524 label = "U-Boot Env";
525 reg = <0x180000 0x20000>;