arch/arm/boot/dts/am335x-baltos-ir3220.dts

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
   4  */
   5
   6 /*
   7  * VScom OnRISC
   8  * http://www.vscom.de
   9  */
  10
  11 /dts-v1/;
  12
  13 #include "am335x-baltos.dtsi"
  14 #include "am335x-baltos-leds.dtsi"
  15
  16 / {
  17         model = "OnRISC Baltos iR 3220";
  18 };
  19
  20 &am33xx_pinmux {
  21         tca6416_pins: pinmux_tca6416_pins {
  22                 pinctrl-single,pins = <
  23                         AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_INPUT_PULLUP, MUX_MODE7)      /* xdma_event_intr1.gpio0[20] tca6416 stuff */
  24                 >;
  25         };
  26
  27         uart1_pins: pinmux_uart1_pins {
  28                 pinctrl-single,pins = <
  29                         AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT, MUX_MODE0)
  30                         AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT, MUX_MODE0)
  31                         AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE0)
  32                         AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
  33                         AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE7)      /* lcd_vsync.gpio2[22] DTR */
  34                         AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7)      /* lcd_hsync.gpio2[23] DSR */
  35                         AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_INPUT_PULLDOWN, MUX_MODE7)      /* lcd_pclk.gpio2[24] DCD */
  36                         AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)      /* lcd_ac_bias_en.gpio2[25] RI */
  37                 >;
  38         };
  39
  40         uart2_pins: pinmux_uart2_pins {
  41                 pinctrl-single,pins = <
  42                         AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT, MUX_MODE1)      /* spi0_sclk.uart2_rxd_mux3 */
  43                         AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT, MUX_MODE1)      /* spi0_d0.uart2_txd_mux3 */
  44                         AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLDOWN, MUX_MODE2)      /* i2c0_sda.uart2_ctsn_mux0 */
  45                         AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_OUTPUT_PULLDOWN, MUX_MODE2)      /* i2c0_scl.uart2_rtsn_mux0 */
  46                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_OUTPUT_PULLDOWN, MUX_MODE7)      /* gpmc_ad12.gpio1[12] DTR */
  47                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLDOWN, MUX_MODE7)      /* gpmc_ad13.gpio1[13] DSR */
  48                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLDOWN, MUX_MODE7)      /* gpmc_ad14.gpio1[14] DCD */
  49                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLDOWN, MUX_MODE7)     /* gpmc_ad15.gpio1[15] RI */
  50
  51                         AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_INPUT_PULLUP, MUX_MODE7)      /* mcasp0_aclkr.gpio3[18], INPUT_PULLDOWN | MODE7 */
  52                 >;
  53         };
  54 };
  55
  56 &uart1 {
  57         pinctrl-names = "default";
  58         pinctrl-0 = <&uart1_pins>;
  59         dtr-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
  60         dsr-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
  61         dcd-gpios = <&gpio2 24 GPIO_ACTIVE_LOW>;
  62         rng-gpios = <&gpio2 25 GPIO_ACTIVE_LOW>;
  63
  64         status = "okay";
  65 };
  66
  67 &uart2 {
  68         pinctrl-names = "default";
  69         pinctrl-0 = <&uart2_pins>;
  70         dtr-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
  71         dsr-gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
  72         dcd-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
  73         rng-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
  74
  75         status = "okay";
  76 };
  77
  78 &i2c1 {
  79         tca6416: gpio@20 {
  80                 compatible = "ti,tca6416";
  81                 reg = <0x20>;
  82                 gpio-controller;
  83                 #gpio-cells = <2>;
  84                 interrupt-parent = <&gpio0>;
  85                 interrupts = <20 IRQ_TYPE_EDGE_RISING>;
  86                 pinctrl-names = "default";
  87                 pinctrl-0 = <&tca6416_pins>;
  88         };
  89 };
  90
  91 &usb0_phy {
  92         status = "okay";
  93 };
  94
  95 &usb0 {
  96         status = "okay";
  97         dr_mode = "host";
  98 };
  99
 100 &cpsw_emac0 {
 101         phy-mode = "rmii";
 102         dual_emac_res_vlan = <1>;
 103         fixed-link {
 104                 speed = <100>;
 105                 full-duplex;
 106         };
 107 };
 108
 109 &cpsw_emac1 {
 110         phy-mode = "rgmii-txid";
 111         dual_emac_res_vlan = <2>;
 112         phy-handle = <&phy1>;
 113 };