1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/pinctrl/allwinner,sun4i-a10-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 Pin Controller Device Tree Bindings
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
17 GPIO consumers must use three arguments, first the number of the
18 bank, then the pin number inside that bank, and finally the GPIO
24 Interrupts consumers must use three arguments, first the number
25 of the bank, then the pin number inside that bank, and finally
30 - allwinner,sun4i-a10-pinctrl
31 - allwinner,sun5i-a10s-pinctrl
32 - allwinner,sun5i-a13-pinctrl
33 - allwinner,sun6i-a31-pinctrl
34 - allwinner,sun6i-a31-r-pinctrl
35 - allwinner,sun6i-a31s-pinctrl
36 - allwinner,sun7i-a20-pinctrl
37 - allwinner,sun8i-a23-pinctrl
38 - allwinner,sun8i-a23-r-pinctrl
39 - allwinner,sun8i-a33-pinctrl
40 - allwinner,sun8i-a83t-pinctrl
41 - allwinner,sun8i-a83t-r-pinctrl
42 - allwinner,sun8i-h3-pinctrl
43 - allwinner,sun8i-h3-r-pinctrl
44 - allwinner,sun8i-r40-pinctrl
45 - allwinner,sun8i-v3-pinctrl
46 - allwinner,sun8i-v3s-pinctrl
47 - allwinner,sun9i-a80-pinctrl
48 - allwinner,sun9i-a80-r-pinctrl
49 - allwinner,sun50i-a64-pinctrl
50 - allwinner,sun50i-a64-r-pinctrl
51 - allwinner,sun50i-a100-pinctrl
52 - allwinner,sun50i-a100-r-pinctrl
53 - allwinner,sun50i-h5-pinctrl
54 - allwinner,sun50i-h6-pinctrl
55 - allwinner,sun50i-h6-r-pinctrl
56 - allwinner,sun50i-h616-pinctrl
57 - allwinner,sun50i-h616-r-pinctrl
58 - allwinner,suniv-f1c100s-pinctrl
59 - nextthing,gr8-pinctrl
68 One interrupt per external interrupt bank supported on the
69 controller, sorted by bank number ascending order.
73 - description: Bus Clock
74 - description: High Frequency Oscillator
75 - description: Low Frequency Oscillator
87 interrupt-controller: true
92 Debouncing periods in microseconds, one period per interrupt
93 bank found in the controller
94 $ref: /schemas/types.yaml#/definitions/uint32-array
99 # It's pretty scary, but the basic idea is that:
100 # - One node name can start with either s- or r- for PRCM nodes,
101 # - Then, the name itself can be any repetition of <string>- (to
102 # accomodate with nodes like uart4-rts-cts-pins), where each
103 # string can be either starting with 'p' but in a string longer
104 # than 3, or something that doesn't start with 'p',
105 # - Then, the bank name is optional and will be between pa and pg,
106 # pl or pm. Some pins groups that have several options will have
107 # the pin numbers then,
108 # - Finally, the name will end with either -pin or pins.
110 "^([rs]-)?(([a-z0-9]{3,}|[a-oq-z][a-z0-9]*?)?-)+?(p[a-ilm][0-9]*?-)??pins?$":
121 $ref: /schemas/types.yaml#/definitions/uint32
122 enum: [10, 20, 30, 40]
128 additionalProperties: false
130 "^vcc-p[a-hlm]-supply$":
132 Power supplies for pin banks.
143 - interrupt-controller
146 # FIXME: We should have the pin bank supplies here, but not a lot of
147 # boards are defining it at the moment so it would generate a lot of
150 - $ref: "pinctrl.yaml#"
155 - allwinner,sun50i-h616-pinctrl
166 - allwinner,sun50i-a100-pinctrl
178 - allwinner,sun9i-a80-pinctrl
190 - allwinner,sun6i-a31-pinctrl
191 - allwinner,sun6i-a31s-pinctrl
192 - allwinner,sun50i-h6-pinctrl
204 - allwinner,sun8i-a23-pinctrl
205 - allwinner,sun8i-a83t-pinctrl
206 - allwinner,sun50i-a64-pinctrl
207 - allwinner,sun50i-h5-pinctrl
208 - allwinner,suniv-f1c100s-pinctrl
220 - allwinner,sun6i-a31-r-pinctrl
221 - allwinner,sun8i-a33-pinctrl
222 - allwinner,sun8i-h3-pinctrl
223 - allwinner,sun8i-v3-pinctrl
224 - allwinner,sun8i-v3s-pinctrl
225 - allwinner,sun9i-a80-r-pinctrl
226 - allwinner,sun50i-h6-r-pinctrl
238 - allwinner,sun4i-a10-pinctrl
239 - allwinner,sun5i-a10s-pinctrl
240 - allwinner,sun5i-a13-pinctrl
241 - allwinner,sun7i-a20-pinctrl
242 - allwinner,sun8i-a23-r-pinctrl
243 - allwinner,sun8i-a83t-r-pinctrl
244 - allwinner,sun8i-h3-r-pinctrl
245 - allwinner,sun8i-r40-pinctrl
246 - allwinner,sun50i-a64-r-pinctrl
247 - allwinner,sun50i-a100-r-pinctrl
248 - nextthing,gr8-pinctrl
256 additionalProperties: false
260 #include <dt-bindings/clock/sun5i-ccu.h>
262 pio: pinctrl@1c20800 {
263 compatible = "allwinner,sun5i-a13-pinctrl";
264 reg = <0x01c20800 0x400>;
266 clocks = <&ccu CLK_APB0_PIO>, <&osc24M>, <&osc32k>;
267 clock-names = "apb", "hosc", "losc";
269 interrupt-controller;
270 #interrupt-cells = <3>;
273 uart1_pe_pins: uart1-pe-pins {
274 pins = "PE10", "PE11";
278 uart1_pg_pins: uart1-pg-pins {