1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
5 $id: "http://devicetree.org/schemas/phy/qcom,qmp-phy.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: Qualcomm QMP PHY controller
11 - Manu Gautam <mgautam@codeaurora.org>
14 QMP phy controller supports physical layer functionality for a number of
15 controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.
20 - qcom,ipq8074-qmp-pcie-phy
21 - qcom,ipq8074-qmp-usb3-phy
22 - qcom,msm8996-qmp-pcie-phy
23 - qcom,msm8996-qmp-ufs-phy
24 - qcom,msm8996-qmp-usb3-phy
25 - qcom,msm8998-qmp-pcie-phy
26 - qcom,msm8998-qmp-ufs-phy
27 - qcom,msm8998-qmp-usb3-phy
28 - qcom,sc8180x-qmp-ufs-phy
29 - qcom,sc8180x-qmp-usb3-phy
30 - qcom,sdm845-qhp-pcie-phy
31 - qcom,sdm845-qmp-pcie-phy
32 - qcom,sdm845-qmp-ufs-phy
33 - qcom,sdm845-qmp-usb3-uni-phy
34 - qcom,sm8150-qmp-ufs-phy
35 - qcom,sm8150-qmp-usb3-phy
36 - qcom,sm8150-qmp-usb3-uni-phy
37 - qcom,sm8250-qmp-ufs-phy
38 - qcom,sm8250-qmp-gen3x1-pcie-phy
39 - qcom,sm8250-qmp-gen3x2-pcie-phy
40 - qcom,sm8250-qmp-modem-pcie-phy
41 - qcom,sm8250-qmp-usb3-phy
42 - qcom,sm8250-qmp-usb3-uni-phy
43 - qcom,sm8350-qmp-ufs-phy
44 - qcom,sm8350-qmp-usb3-phy
45 - qcom,sm8350-qmp-usb3-uni-phy
46 - qcom,sdx55-qmp-usb3-uni-phy
52 - description: Address and length of PHY's common serdes block.
53 - description: Address and length of PHY's DP_COM control block.
84 Phandle to a regulator supply to PHY core block.
88 Phandle to 1.8V regulator supply to PHY refclk pll block.
92 Phandle to a regulator supply to any specific refclk pll block.
99 Each device node of QMP phy is required to have as many child nodes as
100 the number of lanes the PHY has.
116 additionalProperties: false
124 - qcom,sdm845-qmp-usb3-uni-phy
129 - description: Phy aux clock.
130 - description: Phy config clock.
131 - description: 19.2 MHz ref clk.
132 - description: Phy common block aux clock.
141 - description: reset of phy block.
142 - description: phy common block reset.
152 - qcom,sdx55-qmp-usb3-uni-phy
157 - description: Phy aux clock.
158 - description: Phy config clock.
159 - description: 19.2 MHz ref clk.
167 - description: reset of phy block.
168 - description: phy common block reset.
178 - qcom,msm8996-qmp-pcie-phy
183 - description: Phy aux clock.
184 - description: Phy config clock.
185 - description: 19.2 MHz ref clk.
193 - description: reset of phy block.
194 - description: phy common block reset.
195 - description: phy's ahb cfg block reset.
206 - qcom,ipq8074-qmp-usb3-phy
207 - qcom,msm8996-qmp-usb3-phy
208 - qcom,msm8998-qmp-pcie-phy
209 - qcom,msm8998-qmp-usb3-phy
214 - description: Phy aux clock.
215 - description: Phy config clock.
216 - description: 19.2 MHz ref clk.
224 - description: reset of phy block.
225 - description: phy common block reset.
235 - qcom,msm8996-qmp-ufs-phy
240 - description: 19.2 MHz ref clk.
246 - description: PHY reset in the UFS controller.
255 - qcom,msm8998-qmp-ufs-phy
256 - qcom,sdm845-qmp-ufs-phy
257 - qcom,sm8150-qmp-ufs-phy
258 - qcom,sm8250-qmp-ufs-phy
263 - description: 19.2 MHz ref clk.
264 - description: Phy reference aux clock.
271 - description: PHY reset in the UFS controller.
280 - qcom,ipq8074-qmp-pcie-phy
285 - description: pipe clk.
291 - description: reset of phy block.
292 - description: phy common block reset.
302 - qcom,sdm845-qhp-pcie-phy
303 - qcom,sdm845-qmp-pcie-phy
304 - qcom,sm8250-qmp-gen3x1-pcie-phy
305 - qcom,sm8250-qmp-gen3x2-pcie-phy
306 - qcom,sm8250-qmp-modem-pcie-phy
311 - description: Phy aux clock.
312 - description: Phy config clock.
313 - description: 19.2 MHz ref clk.
314 - description: Phy refgen clk.
323 - description: reset of phy block.
332 - qcom,sm8150-qmp-usb3-phy
333 - qcom,sm8150-qmp-usb3-uni-phy
334 - qcom,sm8250-qmp-usb3-uni-phy
335 - qcom,sm8350-qmp-usb3-uni-phy
340 - description: Phy aux clock.
341 - description: 19.2 MHz ref clk source.
342 - description: 19.2 MHz ref clk.
343 - description: Phy common block aux clock.
352 - description: reset of phy block.
353 - description: phy common block reset.
363 - qcom,sm8250-qmp-usb3-phy
364 - qcom,sm8350-qmp-usb3-phy
369 - description: Phy aux clock.
370 - description: 19.2 MHz ref clk.
371 - description: Phy common block aux clock.
379 - description: reset of phy block.
380 - description: phy common block reset.
388 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
389 usb_2_qmpphy: phy-wrapper@88eb000 {
390 compatible = "qcom,sdm845-qmp-usb3-uni-phy";
391 reg = <0x088eb000 0x18c>;
393 #address-cells = <1>;
395 ranges = <0x0 0x088eb000 0x2000>;
397 clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK >,
398 <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
399 <&gcc GCC_USB3_SEC_CLKREF_CLK>,
400 <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>;
401 clock-names = "aux", "cfg_ahb", "ref", "com_aux";
403 resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>,
404 <&gcc GCC_USB3_PHY_SEC_BCR>;
405 reset-names = "phy", "common";
407 vdda-phy-supply = <&vdda_usb2_ss_1p2>;
408 vdda-pll-supply = <&vdda_usb2_ss_core>;
410 usb_2_ssphy: phy@200 {
417 clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>;
418 clock-names = "pipe0";
419 clock-output-names = "usb3_uni_phy_pipe_clk_src";