Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml

   1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
   2
   3 %YAML 1.2
   4 ---
   5 $id: "http://devicetree.org/schemas/phy/qcom,qmp-phy.yaml#"
   6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
   7
   8 title: Qualcomm QMP PHY controller
   9
  10 maintainers:
  11   - Vinod Koul <vkoul@kernel.org>
  12
  13 description:
  14   QMP phy controller supports physical layer functionality for a number of
  15   controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.
  16
  17 properties:
  18   compatible:
  19     enum:
  20       - qcom,ipq6018-qmp-pcie-phy
  21       - qcom,ipq6018-qmp-usb3-phy
  22       - qcom,ipq8074-qmp-pcie-phy
  23       - qcom,ipq8074-qmp-usb3-phy
  24       - qcom,msm8996-qmp-pcie-phy
  25       - qcom,msm8996-qmp-ufs-phy
  26       - qcom,msm8996-qmp-usb3-phy
  27       - qcom,msm8998-qmp-pcie-phy
  28       - qcom,msm8998-qmp-ufs-phy
  29       - qcom,msm8998-qmp-usb3-phy
  30       - qcom,qcm2290-qmp-usb3-phy
  31       - qcom,sc7180-qmp-usb3-phy
  32       - qcom,sc8180x-qmp-pcie-phy
  33       - qcom,sc8180x-qmp-ufs-phy
  34       - qcom,sc8180x-qmp-usb3-phy
  35       - qcom,sdm845-qhp-pcie-phy
  36       - qcom,sdm845-qmp-pcie-phy
  37       - qcom,sdm845-qmp-ufs-phy
  38       - qcom,sdm845-qmp-usb3-phy
  39       - qcom,sdm845-qmp-usb3-uni-phy
  40       - qcom,sm6115-qmp-ufs-phy
  41       - qcom,sm8150-qmp-ufs-phy
  42       - qcom,sm8150-qmp-usb3-phy
  43       - qcom,sm8150-qmp-usb3-uni-phy
  44       - qcom,sm8250-qmp-ufs-phy
  45       - qcom,sm8250-qmp-gen3x1-pcie-phy
  46       - qcom,sm8250-qmp-gen3x2-pcie-phy
  47       - qcom,sm8250-qmp-modem-pcie-phy
  48       - qcom,sm8250-qmp-usb3-phy
  49       - qcom,sm8250-qmp-usb3-uni-phy
  50       - qcom,sm8350-qmp-ufs-phy
  51       - qcom,sm8350-qmp-usb3-phy
  52       - qcom,sm8350-qmp-usb3-uni-phy
  53       - qcom,sm8450-qmp-gen3x1-pcie-phy
  54       - qcom,sm8450-qmp-gen4x2-pcie-phy
  55       - qcom,sm8450-qmp-ufs-phy
  56       - qcom,sm8450-qmp-usb3-phy
  57       - qcom,sdx55-qmp-pcie-phy
  58       - qcom,sdx55-qmp-usb3-uni-phy
  59
  60   reg:
  61     minItems: 1
  62     items:
  63       - description: Address and length of PHY's common serdes block.
  64       - description: Address and length of PHY's DP_COM control block.
  65
  66   "#clock-cells":
  67     enum: [ 1, 2 ]
  68
  69   "#address-cells":
  70     enum: [ 1, 2 ]
  71
  72   "#size-cells":
  73     enum: [ 1, 2 ]
  74
  75   ranges: true
  76
  77   clocks:
  78     minItems: 1
  79     maxItems: 4
  80
  81   clock-names:
  82     minItems: 1
  83     maxItems: 4
  84
  85   resets:
  86     minItems: 1
  87     maxItems: 3
  88
  89   reset-names:
  90     minItems: 1
  91     maxItems: 3
  92
  93   vdda-phy-supply:
  94     description:
  95       Phandle to a regulator supply to PHY core block.
  96
  97   vdda-pll-supply:
  98     description:
  99       Phandle to 1.8V regulator supply to PHY refclk pll block.
 100
 101   vddp-ref-clk-supply:
 102     description:
 103       Phandle to a regulator supply to any specific refclk pll block.
 104
 105 #Required nodes:
 106 patternProperties:
 107   "^phy@[0-9a-f]+$":
 108     type: object
 109     description:
 110       Each device node of QMP phy is required to have as many child nodes as
 111       the number of lanes the PHY has.
 112
 113 required:
 114   - compatible
 115   - reg
 116   - "#clock-cells"
 117   - "#address-cells"
 118   - "#size-cells"
 119   - ranges
 120   - clocks
 121   - clock-names
 122   - resets
 123   - reset-names
 124
 125 additionalProperties: false
 126
 127 allOf:
 128   - if:
 129       properties:
 130         compatible:
 131           contains:
 132             enum:
 133               - qcom,sdm845-qmp-usb3-uni-phy
 134     then:
 135       properties:
 136         clocks:
 137           items:
 138             - description: Phy aux clock.
 139             - description: Phy config clock.
 140             - description: 19.2 MHz ref clk.
 141             - description: Phy common block aux clock.
 142         clock-names:
 143           items:
 144             - const: aux
 145             - const: cfg_ahb
 146             - const: ref
 147             - const: com_aux
 148         resets:
 149           items:
 150             - description: reset of phy block.
 151             - description: phy common block reset.
 152         reset-names:
 153           items:
 154             - const: phy
 155             - const: common
 156       required:
 157         - vdda-phy-supply
 158         - vdda-pll-supply
 159   - if:
 160       properties:
 161         compatible:
 162           contains:
 163             enum:
 164               - qcom,sdx55-qmp-usb3-uni-phy
 165     then:
 166       properties:
 167         clocks:
 168           items:
 169             - description: Phy aux clock.
 170             - description: Phy config clock.
 171             - description: 19.2 MHz ref clk.
 172         clock-names:
 173           items:
 174             - const: aux
 175             - const: cfg_ahb
 176             - const: ref
 177         resets:
 178           items:
 179             - description: reset of phy block.
 180             - description: phy common block reset.
 181         reset-names:
 182           items:
 183             - const: phy
 184             - const: common
 185       required:
 186         - vdda-phy-supply
 187         - vdda-pll-supply
 188   - if:
 189       properties:
 190         compatible:
 191           contains:
 192             enum:
 193               - qcom,msm8996-qmp-pcie-phy
 194     then:
 195       properties:
 196         clocks:
 197           items:
 198             - description: Phy aux clock.
 199             - description: Phy config clock.
 200             - description: 19.2 MHz ref clk.
 201         clock-names:
 202           items:
 203             - const: aux
 204             - const: cfg_ahb
 205             - const: ref
 206         resets:
 207           items:
 208             - description: reset of phy block.
 209             - description: phy common block reset.
 210             - description: phy's ahb cfg block reset.
 211         reset-names:
 212           items:
 213             - const: phy
 214             - const: common
 215             - const: cfg
 216       required:
 217         - vdda-phy-supply
 218         - vdda-pll-supply
 219   - if:
 220       properties:
 221         compatible:
 222           contains:
 223             enum:
 224               - qcom,ipq8074-qmp-usb3-phy
 225               - qcom,msm8996-qmp-usb3-phy
 226               - qcom,msm8998-qmp-pcie-phy
 227               - qcom,msm8998-qmp-usb3-phy
 228     then:
 229       properties:
 230         clocks:
 231           items:
 232             - description: Phy aux clock.
 233             - description: Phy config clock.
 234             - description: 19.2 MHz ref clk.
 235         clock-names:
 236           items:
 237             - const: aux
 238             - const: cfg_ahb
 239             - const: ref
 240         resets:
 241           items:
 242             - description: reset of phy block.
 243             - description: phy common block reset.
 244         reset-names:
 245           items:
 246             - const: phy
 247             - const: common
 248       required:
 249         - vdda-phy-supply
 250         - vdda-pll-supply
 251   - if:
 252       properties:
 253         compatible:
 254           contains:
 255             enum:
 256               - qcom,msm8996-qmp-ufs-phy
 257     then:
 258       properties:
 259         clocks:
 260           items:
 261             - description: 19.2 MHz ref clk.
 262         clock-names:
 263           items:
 264             - const: ref
 265         resets:
 266           items:
 267             - description: PHY reset in the UFS controller.
 268         reset-names:
 269           items:
 270             - const: ufsphy
 271       required:
 272         - vdda-phy-supply
 273         - vdda-pll-supply
 274   - if:
 275       properties:
 276         compatible:
 277           contains:
 278             enum:
 279               - qcom,msm8998-qmp-ufs-phy
 280               - qcom,sdm845-qmp-ufs-phy
 281               - qcom,sm8150-qmp-ufs-phy
 282               - qcom,sm8250-qmp-ufs-phy
 283     then:
 284       properties:
 285         clocks:
 286           items:
 287             - description: 19.2 MHz ref clk.
 288             - description: Phy reference aux clock.
 289         clock-names:
 290           items:
 291             - const: ref
 292             - const: ref_aux
 293         resets:
 294           items:
 295             - description: PHY reset in the UFS controller.
 296         reset-names:
 297           items:
 298             - const: ufsphy
 299       required:
 300         - vdda-phy-supply
 301         - vdda-pll-supply
 302   - if:
 303       properties:
 304         compatible:
 305           contains:
 306             enum:
 307               - qcom,ipq6018-qmp-pcie-phy
 308               - qcom,ipq8074-qmp-pcie-phy
 309     then:
 310       properties:
 311         clocks:
 312           items:
 313             - description: Phy aux clock.
 314             - description: Phy config clock.
 315         clock-names:
 316           items:
 317             - const: aux
 318             - const: cfg_ahb
 319         resets:
 320           items:
 321             - description: reset of phy block.
 322             - description: phy common block reset.
 323         reset-names:
 324           items:
 325             - const: phy
 326             - const: common
 327   - if:
 328       properties:
 329         compatible:
 330           contains:
 331             enum:
 332               - qcom,sc8180x-qmp-pcie-phy
 333               - qcom,sdm845-qhp-pcie-phy
 334               - qcom,sdm845-qmp-pcie-phy
 335               - qcom,sdx55-qmp-pcie-phy
 336               - qcom,sm8250-qmp-gen3x1-pcie-phy
 337               - qcom,sm8250-qmp-gen3x2-pcie-phy
 338               - qcom,sm8250-qmp-modem-pcie-phy
 339               - qcom,sm8450-qmp-gen3x1-pcie-phy
 340               - qcom,sm8450-qmp-gen4x2-pcie-phy
 341     then:
 342       properties:
 343         clocks:
 344           items:
 345             - description: Phy aux clock.
 346             - description: Phy config clock.
 347             - description: 19.2 MHz ref clk.
 348             - description: Phy refgen clk.
 349         clock-names:
 350           items:
 351             - const: aux
 352             - const: cfg_ahb
 353             - const: ref
 354             - const: refgen
 355         resets:
 356           items:
 357             - description: reset of phy block.
 358         reset-names:
 359           items:
 360             - const: phy
 361       required:
 362         - vdda-phy-supply
 363         - vdda-pll-supply
 364   - if:
 365       properties:
 366         compatible:
 367           contains:
 368             enum:
 369               - qcom,sm8150-qmp-usb3-phy
 370               - qcom,sm8150-qmp-usb3-uni-phy
 371               - qcom,sm8250-qmp-usb3-uni-phy
 372               - qcom,sm8350-qmp-usb3-uni-phy
 373     then:
 374       properties:
 375         clocks:
 376           items:
 377             - description: Phy aux clock.
 378             - description: 19.2 MHz ref clk source.
 379             - description: 19.2 MHz ref clk.
 380             - description: Phy common block aux clock.
 381         clock-names:
 382           items:
 383             - const: aux
 384             - const: ref_clk_src
 385             - const: ref
 386             - const: com_aux
 387         resets:
 388           items:
 389             - description: reset of phy block.
 390             - description: phy common block reset.
 391         reset-names:
 392           items:
 393             - const: phy
 394             - const: common
 395       required:
 396         - vdda-phy-supply
 397         - vdda-pll-supply
 398   - if:
 399       properties:
 400         compatible:
 401           contains:
 402             enum:
 403               - qcom,sm8250-qmp-usb3-phy
 404               - qcom,sm8350-qmp-usb3-phy
 405     then:
 406       properties:
 407         clocks:
 408           items:
 409             - description: Phy aux clock.
 410             - description: 19.2 MHz ref clk.
 411             - description: Phy common block aux clock.
 412         clock-names:
 413           items:
 414             - const: aux
 415             - const: ref_clk_src
 416             - const: com_aux
 417         resets:
 418           items:
 419             - description: reset of phy block.
 420             - description: phy common block reset.
 421         reset-names:
 422           items:
 423             - const: phy
 424             - const: common
 425       required:
 426         - vdda-phy-supply
 427         - vdda-pll-supply
 428   - if:
 429       properties:
 430         compatible:
 431           contains:
 432             enum:
 433               - qcom,qcm2290-qmp-usb3-phy
 434     then:
 435       properties:
 436         clocks:
 437           items:
 438             - description: Phy config clock.
 439             - description: 19.2 MHz ref clk.
 440             - description: Phy common block aux clock.
 441         clock-names:
 442           items:
 443             - const: cfg_ahb
 444             - const: ref
 445             - const: com_aux
 446         resets:
 447           items:
 448             - description: phy_phy reset.
 449             - description: reset of phy block.
 450         reset-names:
 451           items:
 452             - const: phy_phy
 453             - const: phy
 454       required:
 455         - vdda-phy-supply
 456         - vdda-pll-supply
 457
 458 examples:
 459   - |
 460     #include <dt-bindings/clock/qcom,gcc-sdm845.h>
 461     usb_2_qmpphy: phy-wrapper@88eb000 {
 462         compatible = "qcom,sdm845-qmp-usb3-uni-phy";
 463         reg = <0x088eb000 0x18c>;
 464         #clock-cells = <1>;
 465         #address-cells = <1>;
 466         #size-cells = <1>;
 467         ranges = <0x0 0x088eb000 0x2000>;
 468
 469         clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK >,
 470                  <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
 471                  <&gcc GCC_USB3_SEC_CLKREF_CLK>,
 472                  <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>;
 473         clock-names = "aux", "cfg_ahb", "ref", "com_aux";
 474
 475         resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>,
 476                  <&gcc GCC_USB3_PHY_SEC_BCR>;
 477         reset-names = "phy", "common";
 478
 479         vdda-phy-supply = <&vdda_usb2_ss_1p2>;
 480         vdda-pll-supply = <&vdda_usb2_ss_core>;
 481
 482         usb_2_ssphy: phy@200 {
 483                 reg = <0x200 0x128>,
 484                       <0x400 0x1fc>,
 485                       <0x800 0x218>,
 486                       <0x600 0x70>;
 487                 #clock-cells = <0>;
 488                 #phy-cells = <0>;
 489                 clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>;
 490                 clock-names = "pipe0";
 491                 clock-output-names = "usb3_uni_phy_pipe_clk_src";
 492             };
 493         };